A method for manufacturing an LED chip and the resulting LED chip

Abstract

The application provides a preparation method of an LED chip, comprising the following steps: sequentially growing an ALN layer, a first-type semiconductor layer, a multi-quantum well layer and a second-type semiconductor layer on a substrate; etching through the second-type semiconductor layer, the multi-quantum well layer and part of the first-type semiconductor layer to form a step structure; depositing a protective layer on the step; growing an N-type first contact layer on the exposed first-type semiconductor layer after etching the protective layer; then forming an N-type second contact layer; forming a contact reflection layer arranged in parallel with the protective layer on the second-type semiconductor layer; forming a first electrode thickening layer on the N-type second contact layer and the contact reflection layer respectively, and then forming a second electrode thickening layer on the first electrode thickening layer; depositing an insulating layer; etching the insulating layer to the second electrode thickening layer to form an N groove and a P groove respectively; arranging an N electrode in the N groove and a P electrode in the P groove to obtain the LED chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip manufacturing technology, in particular to a preparation method of LED chip and the obtained LED chip. BACKGROUND

[0002] At present, how to effectively kill viruses has become the focus of global attention, and LED has good sterilization effect, so it has been widely concerned in the industry. LED is a long-service-life, environmentally friendly and reliable light-emitting device. At present, LED is widely used in fast consumer goods, electronics, shopping malls, water disinfection and other fields.

[0003] However, the existing LED chip has the problems of low luminous brightness and harsh preparation conditions, and it cannot be widely used in hospitals and other places at present. How to effectively improve the brightness of the chip and how to prepare the LED chip through simple conditions have become the key to whether the LED chip can be applied to kill viruses.

[0004] In summary, there is an urgent need for a high-brightness LED chip to solve the problems in the prior art. SUMMARY

[0005] The present application aims to provide a preparation method of LED chip with high brightness, and the specific technical solutions are as follows:

[0006] A preparation method of LED chip, comprising the following steps:

[0007] S1: growing ALN layer, first type semiconductor layer, multi-quantum well layer and second type semiconductor layer on the substrate in sequence;

[0008] S2: etching through the second type semiconductor layer, the multi-quantum well layer and part of the first type semiconductor layer to form a step structure; depositing a protective layer on the step structure, the protective layer covering the exposed surface of the first type semiconductor layer, the side surface of the multi-quantum well layer, the side surface of the second type semiconductor layer and the upper surface of the local second type semiconductor layer; after etching the protective layer on the first type semiconductor layer, growing an N-type first contact layer on the exposed first type semiconductor layer;

[0009] S3: forming an N-type second contact layer on the N-type first contact layer and the protective layer on both sides thereof; forming a contact reflection layer arranged side by side with the protective layer on the second type semiconductor layer; forming a first electrode thickening layer on the N-type second contact layer and the contact reflection layer, respectively, and continuing to form a second electrode thickening layer on the first electrode thickening layer; obtaining a chip preliminary product;

[0010] S4: depositing an insulating layer on the chip preliminary product; etching the insulating layer to the second electrode thickening layer to form an N groove and a P groove, respectively; the N groove is located directly above the N-type second contact layer; the P groove is located directly above the contact reflection layer;

[0011] S5: setting N electrodes in the N grooves and setting P electrodes in the P grooves to obtain the LED chip.

[0012] Preferably, the step S2 further comprises a trimming operation; the trimming operation is to remove the ALN layer, the first type semiconductor layer, the multi-quantum well layer and the second type semiconductor layer at the edge so that the upper surface of the substrate at the edge is exposed.

[0013] Preferably, the first electrode thickening layer fully covers the contact reflective layer.

[0014] Preferably, the material of the contact reflective layer comprises Rh and one or more of Ni, Au, Al and Mg.

[0015] Preferably, the material of the protective layer comprises one or more of Si3N4 and SiO2; the thickness of the protective layer is 200-500 nm.

[0016] Preferably, the material of the N type second contact layer comprises three or more of Ti, Cr, Pt, Au, Al and Ni; the thickness of the N type second contact layer is 300-800 nm.

[0017] Preferably, the material of the first electrode thickening layer comprises three or more of Ti, Cr, Pt, Au, Al and Ni, and the thickness is 300-800 nm; the material of the second electrode thickening layer comprises three or more of Ti, Cr, Pt, Au, Al, Ni and Sn, and the thickness is 400-900 nm.

[0018] Preferably, the upper surface of the N type second contact layer is a concave structure with a low middle and high periphery; the N groove is arranged at the middle part of the N type second contact layer.

[0019] Preferably, the material of the N type first contact layer is gallium nitride doped with Si, and the concentration of the Si is 1-4×10-19 atoms / cm 3 .

[0020] An LED chip prepared by using the preparation method.

[0021] The technical solution of the present application has the following beneficial effects:

[0022] (1) The application provides a preparation method of an LED chip, and solves the problem of harsh preparation conditions of the LED chip in the prior art, which mechanism is that, in the prior art, the N-type first contact layer is generally made of metal material and needs to be heated at a high temperature of 800 DEG C or above to form a TI-N bond with the first-type semiconductor layer to form an ohmic contact, and the contact is unstable, and there may be gaps or bubbles between the N-type first contact layer and the first-type semiconductor layer, so that the current diffusion is disordered, and the temperature of the chip during operation is high; and in the application, the N-type first contact layer is not made of metal material, and an N-GAN (i.e. the N-type first contact layer) is grown on the first-type semiconductor layer, and then an ohmic contact is formed between the N-type second contact layer and the N-type first contact layer, the whole process does not need high-temperature heating (the condition is easier to realize compared with the prior art), and a stable ohmic contact can be formed, and the obtained chip has better performance and less heat loss.

[0023] (2) The application provides a preparation method of an LED chip, and solves the problem of low brightness of the chip in the prior art, which mechanism is that, in the traditional LED, ITO or the like is used as the second-type contact layer, and these materials cannot reflect light in the UVC band and cannot reflect light, and the contact reflection layer of the application has good reflection effect on light in the UVC band, and the light in the UVC band can be effectively reflected through the contact reflection layer to reduce absorption and improve brightness; secondly, the N-type first contact layer can better form an ohmic contact and is more conducive to the diffusion of current, so that the current distribution is more reasonable and the brightness is improved.

[0024] (3) The application provides a preparation method of an LED chip, and reduces the problem of electric leakage of the LED chip by arranging a protective layer, which mechanism is that, the protective layer is arranged at the etching position to prevent IR electric leakage, and plays a protective role when the N-type first contact layer is grown, so that the place with the protective layer cannot grow the N-type first contact layer, and the place without the protective layer can normally grow the required N-type first contact layer, thereby effectively reducing the risk of electric leakage caused by the thickening of the second electrode.

[0025] In addition to the objects, features and advantages described above, the application has other objects, features and advantages. The application will be further described below with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0026] The drawings constituting a part of the application are used to provide further understanding of the application, and the schematic embodiments of the application and the description thereof are used to explain the application, and do not constitute improper limitation on the application. In the drawings:

[0027] Figure 1 is a product structure schematic diagram after etching in step S2 in the preferred embodiment 1 of the application.

[0028] Figure 2 is the product structure schematic diagram after step S2 in the preferred embodiment 1 of the present application;

[0029] Figure 3 is the product structure schematic diagram after adding N-type second contact layer in step S3 in the preferred embodiment 1 of the present application;

[0030] Figure 4 is the product structure schematic diagram after adding contact reflection layer in step S3 in the preferred embodiment 1 of the present application;

[0031] Figure 5 is the product structure schematic diagram after adding first electrode thickening layer in step S3 in the preferred embodiment 1 of the present application;

[0032] Figure 6 is the product structure schematic diagram after adding second electrode thickening layer in step S3 in the preferred embodiment 1 of the present application (i.e. the initial product of the chip);

[0033] Figure 7 is the product structure schematic diagram after forming N groove and P groove in step S4 in the preferred embodiment 1 of the present application;

[0034] Figure 8 is the structure schematic diagram of the LED chip in the preferred embodiment 1 of the present application;

[0035] Figure 9 is the top view of the LED chip in the preferred embodiment 1 of the present application;

[0036] Wherein, 1-substrate layer, 2-ALN layer, 3-first type semiconductor layer, 4-multiquantum well layer, 5-second type semiconductor layer, 6-protection layer, 7-N-type first contact layer, 8-N-type second contact layer, 9-contact reflection layer, 10-first electrode thickening layer, 11-second electrode thickening layer, 12-insulating layer, 13-N electrode, 14-P electrode. DETAILED DESCRIPTION

[0037] The embodiments of the present application are described in detail below with reference to the accompanying drawings, but the present application can be implemented in various different ways as limited and covered by the claims.

[0038] Embodiment 1:

[0039] Referring to Figure 8 and Figure 9 , a preparation method of an LED chip comprises the following steps:

[0040] S1: growing, on a substrate 1 (the material of the substrate 1 is sapphire) (by MOVCD equipment), an ALN layer 2 (the thickness is 2.5-3.5 um, and 3 um in the embodiment), a first-type semiconductor layer 3, a multi-quantum well layer 4, and a second-type semiconductor layer 5 (the total thickness of the first-type semiconductor layer 3, the multi-quantum well layer 4, and the second-type semiconductor layer 5 is 0.8-1.5 um, and 1 um in the embodiment; the materials of the first-type semiconductor layer 3, the multi-quantum well layer 4, and the second-type semiconductor layer 5 are the same as those in the prior art) in sequence;

[0041] S2: etching (by a photo-etching process and a plasma etching process; the etching depth is 400-1000 nm, and 850 nm in the embodiment; the side wall angle obtained by etching is 25-70°, and 40° in the embodiment) through the second-type semiconductor layer 5, the multi-quantum well layer 4, and part of the first-type semiconductor layer 3 to form a step structure, see Figure 1 ; depositing a protective layer 6 on the step, the protective layer 6 covering the exposed surface of the first-type semiconductor layer 3, the side of the multi-quantum well layer 4, the side of the second-type semiconductor layer 5, and the upper surface of the local second-type semiconductor layer 5; etching (the etching solution used is BOE, and the etching depth is 250 nm) the protective layer 6 on the first-type semiconductor layer 3 to grow an N-type first contact layer 7 on the exposed first-type semiconductor layer 3 (by MOVCD equipment), see Figure 2 ;

[0042] S3: forming an N-type second contact layer 8 on the N-type first contact layer 7 and the protective layers 6 on both sides of the N-type first contact layer 7 (by metal sputtering or evaporation), see Figure 3 ; forming a contact reflection layer 9 arranged side by side with the protective layer 6 on the second-type semiconductor layer 5 (by metal sputtering or evaporation), see Figure 4 ; forming a first electrode thickening layer 10 on the N-type second contact layer 8 and the contact reflection layer 9 respectively (by metal sputtering or evaporation), see Figure 5 , and continuing to form a second electrode thickening layer 11 on the first electrode thickening layer 10 (by metal sputtering or evaporation); obtaining a chip preliminary product, see Figure 6 ;

[0043] S4: depositing an insulating layer 12 (the insulating layer 12 is one or more of Si3N4 and SiO2, and SiO2 is used in the embodiment) on the chip preliminary product; etching the insulating layer 12 to the second electrode thickening layer 11 to form an N groove and a P groove respectively, see Figure 7 ; the N groove is located directly above the N-type second contact layer 8; the P groove is located directly above the contact reflection layer 9;

[0044] S5: arranging an N electrode 13 in the N groove and an P electrode 14 in the P groove to obtain an LED chip, see Figure 8 andFigure 9 .

[0045] In this embodiment, a trimming operation is further included in step S2; the trimming operation is to remove the ALN layer 2, the first-type semiconductor layer 3, the multi-quantum well layer 4 and the second-type semiconductor layer 5 at the edge, so that the substrate (1) is exposed at the upper surface of the edge (the angle of the sidewall after the trimming operation is 40-70°, and the angle in this embodiment is 55°).

[0046] In this embodiment, the first electrode thickening layer 10 fully covers the contact reflective layer 9.

[0047] In this embodiment, the material of the contact reflective layer 9 includes Rh and one or more of Ni, Au, Al and Mg (in this embodiment, Rh and Au).

[0048] In this embodiment, the material of the protective layer 6 includes one or more of Si3N4 and SiO2; the thickness of the protective layer 6 is 200-500 nm (in this embodiment, 250 nm).

[0049] In this embodiment, the material of the N-type second contact layer 8 includes three or more of Ti, Cr, Pt, Au, Al and Ni (in this embodiment, Ti, Cr and Pt) ; the thickness of the N-type second contact layer 8 is 300-800 nm (in this embodiment, 600 nm).

[0050] In this embodiment, the material of the first electrode thickening layer 10 includes three or more of Ti, Cr, Pt, Au, Al and Ni (in this embodiment, Ti, Cr and Pt), and the thickness is 300-800 nm (in this embodiment, 550 nm) ; the material of the second electrode thickening layer 11 includes three or more of Ti, Cr, Pt, Au, Al, Ni and Sn (in this embodiment, Ti, Cr and Pt), and the thickness is 400-900 nm (in this embodiment, 800 nm).

[0051] In this embodiment, the upper surface of the N-type second contact layer 8 is a concave structure with a low middle and high periphery, which facilitates the first electrode thickening layer to form stable contact and simultaneously realize uniform diffusion of current; the N recess is arranged at the middle part of the N-type second contact layer 8.

[0052] In this embodiment, the material of the N-type first contact layer 7 is gallium nitride doped with Si, and the concentration of the Si is 1-4×10 -19 atoms / cm 3 (in this embodiment, the concentration is 1.8×10 -19 atoms / cm 3 ).

[0053] Example 2: Different from Example 1, the material of the contact reflective layer 9 does not include Rh, and the material of the contact reflective layer 9 only includes Ni and Au, and the other unmentioned contents are the same as those of Example 1.

[0054] Example 3: Different from Example 1, the first electrode thickening layer 10 partially covers the contact reflective layer 9, and the other unmentioned contents are the same as those of Example 1.

[0055] Comparative Example 1: An LED chip obtained by using a high-temperature annealing process in the prior art.

[0056] Comparative Example 2: Different from Example 1, there is no trimming operation in step S2, and the other unmentioned contents are the same as those of Example 1.

[0057] Comparative Example 3: Different from Example 1, the material of the N-type first contact layer 7 is undoped Si gallium nitride, and the other unmentioned contents are the same as those of Example 1.

[0058] Table 1: Comparison of performance parameters of Examples 1-3 and Comparative Examples 1-3 (each for 10 pieces) (product size is 10x20mil)

[0059]

[0060]

[0061] From the comparison of the performance parameters of Examples 1-3 and Comparative Examples 1-3, the performance of Examples 1-3 is better than that of Comparative Examples 1-3 in the experimental tests of working voltage, chip brightness, IR yield, and 168H light decay maintenance rate, especially in working voltage and chip brightness. In the case of lower energy consumption, the chip brightness of Examples 1-3 is much higher than that of Comparative Examples 1-3, which means that the LED chip provided by the present application has made excellent progress and meets the development direction of energy saving and environmental protection.

[0062] From the comparison of Example 1 and Example 2, the LED chip provided by Example 1 has lower working voltage and higher luminous intensity. In the case of the same IR yield, the 168H light decay maintenance rate of Example 1 is higher, and the luminous performance is better. The mechanism is that in the UVC band, the reflectivity of Rh is higher than that of other metal materials. Therefore, the reflectivity of the contact reflective layer formed by Rh and Au is higher than that of the contact reflective layer formed by Ni and Au. Therefore, the luminous performance of Example 1 is better.

[0063] Compared with Example 1 and Example 3, the working voltage, IR yield and 168H light decay maintenance rate of the LED chip provided by Example 1 are similar to those of Example 3, but the brightness of the chip of Example 1 is higher than that of Example 3. The mechanism is that the full coating makes the first electrode thickening layer better protect the contact reflection layer, avoiding damage to the contact reflection layer in the subsequent operation process, so that the contact reflection layer can reflect better. In addition, full coating is conducive to current conduction, which can avoid the crowding effect of current.

[0064] Compared with Example 1 and Comparative Example 1, the brightness of the chip, IR yield and 168H light decay maintenance rate of the LED chip provided by Example 1 are much higher than those of Comparative Example 1, and the working voltage is much lower than that of Comparative Example 1. The mechanism is that in the prior art, the N-type first contact layer generally uses metal material and needs to be heated at a high temperature of 800°C or above to form a TI-N bond with the first-type semiconductor layer to form an ohmic contact, and the contact is unstable, and there may be gaps or bubbles between the N-type first contact layer and the first-type semiconductor layer, causing current diffusion disorder, resulting in high temperature during chip operation, thereby causing the working voltage to rise. The N-type first contact layer of the present application is not made of metal material and a layer of N-GAN (i.e. N-type first contact layer) is grown on the first-type semiconductor layer, and then an ohmic contact is formed between the N-type second contact layer and the N-type first contact layer. The whole process does not need high temperature heating (the conditions are easier to achieve compared with the prior art), and a stable ohmic contact can be formed, and the performance of the obtained chip is better and the heat loss is less. Therefore, the LED chip provided by Example 1 has greatly improved in working voltage, chip brightness, IR yield and 168H light decay maintenance rate compared with the existing chip.

[0065] Compared with Example 1 and Comparative Example 2, the IR yield and 168H light decay maintenance rate of the LED chip provided by Example 1 are higher. The mechanism is that in Comparative Example 2, due to the profile of each layer exceeding the profile of the substrate at the edge of the chip, under the action of gravity, each layer may mix to cause uneven layer thickness, so that the current is dispersed poorly when passing through, thereby causing heating. Therefore, under the condition that the working voltage is similar, the brightness of the chip of Comparative Example 2 is slightly lower than that of Example 1. Further, due to the uneven edge, the IR yield and 168H light decay maintenance rate of Example 2 are much lower than those of Example 1.

[0066] Compared with Example 1 and Comparative Example 3, the chip brightness, IR yield and 168H light decay maintenance rate of the LED chip provided by Example 1 are much higher than those of Comparative Example 3, and the working voltage is much lower than that of Comparative Example 3. The mechanism is that the material of the N-type first contact layer in Comparative Example 3 is undoped Si gallium nitride. Without high-temperature treatment, the material of the N-type first contact layer and the contact reflection layer and the N-type second contact layer cannot change from the original Schottky contact to ohmic contact. The material of the N-type first contact layer in Example 1 is doped Si gallium nitride. Because the number of outermost electrons of Si is more than that of N, the addition of Si can form a good ohmic contact between the material of the N-type first contact layer and the contact reflection layer. Therefore, the chip brightness, IR yield and 168H light decay maintenance rate of the LED chip provided by Example 1 are much higher than those of Comparative Example 3, and the working voltage is much lower than that of Comparative Example 3.

[0067] The preferred embodiments of the present application have been described above with the preferred embodiments, but the present application is not limited to the above examples. It will be appreciated by those skilled in the art that the present application can be variously changed and modified. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the scope of the present application.

Claims

1. A method of manufacturing an LED chip, characterized by, The method comprises the following steps: S1: sequentially growing an ALN layer (2), a first-type semiconductor layer (3), a multi-quantum well layer (4), and a second-type semiconductor layer (5) on a substrate (1); S2: etching through the second-type semiconductor layer (5), the multi-quantum well layer (4), and part of the first-type semiconductor layer (3) to form a step structure; depositing a protective layer (6) on the step structure, the protective layer (6) covering the exposed surface of the first-type semiconductor layer (3), the side surface of the multi-quantum well layer (4), the side surface of the second-type semiconductor layer (5), and the upper surface of the local second-type semiconductor layer (5); after etching the protective layer (6) on the first-type semiconductor layer (3), growing an N-type first contact layer (7) on the exposed first-type semiconductor layer (3); S3: forming an N-type second contact layer (8) on the N-type first contact layer (7) and the protective layer (6) on both sides thereof; forming a contact reflection layer (9) on the second-type semiconductor layer (5) in parallel with the protective layer (6); forming a first electrode thickening layer (10) on the N-type second contact layer (8) and the contact reflection layer (9) respectively, and then forming a second electrode thickening layer (11) on the first electrode thickening layer (10); obtaining a chip preliminary product; the first electrode thickening layer (10) above the contact reflection layer (9) fully covers the contact reflection layer (9); the upper surface of the N-type second contact layer (8) is a concave structure with a low middle part and high peripheral parts; an N recess is arranged at the middle part of the N-type second contact layer (8); S4: depositing an insulating layer (12) on the chip preliminary product; etching the insulating layer (12) to the second electrode thickening layer (11) to form an N recess and a P recess respectively; the N recess is located directly above the N-type second contact layer (8); the P recess is located directly above the contact reflection layer (9); S5: arranging an N electrode (13) in the N recess and a P electrode (14) in the P recess to obtain an LED chip.

2. The production method according to claim 1, characterized by, The trimming operation is further included in step S2; the trimming operation is to remove the ALN layer (2), the first-type semiconductor layer (3), the multi-quantum well layer (4), and the second-type semiconductor layer (5) at the edge, so that the upper surface of the substrate (1) at the edge is exposed.

3. The preparation method according to claim 1, characterized in that, The material of the contact reflection layer (9) comprises Rh and one or more of Ni, Au, Al, and Mg.

4. The production method according to claim 1, characterized by, The material of the protective layer (6) comprises one or more of Si3N4 and SiO2; the thickness of the protective layer (6) is 200-500 nm.

5. The method of claim 1, wherein, The material of the N-type second contact layer (8) comprises three or more of Ti, Cr, Pt, Au, Al, and Ni; the thickness of the N-type second contact layer (8) is 300-800 nm.

6. The method of claim 1, wherein, The material of the first electrode thickening layer (10) comprises three or more of Ti, Cr, Pt, Au, Al, and Ni; the thickness of the first electrode thickening layer (10) is 300-800 nm; the material of the second electrode thickening layer (11) comprises three or more of Ti, Cr, Pt, Au, Al, Ni, and Sn; the thickness of the second electrode thickening layer (11) is 400-900 nm.

7. The preparation method according to claim 1, characterized in that, The material of the N-type first contact layer (7) is gallium nitride doped with Si, the concentration of the Si being 1-4 x 10 -19 atoms / cm 3 .

8. An LED chip, characterized by The preparation method according to any one of claims 1-7 is used.

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