Amplifier circuits, electronic devices

Abstract

This application relates to the field of amplifier technology and discloses an amplifier circuit and electronic device. The amplifier circuit includes a push-pull circuit and an amplification circuit. The push-pull circuit includes a first transistor, a second transistor, and a level shifting circuit. A first terminal of the first transistor receives a power supply signal, and a second terminal of the first transistor is used for output. The first terminal of the second transistor is connected to the second terminal of the first transistor, and the second terminal of the second transistor is grounded. The level shifting circuit has a first terminal connected to the control terminal of the first transistor, and a second terminal connected to the control terminal of the second transistor. The amplification circuit is connected to the control terminal of the second transistor and is used to generate an amplified signal under the action of the input signal, and input the amplified signal to the control terminal of the second transistor. Through this method, the gain and amplification speed of the amplifier circuit for processing the input signal can be improved.

Description

Technical Field

[0001] This application relates to the field of amplifier technology, and in particular to an amplifier circuit and electronic device. Background Technology

[0002] In analog circuit chips, amplifiers include single-transistor amplifiers, such as common-source amplifiers and common-gate amplifiers; multi-transistor amplifiers include push-pull amplifiers and differential amplifiers, among which push-pull amplifiers have become a popular research direction due to their simple structure and high gain.

[0003] The current solution does not achieve optimal performance for single-tube amplifiers and push-pull amplifiers; the gain and speed are insufficient. Summary of the Invention

[0004] To address the aforementioned issues, this application provides amplifier circuits and electronic devices that can improve the gain and amplification speed of amplifier circuits for input signal processing.

[0005] One technical solution adopted in this application is to provide an amplifier circuit, which includes: a push-pull circuit, comprising: a first transistor, the first terminal of which receives a power supply signal and the second terminal of which is used for output; a second transistor, the first terminal of which is connected to the second terminal of the first transistor and the second terminal of the second transistor is grounded; a level shifting circuit, the first terminal of which is connected to the control terminal of the first transistor and the second terminal of which is connected to the control terminal of the second transistor; and an amplification circuit, connected to the control terminal of the second transistor, used to generate an amplified signal under the action of the input signal and input the amplified signal to the control terminal of the second transistor.

[0006] The level shifting circuit includes: a third transistor, the first end of which is connected to the control terminal of the first transistor, and the second end of which is connected to the control terminal of the second transistor; and a fourth transistor, the first end of which is connected to the control terminal of the first transistor, and the second end of which is connected to the control terminal of the second transistor.

[0007] The amplifier circuit also includes a constant current source. The first end of the constant current source is input with a power supply signal, and the second end of the constant current source is connected to the control terminal of the first transistor.

[0008] The amplifier circuit includes a sixth transistor and a seventh transistor; the first terminal of the sixth transistor is connected to the second terminal of the seventh transistor, the second terminal of the sixth transistor is grounded, and the control terminal of the sixth transistor is used for input signals; the first terminal of the seventh transistor is connected to the control terminal of the second transistor.

[0009] The amplifier circuit also includes a bias circuit; the first terminal of the bias circuit receives the power supply signal, the second terminal of the bias circuit is connected to the control terminal of the fifth transistor, the third terminal of the bias circuit is connected to the control terminal of the seventh transistor, and the fourth terminal of the bias circuit is grounded.

[0010] The bias circuit includes an eighth transistor, a ninth transistor, a tenth transistor, and a resistor. The first terminal of the eighth transistor receives a power supply signal, and the second terminal of the eighth transistor is connected to the control terminals of the eighth and ninth transistors. The first terminal of the ninth transistor receives a power supply signal, and the second terminal of the ninth transistor is connected to the control terminal of the seventh transistor. The first terminal of the resistor is connected to the eighth transistor, and the second terminal of the resistor is grounded. The first terminal of the tenth transistor is connected to the second terminal of the ninth transistor. The second terminal of the tenth transistor is grounded, and the control terminal of the tenth transistor is connected to the third terminal of the bias circuit.

[0011] The amplifier circuit includes an eleventh transistor and a twelfth transistor. The first terminal of the twelfth transistor receives a power supply signal, the second terminal of the twelfth transistor is connected to the first terminal of the eleventh transistor, the control terminal of the twelfth transistor is used to input signals, and the second terminal of the eleventh transistor is connected to the control terminal of the first transistor.

[0012] The amplifier circuit further includes a first input voltage circuit; the first input voltage circuit includes: a thirteenth transistor, the first terminal of which receives a power supply signal, and the second terminal of which is connected to the control terminal of the thirteenth transistor; a fourteenth transistor, the first terminal of which is connected to the second terminal of the thirteenth transistor, and the second terminal of which is connected to the control terminal of the fourteenth transistor and the first control terminal of the level shift circuit, for providing a first reference voltage to the level shift circuit; and a fifteenth transistor, the first terminal of which is connected to the second terminal of the fourteenth transistor, the second terminal of which is grounded, and the control terminal of the fifteenth transistor for receiving a control signal.

[0013] The amplifier circuit further includes a second input voltage circuit; the second input voltage circuit includes: a sixteenth transistor, the first terminal of which receives a power supply signal, and the second terminal of which is connected to the second control terminal of the level shift circuit to provide a second reference voltage to the level shift circuit; a seventeenth transistor, the first terminal and the control terminal of which are connected to the second terminal of the sixteenth transistor; and an eighteenth transistor, the first terminal of which is connected to the second terminal of the seventeenth transistor, the second terminal of which is grounded, and the control terminal of which is connected to the second terminal of the seventeenth transistor.

[0014] Another technical solution adopted in this application is to provide an electronic device, which includes: an amplifier circuit, the amplifier circuit being the amplifier circuit provided in the above solution; and a controller, connected to the amplifier circuit, for inputting a signal to the amplifier circuit so that the amplifier circuit amplifies the input signal.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides an amplifier circuit comprising: a push-pull circuit, including: a first transistor, with a first terminal receiving a power supply signal and a second terminal for output; a second transistor, with its first terminal connected to the second terminal of the first transistor and its second terminal grounded; a level shifting circuit, with its first terminal connected to the control terminal of the first transistor and its second terminal connected to the control terminal of the second transistor; and an amplification circuit connected to the control terminal of the second transistor, used to generate an amplified signal under the influence of the input signal and input the amplified signal to the control terminal of the second transistor. By combining the push-pull circuit and the amplification circuit, the input signal is amplified once in the amplification circuit and then amplified a second time through the push-pull circuit, thereby improving the gain and amplification speed of the amplifier circuit for processing the input signal. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0017] Figure 1 This is a schematic diagram of an embodiment of the amplifier circuit provided in this application;

[0018] Figure 2 This application provides Figure 1 A schematic diagram of an embodiment of the push-pull circuit;

[0019] Figure 3 This application provides Figure 1 A schematic diagram of an embodiment of the amplifier circuit;

[0020] Figure 4 This application provides Figure 2 and Figure 3 A schematic diagram of the combined amplifier circuit;

[0021] Figure 5 This is a schematic diagram of another embodiment of the amplifier circuit provided in this application;

[0022] Figure 6This is a schematic diagram of another embodiment of the amplifier circuit provided in this application;

[0023] Figure 7 This is a schematic diagram of another embodiment of the amplifier circuit provided in this application;

[0024] Figure 8 This is a schematic diagram of another embodiment of the amplifier circuit provided in this application;

[0025] Figure 9 This is a schematic diagram of the structure of an embodiment of the electronic device provided in this application. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It is understood that the specific embodiments described herein are only for explaining this application and not for limiting it. Furthermore, it should be noted that, for ease of description, only the parts related to this application are shown in the accompanying drawings, not all structures. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0027] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0028] An amplifier circuit increases the output power of a signal. It obtains its energy from a power supply to control the waveform of the output signal to match the input signal, but with a larger amplitude. Therefore, an amplifier circuit can also be considered an adjustable output power supply used to obtain a stronger output signal than the input signal. An amplifier circuit consists of transistors (or field-effect transistors), capacitors, resistors, and a power supply. The amplifier circuit amplifies a weak electrical signal to the required voltage, current, or power value through electrical energy conversion; that is, it utilizes the amplification and control functions of transistors (or field-effect transistors) to convert the energy of the power supply into an output quantity that varies proportionally to the input quantity.

[0029] See Figure 1 , Figure 1 This is a schematic diagram of an embodiment of the amplifier circuit provided in this application. The amplifier circuit 10 includes a push-pull circuit 11 and an amplification circuit 12.

[0030] The push-pull circuit 11 includes a first transistor M1, a second transistor M2, and a level shifting circuit 111. The first terminal a1 of the first transistor M1 receives a power signal, and the second terminal b1 of the first transistor M1 is used for output. The first terminal a2 of the second transistor M2 is connected to the second terminal b1 of the first transistor M1, and the second terminal b2 of the second transistor M2 is grounded. The first terminal a3 of the level shifting circuit 111 is connected to the control terminal c1 of the first transistor M1, and the second terminal b3 of the level shifting circuit 111 is connected to the control terminal c2 of the second transistor M2.

[0031] The level shifting circuit 111 includes a third transistor and a fourth transistor. The first terminal of the third transistor is connected to the control terminal of the first transistor, and the second terminal of the third transistor is connected to the control terminal of the second transistor; the first terminal of the fourth transistor is connected to the control terminal of the first transistor, and the second terminal of the fourth transistor is connected to the control terminal of the second transistor. The level shifting circuit 111, composed of the third and fourth transistors, can achieve level shifting in the large-signal range when the third transistor is a P-type MOS transistor and the fourth transistor is an N-type MOS transistor, thus separating the gate voltage values ​​of the NMOS and PMOS transistors for separate control; it can also achieve input / output level following and AC short-circuiting in the small-signal range, enabling amplification of small signals at the output stage.

[0032] See Figure 2 , Figure 2 This is a schematic diagram of an embodiment of the push-pull circuit provided in this application.

[0033] The push-pull circuit 11 includes a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4. In some embodiments, all transistors are MOS transistors. The source of the first transistor M1 is connected to the power supply, the drain of the first transistor M1 is connected to the drain of the second transistor M2, and the gate of the first transistor M1 is connected to the source of the third transistor M3 and the drain of the fourth transistor M4. The source of the second transistor M2 is grounded, the drain of the second transistor M2 is connected to the drain of the first transistor M1, and the gate of the first transistor M1 is connected to the drain of the third transistor M3 and the source of the fourth transistor M4. The drains of the first transistor M1 and the second transistor M2 are connected to the output terminal OUT for outputting the amplified signal. The output terminal OUT can be connected to a load. The gates of the third transistor M3 and the fourth transistor M4 receive the control voltage. The drain of the third transistor M3 is connected to the source of the fourth transistor M4, and the source of the third transistor M3 is connected to the drain of the fourth transistor M4. The third transistor M3 and the fourth transistor M4 are connected based on the above connection relationships. Figure 1The level shifting circuit 111 is used in the circuit. The source of the third transistor M3 is equivalent to the first terminal of the third transistor, and the drain of the third transistor M3 is equivalent to the second terminal of the third transistor. The source of the fourth transistor M4 is equivalent to the second terminal of the fourth transistor, and the drain of the fourth transistor M4 is equivalent to the first terminal of the fourth transistor.

[0034] Amplifier circuit 12 is connected to the control terminal of the second transistor M2, and is used to generate an amplified signal under the action of the input signal, and input the amplified signal to the control terminal of the second transistor M2.

[0035] See Figure 3 , Figure 3 This is a schematic diagram of an embodiment of the amplifier circuit provided in this application.

[0036] The amplifier circuit 12 includes a sixth transistor M6 and a seventh transistor M7. The first terminal of the sixth transistor M6 is connected to the second terminal of the seventh transistor M7, and the second terminal of the sixth transistor M6 is grounded. The control terminal of the sixth transistor M6 is used for the input signal. The first terminal of the seventh transistor M7 is connected to the control terminal of the second transistor M2. A small input signal can be amplified once by the sixth transistor M6 and then amplified again by the seventh transistor M7 in the amplifier circuit 12, achieving double amplification.

[0037] In some embodiments, all of the above transistors are MOS transistors, and the gate of the sixth transistor M6 is used to receive the input signal, the voltage V of the input signal at the gate. GS When the voltage is greater than the reference voltage, the sixth transistor M6 generates a current I1. The gate of the seventh transistor M7 is used to receive control signals, and the voltage V at the gate... GS When the voltage is greater than the reference voltage, since the sixth transistor M6 is already turned on, the seventh transistor M7 is turned on, generating a current I2.

[0038] Because the source of the sixth transistor M6 is grounded, its reference voltage is very small. Therefore, a small-signal input signal will be greater than the reference voltage, causing the sixth transistor M6 to conduct. Since the sixth transistor M6 is already conducting, the reference voltage of the seventh transistor M7 is also very small. Therefore, inputting a control signal to the gate of the seventh transistor M7 will cause it to conduct.

[0039] Will Figure 2 and Figure 3 Combining them, we can obtain, for example Figure 4The amplifier circuit diagram shown depicts a scenario where the drain of the seventh transistor M7 is connected to the gate of the second transistor M2. Since the drain of the third transistor M3 and the source of the fourth transistor M4 are both connected to the gate of the second transistor M2, there is a common point A between the drain of the third transistor M3, the source of the fourth transistor M4, and the drain of the seventh transistor M7. Since the source of the third transistor M3 and the drain of the fourth transistor M4 are both connected to the gate of the first transistor M1, there is a common point B.

[0040] In one application scenario, common point B is also connected to a corresponding power supply circuit. When the gate voltage of the third transistor M3 is VCC-2V... GS The gate input voltage of the fourth transistor M4 is 2V. GS When a voltage is applied to the gate of the seventh transistor M7 and the gate of the sixth transistor M6 is supplied with the input signal IN, if the voltage of the input signal IN is greater than the reference voltage of the sixth transistor M6, then the sixth transistor M6 conducts, forming a loop from common point B to common point A to the seventh transistor M7 and back to the sixth transistor M6. At this time, the input signal is input from IN, amplified once by the sixth transistor M6, and output from the drain of the sixth transistor M6. Because the drain of the sixth transistor M6 is the source of the seventh transistor M7, it is then amplified once more by the seventh transistor M7 and output from the drain of the seventh transistor M7 to common point A, and then to the gate of the second transistor M2, where it is amplified again. At this time, because the voltage at point A changes, the voltage at point B changes accordingly in the same direction, and the changed voltage is supplied to the gate of the first transistor M1. The path from the input signal IN to point A is a cascode structure, which has very high gain.

[0041] Specifically, when the input signal voltage gradually increases from 0, after the sixth transistor M6 is turned on, the potential at point A is quickly pulled down to a low level, and the second transistor M2 is turned off. At the same time, the potential at point B decreases in the same direction as the potential at point A and is pulled down to a low level. The first transistor M1 is quickly turned on, and the drain of the first transistor M1 quickly outputs a high level. When the input signal voltage gradually decreases from a high level, when the sixth transistor M6 is turned off, the potential at point A is quickly pulled up to a high level, and the second transistor M2 is turned on. The drain of the second transistor M2 quickly outputs a low level. At the same time, the potential at point B increases in the same direction as the potential at point A and is pulled up to a high level, and the first transistor M1 is turned off.

[0042] In other embodiments, the transistors in the amplifier circuit can be bipolar junction transistors (BJTs) or field-effect transistors (FETs, unipolar). Transistors have three terminals; the three terminals of a bipolar junction transistor are the emitter, base, and collector, composed of N-type and P-type semiconductors, respectively; the three terminals of a field-effect transistor are the source, gate, and drain, respectively. The specific type is replaced according to the actual needs of the amplifier circuit.

[0043] Unlike existing technologies, this application discloses an amplifier circuit comprising: a push-pull circuit, including: a first transistor, with a first terminal receiving a power supply signal and a second terminal for output; a second transistor, with a first terminal connected to the second terminal of the first transistor and the second terminal grounded; a level shifting circuit, with a first terminal connected to the control terminal of the first transistor and a second terminal connected to the control terminal of the second transistor; and an amplification circuit connected to the control terminal of the second transistor, used to generate an amplified signal under the influence of the input signal and input the amplified signal to the control terminal of the second transistor. By combining the push-pull circuit and the amplification circuit, the input signal is amplified once in the amplification circuit and then amplified a second time through the push-pull circuit, thereby improving the gain and amplification speed of the amplifier circuit for processing the input signal.

[0044] See Figure 5 , Figure 5 This is a schematic diagram of another embodiment of the amplifier circuit provided in this application. The amplifier circuit 10 includes a first transistor M1, a second transistor M2, a level shifting circuit 111, an amplification circuit 12, a bias circuit 13, a first input voltage circuit 14, a second input voltage circuit 15, and a fifth transistor M5.

[0045] The level shifting circuit 111 includes a third transistor M3 and a fourth transistor M4. The amplifier circuit 12 includes a sixth transistor M6 and a seventh transistor M7. The connection relationships between the transistors have been described in the above embodiments and will not be repeated here.

[0046] In other embodiments, the fifth transistor M5 can be replaced by any constant current source, wherein the first end of the constant current source is input with a power supply signal, and the second end of the constant current source is connected to the control terminal of the first transistor, which can provide a constant current under the constant voltage provided by the first input voltage circuit 14 and the second input voltage circuit 15, so that the third transistor M3 and the fourth transistor M4 in the level shifting circuit 111 both work in the saturated constant current source region to achieve level shifting.

[0047] The bias circuit 13 has a power supply signal input at its first terminal, a control terminal connected to the fifth transistor M5 at its second terminal, a control terminal connected to the seventh transistor M7 at its third terminal, and a grounded terminal. Under the influence of the input voltage, the bias circuit 13 provides a stable control terminal voltage to the control terminals of the fifth transistor M5 and the seventh transistor M7. Specifically, the bias circuit 13 includes an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, and a resistor R1. The power supply signal is input at the first terminal of the eighth transistor M8, and its second terminal is connected to both the control terminals of the eighth transistor M8 and the ninth transistor M9. The power supply signal is input at the first terminal of the ninth transistor M9, and its second terminal is connected to the control terminal of the seventh transistor M7. The first terminal of the resistor R1 is connected to the eighth transistor M8, and its second terminal is grounded. The first terminal of the tenth transistor M10 is connected to the second terminal of the ninth transistor M9, and its second terminal is grounded. The control terminal of the tenth transistor M10 is connected to the third terminal of the bias circuit 13. The bias circuit 13 provides a control input voltage to the seventh transistor M7 through the connection of the aforementioned transistors, so that the seventh transistor M7 is in the conducting state, thereby amplifying the input signal input from the sixth transistor M6, and also providing voltage for the subsequent first input voltage circuit 14 and second input voltage circuit 15, so that the first input voltage circuit 14 and second input voltage circuit 15 can work normally.

[0048] The first input voltage circuit 14 includes a thirteenth transistor M13, a fourteenth transistor M14, and a fifteenth transistor M15. The first terminal of the thirteenth transistor M13 receives a power signal, and its second terminal is connected to its control terminal. The first terminal of the fourteenth transistor M14 is connected to the second terminal of the thirteenth transistor M13, and its second terminal is connected to both its control terminal and the first control terminal of the level shift circuit 111, providing a first reference voltage to the level shift circuit 111. Specifically, the second terminal of the fourteenth transistor M14 is connected to the control terminal of the third transistor M3 in the level shift circuit 111, providing the first reference voltage to its control terminal. The first terminal of the fifteenth transistor M15 is connected to the second terminal of the fourteenth transistor M14, its second terminal is grounded, and its control terminal is connected to the second terminal of the ninth transistor. Through this connection, the first input voltage circuit 14 can provide a stable control terminal input voltage to the control terminal of the third transistor M3 during operation. For example, transistors M13 (13th), M14 (14th), and M15 (15th) are all MOSFETs, and the gate-source voltage of transistors M13 and M14 is V. gsIf the power supply is VCC, then the input voltage at the control terminal of the third transistor M3 is VCC-2V. gs This input voltage is the first reference voltage.

[0049] The second input voltage circuit 15 includes a sixteenth transistor M16, a seventeenth transistor M17, and an eighteenth transistor M18. The first terminal of the sixteenth transistor M16 receives a power supply signal, and its second terminal is connected to the second control terminal of the level shift circuit 111, providing a second reference voltage to the level shift circuit 111. Specifically, the second terminal of the sixteenth transistor M16 is connected to the control terminal of the fourth transistor M4 in the level shift circuit 111, providing a second reference voltage to the control terminal of the fourth transistor M4. The first terminal and control terminal of the seventeenth transistor M17 are connected to the second terminal of the sixteenth transistor M16. The first terminal of the eighteenth transistor M18 is connected to the second terminal of the seventeenth transistor M17, the second terminal of the eighteenth transistor M18 is grounded, and the control terminal of the eighteenth transistor M18 is connected to the second terminal of the seventeenth transistor M17. Through this connection, the second input voltage circuit 15 can provide a stable control terminal input voltage to the control terminal of the fourth transistor M4 during operation. If transistors M16 (sixteenth), M17 (seventeenth), and M18 (eighteenth) are MOSFETs, and the gate-source voltage of transistors M17 and M18 is V... gs If the power supply is VCC, then the input voltage at the control terminal of the fourth transistor is 2V. gs This input voltage is the second reference voltage.

[0050] The fifth transistor, M5, is a MOSFET. Specifically, the fifth transistor M5 acts as a tail current load transistor, used to maintain a constant current under the control of its gate input voltage. This, in turn, controls the loop between the level shift circuit 111 connected to the drain of the fifth transistor M5 and the amplifier circuit 12 connected to the level shift circuit 111. When the potential at point A increases, the current flowing through the fourth transistor M4 decreases, and the current flowing through the third transistor M3 increases, thus increasing the potential at point B. When the potential at point A decreases, the current flowing through the fourth transistor M4 increases, and the current flowing through the third transistor M3 decreases, thus decreasing the potential at point B. Therefore, a small-signal AC short circuit is achieved between points A and B.

[0051] Since there are MOS transistors in the level shift circuit 111, amplifier circuit 12, fifth transistor M5, first input voltage circuit 14 and second input voltage circuit 15, the bias circuit 13 is used to input the gate voltage of the corresponding MOS transistors in the level shift circuit 111, amplifier circuit 12, fifth transistor M5, first input voltage circuit 14 and second input voltage circuit 15.

[0052] based on Figure 5 Describe the operating logic of the entire amplifier circuit:

[0053] First, consider bias circuit 13. In bias circuit 13, the source of the eighth transistor M8 is connected to the power supply VCC, and its drain is connected to the first terminal of resistor R1 and its gate. The source of the ninth transistor M9 is connected to the power supply VCC, its drain is connected to the drain of the tenth transistor M10, and its gate is connected to the gate of the eighth transistor M8. The second terminal of resistor R and the source of the tenth transistor M10 are grounded. Among them, the eighth transistor M8 and the ninth transistor M9 are P-type MOSFETs, and the tenth transistor M10 is an N-type MOSFET. The power supply VCC is pulled down to a low level by resistor R1 after passing through the eighth transistor M8, turning on the eighth transistor M8. The source-gate voltage difference generated on M8 is output to the source-gate of the ninth transistor M9, causing M9 to conduct and generate current. The current flows through the tenth transistor M10, thereby generating a gate-source voltage difference.

[0054] Next, consider the first input voltage circuit 14. In this circuit, the source of the thirteenth transistor M13 is connected to the power supply VCC, and its drain is connected to its gate. The drain of M13 is also connected to the source of the fourteenth transistor M14. The drain of the fourteenth transistor M14 is connected to its gate and to the drain of the fifteenth transistor M15. The gate of the fourteenth transistor M14 is connected to the gate of the third transistor M3. The source of the fifteenth transistor M15 is grounded, and its gate is connected to the gate of the tenth transistor M10 and to the drain of the ninth transistor M9. At this time, the gate-source voltage difference of the tenth transistor M10 is output to the fifteenth transistor M15, causing M15 to conduct. The first input voltage circuit 14 then forms a loop. The input voltage at the gate of the third transistor M3 is the power supply VCC minus the voltages of the thirteenth and fourteenth transistors M13 and M14. The thirteenth and fourteenth transistors M13 are P-type MOSFETs, and the fifteenth transistor M15 is an N-type MOSFET.

[0055] Next, consider the second input voltage circuit 15. In the second input voltage circuit 15, the sixteenth transistor M16 is a P-type MOSFET, and the seventeenth transistor M17 and the eighteenth transistor M18 are N-type MOSFETs. The source of the sixteenth transistor M16 is connected to the power supply VCC. The drain of the sixteenth transistor M16 is connected to the drain of the seventeenth transistor M17 and also to its gate. The gate of the sixteenth transistor M16 is connected to the gate of the eighth transistor M8. The source of the seventeenth transistor M17 is connected to the drain of the eighteenth transistor M18 and also to its gate. The source of the eighteenth transistor M18 is grounded. The entire second input voltage circuit 15 forms a loop, so the voltage at the gate of the fourth transistor M4 is the sum of the gate voltages of the seventeenth transistor M17 and the eighteenth transistor M18.

[0056] Next, let's look at the fifth transistor, M5. The fifth transistor, M5, is a P-type MOSFET. The source of the fifth transistor, M5, is connected to the power supply VCC. The drain of the fifth transistor, M5, is connected to the gate of the first transistor, M1, the source of the third transistor, M3, and the drain of the fourth transistor, M4. The gate of the fifth transistor, M5, is connected to the gate of the eighth transistor, M8.

[0057] In some embodiments, all the transistors described above are MOS transistors, and the gate and source voltages of the MOS transistors are both V. GS Then the gate input voltage of the corresponding third transistor M3 is VCC-2V. GS The gate input voltage of the fourth transistor M4 is 2V. GS Corresponding Figure 5 In medium to large signal analysis, for point A, V A =2V GS -V GS,M4 For point B, V B =VCC-2V GS +V GS,M3 Because the gate-source voltage of all MOSFETs is V GS Then V A =V GS V B =VCC-V GS Therefore, both the third transistor M3 and the fourth transistor M4 operate in the saturated constant current source region.

[0058] Small signal analysis: When V A If the superimposed voltage small signal Δ>0, then the V of the fourth transistor M4 GS If the current decreases, the current flowing through the fourth transistor M4 decreases, and the current flowing through the third transistor M3 increases. V B The voltage increases by Δ. Therefore, points A and B are AC short-circuited.

[0059] The change in the input signal IN is amplified once by the sixth transistor M6, then amplified once by the seventh transistor M7, and then synchronously passed through points A and B, and amplified again by the first transistor M1 and the second transistor M2.

[0060] By using the above method, the input signal IN is amplified in the amplifier circuit and then output to point A, where it is amplified again in the push-pull circuit. This improves the gain and amplification speed of the amplifier circuit for processing the input signal.

[0061] See Figure 6 The amplifier circuit includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, and a resistor R1.

[0062] Among them, transistors M1, M3, M8, M9, M11, M12, M13, M14, and M16 are P-type MOS transistors, while transistors M2, M4, M7, M10, M15, M17, and M18 are N-type MOS transistors.

[0063] The source of the first transistor M1 is connected to the power supply VCC, its drain is connected to the drain of the second transistor M2 and the output terminal OUT, and its gate is connected to the drain of the eleventh transistor M11, the source of the third transistor M3, and the drain of the fourth transistor M4. The drain of the second transistor M2 is connected to the output terminal, its source is grounded, and its gate is connected to the drain of the seventh transistor M7, the drain of the third transistor M3, and the source of the fourth transistor M4. The gate of the third transistor M3 is connected to the gate of the fourteenth transistor M14. The gate of the fourth transistor M4 is connected to the gate of the seventeenth transistor M17. The gate of the seventh transistor M7 is connected to the drain of the ninth transistor M9, and its source is grounded. The source of the eighth transistor M8 is connected to the power supply VCC, its drain is connected to the first terminal of resistor R1 and its gate, and its gate is connected to the gate of the ninth transistor M9. The other terminal of resistor R1 is grounded.

[0064] The source of transistor M9 is connected to power supply VCC, and its drain is connected to the drain of transistor M10. The gate of transistor M10 is connected to the drain of transistor M9 and the gate of transistor M15. The gate of transistor M13 is connected to power supply VCC, and its drain is connected to the gate and the source of transistor M14. The drain of transistor M14 is connected to the gate and the drain of transistor M15. The source of transistor M15 is grounded. The source of transistor M16 is connected to power supply VCC, its drain is connected to the drain of transistor M17, and its gate is connected to the gate of transistor M8. The drain of transistor M17 is connected to its gate, its source is connected to the drain of transistor M18, and its gate is connected to the gate of transistor M4. The source of transistor M18 is grounded, and its drain is connected to its gate. The source of the eleventh transistor M11 is connected to the drain of the twelfth transistor M12, and the drain is connected to the source of the third transistor M3, the drain of the fourth transistor M4, and the gate of the first transistor M1. The gate of the first transistor M1 is connected to the gate of the eighth transistor M8. The source of the twelfth transistor M12 is connected to the power supply VCC, and the gate is used to receive the input signal IN.

[0065] At this point, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, and the resistor R1 constitute the bias circuit 13 as described in the above embodiment; the thirteenth transistor M13, the fourteenth transistor M14, and the fifteenth transistor M15 constitute the first input voltage circuit 14 as described in the above embodiment; and the sixteenth transistor M16, the seventeenth transistor M17, and the eighteenth transistor M18 constitute the second input voltage circuit 15 as described in the above embodiment. The eleventh transistor M11 and the twelfth transistor M12 constitute the amplifier circuit 12 as described in the above embodiment; and the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 constitute the push-pull circuit 11 as described in the above embodiment. Specifically, the third transistor M3 and the fourth transistor M4 constitute the level shifting circuit 111 within the push-pull circuit as described in the above embodiment.

[0066] Brief Figure 6 Workflow:

[0067] Figure 6 The gate-source voltage of all MOSFETs is V. GS Then the gate input voltage of the corresponding third transistor M3 is VCC-2V. GS The gate input voltage of the fourth transistor M4 is 2V. GS Then the corresponding Figure 6 In medium to large signal analysis, for point A, V A =2V GS -V GS,M4 For point B, V B =VCC-2V GS+V GS,M3 Because the gate-source voltage of all MOSFETs is V GS Then V A =V GS V B =VCC-V GS Therefore, both the third transistor M3 and the fourth transistor M4 operate in the saturated constant current source region.

[0068] Small signal analysis: When V B If the superimposed voltage small signal Δ>0, then the V of the third transistor M3 GS If the current increases, the current flowing through the third transistor M3 increases, and the current flowing through the fourth transistor M4 decreases. V A The voltage increases by Δ. Therefore, points A and B are AC short-circuited.

[0069] The input signal IN is amplified once by the twelfth transistor M12, then amplified once by the eleventh transistor M11, and then synchronously passed through points A and B, and amplified again by the first transistor M1 and the second transistor M2.

[0070] By using the above method, the input signal IN is amplified and output to point B by the eleventh transistor M11 and the twelfth transistor M12, and then amplified again in the push-pull circuit, which can improve the gain and amplification speed of the amplifier circuit for processing the input signal.

[0071] In other embodiments, the aforementioned transistors may be transistors fabricated using CMOS (Complementary Metal Oxide Semiconductor) technology, BJT (Bipolar Junction Transistor) technology, bulk silicon BCD technology, or SOI (Silicon-On-Insulator)-BCD technology. BCD technology refers to the technique that enables the fabrication of bipolar, CMOS, and DMOS devices on the same chip.

[0072] In some embodiments, see Figure 7 Let's take a transistor as an example to illustrate:

[0073] The amplifier circuit includes transistors Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15, and Q16, and resistor R1.

[0074] Among them, transistors Q1, Q3, Q5, Q8, Q9, Q11, Q12, and Q14 are PNP transistors, while transistors Q2, Q4, Q6, Q7, Q10, Q13, Q15, and Q16 are NPN transistors.

[0075] Transistor Q1's emitter is connected to power supply VCC, its collector is connected to the collector of transistor Q2 and the output terminal OUT, and its base is connected to the collector of transistor Q5, the emitter of transistor Q3, and the collector of transistor Q4. Transistor Q2's collector is connected to the output terminal, its emitter is grounded, and its base is connected to the collectors of transistors Q7, Q3, and Q4. Transistor Q3's base is connected to the base of transistor Q12. Transistor Q4's base is connected to the base of transistor Q15. Transistor Q7's base is connected to the collector of transistor Q9, and its emitter is connected to the collector of transistor Q6. Transistor Q6's emitter is grounded, and its base is connected to the input signal IN. Transistor Q8's emitter is connected to power supply VCC, its collector is connected to the first terminal of resistor R1 and its base, and its base is connected to the base of transistor Q9. The other terminal of resistor R1 is grounded.

[0076] Transistor Q9's emitter is connected to power supply VCC, and its collector is connected to the collector of transistor Q10. The base of transistor Q10 is connected to the collector of transistor Q9 and the base of transistor Q13. Transistor Q11's base is connected to power supply VCC, and its collector is connected to the base and the emitter of transistor Q12. The collector of transistor Q12 is connected to the base and the collector of transistor Q13. Transistor Q13's emitter is grounded. Transistor Q14's emitter is connected to power supply VCC, its collector is connected to the collector of transistor Q15, and its base is connected to the base of transistor Q8. Transistor Q15's collector is connected to its base, its emitter is connected to the collector of transistor Q16, and its base is connected to the base of transistor Q4. Transistor Q16's emitter is grounded, and its collector is connected to its base.

[0077] At this point, transistors Q8, Q9, and Q10, along with resistor R1, constitute the bias circuit 13 as described in the above embodiment. Transistors Q11, Q12, and Q13 constitute the first input voltage circuit 14 as described in the above embodiment, and transistors Q14, Q15, and Q16 constitute the second input voltage circuit 15 as described in the above embodiment. Transistors Q6 and Q7 constitute the amplifier circuit 12 as described in the above embodiment, and transistors Q1, Q2, Q3, and Q4 constitute the push-pull circuit 11 as described in the above embodiment. Specifically, transistors Q3 and Q4 constitute the level shifting circuit 111 within the push-pull circuit 11 as described in the above embodiment.

[0078] In some embodiments, see Figure 8 Let's take a transistor as an example to illustrate:

[0079] The amplifier circuit includes transistors Q1, Q2, Q3, Q4, Q7, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15, Q16, Q17, and Q18, and resistor R1.

[0080] Among them, transistors Q1, Q3, Q8, Q9, Q11, Q12, Q14, Q17, and Q18 are PNP transistors, while transistors Q2, Q4, Q7, Q10, Q13, Q15, and Q16 are NPN transistors.

[0081] Transistor Q1's emitter is connected to power supply VCC, its collector is connected to the collector of transistor Q2 and the output terminal OUT, and its base is connected to the collector of transistor Q17, the emitter of transistor Q3, and the collector of transistor Q4. Transistor Q2's collector is connected to the output terminal, its emitter is grounded, and its base is connected to the collectors of transistors Q7, Q3, and Q4. Transistor Q3's base is connected to the base of transistor Q12. Transistor Q4's base is connected to the base of transistor Q15. Transistor Q7's base is connected to the collector of transistor Q9, and its emitter is grounded. Transistor Q8's emitter is connected to power supply VCC, its collector is connected to the first terminal of resistor R1 and its base, and its base is connected to the base of transistor Q9. The other terminal of resistor R1 is grounded.

[0082] Transistor Q9's emitter is connected to power supply VCC, and its collector is connected to the collector of transistor Q10. The base of transistor Q10 is connected to the collector of transistor Q9 and the base of transistor Q13. Transistor Q11's base is connected to power supply VCC, and its collector is connected to the base and the emitter of transistor Q12. The collector of transistor Q12 is connected to the base and the collector of transistor Q13. Transistor Q13's emitter is grounded. Transistor Q14's emitter is connected to power supply VCC, its collector is connected to the collector of transistor Q15, and its base is connected to the base of transistor Q8. Transistor Q15's collector is connected to its base, its emitter is connected to the collector of transistor Q16, and its base is connected to the base of transistor Q4. Transistor Q16's emitter is grounded, and its collector is connected to its base. The emitter of transistor Q17 is connected to the collector of transistor Q18. The collector of Q17 is connected to the emitter of transistor Q3, the collector of transistor Q4, and the base of transistor Q1. The base of Q17 is connected to the base of transistor Q8. The emitter of transistor Q18 is connected to the power supply VCC, and the base is used to receive the input signal IN.

[0083] At this point, transistors Q8, Q9, and Q10, along with resistor R1, constitute the bias circuit 13 as described in the above embodiment. Transistors Q11, Q12, and Q13 constitute the first input voltage circuit 14 as described in the above embodiment, and transistors Q14, Q15, and Q16 constitute the second input voltage circuit 15 as described in the above embodiment. Transistors Q17 and Q18 constitute the amplifier circuit 12 as described in the above embodiment, and transistors Q1, Q2, Q3, and Q4 constitute the push-pull circuit 11 as described in the above embodiment. Specifically, transistors Q3 and Q4 constitute the level shifting circuit 111 within the push-pull circuit 11 as described in the above embodiment.

[0084] By using the above method, the input signal IN is amplified and output to point B by transistors Q18 and Q17, and then amplified again in the push-pull circuit, which can improve the gain and amplification speed of the amplifier circuit for processing the input signal.

[0085] See Figure 9 , Figure 9 This is a schematic diagram of an embodiment of the electronic device provided in this application. The electronic device 90 includes an amplifier circuit 91 and a controller 92.

[0086] The amplifier circuit 91 is as described in any of the above embodiments. The controller 92 is connected to the amplifier circuit 91 and is used to input signals to the amplifier circuit 91 so that the amplifier circuit 91 amplifies the input signals.

[0087] In some instances, amplifier circuit 91 is mounted on a circuit board, which is mounted on electronic device 90.

[0088] In some embodiments, the electronic device can be a mobile terminal, such as a mobile phone; it can also be a home appliance, such as an air conditioner, refrigerator, washing machine, and microwave oven; it can also be a wearable device, such as a smart bracelet or smartwatch; or it can be a computer, printer, fax machine, all-in-one machine, or other terminal device. It can also be corresponding electronic production equipment, such as a surface mount machine and an automatic soldering machine.

[0089] In this way, the amplifier circuit in the electronic device can improve the gain and amplification speed of the controller input signal processing, thereby improving the working efficiency and performance of the electronic device.

[0090] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. An amplifier circuit, characterized in that, The amplifier circuit includes: Push-pull circuit, including: The first transistor has a first terminal for receiving a power signal and a second terminal for output. A second transistor, wherein the first terminal of the second transistor is connected to the second terminal of the first transistor, and the second terminal of the second transistor is grounded; Level shifting circuit, including: A third transistor, wherein a first terminal of the third transistor is connected to the control terminal of the first transistor, a second terminal of the third transistor is connected to the control terminal of the second transistor, and the control terminal of the third transistor is used to receive a first reference voltage; wherein the third transistor is a P-type MOS transistor; The fourth transistor has a first terminal connected to the control terminal of the first transistor and a second terminal connected to the control terminal of the second transistor. The control terminal of the fourth transistor is used to receive a second reference voltage. The fourth transistor is an N-type MOS transistor. An amplifier circuit, connected to the control terminal of the second transistor, is used to generate an amplified signal under the action of an input signal and input the amplified signal to the control terminal of the second transistor.

2. The amplifier circuit according to claim 1, characterized in that, The amplifier circuit also includes a constant current source, the first end of which receives the power signal, and the second end of which is connected to the control terminal of the first transistor.

3. The amplifier circuit according to claim 2, characterized in that, The amplifier circuit includes a sixth transistor and a seventh transistor: The first terminal of the sixth transistor is connected to the second terminal of the seventh transistor, the second terminal of the sixth transistor is grounded, and the control terminal of the sixth transistor is used for input signals. The first terminal of the seventh transistor is connected to the control terminal of the second transistor.

4. The amplifier circuit according to claim 3, characterized in that, The amplifier circuit also includes a bias circuit. The first terminal of the bias circuit receives the power signal, the second terminal of the bias circuit is connected to the control terminal of the fifth transistor, the third terminal of the bias circuit is connected to the control terminal of the seventh transistor, and the fourth terminal of the bias circuit is grounded.

5. The amplifier circuit according to claim 4, characterized in that, The bias circuit includes an eighth transistor, a ninth transistor, a tenth transistor, and a resistor; The first terminal of the eighth transistor receives a power signal, and the second terminal of the eighth transistor is connected to the control terminal of the eighth transistor and the control terminal of the ninth transistor. The first terminal of the ninth transistor receives a power signal, and the second terminal of the ninth transistor is connected to the control terminal of the seventh transistor. The first end of the resistor is connected to the eighth transistor, and the second end of the resistor is grounded; The first terminal of the tenth transistor is connected to the second terminal of the ninth transistor; the second terminal of the tenth transistor is grounded, and the control terminal of the tenth transistor is connected to the third terminal of the bias circuit.

6. The amplifier circuit according to claim 1, characterized in that, The amplifier circuit includes an eleventh transistor and a twelfth transistor; The first terminal of the twelfth transistor receives a power supply signal, the second terminal of the twelfth transistor is connected to the first terminal of the eleventh transistor, the control terminal of the twelfth transistor is used to input a signal, and the second terminal of the eleventh transistor is connected to the control terminal of the first transistor.

7. The amplifier circuit according to claim 1, characterized in that, The amplifier circuit also includes a first input voltage circuit; The first input voltage circuit includes: The thirteenth transistor has a power supply signal input at its first terminal and a control terminal connected to its second terminal. The fourteenth transistor has its first terminal connected to the second terminal of the thirteenth transistor, and its second terminal connected to the control terminal of the fourteenth transistor and the first control terminal of the level shift circuit, for providing a first reference voltage to the level shift circuit; The fifteenth transistor has its first terminal connected to the second terminal of the fourteenth transistor, and its second terminal grounded. The control terminal of the fifteenth transistor is used to receive control signals.

8. The amplifier circuit according to claim 1, characterized in that, The amplifier circuit also includes a second input voltage circuit; The second input voltage circuit includes: The sixteenth transistor has a first terminal that receives a power supply signal and a second terminal that is connected to the second control terminal of the level shift circuit, for providing a second reference voltage to the level shift circuit. The seventeenth transistor, wherein the first terminal and the control terminal of the seventeenth transistor are connected to the second terminal of the sixteenth transistor; The eighteenth transistor has its first terminal connected to the second terminal of the seventeenth transistor, the second terminal of the eighteenth transistor being grounded, and its control terminal connected to the second terminal of the seventeenth transistor.

9. An electronic device, characterized in that, The electronic device includes: An amplifier circuit, the amplifier circuit being the amplifier circuit as described in any one of claims 1-8; A controller, connected to the amplifier circuit, is used to input a signal to the amplifier circuit so that the amplifier circuit amplifies the input signal.

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