Synchronous rectification control device

Abstract

The application provides a synchronous rectification control device, and relates to the technical field of power electronics. The device comprises a rectification circuit and a control module. The rectification circuit comprises a first switch tube, a second switch tube, a third switch tube, a fourth switch tube and a first inductor. One end of the first inductor is used for inputting a current, and the other end of the first inductor is connected with the first end of the first switch tube and the first end of the second switch tube. The second end of the first switch tube, the second end of the second switch tube, the second end of the third switch tube and the second end of the fourth switch tube are connected with the control module. The third end of the first switch tube, the second switch tube, the third end of the third switch tube and the third end of the fourth switch tube are used for outputting a current. The control module is used for controlling the opening and closing of the first switch tube and the second switch tube according to the input current of the first inductor, an input voltage, a preset current threshold value and a preset voltage threshold value, so that the synchronous rectification control process is simplified.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and more specifically, to a synchronous rectification control device. Background Technology

[0002] Synchronous rectification is a new technology that uses dedicated power MOSFETs with extremely low on-state resistance to replace rectifier diodes in order to reduce rectification losses.

[0003] Currently, a synchronous rectification control strategy has been proposed for totem-pole bridgeless power factor correction (PFC) circuits. Specifically, by acquiring hardware parameter values ​​such as inductance, conductance, and current, the first duty cycle feedforward in continuous conduction mode and the second duty cycle feedforward in discontinuous conduction mode are calculated respectively. Based on the first and second duty cycle feedforwards, the totem-pole bridgeless PFC circuit is controlled to operate in continuous conduction mode, thereby reducing rectification losses.

[0004] However, with the existing synchronous rectification control strategy, the relationship between inductance and current is a variable value in actual circuits, making it difficult to obtain accurate calculation results. This results in poor real-time performance of the duty cycle calculated based on hardware parameters such as inductance and current values. Furthermore, if the calculation becomes too complex, it is not easy to implement in engineering. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of the prior art by providing a synchronous rectification control device, which simplifies the synchronous rectification and wave generation control process and facilitates engineering implementation.

[0006] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows:

[0007] This application provides a synchronous rectification control device, including: a rectifier circuit and a control module, wherein the rectifier circuit is a bridgeless power factor correction circuit;

[0008] The rectifier circuit includes: a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, and a first inductor;

[0009] One end of the first inductor is used to receive the input current, and the other end of the first inductor is connected to the first end of the first switching transistor and the first end of the second switching transistor, respectively.

[0010] The second terminals of the first switching transistor and the second switching transistor are respectively connected to the control module;

[0011] The third terminal of the first switching transistor and the third terminal of the second switching transistor are respectively used to output current;

[0012] The first terminal of the third switch is connected to the first terminal of the fourth switch, and both the first terminal of the third switch and the first terminal of the fourth switch are used to connect to the input current.

[0013] The second terminals of the third and fourth switching transistors are respectively connected to the control module;

[0014] The third terminal of the third switch and the third terminal of the fourth switch are respectively used to output current;

[0015] The control module is used to control the switching on and off of the first switch, the second switch, the third switch, and the fourth switch based on the input current, input voltage, preset current threshold, and preset voltage threshold connected to the first inductor.

[0016] Optionally, the control module includes: a preprocessing unit, a synchronous rectification unit, and a postprocessing unit;

[0017] The input terminal of the synchronous rectification unit is connected to the output terminal of the preprocessing unit, and the output terminal of the synchronous rectification unit is connected to the input terminal of the postprocessing unit.

[0018] The input terminal of the preprocessing unit is used to connect the input current connected to the first inductor;

[0019] The output terminal of the post-processing unit is connected to the second terminal of the first switch, the second terminal of the second switch, the second terminal of the third switch, and the second terminal of the fourth switch, respectively.

[0020] Optionally, the synchronous rectification unit includes: a first comparator, a second comparator, a first AND gate, a second AND gate, a third AND gate, a fourth AND gate, a fifth AND gate, a sixth AND gate, a first inverter, a second inverter, a first OR gate, and a second OR gate;

[0021] The first input terminal of the first comparator is connected to the output terminal of the preprocessing unit, and the second input terminal of the first comparator is used to connect to the preset current threshold, wherein the preset current threshold is a preset current with a preset value;

[0022] The output of the first comparator is connected to the first input of the first AND gate and the first input of the third AND gate, respectively.

[0023] The output of the second comparator is connected to the second input of the first AND gate, the input of the first inverter, and the first input of the second AND gate, respectively. The second input of the second AND gate is used to connect to a pulse width modulation signal.

[0024] The input terminal of the second inverter is used to receive the pulse width modulation signal;

[0025] The first input terminal of the fourth AND gate is used to receive the pulse width modulation signal, and the second input terminal of the fourth AND gate is connected to the output terminal of the first inverter.

[0026] The first input terminal of the fifth AND gate is connected to the output terminal of the first AND gate, and the second input terminal of the fifth AND gate is connected to the output terminal of the second inverter;

[0027] The first input terminal of the first OR gate is connected to the output terminal of the fourth AND gate, and the second input terminal of the first OR gate is connected to the output terminal of the fifth AND gate;

[0028] The first input terminal of the sixth AND gate is connected to the output terminal of the third AND gate, and the second input terminal of the sixth AND gate is connected to the output terminal of the second inverter;

[0029] The first input terminal of the second OR gate is connected to the output terminal of the sixth AND gate, and the second input terminal of the second OR gate is connected to the output terminal of the second AND gate.

[0030] The output terminals of the first OR gate and the second OR gate are respectively connected to the input terminal of the post-processing unit.

[0031] Optionally, the first input terminal of the second comparator is used to connect to the input voltage; the second input terminal of the second comparator is used to connect to the preset voltage threshold, wherein the preset voltage threshold is a preset voltage with a preset value.

[0032] Optionally, the preprocessing unit includes: a sampling circuit, a filtering circuit, and an absolute value circuit;

[0033] The input terminal of the sampling circuit is used to connect the input current connected to the first inductor, the output terminal of the sampling circuit is connected to the input terminal of the filter circuit, and the output terminal of the filter circuit is used to connect to the input terminal of the absolute value circuit.

[0034] The output of the absolute value circuit is connected to the first input of the first comparator.

[0035] Optionally, the post-processing unit includes: a first sub-unit and a second sub-unit;

[0036] The input terminal of the first sub-unit is connected to the output terminal of the first OR gate, and the output terminal of the first sub-unit is connected to the second terminal of the first switch and the second terminal of the third switch, respectively.

[0037] The input terminal of the second sub-unit is connected to the output terminal of the second OR gate, and the output terminal of the second sub-unit is connected to the second terminal of the second switch and the second terminal of the fourth switch, respectively.

[0038] Optionally, the control module includes: a digital controller;

[0039] The output terminal of the digital controller is connected to the second terminal of the first switch transistor, the second terminal of the second switch transistor, the second terminal of the third switch transistor, and the second terminal of the fourth switch transistor, respectively.

[0040] The digital controller is used to control the switching on and off of the first switch, the second switch, the third switch, and the fourth switch based on the input current, input voltage, preset current threshold, and preset voltage threshold connected to the first inductor.

[0041] Optionally, the other end of the first inductor is connected to the first resistor.

[0042] Optionally, the bridgeless power factor correction circuit further includes: a fifth switch and a sixth switch;

[0043] The first end of the fifth switch is connected to the first end of the sixth switch;

[0044] The second terminals of the fifth and sixth switching transistors are respectively connected to the control module;

[0045] The third terminal of the fifth switch and the third terminal of the sixth switch are used to output current, respectively.

[0046] Optionally, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are all metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0047] The beneficial effects of this application are:

[0048] This application provides a synchronous rectification control device, including: a rectifier circuit and a control module. The rectifier circuit is a bridgeless power factor correction circuit. The rectifier circuit includes: a first switch, a second switch, a third switch, a fourth switch, and a first inductor. One end of the first inductor is used to receive an input current, and the other end of the first inductor is connected to the first end of the first switch and the first end of the second switch, respectively. The second ends of the first and second switches are respectively connected to the control module. The third ends of the first and second switches are respectively used to output current. The first ends of the third and fourth switches are connected, and both the first ends of the third and fourth switches are used to receive the input current. The second ends of the third and fourth switches are respectively connected to the control module. The third ends of the third and fourth switches are respectively used to output current. The control module is used to control the switching on and off of the first, second, third, and fourth switches according to the input current and input voltage connected to the first inductor, a preset current threshold, and a preset voltage threshold. In this scheme, a control module is set in the synchronous rectification control device. When the control module detects that the input voltage is in the positive half-cycle (i.e., the input voltage is greater than the preset voltage threshold of 0V), the second switch operates in the pulse-width modulation (PWM) chopping state, the fourth switch is turned on and the third switch is turned off. If the input current connected to the first inductor is detected to be greater than the first current threshold, the first switch is controlled to turn on synchronous rectification. If the input current connected to the first inductor is detected to be less than or equal to the first current threshold, the first switch is controlled to turn off synchronous rectification. When the control module detects that the input voltage is in the negative half-cycle (i.e., the input voltage is less than the preset voltage threshold of 0V), the first switch operates in the PWM chopping state, the fourth switch is turned off and the third switch is turned on. If the input current of the first inductor is detected to be less than the second current threshold, the second switch is controlled to turn on synchronous rectification while the first switch is controlled to turn off synchronous rectification. In this way, the loss reduction effect of synchronous rectification is retained, while avoiding the current switching overshoot and oscillation problems caused by full synchronous rectification in the zero-crossing small current region when the input current connected to the first inductor is between the first current threshold and the second current threshold. At the same time, there is no need to calculate the duty cycle near the zero-crossing point, which simplifies the synchronous rectification wave generation control process and is conducive to engineering implementation. Attached Figure Description

[0049] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 Schematic diagram of the synchronous rectification control device provided in the embodiments of this application Figure 1 ;

[0051] Figure 2 A schematic diagram of the synchronous rectification region provided in an embodiment of this application;

[0052] Figure 3 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 1 ;

[0053] Figure 4 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 2 ;

[0054] Figure 5 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 3 ;

[0055] Figure 6 A schematic diagram of the structure of the post-processing unit of the control module in the synchronous rectification control device provided in the embodiments of this application;

[0056] Figure 7 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 4 ;

[0057] Figure 8 Schematic diagram of the synchronous rectification control device provided in the embodiments of this application Figure 2 ;

[0058] Figure 9 Schematic diagram of the synchronous rectification control device provided in the embodiments of this application Figure 3 .

[0059] Icons: 100 - Synchronous rectification control device; 101 - Rectifier circuit; 102 - Control module; 201 - Preprocessing unit; 202 - Synchronous rectification unit; 203 - Postprocessing unit; 301 - Sampling circuit; 302 - Filtering circuit; 303 - Absolute value circuit; 501 - First subunit; 502 - Second subunit; 601 - Digital controller. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0061] First, a brief explanation of the technical problem that this application aims to solve will be given.

[0062] This application addresses the cumbersome problem in existing technologies that require calculating the switching point between continuous and discontinuous conduction modes and the conduction time of each switch in discontinuous conduction mode. It proposes a simple and practical synchronous rectification scheme based on the concept of "limited synchronous rectification." Specifically, synchronous rectification is activated within a limited time period corresponding to a limited current region. A current threshold is set; synchronous rectification is activated when the input current is above the threshold and deactivated when the input current is below the threshold. Since the input current exhibits a sinusoidal waveform, characterized by a large value in the middle and small values ​​at both ends, and conduction losses primarily occur at the extremes, activating synchronous rectification within a limited current or time region retains the loss-reduction effect of synchronous rectification while avoiding the problems associated with strictly synchronous rectification or complete synchronous rectification in the small current range.

[0063] The synchronous rectification scheme proposed in this application can be implemented using both digital and analog circuits.

[0064] The following will describe the specific implementation steps and beneficial effects of the synchronous rectification control device provided in this application through several specific embodiments.

[0065] Figure 1 This is a schematic diagram of the synchronous rectification control device provided in the embodiments of this application; as shown below. Figure 1 As shown, the synchronous rectification control device 100 provided in this application includes: a rectifier circuit 101 and a control module 102.

[0066] The rectifier circuit 101 can be a bridgeless PFC circuit, such as... Figure 1 As shown, the bridgeless PFC circuit is a single-phase bidirectional bridgeless PFC topology. The bridgeless PFC circuit includes: a first switch Q1, a second switch Q2, a third switch Q3, a fourth switch Q4, and a first inductor L1.

[0067] in addition, Figure 1 The bridgeless PFC circuit shown also includes a capacitor C. It should be understood that capacitor C is the DC bus in the bridgeless PFC circuit, mainly used for energy storage.

[0068] In this circuit, the first inductor L1 is connected to the input current on the live wire (L), the first switch Q1 and the second switch Q2 serve as the bridge arm of the live wire (L), and the third switch Q3 and the fourth switch Q4 serve as the bridge arm of the neutral wire (N). The two bridge arms are connected in parallel in an alternating manner to support a larger single-phase power.

[0069] One end of the first inductor L1 is used to connect the input current I on the live wire (L), and the other end of the first inductor L1 is connected to the first terminal of the first switch Q1 and the first terminal of the second switch Q2.

[0070] The second terminal of the first switch Q1 and the second terminal of the second switch Q2 are respectively connected to the control module 102. The third terminal of the first switch Q1 and the third terminal of the second switch Q2 are respectively the output terminals of the rectifier circuit 101. That is, the third terminal of the first switch Q1 and the third terminal of the second switch Q2 are used to output the rectified output current.

[0071] Continue to refer to Figure 1 The first terminal of the third switch Q3 and the first terminal of the fourth switch Q4 are connected, and the first terminals of the third switch Q3 and the fourth switch Q4 are both used to connect to the neutral line (N); the second terminals of the third switch Q3 and the fourth switch Q4 are respectively connected to the control module 102; the third terminals of the third switch Q3 and the fourth switch Q4 are also used to output current.

[0072] Specifically, the control module 102 is used to control the switching on and off of the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 based on the input current I connected to the first inductor L1, the input voltage U, the preset current threshold Ith, and the preset voltage threshold Uth. The synchronization time period is determined based on the comparison result, making it simple and easy to operate.

[0073] It should be understood that the input voltage U is the voltage difference between the live wire and the neutral wire.

[0074] The preset voltage threshold Uth is set to 0V, and the preset current threshold Ith is generally greater than 0. The reference value of the preset current threshold Ith can be set to one-third of the input current I. Specifically, it is related to the boundary point of the continuous conduction mode and depends on parameters such as the switching frequency of the first switch Q1, the switching frequency of the second switch Q2, the third switch Q3, the fourth switch Q4, and the inductance of the first inductor L1.

[0075] Specifically, when the voltage between the live wire and the neutral wire is an AC voltage, such as 220V, the input current connected to the first inductor is divided into two segments according to the positive and negative cycles, referred to as the positive half-cycle and the negative half-cycle, respectively. (See reference...) Figure 2 The diagram shows the synchronous rectification regions corresponding to the positive and negative half-cycles, respectively.

[0076] (1) If the input voltage is detected to be in the positive half-cycle (i.e., the input voltage is greater than the preset voltage threshold of 0V), the second switch Q2 operates in PWM chopping mode, the fourth switch Q4 is turned on and the third switch Q3 is turned off. Simultaneously, if the input current I of the first inductor L1 is detected to be greater than the preset first current threshold Ith, then the first switch Q1 is controlled to enable synchronous rectification, i.e. Figure 2 The first region shown is the region where the first switch Q1 is turned on for synchronous rectification; if the input current I of the first inductor L1 is detected to be less than or equal to the preset first current threshold Ith, the first switch Q1 is controlled to turn off the synchronous rectification function.

[0077] (2) If the input voltage is detected to be in the negative half-cycle (i.e., the input voltage is less than the preset voltage threshold of 0V), the first switch Q1 operates in PWM chopping mode, the fourth switch Q4 is turned off and the third switch Q3 is turned on. Simultaneously, if the input current I connected to the first inductor L1 is detected to be less than the preset second current threshold -Ith, then the second switch Q2 is controlled to enable synchronous rectification. Figure 2 The second region shown is the region where the second switch Q2 is turned on for synchronous rectification; if the input current I of the first inductor L1 is detected to be greater than or equal to the preset second current threshold -Ith, the second switch Q2 is controlled to turn off the synchronous rectification function.

[0078] In this embodiment, the time period for the first switch Q1 and the second switch Q2 to turn on (or turn off) synchronous rectification can be determined based on the comparison results. This is simple and easy to operate, retaining the loss reduction effect of synchronous rectification while avoiding the current switching overshoot and oscillation problems caused by full synchronous rectification in the zero-crossing small current region when the input current connected to the first inductor is within the preset current threshold. At the same time, it is not necessary to calculate the first duty cycle feedforward of the continuous conduction mode and the second duty cycle feedforward of the discontinuous conduction mode near the zero-crossing point, which simplifies the synchronous rectification wave generation control process and is beneficial to engineering implementation.

[0079] In summary, this application provides a synchronous rectification control device, including: a rectifier circuit and a control module. The rectifier circuit is a bridgeless power factor correction circuit. The rectifier circuit includes: a first switch, a second switch, a third switch, a fourth switch, and a first inductor. One end of the first inductor is used to receive an input current, and the other end of the first inductor is connected to the first end of the first switch and the first end of the second switch, respectively. The second ends of the first and second switches are respectively connected to the control module. The third ends of the first and second switches are respectively used to output current. The first ends of the third and fourth switches are connected, and both the first ends of the third and fourth switches are used to receive the input current. The second ends of the third and fourth switches are respectively connected to the control module. The third ends of the third and fourth switches are respectively used to output current. The control module is used to control the switching on and off of the first, second, third, and fourth switches according to the input current and input voltage connected to the first inductor, a preset current threshold, and a preset voltage threshold. In this scheme, a control module is set in the synchronous rectification control device. When the control module detects that the input voltage is in the positive half-cycle (i.e., the input voltage is greater than the preset voltage threshold of 0V), the second switch operates in PWM chopping mode, the fourth switch is turned on and the third switch is turned off. If the input current connected to the first inductor is detected to be greater than the first current threshold, the first switch is controlled to enable the synchronous rectification function. If the input current connected to the first inductor is detected to be less than or equal to the first current threshold, the first switch is controlled to disable the synchronous rectification function. When the control module detects that the input voltage is in the negative half-cycle (i.e., the input voltage is less than the preset voltage threshold of 0V), the first switch operates in PWM chopping mode, the fourth switch is turned off and the third switch is turned off. The circuit is turned on, and if the input current of the first inductor is detected to be less than the second current threshold, the second switch is controlled to enable the synchronous rectification function. If the input current of the first inductor is detected to be greater than or equal to the second current threshold, the second switch is controlled to disable the synchronous rectification function. This achieves the simultaneous control of the second switch to enable the synchronous rectification function and the control of the first switch to disable the synchronous rectification function. This retains the loss reduction effect of synchronous rectification and avoids the current switching overshoot and oscillation problems caused by full synchronous rectification in the zero-crossing small current region when the input current connected to the first inductor is between the first and second current thresholds. At the same time, it eliminates the need to calculate the duty cycle near the zero-crossing point, simplifying the synchronous rectification wave generation control process and facilitating engineering implementation.

[0080] The above will be implemented through the following embodiments, using hardware circuitry. Figure 1 The structure of the control module will be explained in detail.

[0081] Figure 3A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 1 ;like Figure 3 As shown, the control module 102 includes: a preprocessing unit 201, a synchronous rectification unit 202, and a postprocessing unit 203.

[0082] The input terminal of the synchronous rectification unit 202 is connected to the output terminal of the preprocessing unit 201, and the output terminal of the synchronous rectification unit 202 is connected to the input terminal of the postprocessing unit 203.

[0083] The input terminal of the preprocessing unit 201 is used to connect the input current I of the first inductor L1, so that the input current I of the first inductor L1 can be sampled, filtered and processed by the preprocessing unit 201.

[0084] The output terminals of the post-processing unit 203 are respectively connected to Figure 1 The second terminal of the first switch Q1, the second terminal of the second switch Q2, the second terminal of the third switch Q3, and the second terminal of the fourth switch Q4 are connected.

[0085] The above will be explained through the following multiple embodiments. Figure 3 The structure of the preprocessing unit, synchronous rectification unit, and postprocessing unit will be explained in detail.

[0086] Figure 4 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 2 ;like Figure 4 As shown, the preprocessing unit 201 includes: a sampling circuit 301, a filtering circuit 302, and an absolute value circuit 303.

[0087] The sampling circuit 301 has an input terminal for receiving the input current I, an output terminal connected to the input terminal of the filter circuit 302, an output terminal connected to the input terminal of the absolute value circuit 303, and an output terminal connected to the following: Figure 5 The first input terminal of the first comparator D1 shown is connected.

[0088] For example, the input current I is sampled and low-pass filtered by the sampling circuit 301 and the filtering circuit 302 in sequence. Then, the absolute value of the filtered input current is taken by the absolute value circuit 303 to obtain the waveform corresponding to the input current I, and the waveform is input to the input terminal of the synchronous rectification unit 202.

[0089] The above will continue to be discussed through the following embodiments. Figure 3 The structure of the synchronous rectification unit in the process will be explained in detail.

[0090] Figure 5A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 3 ;like Figure 5 As shown, the synchronous rectification unit 202 includes: a first comparator D1, a second comparator D2, a first AND gate D3, a second AND gate D5, a third AND gate D7, a fourth AND gate D8, a fifth AND gate D9, a sixth AND gate D10, a first inverter D4, a second inverter D6, a first OR gate D11, and a second OR gate D12.

[0091] Continue to refer to Figure 5 The first input terminal of the first comparator D1 is connected to the output terminal of the preprocessing unit 201, that is, the first input terminal of the first comparator D1 is connected to the absolute value circuit 303, so that the first input terminal of the first comparator D1 is used to input the steamed bun waveform, and the second input terminal of the first comparator D1 is used to input the preset current threshold, wherein the preset current threshold is a preset current with a preset value.

[0092] The output of the first comparator D1 is connected to the first input of the first AND gate D3 and the first input of the third AND gate D7, respectively.

[0093] The output of the second comparator D2 is connected to the second input of the first AND gate D3, the input of the first inverter D4, and the first input of the second AND gate D5, respectively. The second input of the second AND gate D5 is used to connect to PWMa.

[0094] The input terminal of the second inverter D6 is used to receive the pulse width modulation signal PWMa;

[0095] The first input of the fourth AND gate D8 is used to receive the pulse width modulation signal PWMa, and the second input of the fourth AND gate D8 is connected to the output of the first inverter D4.

[0096] The first input terminal of the fifth AND gate D9 is connected to the output terminal of the first AND gate D3, and the second input terminal of the fifth AND gate D9 is connected to the output terminal of the second inverter D6.

[0097] The first input terminal of the first OR gate D11 is connected to the output terminal of the fourth AND gate D8, and the second input terminal of the first OR gate D11 is connected to the output terminal of the fifth AND gate D9.

[0098] The first input terminal of the sixth AND gate D10 is connected to the output terminal of the third AND gate D7, and the second input terminal of the sixth AND gate D10 is connected to the output terminal of the second inverter D6.

[0099] The first input terminal of the second OR gate D12 is connected to the output terminal of the sixth AND gate D10, and the second input terminal of the second OR gate D12 is connected to the output terminal of the second AND gate D5.

[0100] The outputs of the first OR gate D11 and the second OR gate D12 are respectively connected to the above... Figure 3 The input terminal of the post-processing unit 203 shown is connected.

[0101] Optionally, the above Figure 5 The first input terminal of the second comparator D2 is used to connect the input voltage Ua, and the second input terminal of the second comparator is used to connect the preset voltage threshold Uth, wherein the preset voltage threshold is a preset voltage with a preset value.

[0102] In this embodiment, for example, the waveform of the steamed bun is compared with the current threshold Ith by the first comparator D1 to obtain the total current synchronization pulse for two positive and negative cycles.

[0103] The input voltage is the phase voltage Ua. The phase voltage Ua is compared with the voltage threshold Uth through the second comparator D2 to obtain the positive half-cycle voltage pulse signal. The positive half-cycle voltage pulse signal is connected to the first inverter D4. The positive half-cycle voltage pulse signal is inverted by the first inverter D4 to obtain the negative half-cycle voltage pulse signal. The negative half-cycle voltage pulse signal can also be obtained by two comparators respectively.

[0104] The total current synchronization pulse output from the first comparator D1 and the voltage pulse signal of the positive half-cycle output from the second comparator D2 are input to the first AND gate D3 for logic processing to obtain the positive synchronization signal.

[0105] Similarly, the total current synchronization pulse output by the first comparator D1 and the voltage pulse signal of the negative half-cycle output by the first inverter D1 are input to the third AND gate D7 for logic processing to obtain the negative synchronization signal.

[0106] In addition, the PWM chopping signal PWMa is input to the second inverter D6 to obtain the reverse full synchronization signal. The reverse full synchronization signal is then processed by the fifth AND gate D9 and the sixth AND gate D10 with the positive synchronization signal and the negative synchronization signal respectively to obtain the synchronization signal with current constraint.

[0107] The negative PWM signal is obtained by connecting PWMa and the voltage pulse signal of the negative half-cycle to the fourth AND gate D8, and the positive PWM signal is obtained by connecting PWMa and the voltage pulse signal of the positive half-cycle to the second AND gate D5.

[0108] Then, the current-constrained synchronization signal and positive PWM signal output from the sixth AND gate D10 are connected to the first OR gate D11, and the current-constrained synchronization signal output from the fifth AND gate D9 and the negative PWM signal output from the fourth AND gate D8 are connected to the second OR gate D12. Through the logic processing of the first OR gate D11 and the second OR gate D12, the positive half-cycle PWM signal and the negative half-cycle reverse synchronization signal are superimposed to output the comprehensive drive signal PWMA of the first switch Q1 and the comprehensive drive signal PWMB of the second switch Q2, respectively.

[0109] Finally, PWMA and PWMB are output as PWM1 and PWM2 respectively through the dead-time circuit and drive circuit in the post-processing unit 203, which drive the first switch Q1 and the second switch Q2 to turn on and off respectively, thereby enabling control of when the first switch Q1 (or the second switch Q2) turns on the synchronous rectification function and when the synchronous rectification function is turned off.

[0110] The synchronous rectification control device provided in this application can automatically realize the switching and synchronous rectification between the first switch Q1 and the second switch Q2 through simple analog logic gate circuit processing. It is simple, reliable, easy to operate, and conducive to engineering.

[0111] Figure 6 This is a schematic diagram of the structure of the post-processing unit of the control module in the synchronous rectification control device provided in the embodiments of this application; as shown below. Figure 6 As shown, the post-processing unit 203 includes: a first subunit 501 and a second subunit 502.

[0112] Both the first subunit 501 and the second subunit 502 include a dead-time circuit and a drive circuit, wherein the drive circuit can be a driver.

[0113] The input terminal of the first subunit 501 is connected to the output terminal of the first OR gate D11, and the output terminal of the first subunit 501 is connected to the second terminal of the first switch Q1 and the second terminal of the third switch Q3, respectively. Figure 6 (Not shown in the text), can be combined Figure 1 .

[0114] The input terminal of the second subunit 502 is connected to the output terminal of the second OR gate D12, and the output terminal of the second subunit 502 is connected to the second terminal of the second switch Q2 and the second terminal of the fourth switch Q4, respectively. Figure 6 (Not shown in the text).

[0115] The function of the post-processing unit 203 has been described in the above embodiments, and will not be repeated here.

[0116] The following provides another digital implementation for controlling the switching on and off of the first switch Q1 and the second switch Q2.

[0117] Figure 7 A schematic diagram of the control module in the synchronous rectification control device provided in the embodiments of this application. Figure 4 ;like Figure 7 As shown, the control module can be a digital controller 601. For example, the digital controller 601 can be a programmable processing chip such as a digital signal processor (DSP) or an advanced RISC microprocessor (ARM).

[0118] The output terminals of the digital controller 601 are respectively connected to the second terminal of the first switch Q1, the second terminal of the second switch Q2, the second terminal of the third switch Q3, and the second terminal of the fourth switch Q4.

[0119] In this embodiment, in addition to using analog circuits to control when the first switch Q1 and the second switch Q2 turn on synchronous rectification, the first switch Q1 and the second switch Q2 can also be controlled digitally. Specifically: the digital controller 601 continuously calculates and outputs the synchronous rectification wave generation function, and after the input current I connected to the first inductor L1 is filtered, (1) if the input voltage is detected to be in the positive half-cycle (i.e., the input voltage U is greater than the preset voltage threshold of 0V), and the input current I connected to the first inductor L1 is detected to be greater than the preset first current threshold Ith, the digital controller 601 sends a conduction enable signal to the second switch Q2, that is, sends the calculated wave generation quantity to the corresponding second switch Q2, which can control the fourth switch. (1) When the third switch Q3 is turned on and the second switch Q2 is turned off, the first switch Q1 is in PWM chopping mode and the first switch Q1 is in synchronous rectification mode; (2) If the input voltage is detected to be in the negative half-cycle (i.e., the input voltage is less than the preset voltage threshold of 0V), and the input current connected to the first inductor L1 is detected to be less than the preset second current threshold -Ith, then the first switch Q1 is controlled to be in PWM chopping mode, the third switch Q3 is switched on and the fourth switch Q4 is turned off, and the second switch Q2 is in synchronous rectification mode.

[0120] In this example, the digital implementation method can more flexibly and simply control the synchronous rectification function of the first switch Q1 and the second switch Q2, which is more conducive to engineering implementation.

[0121] Figure 8 Schematic diagram of the synchronous rectification control device provided in the embodiments of this application Figure 2 ;Optional, such as Figure 8 As shown, one end of the first inductor L1 can also be connected to the first resistor R.

[0122] In another feasible approach, other sampling components can be used, such as replacing the first resistor R with a current Hall sensor or a current transformer.

[0123] Figure 9 Schematic diagram of the synchronous rectification control device provided in the embodiments of this application Figure 3 ;refer to Figure 9 As shown, the first inductor L1 and the second inductor L2 are connected to the live wire, and the third inductor L3 is connected to the neutral wire. These two circuits are interleaved and connected in parallel to support higher single-phase power. In this configuration, the N-phase bridge arm carries twice the current of the other two bridge arms. Specifically, the first switch Q1 and the second switch Q2 serve as one of the bridge arms for the live wire input, and the fifth switch Q5 and the sixth switch Q6 serve as the other bridge arm for the live wire input. The first inductor L1 and the second inductor L2 are interleaved and connected in parallel to form a higher power output. The third switch Q3 and the fourth switch Q4 serve as the N-phase bridge arm, and the third inductor L3 is the N-phase inductor. Each phase is equipped with a shunt (e.g., a current converter). Figure 9 The resistors connected to each inductor shown in the diagram are used for current sampling, or devices such as Hall effect sensors can be used for sampling.

[0124] It should be noted that the first switch Q1, the second switch Q2, the fifth switch Q5, and the sixth switch Q6 all operate in specific high-frequency chopping or synchronization states. The third switch Q3 and the fourth switch Q4 have various operating modes; they can operate in either high-frequency chopping or low-frequency switching mode. To reduce losses and improve efficiency, the third switch Q3 and the fourth switch Q4 are generally operated in the low-frequency switching mode. Furthermore... Figure 9 For bidirectional topology, if only unidirectional applications such as rectification are considered, the third switch Q3 and the fourth switch Q4 can be replaced with diodes.

[0125] Figure 9 The rectification principle of the synchronous rectification control device shown is the same as that described above. Figure 1Similarly, specifically: the voltage between the live wire and the neutral wire is an AC voltage, such as 220V. The positive and negative cycles of the input voltage are divided into two segments, called the positive half-cycle and the negative half-cycle, respectively. During the positive half-cycle of the input voltage, when the control module 102 detects that the input current of the first inductor is greater than the preset first current threshold, the fourth switch Q4 is turned on while the third switch Q3 is turned off. Q2 and Q6 operate in PWM chopping mode, emitting waves alternately by 180 degrees, which has the effect of improving the equivalent switching frequency and reducing ripple. The fifth switch Q5 is turned off, and the first switch Q1 starts the synchronous rectification function. During the negative half-cycle of the input voltage, when the control module 102 detects that the input current connected to the first inductor is less than the preset second current threshold, the third switch Q3 switches on while the fourth switch Q4 is turned off. The first switch Q1 and the fifth switch Q5 are in PWM chopping mode, the sixth switch Q6 is turned off, and the second switch Q2 starts the synchronous rectification function.

[0126] Optionally, continue to refer to Figure 9 As shown, the first switch Q1, the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, and the sixth switch Q6 are all MOSFETs.

[0127] In this circuit, the first switch Q1 has a first terminal as the source, a second terminal as the gate, and a third terminal as the drain.

[0128] The second switch Q2 has its first terminal as the drain, its second terminal as the gate, and its third terminal as the source.

[0129] The third switch Q3 has its first terminal as the source, its second terminal as the gate, and its third terminal as the drain.

[0130] The fourth switch Q4 has the drain at the first terminal, the gate at the second terminal, and the source at the third terminal.

[0131] The fifth switch Q5 has the first terminal as the source, the second terminal as the gate, and the third terminal as the drain.

[0132] The sixth switch Q6 has the drain at the first terminal, the gate at the second terminal, and the source at the third terminal.

[0133] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0134] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0135] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0136] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A synchronous rectification control device, characterized in that, include: A rectifier circuit and a control module, wherein the rectifier circuit is a bridgeless power factor correction circuit; The rectifier circuit includes: a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, and a first inductor; One end of the first inductor is used to receive the input current, and the other end of the first inductor is connected to the first end of the first switching transistor and the first end of the second switching transistor, respectively. The second terminals of the first switching transistor and the second switching transistor are respectively connected to the control module; The third terminal of the first switching transistor and the third terminal of the second switching transistor are respectively used to output current; The first terminal of the third switch is connected to the first terminal of the fourth switch, and both the first terminal of the third switch and the first terminal of the fourth switch are used to connect to the input current. The second terminals of the third and fourth switching transistors are respectively connected to the control module; The third terminal of the third switch and the third terminal of the fourth switch are respectively used to output current; The control module is used to control the switching on and off of the first switch, the second switch, the third switch, and the fourth switch based on the input current, input voltage, preset current threshold, and preset voltage threshold connected to the first inductor. When the control module detects that the input voltage is in the positive half-cycle, the second switch operates in PWM chopping mode, the fourth switch is turned on and the third switch is turned off. If the input current connected to the first inductor is detected to be greater than the first current threshold, the first switch is controlled to turn on synchronous rectification. If the input current connected to the first inductor is detected to be less than or equal to the first current threshold, the first switch is controlled to turn off synchronous rectification. When the control module detects that the input voltage is in the negative half-cycle, the first switch operates in PWM chopping mode, the fourth switch is turned off and the third switch is turned on. If the input current of the first inductor is detected to be less than the second current threshold, the second switch is controlled to turn on synchronous rectification while the first switch is controlled to turn off synchronous rectification.

2. The apparatus according to claim 1, characterized in that, The control module includes: a preprocessing unit, a synchronous rectification unit, and a postprocessing unit; The input terminal of the synchronous rectification unit is connected to the output terminal of the preprocessing unit, and the output terminal of the synchronous rectification unit is connected to the input terminal of the postprocessing unit. The input terminal of the preprocessing unit is used to connect the input current connected to the first inductor; The output terminal of the post-processing unit is connected to the second terminal of the first switch, the second terminal of the second switch, the second terminal of the third switch, and the second terminal of the fourth switch, respectively.

3. The apparatus according to claim 2, characterized in that, The synchronous rectification unit includes: a first comparator, a second comparator, a first AND gate, a second AND gate, a third AND gate, a fourth AND gate, a fifth AND gate, a sixth AND gate, a first inverter, a second inverter, a first OR gate, and a second OR gate; The first input terminal of the first comparator is connected to the output terminal of the preprocessing unit, and the second input terminal of the first comparator is used to connect to the preset current threshold, wherein the preset current threshold is a preset current with a preset value; The output of the first comparator is connected to the first input of the first AND gate and the first input of the third AND gate, respectively. The output of the second comparator is connected to the second input of the first AND gate, the input of the first inverter, and the first input of the second AND gate, respectively. The second input of the second AND gate is used to receive a pulse width modulation signal. The input terminal of the second inverter is used to receive the pulse width modulation signal; The first input terminal of the fourth AND gate is used to receive the pulse width modulation signal, and the second input terminal of the fourth AND gate is connected to the output terminal of the first inverter. The first input terminal of the fifth AND gate is connected to the output terminal of the first AND gate, and the second input terminal of the fifth AND gate is connected to the output terminal of the second inverter; The first input terminal of the first OR gate is connected to the output terminal of the fourth AND gate, and the second input terminal of the first OR gate is connected to the output terminal of the fifth AND gate; The first input terminal of the sixth AND gate is connected to the output terminal of the third AND gate, and the second input terminal of the sixth AND gate is connected to the output terminal of the second inverter; The first input terminal of the second OR gate is connected to the output terminal of the sixth AND gate, and the second input terminal of the second OR gate is connected to the output terminal of the second AND gate. The output terminals of the first OR gate and the second OR gate are respectively connected to the input terminal of the post-processing unit.

4. The apparatus according to claim 3, characterized in that, The first input terminal of the second comparator is used to connect to the input voltage; the second input terminal of the second comparator is used to connect to the preset voltage threshold, wherein the preset voltage threshold is a preset voltage with a preset value.

5. The apparatus according to claim 3, characterized in that, The preprocessing unit includes: a sampling circuit, a filtering circuit, and an absolute value circuit; The input terminal of the sampling circuit is used to connect the input current, the output terminal of the sampling circuit is connected to the input terminal of the filter circuit, and the output terminal of the filter circuit is connected to the input terminal of the absolute value circuit. The output of the absolute value circuit is connected to the first input of the first comparator.

6. The apparatus according to claim 3, characterized in that, The post-processing unit includes: a first sub-unit and a second sub-unit; The input terminal of the first sub-unit is connected to the output terminal of the first OR gate, and the output terminal of the first sub-unit is connected to the second terminal of the first switch and the second terminal of the third switch, respectively. The input terminal of the second sub-unit is connected to the output terminal of the second OR gate, and the output terminal of the second sub-unit is connected to the second terminal of the second switch and the second terminal of the fourth switch, respectively.

7. The apparatus according to claim 1, characterized in that, The control module includes: a digital controller; The output terminal of the digital controller is connected to the second terminal of the first switch transistor, the second terminal of the second switch transistor, the second terminal of the third switch transistor, and the second terminal of the fourth switch transistor, respectively. The digital controller is used to control the switching on and off of the first switch, the second switch, the third switch, and the fourth switch based on the input current, input voltage, preset current threshold, and preset voltage threshold connected to the first inductor.

8. The apparatus according to any one of claims 1-7, characterized in that, One end of the first inductor is connected to the first resistor.

9. The apparatus according to claim 8, characterized in that, The bridgeless power factor correction circuit also includes: a fifth switch and a sixth switch; The first end of the fifth switch is connected to the first end of the sixth switch; The second terminals of the fifth and sixth switching transistors are respectively connected to the control module; The third terminal of the fifth switch and the third terminal of the sixth switch are used to output current, respectively.

10. The apparatus according to claim 9, characterized in that, The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are all metal-oxide-semiconductor field-effect transistors.

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