Encapsulation method and encapsulation structure

By using stacked non-organic materials and photoresist protection structures on the optical coupling interface, the problem of conflict between plastic packaging process and optical coupling space in 3D stacking is solved, providing chip protection, reducing the risk of packaging stress reliability, and avoiding laser damage.

CN114613685BActive Publication Date: 2025-06-17HANGZHOU GUANGZHIYUAN TECH CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202210214215.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-07
Publication Date
2025-06-17
Estimated Expiration
2042-03-07

AI Technical Summary

Technical Problem

In 3D stacking, spatial conflict between plastic sealing process and optical coupling leads to a lack of protection for the chip, an increased risk of packaging stress reliability, and a laser opening process may damage the chip.

Method used

The optical coupling interface is sealed and protected by a protective structure, including a stacked first protective layer of non-organic material and a second protective layer of photoresist. The plastic seal is removed through conventional thinning process, exposing the photoresist layer, avoiding laser holes and ensuring the safety of the chip.

Benefits of technology

The problem of plastic sealing process and optical coupling space conflict in 3D stacking is solved, providing physical protection of the chip, reducing the risk of packaging stress reliability, and avoiding the damage to the chip by laser.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114613685B_ABST
    Figure CN114613685B_ABST
Patent Text Reader

Abstract

The present application provides a packaging method and a packaging structure. The packaging method includes: providing a first chip, the first chip having opposite first and second surfaces, a first region and a second region on the first surface of the first chip, and the second region having an optical coupling interface; forming a protection structure in the second region, the protection structure covering the optical coupling interface, the protection structure including a stacked first protection layer and a second protection layer; using a molding compound to mold the first chip and the protection structure to form a molded structure; removing the protection structure covering the optical coupling interface to expose the optical coupling interface. The packaging method and the packaging structure of the present application use a protection structure to cover and protect the optical coupling interface, solve the problem of spatial conflict between the molding process and coupling in 3D stacking, and at the same time provide protection for the chip, having the advantage of being compatible with mainstream 2.5D and 3D stacking processes.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a packaging method and a packaging structure. Background Art

[0002] In a silicon photonics chip, an electrical chip (electronic integrated chip, EIC) and an optical chip (photonic integrated chip, PIC) adopt different wafer production process technologies, and chip-level interconnection is used to realize the connection between chips. In order to shorten the signal transmission path and obtain good enough performance, it has increasingly become a trend to use through-silicon vias (TSVs) for 3D stacking interconnection between the optical chip and the electrical chip to replace the traditional wire bonding interconnection. At the same time, when a fiber optic module and an optical chip use surface coupling GC (grating coupler), enough coupling space needs to be reserved, and it is required that there be no organic residue on the coupling surface to block light transmission. However, 3D stacking generally uses a plastic encapsulation process to completely wrap the upper surface of the optical chip, providing physical protection for the electrical chip and the optical chip. The requirements for the coupling space and the physical protection of the package conflict with each other. For the plastic encapsulation process that requires reserved coupling space, the industry considered reserving the corresponding space during mold manufacturing. Since the plastic encapsulation mold directly presses on the chip surface and may damage the chip, it is found that this solution is also not feasible.

[0003] Based on this, currently, most of the electrical chips and optical chips using 3D stacking adopt the method of exposing the chips outside. This method has a series of problems: 1. The exposed chips lack protection and are prone to physical damage, resulting in chip failure; 2. Due to process reasons, the thickness of the optical chip with TSVs at the bottom cannot be made thick (the typical value is 100 - 150 um), resulting in a small height of the underfill glue climbing, bringing risks to the reliability of the packaging stress; 3. The plastic encapsulation process cannot be used during the packaging process. The chip on substrate process in which the optical chip is first connected to the substrate is adopted. Due to the mismatch between the thermal expansion coefficients of the chip and the substrate, a large warpage occurs on the back of the optical chip. This phenomenon is more obvious when the size of the optical chip is large, resulting in the inability to connect the electrical chip to the optical chip. In addition, currently, there is also a method of using a transparent protective film in the optical coupling area as a protective layer for the coupling area, and the transparent protective film continues to remain in the coupling area. Then, the following problems will be faced: If the transparent protective film remains in the coupling area, it is required that the transparent protective film has the property of high light transmittance. Since it is difficult for the transparent protective film to reach 100% light transmittance, further light loss will be brought; and the opening of the plastic encapsulation layer generally uses a laser opening method, which may cause the laser to be incident on the optical coupling interface of the optical chip during laser opening, damaging the optical chip. Summary of the Invention

[0004] Based on the foregoing deficiencies of the prior art, the present application provides a packaging method and a packaging structure, in which the chip will not be damaged and the packaging is easy to implement.

[0005] To achieve the above object, the present application provides a packaging method, which includes:

[0006] Providing a first chip, the first chip having opposite first and second surfaces, the first surface of the first chip having a first region and a second region, the second region having an optical coupling interface;

[0007] Forming a protection structure in the second region, the protection structure covering the optical coupling interface, the protection structure including a stacked first protection layer and a second protection layer;

[0008] Using a plastic package to encapsulate the first chip and the protection structure to form a plastic package structure;

[0009] Removing the protection structure covering the optical coupling interface to expose the optical coupling interface.

[0010] Further, before using the plastic package to encapsulate the first chip and the protection structure to form a plastic package structure, it further includes:

[0011] Providing a second chip in the first region, the second chip having opposite first and second surfaces; the first surface of the second chip is disposed face to face with the first surface of the first chip, and the second chip communicates with the first chip.

[0012] Further, the first region of the first surface of the first chip has through-silicon vias;

[0013] Before using the plastic package to encapsulate the first chip and the protection structure to form a plastic package structure, it further includes:

[0014] Forming a first bump structure on the first surface of the second chip, and forming a second bump structure in the first region of the first surface of the first chip, the second bump structure being connected to the through-silicon vias;

[0015] Docking and connecting the first bump structure and the second bump structure.

[0016] Further, the removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes:

[0017] Thinning the plastic package on the side away from the first chip, and the second surface of the second chip and the protection structure are exposed from the plastic package;

[0018] Remove the protection structure, and an opening is formed at the position of the second region on the first surface of the first chip of the encapsulant, and the optical coupling interface is exposed from the opening.

[0019] Further, before thinning the encapsulant on the side away from the first chip, thin the second surface of the first chip to expose the silicon through hole from the second surface of the first chip, form a third bump structure on the second surface of the first chip, connect the silicon through hole to a part of the third bump structure, and temporarily bond the second surface of the first chip to a first carrier.

[0020] After removing the protection structure, debond the first carrier from the second surface of the first chip.

[0021] Further, removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes:

[0022] Thin the encapsulant on the side away from the first chip to expose the second surface of the second chip and the protection structure from the encapsulant, and temporarily bond the second surface of the second chip, the exposed surface of the protection structure, and the surface of the encapsulant away from the first chip to a second carrier.

[0023] Thin the second surface of the first chip to expose the silicon through hole from the second surface of the first chip, and form a third bump structure on the second surface of the first chip, and connect the silicon through hole to a part of the third bump structure.

[0024] Temporarily bond the second surface of the first chip to a third carrier, and debond the second carrier from the second surface of the second chip, the exposed surface of the protection structure, and the surface of the encapsulant away from the first chip.

[0025] Remove the protection structure, and an opening is formed at the position of the second region on the first surface of the first chip of the encapsulant, and the optical coupling interface is exposed from the opening.

[0026] Debond the third carrier from the second surface of the first chip.

[0027] Further, the material of the first protective layer is the same as that of the second bump structure, and the first protective layer and the second bump structure are formed simultaneously.

[0028] Further, the material of the first protective layer is different from that of the second bump structure, and the first protective layer and the second bump structure are formed step by step.

[0029] Further, the first protective layer is closer to the optical coupling interface than the second protective layer, and the materials of the first protective layer and the second protective layer are different.

[0030] Further, the first protective layer is closer to the optical coupling interface than the second protective layer, the width of the first protective layer is greater than or equal to the width of the second protective layer, and the thickness of the first protective layer is less than the thickness of the second protective layer.

[0031] Further, the first protective layer is a non-organic material layer, and the second protective layer is a photoresist.

[0032] Further, the first protective layer is an inorganic material layer or a metal layer.

[0033] Further, removing the protection structure includes:

[0034] First remove the second protective layer, and then remove the first protective layer;

[0035] For the removal of the second protective layer, wet or dry etching is used; or a sacrificial layer is coated before forming the second protective layer, and a stripping solution for the sacrificial layer is used during the removal process to dissolve and remove the sacrificial layer, and the second protective layer will be automatically peeled off; or after the second protective layer is formed, a demolding agent for the encapsulant is sprayed on the side of the second protective layer to assist in the peeling of the second protective layer;

[0036] For the removal of the first protective layer, wet or dry etching can be used.

[0037] The present application also provides a packaging structure prepared by using the packaging method as described above.

[0038] In the packaging method and packaging structure of the present application, a protection structure is used to cover and protect the optical coupling interface, solving the problem of spatial conflict between the encapsulation process and coupling in 3D stacking. At the same time, it provides protection for the chip, and has the advantage of being compatible with the mainstream 2.5D and 3D stacking processes. Using a laminated protection structure with a non-organic material as the first protective layer and a photoresist as the second protective layer as the protective layer of the optical coupling interface, the encapsulant above the photoresist can be removed by conventional thinning processes such as grinding to expose the photoresist layer, without the need for a laser drilling process, avoiding damage to the chip caused by the laser. At the same time, since there is no need for a laser drilling process, it is avoided that the laser will pass through the protective layer and enter the underlying optical coupling interface. Therefore, the underlying first protective layer can be made very thin and can be directly removed by wet etching, further improving the cleanliness of the optical coupling surface and saving time.

[0039] In addition, since the first protective layer in contact with the optical coupling interface is made of a non-organic material, it avoids the direct contact of the organic material with the optical coupling region, ensuring the surface purity of the optical coupling region and facilitating the subsequent maintenance of a high coupling efficiency between the optical coupling interface and the light guiding structure. Description of the Drawings

[0040] The drawings described herein are for illustrative purposes only and are not intended to limit the scope of the disclosure of the present application in any way. Additionally, the shapes and proportional dimensions of the various components in the figures are merely schematic and are used to assist in the understanding of the present application, rather than specifically defining the shapes and proportional dimensions of the various components of the present application. Those skilled in the art can, under the teaching of the present application, select various possible shapes and proportional dimensions according to specific circumstances to implement the present application. In the drawings:

[0041] Figure 1 is a schematic flowchart of a packaging method provided by an embodiment of the present application;

[0042] Figures 2 - 11 is a schematic diagram of the change of the corresponding packaging structure during the execution of a packaging method provided by an embodiment of the present application;

[0043] Figures 12 - 15 is a partial schematic diagram of the change of the corresponding packaging structure during the execution of a packaging method provided by another embodiment of the present application;

[0044] Figure 16 is a schematic diagram of the removal process of the protection structure in a packaging method provided by the present application. Detailed Embodiments

[0045] In order to enable those skilled in the art to better understand the technical solutions in the present application, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present application shall fall within the scope of protection of the present application.

[0046] Please refer to Figure 1 As shown, an embodiment of the present application provides a packaging method, which includes:

[0047] Providing a first chip, the first chip having opposite first and second faces, the first face of the first chip having a first region and a second region, the second region having an optical coupling interface;

[0048] Forming a protection structure in the second region, the protection structure covering the optical coupling interface, the protection structure including a stacked first protective layer and a second protective layer;

[0049] Use a plastic package to encapsulate the first chip and the protection structure to form an encapsulation structure;

[0050] Remove the protection structure covering the optical coupling interface to expose the optical coupling interface.

[0051] Specifically, please refer to Figure 2 As shown, provide a first chip 10, and the first chip 10 is a photonic integrated chip. The first chip 10 has opposite first and second faces 11 and 12. On the first face 11 of the first chip 10, there are a first region 13 and a second region 14, and the second region 14 has an optical coupling interface 15.

[0052] Please refer to Figure 3 As shown, form a protection structure in the second region 14. The protection structure covers the optical coupling interface 15, and the protection structure includes a stacked first protection layer 191 and second protection layer 192.

[0053] More specifically, before using the plastic package to encapsulate the first chip and the protection structure to form an encapsulation structure, it further includes:

[0054] Set a second chip in the first region. The second chip has opposite first and second faces; the first face of the second chip is arranged face to face with the first face of the first chip, and the second chip communicates with the first chip.

[0055] Please refer back to Figure 2 As shown, set a second chip 20 in the first region 13. The second chip 20 is an electronic integrated chip. The second chip 20 has opposite first and second faces 21 and 22. The first face 21 of the second chip 20 is arranged face to face with the first face 11 of the first chip 10, and the second chip 20 communicates with the first chip 10. Generally, after the wafer where the second chip 20 is located is tested (optional), it is cut into single chips. According to needs, multiple chips can also be used and connected to the first chip 10. The second chip 20 is pasted onto the first chip 10 in a flip-chip (chip-on-wafer flipchip) manner. The connection can be achieved by means of thermocompression bonding (TCB), reflow soldering, laser bonding, or direct metal bonding. In addition, since a first bump structure 23 (μbump) (to be described in detail later) is formed on the second chip 20, a bottom filling process is also required.

[0056] Before using the plastic package to encapsulate the first chip and the protection structure to form an encapsulation structure, it further includes:

[0057] Form a first bump structure on the first surface of the second chip, and form a second bump structure in a first region of the first surface of the first chip, where the second bump structure is connected to the through-silicon via;

[0058] Dock and connect the first bump structure and the second bump structure.

[0059] Please continue to refer to Figure 3 As shown, form a first bump structure (μBump) 23 on the first surface 21 of the second chip 20, and form a second bump structure (UBM) 16 in a first region 13 of the first surface 11 of the first chip 10. When the first chip 10 is provided, a through-silicon via 17 is provided in the first region 13 of its first surface 11, and the second bump structure 16 is connected to the through-silicon via 17. Forming a first bump structure (μBump) 23 on the first surface 21 of the second chip 20 and forming a second bump structure (UBM) 16 in a first region 13 of the first surface 11 of the first chip 10 can be achieved by using a conventional bumping process (including processes such as PVD, PR coating, exposure, development, electroplating, and etching).

[0060] Dock and connect the first bump structure 23 and the second bump structure 16 to enable communication between the second chip 20 and the first chip 10.

[0061] Please refer to Figure 4 As shown, use a molding compound 30 to mold the first chip 10 and the protection structure to form a molded structure,

[0062] The molded structure includes the first chip 10, the second chip 20, the protection structure, and the molding compound 30, and the molding compound 30 covers the first chip 10, the second chip 20, and the protection structure therein. This molding is wafer-level molding and can use liquid or granular molding compound.

[0063] Next, it is necessary to remove the protection structure covering the optical coupling interface to expose the optical coupling interface. In one embodiment, removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes:

[0064] Thin the molding compound on the side away from the first chip, and the second surface of the second chip and the protection structure are exposed from the molding compound;

[0065] Remove the protection structure, and an opening is formed in the position of the molding compound in the second region of the first surface of the first chip, and the optical coupling interface is exposed from the opening.

[0066] Further, before thinning the encapsulant on the side away from the first chip, thin the second surface of the first chip to expose the through-silicon vias from the second surface of the first chip, form a third bump structure on the second surface of the first chip, connect the through-silicon vias to some of the third bump structures, and temporarily bond the second surface of the first chip to a first carrier;

[0067] After removing the protection structure, debond the first carrier from the second surface of the first chip.

[0068] Specifically, please refer to Figures 5 - 10 As shown, removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes:

[0069] Thin the second surface 12 of the first chip 10 to expose the through-silicon vias 17 from the second surface 12 of the first chip 10, and form a third bump structure 18 on the second surface 12 of the first chip 10. The through-silicon vias 17 are connected to some of the third bump structures 18. In a specific embodiment, the third bump structure 18 is a C4 (Controlled collapse chip connection) bump, which is fabricated using a conventional bumping process;

[0070] Temporarily bond the second surface 12 of the first chip 10 to a first carrier 60;

[0071] Thin the encapsulant 30 on the side away from the first chip 10, and expose the second surface 22 of the second chip 20 and the protection structure from the encapsulant 30;

[0072] Remove the protection structure, and an opening 31 is formed at the position of the second region 14 of the first surface 11 of the first chip 10 where the encapsulant 30 is located, and the optical coupling interface 15 is exposed from the opening 31;

[0073] Debond the first carrier 60 from the second surface 12 of the first chip 10. Debonding can be performed by methods such as laser debonding and thermo-mechanical debonding.

[0074] Then, flip-chip mount the second side 12 of the first chip 10 onto the substrate 50. The substrate 50 has opposite first and second sides 51 and 52. The first side 51 of the substrate 50 is disposed face-to-face with the second side 12 of the first chip 10 and is butt-connected to the third bump structure 18. Bond pads 53 are provided on the second side 52 of the substrate 50. At this time, generally, the combined chips cut into single pieces are flip-chip mounted onto the substrate 50; and discrete devices such as capacitors, resistors, and inductors can also be additionally mounted on the substrate 50 according to actual needs.

[0075] Finally, couple the light guiding structure or the laser chip 40 with the optical coupling interface 15 to form a Figure 11 package structure as shown.

[0076] Exemplarily, the light guiding structure 40 is a fiber array (FA). Optionally, the light guiding structure 40 can be a prism, which guides the laser beam to the optical coupling interface 15 by means of laser integration. Specifically, the laser beam emitted by the laser chip passes through the lens and is incident on the prism, and the prism couples the laser beam into the first chip 10 through the optical coupling interface 15.

[0077] Optionally, the laser chip can be directly mounted above the optical coupling interface 15 so that the laser beam emitted by the laser chip is aligned with the optical coupling interface 15, and the laser beam can be directly coupled to the first chip 10. Mounting the laser chip above the optical coupling interface 15 can greatly simplify the device structure and improve the integration degree.

[0078] Please refer to Figures 12 - 14 and cooperate with Figure 11 As shown in the figure, in another embodiment of the present application, removing the protection structure covering the optical coupling interface and exposing the optical coupling interface includes:

[0079] Thin the molding compound 30 on the side away from the first chip 10, expose the second side 22 of the second chip 20 and the protection structure from the molding compound 30, and temporarily bond the second side 22 of the second chip 20, the exposed surface of the protection structure, and the surface of the molding compound 30 away from the first chip 10 to the second carrier 70;

[0080] Thin the second side 12 of the first chip 10 to expose the silicon through hole 17 from the second side 12 of the first chip 10, form a third bump structure 18 on the second side 12 of the first chip 10, and connect the silicon through hole 17 to part of the third bump structure 18;

[0081] Temporarily bond the second side 12 of the first chip 10 to the third carrier 80, and debond the second carrier 70 from the second side 22 of the second chip 20, the exposed surface of the protection structure, and the surface of the encapsulant 30 away from the first chip 10;

[0082] Remove the protection structure, and an opening 31 is formed at the position of the second region 14 of the first side 11 of the first chip 10 where the encapsulant 30 is located, and the optical coupling interface 15 is exposed from the opening 31;

[0083] Debond the third carrier 80 from the second side 12 of the first chip 10.

[0084] Then, flip-chip mount the second side 12 of the first chip 10 onto the substrate 50. The substrate 50 has opposite first side 51 and second side 52. The first side 51 of the substrate 50 is disposed face to face with the second side 12 of the first chip 10 and is butt-connected to the third bump structure 18, and pads 53 are provided on the second side 52 of the substrate 50.

[0085] Finally, as in the previous embodiment, couple the light guiding structure or the laser chip 40 to the optical coupling interface 15, and also obtain the Figure 11 encapsulation structure as shown.

[0086] The protection structure described in this application includes a stacked first protection layer 191 and second protection layer 192. In one embodiment, the first protection layer 191 is closer to the optical coupling interface 15 than the second protection layer 192, and the materials of the first protection layer 191 and the second protection layer 192 are different. In another embodiment, the width of the first protection layer 191 is greater than or equal to the width of the second protection layer 192, and the thickness of the first protection layer 191 is less than the thickness of the second protection layer 192. The first protection layer 191 is a non-organic material layer, and the second protection layer 192 is a photoresist, which is formed by means of PVD, coating, exposure, development, and etching. In short, a high etching selectivity ratio is required between the first protection layer and the first chip 10. Among them, the thickness of the photoresist depends on the product structure, and the thickness of the photoresist is basically equivalent to the thickness of the second chip 20, and can be 50μm to 500μm.

[0087] Among them, the material of the first protection layer 191 is the same as the material of the second bump structure 16, as Figure 3 shown in 191, so that the first protection layer 191 and the second bump structure 16 are formed simultaneously.

[0088] Of course, the material of the first protective layer 191 can also be different from that of the second bump structure 16. In this case, the first protective layer 191 and the second bump structure 16 are formed step by step.

[0089] Since the encapsulant 30 is generally made of organic materials, the contact between the organic materials and the optical coupling interface 15 will cause organic residues. The organic residues will seriously affect the coupling efficiency of the optical coupling interface 15, resulting in serious optical losses and affecting the operation of the first chip 10. To form a protection for the optical coupling interface 15, a protection structure covering the optical coupling interface 15 is fabricated above the optical coupling interface 15 in this application. The material of the first protective layer 191 that contacts the optical coupling interface 15 of the protection structure is selected from non-organic materials. For example, the first protective layer 191 is an inorganic non-metallic material such as silicon oxide, titanium nitride, aluminum oxide, etc., or the first protective layer 191 is a metallic material such as Al, Cu, Ti, etc. If the first protective layer 191 made of non-organic materials is not provided, or the material of the first protective layer 191 is an organic material, then the organic material will contact the optical coupling interface 15. For example, photoresist. The photoresist is generally coated over the entire surface through a coating process, and then through a photolithography masking process, the unnecessary parts are removed, and the required parts are retained (the parts covering the optical coupling interface 15 are retained). During the process of removing the photoresist, the organic molecules of the photoresist can form a structure that is easily soluble in the developer only after being treated with UV light. For positive photoresist, after being treated with UV light, the hydroxyl groups on the benzene ring of the organic molecules of the positive photoresist will turn into carboxyl groups, and the developer is alkaline. The carboxyl groups on the benzene ring of the organic molecules of the positive photoresist can react with the alkaline developer. However, due to the uneven surface structure of the optical coupling interface 15, it is easy to cause some positive photoresist not to participate in the UV light reaction, and the photoresist that has not undergone the UV light reaction cannot be dissolved in the developer. Therefore, it may not be completely removed finally, resulting in the residual photoresist remaining on the optical coupling interface 15, affecting the subsequent optical coupling efficiency of the optical coupling interface 15.

[0090] If only the first protective layer 191 made of non-organic materials is provided and the second protective layer 192 made of photoresist above is not provided, the following problems will occur: If the set first protective layer 191 is relatively thin, the encapsulant 30 covers above the first protective layer 191. During the opening process, a laser opening method needs to be used to remove the encapsulant 30 above the first protective layer 191. If the light absorption / light reflection effect of the first protective layer 191 is not good enough, the laser will pass through the first protective layer 191 and enter the optical coupling interface, damaging the optical coupling interface 15 and seriously affecting the optical coupling efficiency; If the set first protective layer 191 is very thick and is the same thickness as the second chip 20, then laser opening is not required, but the etching and removal cost of the thick non-organic material layer is relatively high, and it also causes a waste of time.

[0091] Therefore, the protection structure of the present application not only avoids organic matter from contaminating the optical coupling interface and laser from damaging the optical coupling interface, but also takes into account cost-effectiveness.

[0092] Correspondingly, removing the protection structure includes:

[0093] First, remove the second protective layer 192, and then remove the first protective layer 191. Please refer to Figure 16 and Figure 15 as shown. Among them, for the removal of the second protective layer 192, since the second protective layer 192 is formed by photoresist, in addition to wet degluing and dry etching degluing, a sacrificial layer can also be coated before coating the photoresist. During the removal process, a degluing solution for the sacrificial layer is used to dissolve and remove the sacrificial layer, and the photoresist layer can be automatically peeled off, making it convenient to remove the glue. In addition, for ultra-thick photoresist (such as more than 200um), it can be considered to spray a demolding agent for the encapsulant on the side of the photoresist after the formation of the sacrificial layer and the photoresist, which helps the peeling of the photoresist. For the removal of the first protective layer 191, corresponding wet or dry etching processes can be used. Since the first protective layer 191 has a high etching selectivity ratio with the substrate of the first chip 10, therefore, during the etching process of removing the first protective layer 191, the first protective layer 191 can be removed cleanly without damaging the optical coupling interface.

[0094] The present application also provides a packaging structure prepared by using the packaging method as described above.

[0095] For the packaging method and packaging structure of the present application, a protection structure is used to cover and protect the optical coupling interface, solving the problem of spatial conflict between the encapsulation process and coupling in 3D stacking. At the same time, it provides protection for the chip and has the advantage of being compatible with the mainstream 2.5D and 3D stacking processes. Using a laminated protection structure with a non-organic material as the first protective layer and photoresist as the second protective layer as the protective layer of the optical coupling interface, the encapsulant above the photoresist can be removed by conventional thinning processes such as grinding to expose the photoresist layer, without the need for a laser drilling process, avoiding laser damage to the chip. At the same time, since there is no need for a laser drilling process, it is avoided that the laser will pass through the protective layer and enter the underlying optical coupling interface. Therefore, the underlying first protective layer can be made very thin and can be directly removed by wet etching, further improving the cleanliness of the optical coupling surface and saving time.

[0096] In addition, since the first protective layer in contact with the optical coupling interface uses a non-organic material, it avoids direct contact between the organic material and the optical coupling region, ensuring the surface purity of the optical coupling region and being beneficial for the subsequent optical coupling interface to maintain a high coupling efficiency with the light guiding structure.

[0097] It should be understood that the above description is illustrative and not restrictive. Many embodiments and many applications other than the examples provided will be apparent to those skilled in the art upon reading the above description. Accordingly, the scope of the present teachings should not be determined with reference to the above description, but should be determined with reference to the full scope of the foregoing claims and their equivalents. For the sake of completeness, all articles and references, including patent applications and published announcements, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not a waiver of that subject matter, nor should it be considered that the applicant has not considered that subject matter to be part of the disclosed subject matter of the application.

Claims

1. An encapsulation method, characterized in that, It includes: A first chip is provided. The first chip has opposite first and second faces. A first region and a second region are provided on the first face of the first chip. The second region has an optical coupling interface. The first region has a second chip. The second chip has opposite first and second faces. A protection structure is formed in the second region. The protection structure covers the optical coupling interface. The protection structure includes a stacked first protection layer and a second protection layer. The first protection layer is a non-organic material layer, and the second protection layer is a photoresist. The first chip and the protection structure are encapsulated with a molding compound to form a molded structure. The protection structure covering the optical coupling interface is removed to expose the optical coupling interface. The removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes: Thinning the molding compound on the side away from the first chip, and the second face of the second chip and the protection structure are exposed from the molding compound. The protection structure is removed, and an opening is formed at the position of the second region on the first face of the first chip of the molding compound, and the optical coupling interface is exposed from the opening.

2. The encapsulation method according to claim 1, characterized in that, Before using the molding compound to encapsulate the first chip and the protection structure to form a molded structure, it further includes: The second chip is disposed in the first region. The second chip has opposite first and second faces. The first face of the second chip is disposed face-to-face with the first face of the first chip, and the second chip communicates with the first chip.

3. The encapsulation method according to claim 2, characterized in that, The first region on the first face of the first chip has through-silicon vias. Before using the molding compound to encapsulate the first chip and the protection structure to form a molded structure, it further includes: A first bump structure is formed on the first face of the second chip, and a second bump structure is formed in the first region on the first face of the first chip. The second bump structure is connected to the through-silicon vias. The first bump structure and the second bump structure are butt-connected.

4. The encapsulation method according to claim 3, characterized in that, It further includes the following steps: Before thinning the molding compound on the side away from the first chip, the second face of the first chip is thinned to expose the through-silicon vias from the second face of the first chip. A third bump structure is formed on the second face of the first chip. The through-silicon vias are connected to part of the third bump structure, and the second face of the first chip is temporarily bonded to a first carrier. After removing the protection structure, the first carrier is debonded from the second face of the first chip.

5. The encapsulation method according to claim 3, characterized in that, The removing the protection structure covering the optical coupling interface to expose the optical coupling interface includes: Thinning the molding compound on the side away from the first chip, and the second face of the second chip and the protection structure are exposed from the molding compound. The second face of the second chip, the exposed surface of the protection structure, and the surface of the molding compound away from the first chip are temporarily bonded to a second carrier. Thin the second side of the first chip to expose the through-silicon vias from the second side of the first chip, and form a third bump structure on the second side of the first chip, with the through-silicon vias connected to some of the third bump structures; Temporarily bond the second side of the first chip to a third carrier, and debond the second carrier from the second side of the second chip, the exposed surface of the protection structure, and the surface of the encapsulant away from the first chip; Remove the protection structure, and form an opening at the position of the second region of the first side of the first chip where the encapsulant is located, and the optical coupling interface is exposed from the opening; Debond the third carrier from the second side of the first chip.

6. The encapsulation method according to claim 3, characterized in that, The material of the first protection layer is the same as that of the second bump structure, and the first protection layer and the second bump structure are formed simultaneously.

7. The encapsulation method according to claim 3, characterized in that, The material of the first protection layer is different from that of the second bump structure, and the first protection layer and the second bump structure are formed step by step.

8. The encapsulation method according to claim 1, characterized in that, The first protection layer is closer to the optical coupling interface than the second protection layer, and the materials of the first protection layer and the second protection layer are different.

9. The encapsulation method according to claim 1, characterized in that, The first protection layer is closer to the optical coupling interface than the second protection layer, the width of the first protection layer is greater than or equal to the width of the second protection layer, and the thickness of the first protection layer is less than the thickness of the second protection layer.

10. The encapsulation method according to claim 1, characterized in that, The first protection layer is an inorganic material layer or a metal layer.

11. The encapsulation method according to claim 1 or 5, characterized in that, The removing of the protection structure includes: First remove the second protection layer, and then remove the first protection layer; Coat a sacrificial layer before forming the second protection layer, and use a sacrificial layer remover during the removal process to dissolve and remove the sacrificial layer, and the second protection layer will automatically peel off; or after the second protection layer is formed, spray a demolding agent for the encapsulant on the side of the second protection layer to assist in the peeling of the second protection layer; The first protection layer can be removed by wet etching or dry etching.

12. An encapsulation structure is prepared by using the encapsulation method described in any one of claims 1-11.

Citation Information

Patent Citations

  • Manufacturing method of packaging structure and packaging structure

    CN113960715A