Diode Package Structure and Its Manufacturing Method

Abstract

A diode packaging structure and a manufacturing method thereof. The diode packaging structure includes a substrate, at least one diode chip, and an opaque encapsulating glue. The substrate has a conductive layer. The diode chip is die-bonded on the substrate and electrically connected to the conductive layer. The opaque encapsulating glue has a covering portion and a sidewall portion. The sidewall portion is connected to and surrounds the substrate to jointly form a groove. The covering portion is connected between the sidewall of the diode chip and the sidewall portion, wherein a first contact vertex of the covering portion and the sidewall of the diode chip is higher than a second contact vertex of the covering portion and the sidewall portion. The diode packaging structure of this case can respond to thermal expansion and contraction and is not prone to peeling problems.

Description

Technical Field

[0001] The present invention relates to a diode packaging structure and a manufacturing method thereof. Background Art

[0002] A light emitting diode (LED) is a light emitting element made of semiconductor material, which can convert electrical energy into light. It has the advantages of small size, high energy conversion efficiency, long life, power saving, etc., and thus is widely used as a light source for various electronic devices.

[0003] The packaging structure of a light emitting diode includes various packaging colloids to meet different requirements. Different types of packaging colloids often cause the interface between different colloids to be easily peeled off due to the different characteristics of the colloid materials. In view of this, suppliers need various solutions to control the interface peeling situation. Summary of the Invention

[0004] The present invention proposes an innovative diode packaging structure and a manufacturing method thereof to solve the problems of the prior art.

[0005] In an embodiment of the present invention, a diode packaging structure includes a substrate, at least one diode chip, and an opaque encapsulant. The substrate has a conductive layer. The diode chip is die-bonded on the substrate and electrically connected to the conductive layer. The opaque encapsulant has a covering portion and a sidewall portion. The sidewall portion is connected to and surrounds the substrate to jointly form a groove. The covering portion is connected between the sidewall of the diode chip and the sidewall portion, wherein a first contact vertex of the covering portion and the sidewall of the diode chip is higher than a second contact vertex of the covering portion and the sidewall portion.

[0006] In an embodiment of the present invention, the diode packaging structure further includes a transparent encapsulant. The transparent encapsulant is filled into the groove to cover the diode chip and forms a first interface with the sidewall portion, wherein an included angle between a connection line between the first contact vertex and the second contact vertex and the first interface is an acute angle.

[0007] In an embodiment of the present invention, the transparent encapsulant and the covering portion form a second interface, and the second interface includes a curved surface.

[0008] In an embodiment of the present invention, the covering portion shields the conductive layer.

[0009] In an embodiment of the present invention, the opaque encapsulant is a white or black encapsulant.

[0010] In an embodiment of the present invention, the diode chip is a light emitting diode, a photodiode, or a Zener diode.

[0011] In an embodiment of the present invention, a method for manufacturing a diode packaging structure includes the following steps. Provide a substrate. Fix a plurality of diode chips on the substrate. Form a first opaque encapsulant between these diode chips. Form a transparent encapsulant to cover these diode chips and the first opaque encapsulant. In the laminated area of the transparent encapsulant and the first opaque encapsulant, form a trench to expose the substrate. Fill a second opaque encapsulant in the trench, wherein a first contact vertex of the first opaque encapsulant and the sidewall of the diode chip is higher than a second contact vertex of the first opaque encapsulant and the second opaque encapsulant.

[0012] In an embodiment of the present invention, the transparent encapsulant and the second opaque encapsulant form an interface, and an angle between a connecting line between the first contact vertex and the second contact vertex and the interface is an acute angle.

[0013] In an embodiment of the present invention, the opaque encapsulant is a white or black encapsulant.

[0014] In an embodiment of the present invention, the diode chip is a light-emitting diode, a photodiode or a Zener diode.

[0015] In summary, for the diode packaging structure and its manufacturing method of the present invention, acute angles can be formed at the two interfaces where the transparent encapsulant and the opaque encapsulant are joined. Compared with the encapsulant interfaces of known diode packaging structures that present arc chamfers, problems of peeling are less likely to occur due to thermal expansion and contraction.

[0016] The following will describe the above description in detail with embodiments and provide further explanations for the technical solutions of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] To make the above and other objects, features, advantages and embodiments of the present invention more obvious and understandable, the descriptions of the accompanying drawings are as follows:

[0018] Figure 1 is a cross-sectional view of a diode packaging structure according to an embodiment of the present invention; and

[0019] Figures 2 to 4 is a cross-sectional view of a method for manufacturing a diode packaging structure according to an embodiment of the present invention.

[0020]

REFERENCE SIGNS

[0021] To make the above and other objects, features, advantages and embodiments of the present invention more obvious and understandable, the descriptions of the accompanying reference signs are as follows:

[0022] 100: Diode packaging structure

[0023] 102: Substrate

[0024] 102a: Conductive layer

[0025] 104: Opaque encapsulant

[0026] 104a: Covering portion

[0027] 104b: Sidewall portion

[0028] 106a: Diode chip

[0029] 106b: Diode chip

[0030] 107a: Connection wire

[0031] 107b: First interface

[0032] 107c: Second interface

[0033] 108: Transparent encapsulant

[0034] 108a: Groove

[0035] 109a: First contact vertex

[0036] 109b: Second contact vertex

[0037] 200: Diode encapsulation structure unit

[0038] 202: Substrate

[0039] 202a: Depression

[0040] 204a: First opaque encapsulant

[0041] 204b: Second opaque encapsulant

[0042] 206: Diode chip

[0043] 207a: Connection wire

[0044] 207b: Interface

[0045] 207c: Interface

[0046] 208: Transparent encapsulant

[0047] 209a: Contact vertex

[0048] 209b: Contact vertex

[0049] 210: Cutting line

[0050] θ: Included angle Detailed implementation manner

[0051] To make the description of the present invention more detailed and complete, reference may be made to the accompanying drawings and the various embodiments described below. The same numbers in the drawings represent the same or similar elements. On the other hand, well-known elements and steps are not described in the embodiments to avoid unnecessary limitations to the present invention.

[0052] In the embodiments and claims, the description of "electrically connected" may generally refer to an element being indirectly electrically coupled to another element through other elements, or an element being directly electrically connected to another element without passing through other elements.

[0053] In the embodiments and claims, unless otherwise specifically defined in the context for articles, "a" and "the" may generally refer to a single or multiple.

[0054] Please refer to Figure 1 , which shows a cross-sectional view of a diode packaging structure according to an embodiment of the present invention. The diode packaging structure 100 includes a substrate 102, at least one diode chip, and encapsulant. In some embodiments of the present disclosure, the substrate 102 has a conductive layer 102a for conducting the current required for the operation of the diode. In some embodiments of the present disclosure, the substrate 102 may be a flat plate, such as a BT board, an EMC board, an SMC board, a ceramic board, a PCB board, or a Sapphire board, etc. In some embodiments of the present disclosure, the conductive layer 102a may be a metal plating, but not limited thereto.

[0055] In some embodiments of the present disclosure, the diode chip 106a may be a light-emitting diode, and the diode chip 106b may be a Zener diode or a photodiode. In some embodiments of the present disclosure, the diode chip 106a may be a light-emitting diode, and the diode chip 106b may also be a light-emitting diode (such as light-emitting diodes of different colors). In some embodiments of the present disclosure, the diode chips (106a, 106b) may both be Zener diodes or photodiodes. The diode chips (106a, 106b) are die-bonded on the substrate 102 and electrically connected to the conductive layer 102a on the substrate 102 (such as by wire bonding or soldering). In some embodiments of the present disclosure, the type of the diode chip may be a traditional face-up, vertical, or flip chip.

[0056] In some embodiments of the present disclosure, the encapsulant may include a transparent encapsulant 108 and an opaque encapsulant 104. The opaque encapsulant 104 has a covering portion 104a and a sidewall portion 104b. The sidewall portion 104b is connected to and surrounds the substrate 102 to jointly form a groove 108a. The covering portion 102a is connected between adjacent diode chips (106a, 106b), and between the sidewall of the diode chip (106a or 106b) and the sidewall portion 104b, so as to shield or cover the upper surface of the substrate 102 or its conductive layer 102a, thereby preventing the component from suffering from color deviation or brightness attenuation due to oxidation and discoloration of the conductive layer, and improving the product life. In some embodiments of the present disclosure, the covering portion 104a and the sidewall portion 104b may be the same encapsulant, so as to avoid interface peeling problems or other defects caused by different materials. In some embodiments of the present disclosure, the opaque encapsulant 104 may be a white encapsulant or a black encapsulant, so as to meet application environments with different requirements. For example, the white encapsulant can increase the light reflectivity to improve the light efficiency by 3 to 40%, and the black encapsulant can reduce the noise ratio of the optical component. In some embodiments of the present disclosure, the transparent encapsulant 108 is filled into the groove 108a formed by the sidewall portion 104b and the substrate 102 to cover the diode chips (106a, 106b), and forms a second interface 107c with the covering portion 104a. In some embodiments of the present disclosure, the transparent encapsulant 108 may be an organic glue, an inorganic glue, or a mixture thereof in any proportion, such as silicone, epoxy resin, fluororubber, etc. In some embodiments of the present disclosure, the opaque encapsulant 104 may be an organic glue or an inorganic glue, and may include contents such as ceramics, metals, glass, titanium dioxide, or silicon dioxide.

[0057] In some embodiments of the present disclosure, the first contact vertex 109a between the covering portion 104a and the sidewall of the diode chip 106a is higher than the second contact vertex 109b between the covering portion 104a and the sidewall portion 104b. In some embodiments of the present disclosure, the transparent encapsulant 108 and the sidewall portion 104b form a first interface 107b, and the angle θ between the connection line 107a between the first contact vertex 109a and the second contact vertex 109b and the first interface 107b is an acute angle, so that the interface (i.e., 107b and 107c) between the transparent encapsulant 108 and the opaque encapsulant 104 is less likely to have a peeling problem.

[0058] In some embodiments of the present disclosure, a curved second interface 107c is formed between the transparent encapsulant 108 and the covering portion 104a.

[0059] Please refer to Figures 2 to 4 , which shows a cross-sectional view of the steps of a manufacturing method of a diode packaging structure according to an embodiment of the present invention.

[0060] In Figure 2 , a substrate 202 is provided, and a plurality of diode chips 206 are die-bonded on the substrate 202, and the diode chips 206 are electrically connected to the substrate 202. Then, a first opaque encapsulant 204a is formed between adjacent diode chips 206, and then a covering portion similar to Figure 1 is formed. In some embodiments of the present disclosure, the diode chip 206 can be at least one of a light-emitting diode, a photodiode, and a Zener diode. In some embodiments of the present disclosure, the substrate 202 can be a flat plate, such as a BT board, an EMC board, an SMC board, a ceramic board, a PCB board, or a Sapphire board, etc. In some embodiments of the present disclosure, the type of the diode chip 206 can be a traditional face-up type, a vertical type, or a flipchip type.

[0061] In Figure 3 , a transparent encapsulant 208 is formed to cover these diode chips 206 and the first opaque encapsulant 204a. An interface 207c is formed between the transparent encapsulant 208 and the first opaque encapsulant 204a. Then, in the stacked region of the transparent encapsulant 208 and the first opaque encapsulant 204a, a trench 205 is formed to expose the substrate 202. In some embodiments of the present disclosure, a part of the trench 205 includes a recess 202a on the substrate 202.

[0062] In Figure 4 , in the trench 205, a second opaque encapsulant 204b is filled, and then a sidewall portion 104b as described above is formed. The first contact vertex 209a between the first opaque encapsulant 204a and the sidewall of the diode chip 206 is higher than the second contact vertex 209b between the first opaque encapsulant 204a and the second opaque encapsulant 204b. Then, along the cutting line 210, it is cut so that a plurality of diode package structure monomers 200 can be used separately. In some embodiments of the present disclosure, each diode package structure monomer 200 may also include two or more diode chips 206. For example, the diode package structure includes a light-emitting diode, a photodiode, or a Zener diode, or a plurality of light-emitting diodes, a plurality of photodiodes, or a plurality of Zener diodes.

[0063] In some embodiments of the present disclosure, the transparent encapsulant 208 and the second opaque encapsulant 204b form an interface 207b, and the included angle θ between the connecting line 207a between the first contact vertex 209a and the second contact vertex 209b and the interface 207b is an acute angle, so that the interfaces (i.e., interfaces 207b, 207c) between the transparent encapsulant 208, the first opaque encapsulant 204a, and the second opaque encapsulant 204b are less likely to have a peeling problem.

[0064] In some embodiments of the present disclosure, the first opaque encapsulant 204a and the second opaque encapsulant 204b may be the same type of encapsulant, so as to avoid interface peeling problems or other drawbacks caused by different materials. In some embodiments of the present disclosure, the first opaque encapsulant 204a and the second opaque encapsulant 204b may be white or black encapsulants, so as to meet the application environments with different requirements. For example, the white encapsulant can increase the light reflectivity to improve the light efficiency by 3 to 40%, and the black encapsulant can reduce the noise ratio of the optical element. In some embodiments of the present disclosure, the transparent encapsulant 208 may be an organic glue, an inorganic glue, or a mixture thereof in any proportion, such as silicone, epoxy resin, fluororubber, etc. In some embodiments of the present disclosure, the first and second opaque encapsulants (204a, 204b) may be organic glues or inorganic glues, and may contain contents such as ceramics, metals, glass, titanium dioxide, or silicon dioxide.

[0065] The diode packaging structure and its manufacturing method of the present invention can form an acute angle between the two interfaces where the transparent encapsulant and the opaque encapsulant are joined. Compared with the known diode packaging structure where the encapsulant interface has a rounded chamfer, it is less likely to cause peeling problems due to thermal expansion and contraction.

[0066] Although the present invention has been disclosed as above in embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the appended claims.

Claims

1. A diode packaging structure, characterized in that, it comprises: a substrate having a conductive layer; a first diode chip and a second diode chip, which are die-bonded on the substrate and electrically connected to the conductive layer; and an opaque encapsulant having a first covering portion, a second covering portion and a sidewall portion, the sidewall portion connecting and surrounding the substrate to jointly form a groove, the first covering portion being connected between the sidewall of the first diode chip and the sidewall portion, wherein a first contact vertex between the first covering portion and the sidewall of the first diode chip is higher than a second contact vertex between the first covering portion and the sidewall portion, wherein the second covering portion is located between the first diode chip and the second diode chip, and a third contact vertex between the second covering portion and the first diode chip is lower than a fourth contact vertex between the second covering portion and the second diode chip.

2. The diode packaging structure according to claim 1, characterized in that, it further comprises a transparent encapsulant, the transparent encapsulant filling the groove to cover the first diode chip and the second diode chip and forming a first interface with the sidewall portion, wherein an angle between a line connecting the first contact vertex and the second contact vertex and the first interface is an acute angle.

3. The diode packaging structure according to claim 2, characterized in that, the transparent encapsulant forms a second interface with the first covering portion, and the second interface comprises a curved surface.

4. The diode packaging structure according to claim 1, characterized in that, the first covering portion and the second covering portion shield the conductive layer.

5. The diode packaging structure according to claim 1, characterized in that, the opaque encapsulant is a white or black encapsulant.

6. The diode packaging structure according to claim 1, characterized in that, the first diode chip and the second diode chip are light-emitting diodes, photodiodes or Zener diodes.

7. A manufacturing method of a diode packaging structure, characterized in that, it comprises: providing a substrate; die-bonding a plurality of diode chips on the substrate; forming a first opaque encapsulant between the plurality of diode chips; forming a transparent encapsulant to cover the plurality of diode chips and the first opaque encapsulant; forming a trench in a stacked area of the transparent encapsulant and the first opaque encapsulant to expose the substrate; and filling a second opaque encapsulant in the trench, wherein a first contact vertex between the first opaque encapsulant and the sidewalls of the plurality of diode chips is higher than a second contact vertex between the first opaque encapsulant and the second opaque encapsulant.

8. The manufacturing method according to claim 7, characterized in that, the transparent encapsulant forms an interface with the second opaque encapsulant, and an angle between a line connecting the first contact vertex and the second contact vertex and the interface is an acute angle.

9. The manufacturing method according to claim 7, characterized in that, the opaque encapsulant is a white or black encapsulant.

10. The manufacturing method according to claim 7, characterized in that, The diode chip is a light-emitting diode, a photodiode, or a Zener diode.

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