A calibration circuit and calibration method for MRAM read and write voltage, MRAM

Abstract

The present invention provides an MRAM read / write voltage calibration circuit and calibration method, as well as an MRAM. The calibration circuit includes a transmission control module, a power management module, and a comparison and verification module disposed within the MRAM. The transmission control module sequentially configures Trim values and transmits each configured Trim value to the power management module. The power management module parses the Trim values to obtain read / write voltage values and transmits the read / write voltage values to the comparison and verification module. The comparison and verification module compares the parsed read / write voltage values with the calibrated read / write voltage values to determine whether they are equal, and transmits a feedback signal indicating the comparison result to the transmission control module. Upon receiving the feedback signal indicating that the read / write voltage values are equal to the calibrated read / write voltage values, the transmission control module stops configuring the Trim values and stores the Trim value corresponding to the read / write voltage value that is equal to the calibrated read / write voltage value. The MRAM can self-adjust the read / write voltage to a desired state, automatically detect the MRAM read / write voltage within the chip, and automatically adjust the Trim value until the read / write voltage reaches the calibrated read / write voltage value.

Description

Technical Field

[0001] The present invention relates to the technical field of memory, and in particular to a calibration circuit and a calibration method for MRAM read / write voltages, and an MRAM. Background Art

[0002] As the demand for low power consumption in chips for diverse applications, such as automotive electronics and smart homes, continues to grow, low-power MRAM (Magnetoresistive Random Access Memory), one of the most critical modules within chips, is becoming a research hotspot in the industry. Spin-transfer torque magnetic random access memory (STT-MRAM) is an emerging memory technology that offers non-volatility, high density, high endurance, and nanosecond read and write speeds. MRAM chips have calibrated read and write voltages to maximize MRAM array yield. Due to manufacturing process fluctuations, the trim value required to achieve the expected read and write voltage output by the power management module of each chip varies. Traditionally, testers have used ATE (Automatic Test Equipment) to determine the trim value for each chip, which is time-consuming and costly. Summary of the Invention

[0003] The present invention provides an MRAM read / write voltage calibration circuit and calibration method, and an MRAM, so as to realize self-detection of the MRAM read / write voltage inside the chip and automatically adjust the Trim value until the read / write voltage reaches the calibrated read / write voltage value, thereby reducing the risk of MRAM memory failure, greatly saving factory testing time and cost, and improving mass production efficiency.

[0004] In a first aspect, the present invention provides an MRAM read / write voltage calibration circuit, comprising a transmission control module, a power management module, and a comparison and verification module disposed within the MRAM. The transmission control module sequentially configures Trim values and transmits each configured Trim value to the power management module; the power management module parses the received Trim values to obtain read / write voltage values and transmits the parsed read / write voltage values to the comparison and verification module; the comparison and verification module compares the read / write voltage values parsed by the power management module with the calibrated read / write voltage values to determine whether they are equal, and transmits a feedback signal indicating the comparison result to the transmission control module; and upon receiving the feedback signal indicating that the read / write voltage values are equal to the calibrated read / write voltage values, the transmission control module stops configuring the Trim values and stores the Trim value corresponding to the read / write voltage value that is equal to the calibrated read / write voltage value.

[0005] In this solution, by integrating a transmission control module and a comparison and verification module within the MRAM, the read and write voltages can be automatically adjusted to the desired state. This allows the chip to self-detect the MRAM read and write voltages and automatically adjust the Trim value until the read and write voltages analyzed by the power management module reach the calibrated read and write voltages. This entire process eliminates the need for extensive pre-shipment testing, reducing the risk of MRAM failure, significantly saving factory testing time and costs, and improving mass production efficiency.

[0006] In one specific embodiment, the calibration circuit further includes a first storage module for storing the Trim value configured by the transmission control module each time. The first storage module is disposed in MRAM. The first storage module is further configured to transmit the Trim value stored therein to the power management module, thereby temporarily storing the configured Trim value each time.

[0007] In a specific embodiment, the first storage module is a register to improve data storage and transmission efficiency.

[0008] In one specific embodiment, the transmission control module includes a transmission control module data generator, a transmission control module address generator, and a transmission control module controller. The transmission control module data generator is configured to sequentially configure Trim values; the transmission control module address generator is configured to sequentially assign storage addresses in a first storage module for each Trim value configured by the transmission control module data generator; and the transmission control module controller is configured to control the transmission control module data generator to write each configured Trim value into the first storage module according to the storage address assigned by the transmission control module address generator. This allows the transmission control module to sequentially configure Trim values and temporarily store them.

[0009] In one specific embodiment, the calibration circuit further includes a second storage module communicatively coupled to the first storage module and a second storage module controller communicatively coupled to the transmission control module controller, wherein both the second storage module and the second storage module controller are disposed in an MRAM. The second storage module is configured to store a Trim value corresponding to a read / write voltage value equal to the calibration read / write voltage value. When the transmission control module receives a feedback signal indicating that the read / write voltage value is equal to the calibration read / write voltage value, the transmission control module controller enables the second storage module controller to write the Trim value corresponding to the read / write voltage value equal to the calibration read / write voltage value into the second storage module. This facilitates storing the Trim value corresponding to the read / write voltage value equal to the calibration read / write voltage value, facilitating recall of the Trim value corresponding to the read / write voltage value equal to the calibration read / write voltage value when the system is restarted and powered on.

[0010] In a specific embodiment, the second storage module is an eFuse (electrically programmable fuse) array, and the second storage module controller is an eFuse controller. When the system is powered off, the Trim value stored therein does not disappear, while improving data storage and transmission efficiency.

[0011] In a specific embodiment, when the comparison and verification module compares the read / write voltage value analyzed by the power management module and the calibrated read / write voltage value and finds that they are not equal, the comparison and verification module sends a low-level feedback signal to the transmission control module; and when the comparison and verification module compares the read / write voltage value analyzed by the power management module and finds that they are equal, the comparison and verification module sends a high-level feedback signal to the transmission control module. This allows the comparison and verification module to send different feedback signals to the transmission control module based on different comparison results.

[0012] In a specific embodiment, the calibration circuit further includes a pin provided on the MRAM and connected to the comparison and verification module, wherein the pin is used to input the calibration read / write voltage value to the comparison and verification module, so that the calibration read / write voltage value is input to the comparison and verification module via the specially provided pin.

[0013] In one specific embodiment, the calibration circuit further includes a third storage module disposed within the MRAM, the third storage module being configured to store calibration read / write voltage values. A digital-to-analog conversion module is also disposed within the MRAM and is communicatively connected to the third storage module. The digital-to-analog conversion module is further communicatively connected to the comparison and verification module to convert the calibration read / write voltage values stored in the third storage module and transmit them to the comparison and verification module. By storing the calibration read / write voltage values in the third storage module within the MRAM, calibration can be performed by internally calling instructions when the calibration read / write voltage values are used.

[0014] In a specific embodiment, the third storage module is a register to improve data storage and transmission efficiency.

[0015] In a second aspect, the present invention also provides a calibration method for a calibration circuit based on the above-mentioned MRAM read / write voltage, the calibration method comprising: a sending control module sequentially configuring the Trim value and transmitting each configured Trim value to a power management module; the power management module parses the received Trim value to obtain a read / write voltage value, and transmits the parsed read / write voltage value to a comparison and verification module; the comparison and verification module compares whether the read / write voltage value parsed by the power management module is equal to the calibrated read / write voltage value, and sends a feedback signal representing the comparison result to the sending control module; when the sending control module receives the feedback signal representing that the read / write voltage value is equal to the calibrated read / write voltage value, the sending control module stops configuring the Trim value and saves the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value.

[0016] In this solution, by integrating a transmission control module and a comparison and verification module within the MRAM, the read and write voltages can be automatically adjusted to the desired state. This allows the chip to self-detect the MRAM read and write voltages and automatically adjust the Trim value until the read and write voltages reach the calibrated values, significantly saving testing time and costs. Furthermore, the entire process eliminates the need for extensive pre-shipment testing operations, reducing the risk of MRAM memory failure, significantly saving factory testing time and costs, and improving mass production efficiency.

[0017] In one specific embodiment, the calibration method further includes: after saving the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, restarting and powering on; a sending control module sending the saved Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value to a power management module; the power management module parsing the received Trim value to obtain a read / write voltage value, and transmitting the parsed read / write voltage value to a comparison and verification module; and the comparison and verification module verifying whether the read / write voltage value parsed by the power management module is equal to the calibrated read / write voltage value. After the system is restarted and powered on, first verifying whether the read / write voltage value parsed based on the stored Trim value is equal to the calibrated read / write voltage value to verify whether the calibration result is accurate.

[0018] In a third aspect, the present invention further provides an MRAM, which includes a storage array and a calibration circuit for any of the above-mentioned MRAM read and write voltages. The power management module is used to output the read and write voltages to the storage array. By integrating a transmission control module and a comparison verification module within the MRAM, the read and write voltages can be self-adjusted to the expected state, enabling self-detection of the MRAM read and write voltages within the chip and automatic adjustment of the Trim value until the read and write voltage value analyzed by the power management module reaches the calibrated read and write voltage value, which can greatly save testing time and cost. Furthermore, the entire process does not require excessive operations at the test end before shipment, reducing the risk of MRAM memory failure, while greatly saving factory testing time and cost and improving mass production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic block diagram of a calibration circuit for MRAM read and write voltages provided by an embodiment of the present invention;

[0020] Figure 2 A schematic block diagram of a sending control module provided in an embodiment of the present invention;

[0021] Figure 3 A schematic block diagram of another MRAM read / write voltage calibration circuit provided by an embodiment of the present invention;

[0022] Figure 4A schematic block diagram of another MRAM read / write voltage calibration circuit provided by an embodiment of the present invention;

[0023] Figure 5 A flowchart of a method for calibrating MRAM read and write voltages provided by an embodiment of the present invention;

[0024] Figure 6 A flowchart of another method for calibrating MRAM read and write voltages provided by an embodiment of the present invention;

[0025] Figure 7 A flowchart of another method for calibrating MRAM read and write voltages provided by an embodiment of the present invention.

[0026] Reference numerals:

[0027] 10- Transmitting control module 11- Transmitting control module data generator 12- Transmitting control module address generator

[0028] 13-Sending control module controller 20-Power management module 30-Comparison verification module

[0029] 40-first storage module 50-storage array 60-second storage module

[0030] 61-Second storage module controller 70-Pin

[0031] 81-third storage module 82-digital-analog conversion module DETAILED DESCRIPTION

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0033] To facilitate understanding of the MRAM read / write voltage calibration circuit provided by an embodiment of the present invention, the following first describes an application scenario of the MRAM read / write voltage calibration circuit provided by an embodiment of the present invention. This calibration circuit is used to calibrate the read / write voltage within an MRAM. The calibration circuit is described in detail below with reference to the accompanying drawings.

[0034] refer to Figure 1The calibration circuit provided by an embodiment of the present invention includes a transmission control module 10, a power management module 20, and a comparison and verification module 30 disposed within an MRAM. The transmission control module 10 sequentially configures Trim values and transmits each configured Trim value to the power management module 20. The power management module 20 parses the received Trim values to obtain read / write voltage values and transmits the parsed read / write voltage values to the comparison and verification module 30. The comparison and verification module 30 compares the read / write voltage values parsed by the power management module 20 with the calibrated read / write voltage values to determine whether they are equal, and transmits a feedback signal indicating the comparison result to the transmission control module 10. Upon receiving the feedback signal indicating that the read / write voltage values are equal to the calibrated read / write voltage values, the transmission control module 10 stops configuring the Trim values and saves the Trim value corresponding to the read / write voltage value that is equal to the calibrated read / write voltage value.

[0035] In the above-described solution, by integrating the transmission control module 10 and the comparison and verification module 30 within the MRAM, the read / write voltage can be self-adjusted to the desired state. This allows the chip to self-detect the MRAM read / write voltage and automatically adjust the Trim value until the read / write voltage value analyzed by the power management module 20 reaches the calibrated read / write voltage value. This entire process eliminates the need for excessive pre-shipment testing, reducing the risk of MRAM memory failure, significantly saving factory testing time and costs, and improving mass production efficiency. The following describes each of these modules in detail with reference to the accompanying figures.

[0036] refer to Figure 1 The sending control module 10 is used to sequentially configure the Trim value and transmit the configured Trim value to the power management module 20. Figure 1 , a first storage module 40 for storing the Trim value configured each time by the sending control module 10 can be set in the MRAM to temporarily store the Trim value configured each time by the sending control module 10. When setting the first storage module 40, the first storage module 40 can be a register to improve data storage and transmission efficiency. When specifically setting the sending control module 10, refer to Figure 2The transmission control module 10 may include a transmission control module data generator 11, a transmission control module address generator 12, and a transmission control module controller 13. The transmission control module data generator 11 is configured to sequentially configure Trim values. In a self-test mode, the transmission control module controller 13 can control the transmission control module data generator 11 to sequentially configure Trim values. The transmission control module address generator 12 is configured to sequentially assign storage addresses to the first storage module 40 for each Trim value configured by the transmission control module data generator 11. In a self-test mode, the transmission control module controller 13 can control the transmission control module address generator 12 to sequentially assign storage addresses to the first storage module 40. The transmission control module controller 13 is further configured to control the transmission control module data generator 11 to write each configured Trim value into the first storage module 40 according to the storage address assigned by the transmission control module address generator 12. This facilitates the transmission control module 10 to sequentially configure Trim values. When the sending control module 10 is implemented to transmit the Trim value therein to the power management module 20 in sequence, the first storage module 40 can be enabled to transmit the Trim value therein to the power management module 20. Specifically, the sending control module controller 13 can control the first storage module 40 to transmit the Trim value therein to the power management module 20.

[0037] refer to Figure 1 When the power management module 20 is specifically set, the power management module 20 is used to parse the received Trim value to obtain the read / write voltage value output to the MRAM storage array 50, and then output the read / write voltage to the storage array 50 according to the parsed read / write voltage value.

[0038] Continue to refer Figure 1In the self-test state, the power management module 20 is also used to transmit the read / write voltage value it has parsed to the comparison and verification module 30. The comparison and verification module 30 compares the received read / write voltage value with the calibrated read / write voltage value to determine whether the read / write voltage value parsed by the power management module 20 is equal to the calibrated voltage value. Based on the comparison result, a feedback signal representing the comparison result is sent to the sending control module 10. Specifically, when the comparison result shows that the read / write voltage value parsed by the power management module 20 is not equal to the calibrated voltage value, a feedback signal representing that the read / write voltage value parsed by the power management module 20 is not equal to the calibrated voltage value is sent to the sending control module 10. When the comparison result shows that the read / write voltage value parsed by the power management module 20 is equal to the calibrated voltage value, a feedback signal representing that the read / write voltage value parsed by the power management module 20 is equal to the calibrated voltage value is sent to the sending control module 10. It should be explained that the read-write voltage values parsed by the power management module 20 are equal to the calibration voltage values, which includes the read-write voltage values parsed by the power management module 20 being absolutely equal to the calibration voltage values, and also includes the read-write voltage values parsed by the power management module 20 being relatively equal to the calibration voltage values within a certain tolerance error range.

[0039] In addition, high-level and low-level feedback signals can be used to represent different comparison results. For example, when the comparison and verification module 30 compares the read / write voltage value analyzed by the power management module 20 and the calibrated read / write voltage value and finds that they are not equal, the comparison and verification module 30 can send a low-level feedback signal to the transmission control module 10. When the comparison and verification module 30 compares the read / write voltage value analyzed by the power management module 20 and the calibrated read / write voltage value and finds that they are equal, the comparison and verification module 30 can send a high-level feedback signal to the transmission control module 10. This allows the comparison and verification module 30 to send different feedback signals to the transmission control module 10 based on different comparison results. Of course, a low-level feedback signal can also be used to represent that the read / write voltage value analyzed by the power management module 20 is equal to the calibrated read / write voltage value, and a high-level feedback signal can be used to represent that the read / write voltage value analyzed by the power management module 20 is not equal to the calibrated read / write voltage value.

[0040] When the sending control module 10 receives feedback signals from the comparison and verification module 30, it responds differently based on the feedback signals. When the sending control module 10 receives feedback signals indicating that the read / write voltage values are not equal to the calibrated read / write voltage values, it continues to sequentially configure Trim values and transmits them to the power management module 20, which analyzes them and compares them with the comparison and verification module 30. When the sending control module 10 receives feedback signals indicating that the read / write voltage values are equal to the calibrated read / write voltage values, it indicates that the read / write voltage values analyzed by the power management module 20 have reached the calibrated read / write voltage values. The module then stops configuring Trim values and saves the Trim values corresponding to the read / write voltage values that are equal to the calibrated read / write voltage values. By integrating the sending control module 10 and the comparison and verification module 30 within the MRAM, the read / write voltage can be self-adjusted to the desired state, enabling internal detection of the MRAM read / write voltage and automatic adjustment of the Trim value until the read / write voltage values analyzed by the power management module 20 reach the calibrated read / write voltage values. Moreover, the entire process does not require excessive operations on the test end before delivery, reducing the risk of MRAM memory failure. At the same time, it greatly saves factory test time and costs and improves mass production efficiency.

[0041] When saving the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, refer to Figure 3 A second storage module 60 communicatively connected to the first storage module 40 and a second storage module controller 61 communicatively connected to the transmission control module controller 13 can be provided within the MRAM, and both the second storage module 60 and the second storage module controller 61 are provided within the MRAM. The second storage module 60 is configured to store a Trim value corresponding to a read / write voltage value equal to the calibrated read / write voltage value. When the transmission control module 10 receives a feedback signal indicating that the read / write voltage value is equal to the calibrated read / write voltage value, the transmission control module controller 13 can enable the second storage module controller 61 to write the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value into the second storage module 60. This facilitates storing the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, facilitating recall of the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value when the system is restarted and powered on. When configuring the second storage module 60 and the second storage module controller 61, the second storage module 60 can be an eFuse array, and the second storage module controller 61 can be an eFuse controller. This ensures that the Trim value stored therein is not lost when the system is powered off, thereby improving data storage and transmission efficiency. Alternatively, the second storage module can be a memory device with storage functionality, such as ROM, EEPROM, or OTP.

[0042] When the comparison and verification module 30 obtains the calibration read and write voltage value, it can be input externally or stored internally. Figure 3 A pin 70 connected to the comparison and verification module 30 may be provided on the MRAM. The pin 70 is used to input a calibration read / write voltage value to the comparison and verification module 30, so that the calibration read / write voltage value is input to the comparison and verification module 30 through the specially provided pin 70. Figure 4 When internal pre-storage is used, a third storage module 81 can be provided in the MRAM, and the third storage module 81 is used to store the calibration read-write voltage value. A digital-to-analog conversion module 82 is also provided in the MRAM and is in communication with the third storage module 81. The digital-to-analog conversion module 82 is also in communication with the comparison and verification module 30 to convert the calibration read-write voltage value stored in the third storage module 81 and send it to the comparison and verification module 30. By storing the calibration read-write voltage value in the third storage module 81 in the MRAM, it can be completed by calling the internal instruction when it is used. When the third storage module 81 is provided, the third storage module 81 can be a register to improve data storage and transmission efficiency. Of course, the calibration read-write voltage value received by the comparison and verification module 30 can be a test value obtained through multiple tests to achieve the highest chip yield.

[0043] By integrating the transmission control module 10 and comparison and verification module 30 within the MRAM, the read and write voltages can be automatically adjusted to the desired state. This allows the chip to self-detect the MRAM read and write voltages and automatically adjust the Trim value until the read and write voltages analyzed by the power management module 20 reach the calibrated read and write voltages. This entire process eliminates the need for excessive pre-shipment testing, reducing the risk of MRAM failure, significantly saving factory testing time and costs, and improving mass production efficiency.

[0044] In addition, the embodiment of the present invention also provides a calibration method based on the calibration circuit of the MRAM read and write voltage, referring to Figure 1 and Figure 5 , the calibration method includes:

[0045] Step 10: The sending control module 10 sequentially configures the Trim value and transmits each configured Trim value to the power management module 20;

[0046] Step 20: The power management module 20 parses the received Trim value to obtain a read / write voltage value, and transmits the parsed read / write voltage value to the comparison and verification module 30;

[0047] Step 30: The comparison and verification module 30 compares the read / write voltage value analyzed by the power management module 20 with the calibrated read / write voltage value to see if they are equal, and sends a feedback signal representing the comparison result to the transmission control module 10;

[0048] Step 40: When the sending control module 10 receives the feedback signal indicating that the read / write voltage value is equal to the calibrated read / write voltage value, it stops configuring the Trim value and saves the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value.

[0049] In the above-described solution, by integrating the transmission control module 10 and the comparison and verification module 30 within the MRAM, the read / write voltage can be self-adjusted to the desired state. This allows the chip to self-detect the MRAM read / write voltage and automatically adjust the Trim value until the read / write voltage value analyzed by the power management module 20 reaches the calibrated read / write voltage value. This significantly reduces testing time and costs. Furthermore, the entire process eliminates the need for excessive pre-shipment testing operations, reducing the risk of MRAM memory failure. This significantly reduces factory testing time and costs, thereby improving mass production efficiency.

[0050] After the sending control module 10 stops configuring the Trim value and saves the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, it can also restart the power supply, and after restarting the power supply, verify whether the read / write voltage value parsed by the power management module 20 based on the saved Trim value is equal to the calibrated read / write voltage value. Figure 6 and Figure 7 , the calibration method may further include:

[0051] Step 50: After saving the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, restart the power supply;

[0052] Step 60: The sending control module 10 sends the Trim value corresponding to the stored read / write voltage value equal to the calibrated read / write voltage value to the power management module 20;

[0053] Step 70: The power management module 20 parses the received Trim value to obtain the read / write voltage value, and transmits the parsed read / write voltage value to the comparison and verification module 30;

[0054] Step 80: The comparison verification module 30 verifies whether the read / write voltage values parsed by the power management module 20 are equal to the calibrated read / write voltage values. After the system is restarted and powered on, the read / write voltage values parsed according to the stored Trim value are first verified to be equal to the calibrated read / write voltage values to verify whether the calibration result is accurate.

[0055] In addition, an embodiment of the present invention further provides an MRAM, referring to Figure 1 、 Figure 3 and Figure 4The MRAM includes a storage array 50 module and any of the above-mentioned MRAM read / write voltage calibration circuits. The power management module 20 is used to output the read / write voltage to the storage array 50 module. By integrating the transmission control module 10 and the comparison and verification module 30 within the MRAM, the read / write voltage can be self-adjusted to the expected state, enabling the chip to self-detect the MRAM read / write voltage and automatically adjust the Trim value until the read / write voltage value analyzed by the power management module 20 reaches the calibrated read / write voltage value, which can greatly save testing time and cost. Furthermore, the entire process does not require excessive pre-shipment testing operations, reducing the risk of MRAM memory failure. This significantly saves factory testing time and cost, and improves mass production efficiency.

[0056] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A calibration circuit for MRAM read / write voltage, characterized in that: It includes a transmission control module, a power management module and a comparison verification module arranged in the MRAM; wherein, The sending control module sequentially configures the Trim value and transmits each configured Trim value to the power management module; The power management module parses the received Trim value to obtain a read / write voltage value, and transmits the parsed read / write voltage value to the comparison and verification module; The comparison and verification module compares the read and write voltage values analyzed by the power management module with the calibrated read and write voltage values to see whether they are equal, and sends a feedback signal representing the comparison result to the sending control module; When the sending control module receives a feedback signal indicating that the read / write voltage value is equal to the calibrated read / write voltage value, it stops configuring the Trim value and saves the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value.

2. The calibration circuit according to claim 1, wherein: Also includes: The first storage module provided in the MRAM is used to store the Trim value configured by the sending control module each time, and transmit the Trim value stored therein to the power management module.

3. The calibration circuit according to claim 2, wherein: The first storage module is a register.

4. The calibration circuit according to claim 2, wherein: The sending control module includes: The data generator of the sending control module is used to configure the Trim value in sequence; a sending control module address generator, configured to sequentially configure storage addresses in the first storage module for each Trim value configured by the sending control module data generator; The sending control module controller is used to control the sending control module data generator to write the configured Trim value into the first storage module according to the storage address configured by the sending control module address generator.

5. The calibration circuit according to claim 2, wherein: Also includes: a second storage module disposed in the MRAM and communicatively connected to the first storage module, configured to store a Trim value corresponding to a read / write voltage value equal to the calibrated read / write voltage value; A second storage module controller is provided in the MRAM and is communicatively connected to the transmission control module controller. When the transmission control module receives a feedback signal indicating that the read / write voltage value is equal to the calibrated read / write voltage value, the transmission control module controller enables the second storage module controller to write a Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value into the second storage module.

6. The calibration circuit according to claim 5, wherein: The second storage module is an eFuse array, and the second storage module controller is an eFuse controller.

7. The calibration circuit according to claim 1, wherein: When the comparison and verification module compares the read / write voltage value analyzed by the power management module and the calibrated read / write voltage value and finds that the voltage value is not equal, the comparison and verification module sends a low-level feedback signal to the sending control module; When the comparison and verification module compares the read / write voltage value analyzed by the power management module with the calibrated read / write voltage value and finds that the voltage value is equal, the comparison and verification module sends a high-level feedback signal to the sending control module.

8. The calibration circuit according to claim 1, wherein: Also includes: A pin is provided on the MRAM and connected to the comparison and verification module, and is used to input the calibration read and write voltage value to the comparison and verification module.

9. The calibration circuit according to claim 1, wherein: Also includes: A third storage module is provided in the MRAM, and the third storage module is used to store the calibration read and write voltage value; A digital-to-analog conversion module is provided in the MRAM and is communicatively connected to the third storage module. The digital-to-analog conversion module is also communicatively connected to the comparison and verification module to convert the calibration read / write voltage value stored in the third storage module and send it to the comparison and verification module.

10. The calibration circuit according to claim 9, wherein: The third storage module is a register.

11. A calibration method based on the MRAM read / write voltage calibration circuit according to claim 1, characterized in that: include: The sending control module configures the Trim value in sequence and transmits the configured Trim value to the power management module; The power management module parses the received Trim value to obtain a read / write voltage value, and transmits the parsed read / write voltage value to the comparison and verification module; The comparison and verification module compares the read and write voltage values analyzed by the power management module with the calibrated read and write voltage values to see whether they are equal, and sends a feedback signal representing the comparison result to the sending control module; When the sending control module receives a feedback signal indicating that the read / write voltage value is equal to the calibrated read / write voltage value, it stops configuring the Trim value and saves the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value.

12. The calibration method according to claim 11, wherein: Also includes: After saving the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value, restarting the power supply; The sending control module sends the Trim value corresponding to the read / write voltage value equal to the calibrated read / write voltage value to the power management module; The power management module parses the received Trim value to obtain a read / write voltage value, and transmits the parsed read / write voltage value to the comparison and verification module; The comparison and verification module verifies whether the read and write voltage values analyzed by the power management module are equal to the calibrated read and write voltage values.

13. An MRAM, characterized in that: include: Storage arrays; The MRAM read / write voltage calibration circuit according to any one of claims 1 to 10, wherein the power management module is configured to output the read / write voltage to the memory array.

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