Electrode tab and method for forming the same

Abstract

Describes an electrical tab and a manufacturing method. A method includes disposing a dielectric layer on a second side of a substrate that has a first side and a second side. The method includes developing the dielectric layer on the second side of the substrate. And, the method includes etching the first side of the substrate to form an electrode tab.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 900,419, filed on September 13, 2019, the entire content of which is incorporated herein by reference. Technical Field

[0003] Embodiments of the present disclosure generally relate to batteries, such as lithium - ion pouch batteries. Specifically, embodiments of the present disclosure relate to a process for forming electrode tabs. Background Art

[0004] Lithium - ion pouch batteries have two electrical terminals that extend from the pouch, namely, an anode tab and a cathode tab. The anode tab is attached to the anode foil of the battery, and the cathode tab is attached to the cathode foil of the battery. During the manufacture of the tabs and the attachment of the tabs to the anode and cathode, these two terminals are sensitive to burrs.

[0005] Ultrasonic welding is commonly used to bond, for example, the anode tab to the anode foil and the cathode tab to the cathode foil, which may result in indentations and protrusions, i.e., burrs. Such burrs may cause a short circuit in the battery by piercing the separator film and short - circuiting to the other side of the battery. Therefore, there is a need for an electrode tab to eliminate or prevent burr formation during ultrasonic welding. Summary of the Invention

[0006] An electrical tab and a method of manufacturing the same are described. The method includes disposing a dielectric layer on a second side of a substrate having a first side and a second side. The method includes developing the dielectric layer on the second side of the substrate. And, the method includes etching the first side of the substrate to form an electrode tab.

[0007] Other features and advantages of embodiments of the present disclosure will be apparent from the drawings and the following detailed description. Brief Description of the Drawings

[0008] Embodiments of the present disclosure are illustrated by way of example and not limitation in the accompanying drawings, in which like references indicate like elements.

[0009] Figure 1 An anode tab formed in accordance with some embodiments of the present disclosure is shown.

[0010] Figure 2 A roll of substrate in accordance with some embodiments of the present disclosure is shown.

[0011] Figure 3 A tie layer disposed on one side of a substrate in accordance with some embodiments of the present disclosure is shown.

[0012] Figure 4 Shows a dielectric layer disposed on a bonding layer according to some embodiments of the present disclosure.

[0013] Figure 5 Shows an anode tab having an etch pattern according to some embodiments of the present disclosure.

[0014] Figure 6 Shows a substrate having rounded edges according to some embodiments of the present disclosure.

[0015] Figure 7 Shows a micro-etched bonding layer according to some embodiments of the present disclosure.

[0016] Figure 8 Shows a nickel layer electroplated on an anode tab according to some embodiments of the present disclosure.

[0017] Figure 9 Shows an anode tab that has been panelized, AOI inspected, and defect marked according to some embodiments of the present disclosure.

[0018] Figure 10 Shows an anode tab according to some embodiments of the present disclosure, wherein the polyimide coating is cut to form the shape of the anode tab.

[0019] Figure 11 Shows an anode tab to which a sealant has been applied according to some embodiments of the present disclosure.

[0020] Figure 12 Shows a cathode tab according to some embodiments of the present disclosure.

[0021] Figure 13 Shows a roll of substrate according to some embodiments of the present disclosure.

[0022] Figure 14 Shows a dielectric layer disposed on a second side of the substrate according to some embodiments of the present disclosure.

[0023] Figure 15 Shows a cathode tab having an etch pattern according to some embodiments of the present disclosure.

[0024] Figure 16 Shows a substrate having rounded edges according to some embodiments of the present disclosure.

[0025] Figure 17 Shows a dielectric layer applied to a first side of the cathode tab according to some embodiments of the present disclosure.

[0026] Figure 18 Shows a cathode tab that has been panelized, AOI inspected, and defect marked according to some embodiments of the present disclosure.

[0027] Figure 19 Shows a cathode tab according to some embodiments of the present disclosure, where the polyimide coating is cut to form the shape of the cathode tab.

[0028] Figure 20 Shows a cathode tab with a sealant applied thereto according to some embodiments of the present disclosure.

[0029] Figure 21 Shows a roll of substrate according to some embodiments of the present disclosure.

[0030] Figure 22 Shows a dielectric layer disposed on the substrate according to some embodiments of the present disclosure.

[0031] Figure 23 shows an array of anode tabs with a pattern etched thereon according to some embodiments of the present disclosure.

[0032] Figure 24 Shows a nickel layer electroplated on the array of anode tabs according to some embodiments of the present disclosure.

[0033] Figure 25 Shows an array of anode tabs that are panelized, AOI inspected, and defect marked according to some embodiments of the present disclosure.

[0034] Figure 26 Shows a roll of substrate according to some embodiments of the present disclosure.

[0035] Figure 27 Shows a dielectric layer disposed on the substrate according to some embodiments of the present disclosure.

[0036] Figure 28 Shows an array of cathode tabs with a pattern etched thereon according to some embodiments of the present disclosure.

[0037] Figure 29 Shows an array of cathode tabs having a second dielectric layer disposed on the foil side of the substrate according to some embodiments of the present disclosure.

[0038] Figure 30 Shows an array of cathode tabs that are panelized, AOI inspected, and defect marked according to some embodiments of the present disclosure.

[0039] Figure 31 Shows a roll of substrate according to some embodiments of the present disclosure.

[0040] Figure 32 Shows a dielectric layer disposed on the substrate according to some embodiments of the present disclosure.

[0041] Figure 33Shows a dielectric layer disposed on the spacer side of a substrate, on which a pattern is etched.

[0042] Figure 34 Shows a pattern etched on the foil side of a substrate according to some embodiments of the present disclosure.

[0043] Figure 35 Shows a nickel layer on exposed copper disposed on the foil side of a substrate according to some embodiments of the present disclosure.

[0044] Figure 36 Shows a pattern etched in the nickel layer according to some embodiments of the present disclosure.

[0045] Figure 37 Shows a second dielectric layer disposed above the foil side, on which a pattern is etched.

[0046] Figure 38 Shows an electroplated nickel layer on an anode tab array according to some embodiments of the present disclosure.

[0047] Figure 39 Shows an anode tab array that is panelized, AOI inspected, and defect marked according to some embodiments of the present disclosure.

[0048] Figure 40 Shows an anode tab on which a sealant is applied according to some embodiments of the present disclosure. Detailed Description

[0049] Describes embodiments of an electrode tab and a method of forming the electrode tab. Figure 1 Shows the first surface of anode tab 11a and the second surface of anode tab 11b. Refer to Figure 1 , an anode tab 11 formed by the method described in the present disclosure is provided. The anode tab 11 includes a substrate 12, a polyimide coating 13, and a sealant 14 disposed along the short axis of the anode tab 11.

[0050] Figures 2 to 11 Describes a method for forming the anode tab 11. Refer to Figure 2 , a roll of substrate 12 is provided. For some embodiments, the substrate 12 is a material with a higher conductivity than nickel. For some embodiments, the substrate 12 is a copper foil. The copper foil may have a thickness of 20 to 50 micrometers (“μm”). For some embodiments, the copper foil may have a thickness of 30 μm.

[0051] Figure 3A tie layer 15 is shown disposed on one side of a substrate 12. For some embodiments, the thickness of the tie layer 15 can range from about 2 nm to about 500 nm and is formed by methods such as vacuum sputtering, vacuum evaporation, chemical vapor deposition, electroless plating, conversion coatings (e.g., chromate conversion coatings), and other techniques known in the art. The tie layer 15 can be made of chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), or related alloys. The tie layer can also be made of other materials known in the art. For some embodiments, the tie layer 15 is a sputtered chromium seed layer.

[0052] Figure 4 A dielectric layer, such as a polyimide coating 13, is shown disposed on the tie layer 15. Without being bound by theory, a thin tie layer 15 is employed to promote adhesion between the substrate 12 and the polyimide coating 13 in order to prevent or minimize corrosion at the interface between the substrate 12 and the polyimide coating 13 and to provide a diffusion barrier between the substrate 12 and the polyimide coating 13. For some embodiments, the polyimide coating 13 can be applied at a thickness of 5 to 10 μm to minimize the thickness of the anode tab 11. The polyimide coating 13 is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 13 is applied by liquid slit die coating and then developed. The polyimide coating 13 is developed using a suitable solvent known in the art.

[0053] Figure 5 An anode tab 11 having an etch pattern 17 is shown. A resist coating is applied on the substrate 12 using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. The resist coating is then exposed to UV light, developed, etched (i.e., the substrate 12 is etched in areas not protected by the resist pattern), and stripped using lithography and etching techniques including those known in the art. For some embodiments, the resist coating is applied on one side only, i.e., on the substrate 12, and the tie layer 15 serves as an etch barrier for the second side of the anode tab 11.

[0054] Figure 6 A substrate 12 having optional rounded edges 18 is shown. For some embodiments, the method for forming the anode tab includes rounding (smoothing) the edges 18 of the remaining substrate 12 after etching. Rounding of the edges 18 of the substrate 12 can be performed using techniques well known in the art. For some embodiments, rounding the edges 18 of the remaining substrate 12 after etching is an optional step in the method for producing the anode tab.

[0055] Figure 7The micro-etched bonding layer 15 is shown. For some embodiments, the method includes micro-etching the bonding layer 15. The micro-etching of the bonding layer 15 can occur in the area between the lanes of the polyimide coating 13 on the second side of the anode tab 11 where the substrate 12 has been etched. An oxidation process or other techniques known in the art can be used to micro-etch the bonding layer 15.

[0056] Figure 8 The nickel layer 19 electroplated on the anode tab 11 is shown. In some embodiments, the method includes electroplating nickel on the anode tab 11. For some embodiments, the thickness of the nickel layer 19 is about 1 - 5 μm. Preferably, the thickness of the nickel layer 19 is about 2 μm. The electroplating of nickel on the anode tab 11 can be performed using techniques including but not limited to electrolysis, electroless plating, and techniques well-known in the art.

[0057] Figure 9 The anode tab 11 is shown, which has been panelized, inspected by automated optical inspection (“AOI”), and defect marked. These steps can be performed using techniques well-known in the art.

[0058] Figure 10 The anode tab 11 is shown, where the polyimide coating 13 has been cut to form the shape of the anode tab 11. For some embodiments, the method includes cutting the polyimide coating 13 on the periphery of the anode tab 11. The cutting of the polyimide coating 13 can be performed using a metal stamping process or a laser cutting process. Other techniques known in the art can also be used to cut the polyimide coating on the periphery of the anode tab 11.

[0059] Figure 11 The anode tab 11 is shown, on which a sealant 14 has been applied. For some embodiments, the method includes applying the sealant 14 thereon. The sealant 14 can be applied on the first and second sides of the anode tab 11 along the short axis of the anode tab 11. For some embodiments, the sealant 14 is a thermal seal tape, such as but not limited to EVA, polypropylene, and PET. Other sealants known in the art can also be used.

[0060] According to some embodiments, the anode tab 11 includes a dielectric layer disposed on one side of the anode tab constructed of nickel-plated copper, such as a polyimide layer. Relative to conventional anode tabs, the anode tab 11 reduces the total thickness while still maintaining burr protection. For example, the thickness of a conventional nickel / chromium tab is approximately 80 μm. Conventional tabs require additional tape, which is approximately 10 μm thick, for burr protection, such as tape made of a PET film and an acrylic adhesive. Thus, the thickness of a conventional anode tab is approximately 90 μm. According to some embodiments of the present disclosure, the anode tab 11 may have a substrate of approximately 30 μm and a polyimide coating of approximately 5 - 10 μm. Thus, according to some embodiments of the present disclosure, the anode tab 11 may have a thickness of approximately 35 - 40 μm, while a conventional anode tab has a thickness of approximately 90 μm.

[0061] Figure 12 The first surface of the cathode tab 51a and the second surface of the cathode tab 51b are shown. Referring to Figure 12 , a cathode tab 51 formed by the method described in the present disclosure is provided. The cathode tab 51 includes a substrate 52, a polyimide coating 53, and a sealant 54 disposed along the short axis of the cathode tab 51.

[0062] Figures 13 to 20 A method for manufacturing a cathode tab is involved. Referring to Figure 13 , a roll of substrate 52 is provided. For some embodiments, the substrate 52 is aluminum foil. The aluminum foil may have a thickness of 20 to 50 μm. For some embodiments, the aluminum foil may have a thickness of 30 μm.

[0063] Figure 14 A dielectric layer, such as a polyimide coating 53, disposed on the second side of the substrate 52 is shown. For some embodiments, the polyimide coating 53 may be applied at a thickness of 5 to 10 μm to minimize the thickness of the cathode tab 51. The polyimide coating 53 is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 53 is applied by a liquid slit die and then developed. The polyimide coating 53 is developed using a suitable solvent known in the art.

[0064] Figure 15 A cathode tab 51 having an etched pattern 55 is shown. A resist coating is applied to the substrate 52 using techniques including liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. Subsequently, the resist coating is exposed to UV light, developed, etched (i.e., the substrate 52 is etched in areas not protected by the resist pattern), and stripped using photolithography and etching techniques (including techniques known in the art). For some embodiments, the resist coating is applied on one side, i.e., on the substrate 52.

[0065] Figure 16 Shows a substrate 52 having a rounded edge 56. For some embodiments, the method for forming a cathode tab includes rounding the edge 56 of the remaining substrate 52 after etching. Rounding the edge 56 of the substrate 52 can be performed using techniques known in the art. For some embodiments, rounding the edge of the remaining substrate 52 after etching is an optional step in the method for producing a cathode tab.

[0066] Figure 17 Shows a dielectric layer 57 applied on the first side of the cathode tab 51. For some embodiments, the method includes applying the dielectric layer 57 to the first side of the cathode tab 51. For some embodiments, the dielectric layer 57 can be selectively applied, for example, along the rounded edge 56 of the substrate 52, by stenciling, inkjet printing, or other similar techniques known in the art. According to some embodiments, the dielectric layer 57 is a non-photopatternable insulator / insulating layer, such as, but not limited to, polypropylene, PET, acrylic, polyamide, non-photopatternable polyimide, silicone, or combinations thereof. Other insulating materials known in the art can also be used.

[0067] Figure 18 Shows a cathode tab 51 that is panelized, automatically optically inspected (AOI), and defect marked. Such steps can be performed using techniques known in the art.

[0068] Figure 19 Shows a cathode tab 51 in which a polyimide coating 53 is cut to form the shape of the cathode tab 51. For some embodiments, the method includes cutting the polyimide coating 53 on the periphery of the cathode tab 51. Cutting the polyimide coating 53 can be performed using a metal stamping process or a laser cutting process. Other techniques known in the art can also be used to cut the polyimide coating 53 on the periphery of the cathode tab 51.

[0069] Figure 20 Shows a cathode tab 51 to which a sealant 54 is applied. For some embodiments, the method includes applying the sealant 54 thereto. According to some embodiments, the sealant 54 is applied on both the first side and the second side of the tab along the short axis of the cathode tab 51. For some embodiments, the sealant 54 is a thermal seal tape, such as, but not limited to, ethylene-vinyl acetate (“EVA”), polypropylene, and polyethylene terephthalate (“PET”). Other sealants known in the art can also be used.

[0070] According to some embodiments, the cathode tab 51 includes a dielectric layer 53 disposed on one side of the cathode tab constructed of aluminum, such as a polyimide layer. According to the embodiments described herein, the cathode tab 51 reduces the total thickness relative to a conventional anode tab while still maintaining burr protection. For example, the thickness of a conventional cathode tab is about 80 μm. The conventional tab requires an additional tape on each side of the conventional tab, which has a thickness of about 10 μm, for burr protection, such as a tape made of a PET film and an acrylic adhesive. Thus, the thickness of the conventional cathode tab is about 100 μm. According to some embodiments of the present disclosure, the cathode tab 51 may have a substrate of about 30 μm and a polyimide coating of about 5 - 10 μm. Thus, according to some embodiments of the present disclosure, the cathode tab 51 may have a thickness of about 35 - 40 μm, while the thickness of a conventional anode tab is about 100 μm.

[0071] Figures 21 to 25 A method of forming an anode tab array 21 according to some embodiments of the present disclosure is described. Referring to Figure 21 , a roll of substrate 22 is provided. For some embodiments, the substrate 22 is a material having a higher conductivity than nickel. In some embodiments, the substrate 22 is a copper foil. In some embodiments, the copper foil is chromate treated to form a bonding layer to support the direct bonding of a polyimide coating. According to some embodiments, the thickness of the copper foil is 20 - 50 μm. For some embodiments, the copper foil may have a thickness of 35 μm.

[0072] Figure 22 A dielectric layer / isolation material, such as a polyimide coating 23, disposed on the substrate 22 is shown. For some embodiments, the polyimide coating 23 is disposed only on the spacer side 24 of the substrate 22 as shown in FIG. 23a, rather than on the foil side 25 of the substrate 22 as shown in FIG. 23b. For some embodiments, the polyimide coating 23 may be applied at a thickness of 5 to 10 μm to minimize the thickness of each anode tab in the anode tab array 21. The polyimide coating 23 is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 23 is applied by a liquid slit die. According to some embodiments, the polyimide coating 23 is not exposed to UV light or developed.

[0073] In some embodiments, the method further includes marking and stamping the substrate 22 using techniques such as those described herein. Marking and stamping can be performed using techniques known in the art. Marking and stamping can also be performed before or after the polyimide coating 23 is disposed on the substrate.

[0074] Figure 23 shows an anode tab array 21 having a pattern etched thereon. For some embodiments, the method includes micro-etching the exposed substrate 22 not covered by the polyimide coating 23 to remove the chromate treatment. For example, the micro-etching of the substrate 22 can occur between the polyimide coatings 23 in the lanes. The micro-etching can be performed using an oxidation process or by other techniques known in the art.

[0075] For some embodiments, the method further includes coating a resist layer, exposing the resist layer to UV light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the substrate 22 using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. Subsequently, the resist coating is exposed to UV light, developed, etched (i.e., the substrate 22 is etched in areas not protected by the resist pattern), and stripped using lithography and etching techniques known in the art.

[0076] Figure 24 Shows a nickel layer 27 electroplated on the anode tab array 21. In some embodiments, the method includes electroplating nickel on the anode tab array 21. All areas of the substrate having exposed copper can be electroplated with nickel. For embodiments, the thickness of the nickel layer 27 is about 1 - 5 μm. Preferably, the thickness of the nickel layer 27 is about 2 μm. Electroplating nickel on each anode tab 11 of the anode tab array 21 can be performed using techniques well known in the art.

[0077] Figure 25 Shows the anode tab array 21 being panelized, automatically optically inspected (“AOI”) and defect marked. Such steps can be performed using techniques well known in the art. Subsequently, the anode tabs 11 can be transported in this form.

[0078] According to some embodiments, each anode tab 11 in the anode tab array 21 includes a dielectric layer, such as a polyimide layer 23, disposed on a single side of the anode tab constructed of nickel-plated copper. Relative to traditional anode tabs, the anode tab 11 reduces the total thickness while still maintaining burr protection. For example, the thickness of a traditional nickel / chrome tab is about 80 μm. Traditional tabs require an additional tape, about 10 μm thick, for burr protection, such as a tape made of PET film and acrylic adhesive. Thus, the thickness of a traditional anode tab is about 90 microns. In sharp contrast, according to some embodiments of the present disclosure, the anode tab 11 can have a substrate of about 35 μm and a polyimide coating of about 5 - 10 μm. Thus, according to some embodiments of the present disclosure, the anode tab 11 can have a thickness of about 30 - 45 μm, while traditional anode tabs have a thickness of about 90 μm.

[0079] Figures 26 to 30 A method of forming a cathode tab array 61 according to some embodiments of the present disclosure is described. Refer to Figure 26 , a roll of substrate 62 is provided. For some embodiments, the substrate 62 is aluminum foil. According to some embodiments, the aluminum foil may have a thickness of 20 - 50 μm. For some embodiments, the aluminum foil may have a thickness of 35 μm.

[0080] Figure 27 A dielectric layer, such as a polyimide coating 63, disposed on the substrate 62 is shown. For some embodiments, the polyimide coating 63 is disposed only on the partition side 64 of the substrate 62 and not on the foil side 65 of the substrate 62. For some embodiments, the polyimide coating 63 may be applied with a thickness of 5 to 10 μm to minimize the thickness of the cathode tab. The polyimide coating 63 is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 63 is applied by a liquid slit die. As Figure 27 shown, the polyimide coating 63 may be applied in five lanes (“5 lanes”). According to some embodiments, the polyimide coating 63 is not exposed to UV light or developed.

[0081] In some embodiments, the method further includes marking and stamping the substrate 62. The marking and stamping can be performed using techniques known in the art. The marking and stamping can also be performed before or after the polyimide coating 63 is disposed on the substrate.

[0082] Figure 28 A cathode tab array 61 is shown, on which a pattern is etched. For some embodiments, the method includes coating a resist layer, exposing the resist layer to UV light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied on the substrate 62 using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. Subsequently, the resist coating is exposed to UV light, developed, etched (i.e., the substrate 62 is etched in areas not protected by the resist pattern), and stripped using lithography and etching techniques known in the art.

[0083] Figure 29Shows a cathode tab array 61 having a second dielectric layer, such as a polyimide coating 66, disposed on the foil side 65 of a substrate 62. For some embodiments, the second polyimide coating 66 may be applied at a thickness of 5 to 10 μm to minimize the thickness of the cathode tabs. The second polyimide coating 66 is applied using techniques including but not limited to liquid slit die, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 66 is applied by a liquid slit die. According to some embodiments, the polyimide coating 66 is not exposed to UV light or developed.

[0084] As Figure 29 shown, a dielectric layer such as the polyimide coating 66 is applied in five narrow lanes for providing insulation to the foil side 65. For some embodiments, the width of the narrow lanes of the polyimide coating 66 is about 4 to 5 mm and covers about 10%-20% of the surface area coated on the separator side 64, as Figure 27 shown. For some embodiments, the narrow lanes of the polyimide coating 66 cover about 11% of the surface area coated on the separator side 64.

[0085] Figure 30 Shows a cathode tab array 61 that is panelized, automatically optically inspected (AOI) and defect marked. These steps can be performed using techniques well known in the art. The cathode tab array 61 can then be transported in this form.

[0086] According to some embodiments, the cathode tab array 61 includes dielectric layers, such as polyimide layers 63, disposed on both sides of a cathode tab 67 constructed of aluminum. The cathode tab array 61 reduces the total thickness while still maintaining burr protection as compared to a conventional cathode tab. For example, the thickness of a conventional cathode tab is about 80 μm. Conventional tabs require an additional tape, about 10 μm thick, for burr protection, such as a tape made of PET film and acrylic adhesive. Thus, the thickness of a conventional cathode tab is about 100 μm. In sharp contrast, according to some embodiments of the present disclosure, each cathode tab 67 in the cathode tab array 61 has a substrate of about 35 μm and two polyimide coatings, each polyimide coating being about 5-10 μm. Thus, according to some embodiments of the present disclosure, the cathode tab array 61 can have a thickness of about 45-55 μm, while the thickness of a conventional cathode tab is about 100 μm.

[0087] Figures 31 to 40 Describes a method of forming an anode tab array 31 according to some embodiments of the present disclosure. Refer to Figure 31, a substrate 32 is provided. For some embodiments, the substrate 32 is a material with a higher conductivity than nickel. For some embodiments, the substrate 32 is a copper foil. In some embodiments, the copper foil has been chromate treated to support the direct bonding of the polyimide coating. The thickness of the copper foil can be 20 - 50 μm. For some embodiments, the copper foil can have a thickness of 35 μm.

[0088] Figure 32 A dielectric layer, such as a polyimide coating 33, is shown disposed on the substrate 32. For some embodiments, the polyimide coating 33 is disposed only on the separator side 34 of the substrate 32 and not on the foil side 35 of the substrate 32. For some embodiments, the polyimide coating 33 can be applied with a thickness of 5 to 10 μm to minimize the thickness of the anode tab. The polyimide coating 33 is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the polyimide coating 33 is applied by a liquid slit die. According to some embodiments, the polyimide coating 33 is a photoimageable polyimide and is exposed to UV light, developed, and cured.

[0089] Figure 33 A polyimide coating 33 is shown disposed on the separator side 34 of the substrate 32, on which a pattern 36 is etched. The pattern 36 etched in the polyimide coating 33 includes access points leading to a reference electrode terminal 37, a resistive temperature detector (“RTD”) terminal 38, a reference electrode 39, and a main anode terminal 40.

[0090] For some embodiments, to form the pattern 36 on the polyimide coating 33, a photoresist layer is formed on the polyimide coating 33. According to some embodiments, the photoresist layer is exposed using photolithography techniques including those known in the art and developed using wet etching techniques including those known in the art. The patterned photoresist layer then provides a pattern to the polyimide coating 33 during the polyimide removal process (etching), which can be wet or dry. Subsequently, the photoresist layer can be stripped by techniques known in the art. Another patterning method is laser ablation of the unwanted dielectric.

[0091] Figure 34 A pattern 41 is shown etched on the foil side 35 of the substrate 32. For some embodiments, the anode tab array 31 will have a main anode 42, two RTD leads 43, and a reference electrode lead 44 after the pattern 41 is etched thereon.

[0092] For some embodiments, to etch a pattern 41 on the foil side 35 of the substrate 32, the method further includes coating a resist layer, exposing the resist layer to UV light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the substrate 32 using techniques including but not limited to liquid slit die, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. Subsequently, the resist coating is exposed to UV light, developed, etched (i.e., the substrate 32 is etched in areas not protected by the resist pattern), and stripped using lithography and etching techniques known in the art.

[0093] For some embodiments, the method further includes micro-etching the anode tab array 31 to remove the chromate treatment. The micro-etching can be performed using an oxidation process or other techniques known in the art.

[0094] Figure 35 A nickel layer 45 is shown on the exposed copper on the foil side 35 of the substrate 32. In some embodiments, the method includes sputtering nickel on the foil side 35. For some embodiments, the thickness of the nickel layer 45 is about 1 - 5 μm. Preferably, the thickness of the nickel layer 45 is about 2 μm. Sputtering nickel on the foil side 35 can be performed using techniques well known in the art.

[0095] Figure 36 A pattern 46 etched in the nickel layer 45 is shown. For some embodiments, to etch a pattern 46 on the nickel layer 45, the method further includes coating a resist layer, exposing the resist layer to UV light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the nickel layer 45 using techniques including but not limited to liquid slit die, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. Subsequently, the resist coating is exposed to UV light, developed, etched (i.e., the nickel layer 45 is etched in areas not protected by the resist pattern), and stripped using lithography and etching techniques known in the art.

[0096] Figure 37 A second dielectric layer, such as a polyimide layer, is shown on the foil side 35 with a pattern 46 etched thereon. For some embodiments, the polyimide coating (i.e., Figure 37The “46” in [the relevant context] can be applied with a thickness of 5 - 10 μm to minimize the thickness of the anode tab array 31. The second polyimide coating is applied using techniques including but not limited to liquid slit die coating, roll coating, spray coating, curtain coating, dry film lamination, and screen printing techniques. For some embodiments, the second polyimide coating is applied by a liquid slit die. According to some embodiments, the second polyimide coating is a photo - imageable polyimide and is exposed to UV light, developed, and cured. The pattern etched on the second polyimide coating leads to the access points for the four pins 48 and the main foil attachment surface 49. The pattern can be etched by the techniques discussed in this disclosure or other techniques known in the art.

[0097] Figure 38 Shows an electroplated nickel layer 100 on the anode tab array 31. In some embodiments, the method includes electroplating nickel on both sides of the anode tab array 31 (i.e., the foil side and the separator side). For some embodiments, the nickel layer 100 is soft nickel and covers all the exposed nickel surfaces of the anode tab array 31. For some embodiments, the thickness of the nickel layer 100 is about 1 - 5 μm. Preferably, the thickness of the nickel layer 100 is about 2 - 3 μm. Techniques well - known in the art can be used to electroplate nickel on the anode tabs without a mask.

[0098] Figure 39 Shows the anode tab array 31, which is panelized, automatically optically inspected (AOI) and defect - marked. Such steps can be performed using techniques well - known in the art.

[0099] Further, the method can include selectively applying a reference electrode material 101. For some embodiments, a thin coating of graphite paste is selectively applied to the exposed reference electrode 39 by inkjet, jetting, syringe dispensing, stenciling, and other similar techniques known in the art. The method can further include baking the anode tab array 31 after selectively applying the reference electrode material 101. The baking can be carried out under conditions known in the art.

[0100] Figure 40 Shows an anode tab having a sealant 103 applied thereon along the short axis of the anode tab. For some embodiments, the method includes singulating the anode tab and applying the sealant 103 thereon. The sealant 103 can be applied on the first side and the second side of the anode tab along the short axis of the anode tab. In some embodiments, the sealant 103 is a thermal seal tape. Other sealants known in the art can also be used.

[0101] A similar method for forming the cathode tab can be carried out in the same way as the method for forming the anode tab. Those skilled in the art will readily understand the modifications for making the cathode tab based on the method for forming the anode tab. For example, the thermal resistor will be replaced with a reference electrode, and a different slurry material, such as a lithium oxide material, will be applied on the reference electrode. For some embodiments, the base layer of the cathode tab is aluminum.

[0102] Although described in connection with these embodiments, those skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.

Claims

1. A manufacturing method, comprising: Providing a bonding layer on a second side of a substrate, the substrate having the second side and a first side opposite the second side; Providing a first dielectric layer on the bonding layer located on the second side of the substrate; Developing the first dielectric layer on the second side of the substrate according to a first pattern; Etching at least a part of the first side of the substrate to form an electrode tab; After etching the first side of the substrate, micro-etching the bonding layer; And Plating nickel on the electrode tab.

2. The method according to claim 1, wherein The method comprises: Rounding the edges of the substrate.

3. The method according to claim 1, wherein The method comprises: Cutting the first dielectric layer on the periphery of the electrode tab.

4. The method according to claim 1, characterized in that, The method comprises: Providing a sealant on both sides of the electrode tab.

5. The method according to claim 1, wherein The electrode tab is an anode tab.

6. The method according to claim 1, characterized in that, The bonding layer is an organic antioxidant.

7. The method according to claim 1, characterized in that, The bonding layer is a conversion coating.

8. The method according to claim 1, wherein The bonding layer is a vapor-deposited metal selected to achieve adhesive properties.

9. The method according to claim 1, wherein Nickel is plated by an electrolytic or electroless plating method.

10. The method according to claim 1, characterized in that The first dielectric layer is a polyimide coating.

11. A manufacturing method, comprising: Providing a first dielectric layer on a second side of a substrate, the substrate having the second side and a first side opposite the second side; Developing the first dielectric layer located on the second side of the substrate according to a first pattern; Etching at least a part of the first side of the substrate to form an electrode tab; And Applying a second dielectric layer on at least the part of the first side of the substrate where the electrode tab is formed.

12. The method according to claim 11, wherein The method comprises: Rounding the edges of the substrate, wherein the second dielectric layer is provided along the rounded edges of the substrate.

13. The method according to claim 11, wherein The method comprises: Cutting the first dielectric layer on the periphery of the electrode tab.

14. The method according to claim 11, wherein The method comprises: Providing a sealant on both sides of the electrode tab.

15. The method according to claim 11, wherein The electrode tab is a cathode tab.

16. The method according to claim 11, characterized in that, The first dielectric layer is a polyimide coating.

17. The method according to claim 11, wherein The second dielectric layer is a non-photolithographic isolation layer.

18. A manufacturing method, comprising: Providing a first dielectric layer on a second side of a substrate as a series of tracks provided along the second side of the substrate, wherein the substrate has the second side and a first side opposite the second side, a bonding layer is formed on the second side, and the first dielectric layer is provided on the bonding layer; Etching at least a part of the substrate according to a pattern to form electrical tabs between the series of tracks of the first dielectric layer; Rounding any edges of the etched substrate; Micro-etching the bonding layer; Plating nickel on the electrical tabs; and Removing a part of the first dielectric layer at the periphery of the substrate to form the shape of the electrical tabs.

19. The method according to claim 18, wherein The substrate is a copper foil including a chromate layer, and the chromate layer serves as the bonding layer.

20. The method according to claim 19, characterized in that, Micro-etching the bonding layer comprises: Micro-etching the part of the substrate not covered by the first dielectric layer to remove the chromate layer, thereby exposing the copper surface.

21. The method according to claim 20, wherein Plating nickel on the electrical tabs comprises: Plating nickel on all exposed copper surfaces.

22. A manufacturing method, comprising: Providing a first dielectric layer on a second side of a substrate as a series of tracks disposed along the second side of the substrate, wherein the substrate has the second side and a first side opposite to the second side; Etching at least a part of the substrate according to a pattern to form electrical tabs between the series of tracks of the first dielectric layer; Rounding any edges of the etched substrate; Applying a second dielectric layer on a part of the first side of the substrate and on the rounded edges of the etched substrate where the electrical tabs are formed; and Removing a part of the first dielectric layer and the second dielectric layer at the periphery of the substrate to form the shape of the electrical tabs.

23. The method according to claim 22, wherein The substrate is aluminum foil.

24. The method according to claim 23, wherein The method comprises: Providing the second dielectric layer as a series of tracks along the first side of the substrate and on the rounded edges of each exposed aluminum surface, and the second dielectric layer comprises polyimide.

25. The method according to claim 24, wherein The second dielectric layer in tracks on the first side of the substrate is narrower than the first dielectric layer in tracks on the second side of the substrate.

26. A manufacturing method, comprising: Providing a substrate, the substrate comprising a copper foil treated with chromate to form a chromate layer; Providing a first photoimageable polyimide layer on a separator side of the substrate; Developing the first photoimageable polyimide layer according to a first pattern; Etching the foil side of the substrate according to a second pattern to form anode tabs, wherein the first photoimageable polyimide layer patterned according to the first pattern on the separator side of the substrate exposes access points to a main anode, at least two resistive temperature detector leads, and a reference electrode lead leading to the anode tabs; Microetching the substrate to remove the chromate layer; Providing a nickel layer on the foil side of the substrate; Etching the nickel layer to form a resistive temperature detection circuit; Providing a second photoimageable polyimide layer on the foil side of the substrate according to a third pattern to provide access points to pins and a main foil attachment surface; Developing the second photoimageable polyimide layer; and Plating nickel on the foil side and the separator side of the substrate.

27. The method according to claim 26, wherein The method comprises: Applying reference electrode material on the anode tabs.

28. A manufacturing method, comprising: Providing a first photoimageable polyimide layer on a separator side of a substrate, the substrate being aluminum foil; Developing the first photoimageable polyimide layer according to a first pattern; Etching at least a part of the foil side of the substrate according to a second pattern to form cathode tabs, wherein the first photoimageable polyimide layer patterned according to the first pattern on the separator side of the substrate exposes access points to a main cathode, at least two resistive temperature detector leads, and a reference electrode lead leading to the cathode tabs; Providing a nickel layer on the foil side of the substrate; Etching the nickel layer to form a resistive temperature detection circuit; Providing a second photoimageable polyimide layer on the foil side of the substrate; and Develop the second photoimageable polyimide layer according to a third pattern such that at least the second photoimageable polyimide layer is disposed on a remaining portion of a foil side of the substrate that forms the cathode tab.

29. The method according to claim 28, wherein The method includes: Applying a reference electrode material to a portion of the substrate that is exposed on the spacer side of the substrate.

30. A method for manufacturing a cathode tab having an integrated reference electrode, comprising: Disposing a first photoimageable polyimide layer on a spacer side of a substrate, the substrate including an aluminum foil; Developing the first photoimageable polyimide layer according to a first pattern; Etching a foil side of the substrate according to a second pattern to remove a portion of the foil side of the substrate, wherein the first photoimageable polyimide layer patterned according to the first pattern on the spacer side of the substrate exposes access points to a main cathode of the cathode tab, at least two resistive temperature detector leads, and a reference electrode lead; Disposing a second photoimageable polyimide layer on the foil side of the substrate; Developing the second photoimageable polyimide layer such that the second photoimageable polyimide layer is disposed on the remaining portion of the foil side of the substrate; and Applying a reference electrode material to a portion of the substrate that is exposed on the spacer side of the substrate.

31. A method for manufacturing a cathode tab having an integrated reference electrode, comprising: Disposing a first photoimageable polyimide layer on a spacer side of a substrate, the substrate being an aluminum foil; Developing the first photoimageable polyimide layer; Etching a foil side of the substrate to remove a portion of the foil side of the substrate to form a cathode tab, wherein the first photoimageable polyimide layer on the spacer side of the substrate exposes access points to a main cathode of the cathode tab, at least two resistive temperature detector leads, and a reference electrode lead; Disposing a second layer including an insulator or a dielectric layer on the foil side of the substrate, the second layer including a trace disposed across the foil side of the substrate and disposed on the remaining portion of the foil side of the substrate; and Applying a reference electrode material to a portion of the substrate that is exposed on the spacer side.

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