Signal generator and circuit for driving an electrical load

Abstract

A method for driving a unidirectional current by applying a PWM modulated signal (Vpwm) that swings between a high value (Von) and a low value (Voff) to an electrical load (such as one or more LED modules) envisions selecting the high value (Von) and the low value (Voff) as non-zero values with the same sign.

Description

Technical Field

[0001] The present disclosure relates to driving electrical loads.

[0002] One or more embodiments may be applied to a power supply for a light generator, such as a solid-state generator, for example an LED generator.

[0003] One or more embodiments may find application in constant-voltage (CV) power supply systems. Background Art

[0004] For example, a constant voltage power supply system for powering an LED generator may include:

[0005] An electronic control circuit, which can be thought of as an earth-referenced power source (e.g., an alternating current (AC) mains supply or a direct current (DC) battery), is commonly referred to as an ECG (Electronic Control Gear), and is designed to operate between the power source and one or more loads (e.g., LED modules) in order to apply a desired voltage (e.g., 12V, 24V, or 48V) to the loads via connecting wires (cables).

[0006] ECG can also perform additional functions such as brightness adjustment (dimming), power factor correction, and radio frequency interference suppression.

[0007] The dimming functionality may be obtained via PWM (Pulse Width Modulation) technology, for example by operating at a preset frequency (which may be 250 Hz, 500 Hz, 1.0 kHz or 2.0 kHz, to provide just some examples, and which may be variable), intervening in corresponding active intervals or ON times in order to obtain a desired value of the duty cycle (e.g. in the range of 0.1% to 100%).

[0008] From the output of the ECG, power may be delivered to the load via connecting wires, such as cables having lengths ranging from 0.5 meters to 50 meters or even longer.

[0009] Focusing on LED lighting systems (without intending to limit the range of possible applications), the load may include multiple electrical units, often called SEUs (smallest electrical units), which are connected in parallel, for example, with each unit including multiple LEDs connected in series with a constant-current regulator (often called a CCR). The regulator (which may be a simple resistor) is designed to set the desired current level, which may range from a few milliamperes to several hundred milliamperes, for example.

[0010] Each LED module, when it is constructed in a linear configuration, may have a variable length (also as a function of the specific requirements of the application of use), up to a value in the range of 20 m.

[0011] The corresponding earthing system can be explicit, such as protective earth (PE), or implicit, which is the result of the physical arrangement of all components of the system (including fixed elements and all resistive paths).

[0012] In systems of the type described above, when dimming actions are performed using PWM techniques, transients may occur where some of the LEDs in the various electrical units are exposed to reverse bias conditions, for example during the OFF time of the duty cycle, i.e., the LEDs are subjected to a negative or reverse voltage, with the anode of each LED being at a lower potential than the cathode of the same LED.

[0013] Analysis of such systems shows that each component of the system is associated with a certain capacitance, either differential capacitance (between the terminals of the component) or capacitance to ground, where the earth can act as a hidden resistive path between the various components and assemblies, including what can be called ground.

[0014] The capacitor bank described above creates a fairly complex capacitor divider network that is capable of transmitting voltage variations in the system (including voltage variations that may appear on the AC mains) to each individual LED.

[0015] Some of these capacitive elements are parasitic and distributed in nature (e.g., linked to a pad or land of a board for coupling, as may be configured as a printed circuit board PCB), other capacitive components are required and centralized (e.g., capacitors that perform the function of filtering electromagnetic interference (EMI)), while others are inherent to the structure of the component: consider, as a possible example, the junction capacitance of an LED.

[0016] The corresponding capacitive currents, their causes and corresponding effects therefore arise from the interaction of all parts of the system, from the nature of this interaction and, therefore, from the configuration of connections, and result in an extremely complex set of possible combinations.

[0017] It is also found that once the capacitor network can be considered fixed in its topology, the amplitude of the reverse voltage can depend on each capacitor value and the amplitude of the variations that may occur on the AC source, such as mainly:

[0018] AC mains power supply of 50 or 60 Hz frequency (if any); and

[0019] A PWM modulator at its operating frequency.

[0020] This capacitive network coexists with the system's resistive network, so that the voltage established also depends on the current that each capacitor can drive, which in turn is proportional to the rate of change of the voltage (in fact, the derivative of the voltage of each source, dV / dt). Therefore, given the same resistive load, the voltage can increase as the frequency increases.

[0021] It will be understood that the reverse voltage phenomena referred to are phenomena of a systematic (and indeed predictable) nature in terms of their causes and effects, which are linked to the normal operation of the system and to the AC sources present therein.

[0022] Therefore, this discussion does not deal with phenomena (which, on the other hand, are rare and in any case unpredictable) such as overload, discharge, etc., which themselves may also cause damage to the LEDs, based on mechanisms that, although involving capacitive paths, are of a completely different nature and can be counteracted by specific measures.

[0023] Of interest herein, it may be noted that the undesirable condition of reverse bias (reverse voltage) may result from the superposition of two types of capacitive currents.

[0024] The first source of capacitive current is possible coupling from the 50 / 60Hz AC mains. This is a low-frequency source, but with a significant voltage amplitude. The corresponding path involves the power supply referenced to earth ground, which is often present in loads (LED modules) and control circuits (e.g., ECGs). The series resistance of this current path can be quite high (e.g., above 1MΩ) and does not significantly change the impedance of the corresponding loop, as the capacitors involved have values of a few picofarads, with similar reactance at low frequencies. Using the terminology used in the field of filters for EMI reduction (EMI filters), this can be considered a common-mode component.

[0025] Another source is the capacitive current generated by pulse width modulation, which has a frequency (spectral component) higher than the frequency of the AC mains and a very small amplitude (e.g. 24V amplitude for a 24V system with a modulation depth of 100%). However, the derivative dV / dt can be significant and thus produce a net effect comparable to the effects of the link to the mains seen previously.

[0026] In this case, we essentially have to perform differential effects. However, it is also possible to track common-mode components, as long as the ground return path can still pass through the capacitance of the control circuit as a whole. This capacitance value includes not only the capacitor or capacitors effectively present in the circuit, but also, for example, the scattered capacitance between the primary and secondary of the circuit.

[0027] It is therefore possible to face the presence of a superposition of the two aforementioned contributions of capacitive current, wherein these contributions either have a specific effect of cancelling each other out or cooperate synergistically, thereby reinforcing each other, leading to a reverse voltage on an individual LED that may reach a value of -10 V in a 24 V DC system.

[0028] This phenomenon may prove to be negative in various application environments, and its effects may be noticed to a particularly significant extent where the load includes low power LEDs (such as those typically included in LED strips used in lighting applications), where these LEDs are not pre-arranged for possible operation under reverse voltage conditions.

[0029] Thus, the aforementioned LEDs may be exposed to a phenomenon of repeated electrical over-stress (EOS), which may lead to a gradual deterioration of performance, even to the point where they no longer function (and no longer emit light), which phenomenon is of course considered negative.

[0030] This problem has been solved by connecting a parallel diode (such as a Zener diode or a Schottky diode) in antiparallel to the load (such as each individual LED) so that the reverse voltage will be clamped at approximately -0.6V.

[0031] This operating mode represents a certain remedy, but does not provide complete protection against reverse voltage. Moreover, in terms of the cost of the parallel (i.e. antiparallel) diodes compared to the cost of the LEDs themselves, this represents a rather cumbersome solution: considering that the total number of components (e.g. SMDs) is effectively doubled, the overall cost of the production process (e.g. at the level of SMD mounting) increases significantly.

[0032] Another conceivable solution is to use a load (eg an LED) in which a diode is integrated, this type of diode being used to combat electrostatic discharge (ESD) phenomena.

[0033] Furthermore, in this case, due to the presence of the parallel (i.e., anti-parallel) diode, a good effect is achieved in terms of protection against reverse voltage. However, it can be noted that the solution of integrating the ESD protection diode into the LED package is not widely feasible, either because it is far from acceptable in the case of small-sized SMD packages or because in this case, although the above-mentioned problems related to the SMD mounting process are at least partially overcome, the cost of the LED assembly is increased.

[0034] Another possible solution is to connect a high-value resistor (e.g., between 10 kOhm and 300 kOhm) in parallel with each LED. This solution reduces the impedance between the LED terminals and has the effect of suppressing the development of negative voltages, thereby effectively preventing the occurrence of reverse voltages. Again, this comes at the expense of increased assembly costs, similar to the previously mentioned parallel (anti-parallel) installation of parallel diodes.

[0035] Document US 2017 / 339762 A1 discloses a device including a decoder configured to decode a digital control code corresponding to an intensity level control code for a plurality of light-emitting diodes. The device includes a modulator that modulates a combination of the decoded control code and a dithering signal, wherein the combined signal has a first modulation format. The device also includes a converter that generates a dimming control signal by converting the first modulation format associated with the combined signal into a programmable second modulation format.

[0036] The document MWEENE LH et al., “A 1 kW, 500 kHz frontend converter for a distributed power supply system,” 1989 03 13; 19890313-19890317, March 13, 1989 (1989-03-13), pp. 423-432, discloses the analysis, design, and performance of a prototype high-power density converter suitable for the front end of a distributed power supply system capable of delivering 1 kW from a rectifier to a regulated 40 V distribution bus. The converter has a switching frequency of 500 kHz and uses a phase-shifted PWM technique to avoid primary switching losses. Summary of the Invention

[0037] It is an aim of one or more embodiments to overcome the disadvantages outlined above.

[0038] According to one or more embodiments, the above objects can be achieved by a signal generator according to claim 1 and / or a corresponding circuit according to claim 9, which can, for example, be used with a lighting system having a solid-state light source (e.g., an LED light source).

[0039] The claims form an integral part of the technical teaching provided herein in connection with the embodiments.

[0040] One or more embodiments may achieve one or more of the following advantages:

[0041] By reducing the swing in the amplitude of the PWM signal, the negative (reverse) voltage that may be generated on a load such as an LED can be significantly reduced, at least for the component of the above voltage derived from the current linked to the pulse width modulation (PWM), for example for performing dimming of the light source;

[0042] Depending on the requirements of the application and use, one or more embodiments are suitable for implementation at the level of signal generators (e.g. for driving LEDs) and loads (e.g. LED modules) as well as in specific external components, using a relatively small number of components that do not have particularly critical characteristics, regardless of the choice of location adopted;

[0043] It is possible to effectively combat a phenomenon of increasing importance, taking into account the tendency that may be encountered in the lighting sector, to resort to cheaper types of LED sources, which are inherently exposed to the adverse effects of reverse bias conditions;

[0044] One or more embodiments demonstrate effectiveness also in the presence of high voltages: for example, a 48V DC system with a modulation depth of 100% may produce a reverse voltage that is twice that which would be produced in a 24V system; one or more embodiments may envisage a greater reduction in modulation depth in the presence of higher voltages, for example, the minimum voltage for a 48V ECG is, for example, 37V, which in absolute value (11V) is equal to the voltage that can be used in the case of a 24V system. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] One or more embodiments will now be described, purely by way of non-limiting example, with reference to the accompanying drawings, in which:

[0046] Figure 1 and Figure 2 The following are simulation circuit diagrams ( Figure 1 ) and a timing diagram showing possible voltage waveforms ( Figure 2 );

[0047] Figures 3 to 6 is a circuit diagram illustrating a possible embodiment; and

[0048] Figure 7 Possible application environments of the embodiments within the framework of a lighting system are illustrated. DETAILED DESCRIPTION

[0049] In the following description, various specific details are shown to provide a deeper understanding of various examples according to the described embodiments. These embodiments can be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other cases, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of the embodiments.

[0050] References to "an embodiment" or "one embodiment" throughout this specification are intended to indicate that a particular configuration, structure, or feature described with respect to that embodiment is included in at least one embodiment. Thus, phrases such as "in an embodiment" or "in one embodiment" may appear in different places throughout this specification without necessarily referring to the same embodiment. Furthermore, in one or more embodiments, the particular configurations, structures, or features may be combined in any suitable manner.

[0051] The references used herein are provided for convenience only and therefore do not limit the scope of protection or the scope of the embodiments.

[0052] The solution described in the background section of this specification (which is considered an integral part of this specification as an example of embodiment) basically envisages intervening at the level of the load (for example at the level of the individual LEDs) in order to counteract the injected capacitive current and its undesirable effects.

[0053] However, one or more embodiments illustrated herein follow a different approach and originate from the observation that the current linked to the derivative dV / dt can be traced back to two possible sources, namely the AC mains with a frequency of 50 / 60 Hz (if present) and the pulse width modulation (PWM), taking into account that:

[0054] By closing the common-mode loop outside the load (LED module) with lower impedance, the current that can be traced back to the first source (mains power supply) can be diverted to the ground via one or more specific capacitive paths;

[0055] It is generally not possible to prevent the differential current derived from pulse width modulation (PWM) from entering the load as long as it is contained in the supply current intended to be delivered to the load, for example in the case of an LED, in order to produce light emission.

[0056] There are at least two things that can be noted about the behavior of the PWM source:

[0057] A reverse voltage is generated at the terminals of the load (e.g., one or more LEDs) that is proportional to the voltage jump ΔV of the PWM signal; and

[0058] There is a minimum (voltage) threshold below which a load such as an LED module will switch off anyway before reaching the 0V value.

[0059] Based on the above considerations it has been noted that by using a level that is not exactly zero during the off time and remains (just) below the LED off threshold, there is a possibility to avoid having to resort to pulse width modulation (PWM) of maximum (100%) modulation depth.

[0060] For example, in a 24V system such a result can be achieved by choosing the off-time of the pulse width modulation to be equal to a value of eg 13V (typically not referring to a single LED, but to a plurality of LEDs connected in series with each other).

[0061] The above value of 13V (mentioned purely as an example) is a function of the sum of the turn-off thresholds of the LEDs contained in the string. For example, in the case of an SEU used in a 24V system comprising, for example, six LEDs cascaded together, the minimum on-state voltage is approximately 16V.

[0062] Below this level, for example at 3V, it is reasonable to assume that there is enough headroom to prevent light emission. With reference to this off level, the amplitude of the PWM signal (considered an AC signal) can be reduced from 24V to 11V (peak to peak).

[0063] Assumptions:

[0064] The forward threshold voltage of an individual LED is approximately 2.6V; and

[0065] The reverse voltage generated at a certain position of the LED in the string is -3V.

[0066] When the maximum modulation depth is 100% (24→0), the corresponding voltage drop ΔV on the LED is 5.6V.

[0067] Regarding the simplifying assumptions of: i) a linear system; and ii) infinite resistance at the terminals of the LED below the aforementioned forward threshold voltage (which corresponds to the ideal behavior of the diode), the simple ratio 24:5.6=11:x means a voltage drop ΔV of 2.57 V below the forward threshold voltage of the LED (which can be obtained by reducing the amplitude of the aforementioned PWM signal), avoiding the possibility of negative voltages building up at the terminals of the LED.

[0068] This consideration can be based on Figure 1 The SPICE simulation of the circuit shown is used to verify. Figure 1 A PWM modulated source is shown which generates a PWM modulated voltage denoted by Vpwm applied to the anode A of the LED, the cathode K of the LED being referenced to ground via an RC network comprising a resistor R1 ′ in parallel with a capacitor C1 ′, further assuming the presence of a capacitor C2 ′ across the LED.

[0069] SPICE (Simulation Program with Integrated Circuit Emphasis) identifies a software tool for simulating electronic circuits, which corresponds to a standard tool that is generally used in practice.

[0070] Figure 2 The timing diagram corresponds to the result achieved by simulation assuming that the capacitance values of the capacitors C1 ′ and C2 ′ are equal to 100 pF and 150 pF, respectively, and the resistance value of the resistor R1 ′ is equal to 50 mOhm.

[0071] Figure 2 The diagrams below illustrate the voltages generated by the PWM source (in Figure 2 a) and the voltage applied to the LED (in Figure 2 b) are represented by Vled).

[0072] when the voltage Vpwm varies between 0 and 24 V (full modulation, 100%), as indicated by the dotted line at the bottom of the figure; and

[0073] On the contrary, when the aforementioned modulation amplitude is included in the range between 13V and 24V in the previous example, as indicated by the solid line portion in the figure.

[0074] from Figure 2 It can be noticed that in the first case (full modulation, 100%), the voltage Vled across the LED can reach negative values (indicated by Vled') in the range of -4.2 V, whereas in the case of reducing the modulation amplitude by bringing the off level to 13 V (corresponding to a modulation depth of about 46%), the voltage Vled across the LED always remains positive.

[0075] One or more embodiments may achieve the above criteria (i.e., reducing the modulation depth to reduce the reverse voltage) by:

[0076] Direct intervention in control circuits or ECG;

[0077] intervening loads (e.g., in LED modules); and

[0078] Resort to additional / external circuitry.

[0079] Figure 3 and Figure 4 An embodiment is illustrated which envisages intervention at the level of a control circuit (ECG) indicated in its entirety by 10 .

[0080] Figure 3 and Figure 4 Both relate to the case where (DC) voltage sources 101 and 102 are present in the circuit 10, which are obtained in a manner known to a person skilled in the art so as to provide respective voltage values corresponding to the following values:

[0081] a first voltage value, which may be considered to be equal to the nominal value of the supply voltage envisaged for the load 12 , here in the form of a string of LEDs, i.e. LED1 , . . . , LEDn, and which is equal to 24 V, for example; and

[0082] The second voltage value (eg, Figure 3 11V or Figure 4 13V in the ).

[0083] The above values can respectively construct a maximum voltage level and a minimum voltage level intended for use with a PWM signal by causing the PWM signal to be transmitted to the load 12 to swing between a "high" level (used during the on-time of the PWM signal and identified by the voltage value of the generator 101) and a "low" level (used during the off-time of the PWM signal and identified by the voltage value of the generator 102).

[0084] It should be understood that in the present case the fact of referring to the off-time is linked to the terminology usually used when talking about a PWM signal assuming 100% modulation depth, so the signal swings between:

[0085] a non-zero first value, e.g., greater than zero, applied during the on-time, and

[0086] A second value substantially equal to zero is applied during the off-time.

[0087] One or more embodiments contemplate, instead, intervening in such a way that the second value of the PWM signal is also non-zero, eg greater than zero (thus having the same sign as the first value), according to the previously described criteria.

[0088] The presence of two voltage generators might have been envisaged in a conventional circuit 10 , for example when this was pre-arranged to be able to drive a load in constant voltage (CV) mode at different voltage values, such as generators 101 and 102 .

[0089] like Figure 3 One or more of the embodiments illustrated in the drawings may envision that both generators 101 and 102 are referenced to ground GND and coupled to respective output nodes 103 and 104 (which may be considered “+” and “−”, respectively, with respect to coupling to the load 12 via line L), wherein the terminals of the resistor R1 are connected to the nodes 103 and 104, while envisioning the presence of a set of diodes D2, whose anodes and cathodes are connected to the node 104 and the generator 102, respectively, so as to be able to act as pull-down clamping diodes.

[0090] like Figure 3One or more of the illustrated embodiments may contemplate the presence of a PWM modulator circuit 105 (of any known type) capable of acting on switch M1 to provide a pulse width modulation (PWM) function having desired frequency and duty cycle values.

[0091] In one or more embodiments, the switch M1 may include an electronic switch, such as a transistor. A field effect transistor, such as an NMOS-type MOSFET, may be used for this purpose, wherein a control terminal (a gate in the case of a field effect transistor such as a MOSFET) is driven by the PWM modulator circuit 105, and a current path through the transistor (source to drain in the case of a field effect transistor such as a MOSFET) is coupled between the output node 104 and ground GND.

[0092] To simplify the description, Figure 3 The representation provided by way of example in assumes that diode D2 behaves like an ideal diode and transistor M1 behaves like an ideal switch.

[0093] In such Figure 3 In the illustrated embodiment, generator 102 is used in such a manner that when switch M1 is open (non-conducting), the output voltage across nodes 103 and 104 is maintained at a desired minimum or “low” value (non-zero), while when switch M1 is closed (i.e., conducting), output node 104 is effectively pulled to ground, thereby establishing the nominal value (maximum or “high”) of the PWM signal supplied by generator 101 between output nodes 103 and 104.

[0094] Figure 3 A solution is illustrated that is inspired by the circuit configuration conventionally used in ECG circuits, namely having a common positive line or rail.

[0095] With reference to the values previously mentioned repeatedly (again, of course, purely as a non-limiting example), assuming that the voltage of the generator 101 is 24 V, the fact that the voltage supplied by the generator 102 is 11 V means that (assuming, as mentioned above, an ideal behavior of the diode D2 and the switch M1) the voltage present during the off-time between the nodes 103 and 104 is equal to: 24 V - 11 V = 13 V.

[0096] It can also be noted that in Figure 3 In the solution illustrated in FIG, the generator 102 does not supply power, but rather consumes power, an effect which, on the other hand, proves to be negligible considering the current values involved.

[0097] Figure 3 The solution exemplified in also benefits from the fact that, apart from the conventional ECG, the only components are represented by the diode D2 and (possibly) by the generator 102 .

[0098] exist Figure 4 In, reference has been made Figure 3 Components or elements discussed previously are denoted by the same reference numerals, which makes it redundant to repeat detailed descriptions of these elements.

[0099] In such Figure 4 In one or more embodiments shown, the generator 102 designed to determine the "low" level of the PWM signal during the off time is not referenced to the ground GND (e.g., Figure 3 solution shown), but rather refers to the same positive track as that on which generator 101 acts.

[0100] exist Figure 4 (again assuming ideal behavior of diode D2 and switch M1 for simplicity of explanation):

[0101] When switch M1 is driven to a closed state (switch M1 is on) by PWM modulator circuit 105, output nodes 103, 104 are coupled to the output of generator 101 and to ground GND, respectively, such that load 12 "sees" a maximum or "high" value of the PWM signal across nodes 103 and 104; and

[0102] When the switch M1 is driven by the PWM modulator circuit 105 to the off state (switch M1 is non-conducting), the load 12 “sees” a voltage between the output nodes 103 and 104 that is equal to the voltage of the generator 102, in which case the desired “low” value of the voltage during the off-time can be directly selected, for example equal to 13 V.

[0103] Figure 5 and Figure 6 An embodiment is illustrated in which, for an ECG 10 assumed to be of conventional type, the aforementioned actions aimed at causing the PWM signal to have a non-zero value during the OFF time are externally transmitted.

[0104] This ECG includes a DC voltage generator having a nominal value (again referring to the value of 24 V as an example), which is indicated by 101 and acts between ground GND and an output node 103, and a resistor R1 acts between the output nodes 103 and 104, and a switch M1 acts between the output node 104 and ground under the control of a PWM modulator circuit 105.

[0105] It should be understood that Figure 5 and Figure 6 The same reference numerals are used to indicate Figure 3 and Figure 4 Components or elements discussed: The previous considerations concerning the possible characteristics and modes of use of the components or elements discussed above must therefore be considered to apply also to Figure 5and Figure 6 , so the repetition of the corresponding description is redundant.

[0106] Figure 5 The solution exemplified in envisages storing charge (and therefore voltage) in the capacitor C1 associated with the load 12 during the on-time (ie when the switch M1 is conducting) so that the voltage between the output nodes 103 and 104 is equal to the voltage of the generator 101 .

[0107] For example, the capacitor can be connected to a diode D1 (e.g., a Zener diode, for example, the Zener voltage is equal to 11V, that is, equal to the difference between the two levels of the PWM signal applied, directly referring to Figure 3 generator 102 in the case) is connected in series with a capacitor C1.

[0108] exist Figure 5 In the solution illustrated in , the series connection of capacitor C1 and Zener diode D1 forms a circuit branch extending between the leads of line L (hence, from an electrical point of view, between nodes 103 and 104), which branch is in turn connected in parallel to a load 12, here also illustrated in the form of a string of LEDs, i.e. LED1, ..., LEDn.

[0109] Therefore, capacitor C1 can be used to reduce the modulation depth of the PWM signal, maintaining the voltage level at a non-zero value during the off-time, and Zener diode D1 (again assumed to have ideal behavior for the sake of simplicity of explanation) is designed to be forward biased during the on-time (i.e., when switch M1 is closed, i.e., turned on) so that a current designed to charge capacitor C1 can pass, causing the voltage across capacitor C1 to move towards the "high" on-voltage value determined by generator 101.

[0110] During the off-time, i.e. when switch M1 is open (non-conducting), capacitor C1 operates by reducing the modulation depth of Zener diode D1, wherein this Zener diode D1 passes into reverse bias so that the load, here exemplified by diodes L1, ..., Ln, "sees" a "low" voltage level across line L (i.e., between nodes 103 and 104) that is equal to the voltage across capacitor C1 minus the Zener voltage of diode D1.

[0111] Referring again to the previously mentioned values (provided purely as an example), assuming the on-state voltage of generator 101 is equal to 24V, with the Zener voltage of diode D1 equal to 11V, the voltage across the load during the off-time is equal to: 24V-11V=13V.

[0112] Figure 5A possible advantage of the solution exemplified in is that the circuit branch with the capacitor C1 and the Zener diode D1 does not have to be repeated for each SEU comprised in the same load: for example, one and the same circuit branch comprising the capacitor C1 and the Zener diode D1 can be used to serve multiple SEUs (e.g. two or three SEUs of this nature) depending on the characteristics of the support structure (e.g. PCB) on which the LEDs are present.

[0113] This advantage may be impaired by the fact that at the beginning, the capacitor C1 is discharged so that it does not immediately perform the full action of the dynamic limitation of the PWM signal and consumes a certain additional current in order to be charged, which has a cumulative effect in the presence of a large number of circuit branches C1, D1, as may occur in the case of a large number of SEUs.

[0114] Figure 6 The example is based on the reference Figure 5 The embodiment of the method discussed envisages the use of an ECG control circuit 10 and a load 12 which are themselves entirely conventional.

[0115] therefore, Figure 6 The control circuit 10 shown on the left is Figure 5 The conventional control circuit already discussed in the description of FIG is the same (in terms of component parts and their operation). Likewise, the load represented by the LEDs, i.e., LED1, ..., LEDn and Figure 3 and Figure 4 The same is true of the load 12 shown on the right side of FIG.

[0116] In such Figure 6 In one or more embodiments shown, Figure 5 The functions corresponding to those of the circuit branch C1 / D1 are transferred to an intermediate component (or “box”) 14 which can be inserted into the line L, for example between its two branches L1 and L2 .

[0117] To simplify the explanation, Figure 6 In FIG, the output nodes 103 and 104 are represented as being replicated, so to speak, both at the output of the circuit 10 and at the input of the load 12, thus assuming an ideal behavior of the cell 14 and the lines L1, L2.

[0118] Figure 6 The operation of the embodiment illustrated in FIG. 1 (which may be advantageously employed without modification when it is desired to operate with conventional circuit 10 and load 12) is conceptually similar to that already referenced. Figure 5The discussion remains the same, i.e., during the on-time, capacitor C1 charges to the maximum voltage of the PWM signal (the “high” value), and the voltage across the load is maintained at the “low” value required by the PWM signal during the off-time due to the subtractive effect of the voltage applied by the Zener voltage of diode D1.

[0119] Figure 6 The solution exemplified in is advantageously suitable for use with multiple SEUs, each SEU corresponding to a load, such as Figure 6 Load shown on the right.

[0120] This approach may require the use of a capacitor C1 of a rather high value. It may be advisable to use a charging resistor Rchg connected in series with the capacitor C1 in order to contain the forward current through the diode D1 during the charging time.

[0121] Entirely similar considerations can suggest arranging a diode D1′ in parallel with the Zener diode D1, which diode D1′ is designed to be forward biased and to facilitate the (further) charging current to the capacitor C1 during the on-time. In this way, the fact that the Zener diode D1 limits the forward conduction current flowing through the capacitor C1 during its charging can be taken into account.

[0122] On the other hand, it should be understood that in certain solutions, such as in systems containing a small number of SEUs, the presence of the resistor Rchg and the diode D1 ′ may not be necessary.

[0123] Figure 7 Example Figure 6 A possible use of the solution exemplified in , ie with a circuit 10 of conventional type, and a load 12 which is also generally conventional and consists of a parallel connection of a plurality of LED modules 121 , 122 , . . . , 12n.

[0124] Figure 7 The location of the additional component 14 between the circuit 10 and the load 12 is emphasized (e.g. Figure 6 Again from an electrical point of view between the output nodes 103 and 104 (and therefore in parallel with the load 12), the component 14 can also be located downstream of the load 12 itself, i.e. the load 12 is arranged between the circuit 10 and the component 14, as shown. Figure 7 The exact example in .

[0125] Figure 7 Likewise illustrated (on the right-hand side of the figure) is the possibility of providing in the component 14 (wherever it is located) another RC circuit branch, coupled to the node / connection 103 and comprising a resistor Rcm and a capacitor Ccm in series.

[0126] The aforementioned further branch RC may be coupled between the node / connection 103 and earth in order to provide a so-called functional earth FE, which connects the component 14 to earth, helps common mode currents approach earth, and combats reverse bias (reverse voltage) phenomena, as extensively discussed in the background section of this specification, which phenomena are linked to possible capacitive currents linked to the AC signal of the main power supply PG.

[0127] Figure 7 Also illustrated (on the left side of the figure) is a possible connection of the control circuit 10 to the power supply line PG.

[0128] For example, this may be a 50 / 60 Hz mains power supply PG having a live terminal L and a neutral terminal N, the latter possibly referenced to earth via an impedance Z_PE, as in a network commonly known as a TT or TN network.

[0129] The method illustrated herein (but not claimed per se) comprises driving a unidirectional current through an electrical load (e.g., load 12), applying to the electrical load a signal (e.g., a voltage signal, Vpwm) having a pulse width modulation (PWM) (e.g., provided in a manner known per se by a modulator circuit, such as modulator circuit 105 capable of generating a rectangular signal having a variable duty cycle), the PWM modulated signal swinging between a high value (e.g., Von) and a low value (e.g., Voff), which may include selecting the high value and the low value as non-zero values having the same sign, e.g., both positive values.

[0130] In such a method, the at least one diode capable of emitting light (LED1, . . . , LEDn) may exhibit a forward (direct) conduction voltage threshold, and the method may comprise selecting a voltage value below the forward conduction voltage threshold as the low value.

[0131] In such a method, the electrical load may include at least one series-connected diode having light-emitting capability, and the method may include selecting as the low value a voltage value lower than the sum of forward voltage conduction thresholds of the series-connected diodes.

[0132] A signal generator for applying a PWM modulated voltage signal to an electrical load using the claimed method comprises:

[0133] a first node (e.g., node 103) and a second node (e.g., node 104) configured to apply the load therebetween;

[0134] A first DC voltage generator (e.g., 101) is provided at an intermediate position between the first node (e.g., 103) and ground (e.g., GND);

[0135] A second DC voltage generator (e.g., 102) is provided at an intermediate position between the second node (104) and the ground or between the second node and the first node; and

[0136] A PWM modulator switch (e.g., M1) is positioned midway between the second node and ground, the PWM modulator switch (e.g., 105) being optionally configured to

[0137] coupling the second node to ground so that a high value of the PWM modulated signal from the first DC voltage generator is applied between the first node and the second node; and

[0138] The second node is decoupled from ground (GND) such that a low value of the PWM modulated signal is applied between the first node and the second node, wherein the low value of the PWM modulated signal is a function of:

[0139] the difference between the voltage of the first voltage generator and the voltage of the second voltage generator when the second voltage generator is positioned midway between the second node and ground; or

[0140] When the second voltage generator is set at an intermediate position between the second node and the first node, the voltage of the second voltage generator.

[0141] The signal generator in this article's example may include:

[0142] a diode (e.g., D2) disposed in series with the second voltage generator, the diode being configured to oppose current flowing from the second voltage generator to the second output node; and / or

[0143] A resistor group (eg, R1 ) is provided at an intermediate position between the first node and the second node.

[0144] A circuit configured to apply a PWM modulated voltage signal to an electric load using the method exemplified herein as claimed herein may include a first node and a second node configured to couple the electric load therebetween; such a circuit comprising:

[0145] The first node and the second node are configured to receive an input signal (eg, a voltage signal) with pulse width modulation (PWM) applied therebetween (eg, Figure 5 and 6 101, 105, generated in M1), the input signal swings between a first value and zero;

[0146] a series connection of a capacitor (e.g., C1) and a Zener diode (e.g., D1) at an intermediate position between a first node and a second node, the Zener diode having a Zener voltage and arranged to oppose current flowing from the second node to the first node, wherein:

[0147] In the case where the first node and the second node receive the PWM modulated input signal at the first value applied therebetween, the capacitor is charged to a high value by the current flowing through the Zener diode, wherein the first node is brought to the high value, and

[0148] In case the first and second nodes receive the PWM modulated input signal at the zero value applied therebetween, the first node is brought towards the low value as a function of the difference between the high value and the Zener voltage of the Zener diode.

[0149] The circuit (14) exemplified herein may include:

[0150] a current limiter resistor (e.g., Rchg) coupled to the series connection of the capacitor and the Zener diode, the current limiter resistor being configured to receive the charging current of the capacitor, and / or

[0151] A charging diode (eg, D1 ′) is coupled in parallel with the Zener diode, the charging diode being configured to provide an additional current path for the charging current of the capacitor.

[0152] The circuits exemplified herein may comprise a (further) series connection of a resistor (e.g., Rcm) and a capacitor (e.g., Ccm) coupled to the first node (103), which series connection may be coupled to ground to provide a functional earth path (e.g., FE) for the circuit.

[0153] The circuits exemplified herein may be integrated into a single device with the described electrical load.

[0154] A circuit configured to apply a PWM modulated signal to an electrical load comprising at least one or more unidirectional current flow paths (e.g., 121, 122, ..., 12n) as illustrated herein can provide a single series connection of a capacitor and a Zener diode at an intermediate position between a first node and a second node, the single series connection being coupled to a unidirectional current flow path among the at least one or more paths.

[0155] Without prejudice to the basic principle, the details of construction and embodiments may vary, even significantly, without thereby departing from the scope of protection indicated by the appended claims.

[0156] List of reference symbols

[0157]

[0158]

Claims

1. A signal generator (10), the signal generator being configured to apply a PWM modulated voltage signal (Vpwm) to an electrical load (LED1, ..., LEDn; 12), the PWM modulated voltage signal (Vpwm) swinging between a high value (Von) and a low value (Voff), wherein the high value (Von) and the low value (Voff) are both non-zero values having the same sign, the signal generator (10) comprising: a first node (103) and a second node (104), the first node (103) and the second node (104) being configured to have the electric load (12) coupled therebetween, a first DC voltage generator (101), said first DC voltage generator (101) being arranged between said first node (103) and ground (GND), a second dc voltage generator (102), the second dc voltage generator (102) being arranged between the second node (104) and ground (GND) or between the second node (104) and the first node (103), A PWM modulator switch (M1) is connected between the second node (104) and ground (GND), and the PWM modulator switch (M1) is configured to alternately: coupling the second node (104) to ground (GND), wherein a high value (Von) of the PWM modulated voltage signal (Vpwm) from the first dc voltage generator (101) is applied between the first node (103) and the second node (104), The second node (104) is decoupled from ground (GND), wherein a low value (Voff) of a PWM modulated voltage signal (Vpwm) is applied between the first node (103) and the second node (104), wherein the low value (Voff) of the PWM modulated voltage signal (Vpwm) is a function of: a difference between a voltage from the first dc voltage generator (101) and a voltage from the second dc voltage generator (102), wherein the second dc voltage generator (102) is arranged between the second node (104) and ground (GND), or A voltage from the second dc voltage generator (102), wherein the second dc voltage generator (102) is arranged between the second node (104) and the first node (103).

2. The signal generator (10) according to claim 1, comprising: a diode (D2) connected in series with the second DC voltage generator (102), the diode (D2) being configured to oppose a current flowing from the second DC voltage generator (102) to the second node (104), and / or A resistor (R1) is provided between the first node (103) and the second node (104).

3. A circuit (14) configured to apply a PWM modulated voltage signal (Vpwm) to an electrical load (LED, ..., LEDn; 12) by applying a PWM modulated voltage signal (Vpwm) to the electrical load (LED, ..., LEDn; 12), the PWM modulated voltage signal (Vpwm) swinging between a high value (Von) and a low value (Voff), wherein the high value (Von) and the low value (Voff) are both non-zero values with the same sign, the circuit (14) comprising a first node (103) and a second node (104), the first node (103) and the second node (104) being configured to couple the electrical load therebetween, wherein the circuit (14) comprises: The first node (103) and the second node (104) are configured to receive a PWM modulated input signal applied therebetween that swings between a first value and a zero value, a series connection of a capacitor (C1) and a Zener diode (D1) between a first node (103) and a second node (104), said Zener diode (D1) having a Zener voltage and arranged to oppose a current flowing from said second node (104) to said first node (103), wherein In the case where the first node (103) and the second node (104) receive the PWM modulated input signal at the first value applied therebetween, the capacitor (C1) is charged to a high value (Von) by the current flowing through the Zener diode (D1), wherein the first node (103) is brought to the high value (Von), In case the first node (103) and the second node (104) receive the PWM modulated input signal applied therebetween at the zero value, the first node (103) is brought towards the low value (Voff) as a function of the difference between the high value (Von) and the Zener voltage of the Zener diode (D1).

4. The circuit (14) according to claim 3, comprising: a current limiter resistor (Rchg) coupled to the series connection of a capacitor (C1) and a Zener diode (D1), the current limiter resistor (Rchg) being configured to have a charging current of the capacitor (C1) flow through it, and / or A charging diode (D1') is coupled in parallel with the Zener diode (D1), the charging diode (D1') being configured to provide an additional flow path for the charging current of the capacitor (C1).

5. The circuit (14) of claim 3 or 4, comprising a series connection of a resistor (Rcm) and a capacitor (Ccm) coupled to the first node (103), the series connection of the resistor (Rcm) and the capacitor (Ccm) being coupleable to ground to provide a functional earth path (FE) for the circuit (14).

6. The circuit (14) according to claim 3 or 4, wherein the circuit (14) is integrated into a single device with the electrical load (12).

7. A circuit (14) according to claim 3 or 4, configured to apply a PWM modulated voltage signal (Vpwm) to an electric load, the electric load comprising at least one or more unidirectional current flow paths (121, 122, ..12n), wherein the circuit (14) comprises a single said series connection of a capacitor (C1) and a Zener diode (D1) between the first node (103) and the second node (104), the single said series connection being coupled to the said unidirectional current flow paths (121, 122, ..12n) in the at least one or more.

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