Combined Near-Infrared and Mid-Infrared Sensors in Chip-Level Packaging

Abstract

This article describes a sensor having a chip-scale packaging form factor. For example, the non-vacuum-encapsulated sensor chip described herein includes a substrate and a sensing element disposed on the substrate. The sensing element is configured to change resistance with temperature. Furthermore, the non-vacuum-encapsulated sensor chip includes an absorption layer configured to absorb mid-infrared ("MIR") radiation.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 62 / 850,795, filed on May 21, 2019, and entitled “Combined Near-Infrared and Mid-Infrared Sensor in a Chip-Scale Package,” the disclosure of which is expressly incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to an infrared ("IR") sensor. The sensor utilizes a non-vacuum encapsulated chip-scale package form factor. In some implementations, the sensor is capable of detecting both near-infrared ("NIR") and mid-infrared ("MIR") simultaneously. The sensor is capable of separating the NIR and MIR responses using electrical tuning. Background Art

[0004] NIR sensing and MIR sensing each have a variety of applications. In NIR, it is used for proximity sensing, night vision or 3D mapping, while MIR is widely used for room occupancy, remote temperature sensing and thermal imaging. Typically, NIR sensors and MIR sensors are manufactured separately, and in particular, MIR requires special vacuum packaging. Many MEMS sensors (including infrared sensors) require a vacuum environment to achieve the required sensitivity. After manufacturing one or more sensor elements, a vacuum environment can be established to protect the one or more sensor elements during further processing. For example, component-level and wafer-level vacuum packaging processes are known in the art. Such processes are used to bond a cover (e.g., a passive wafer) to the sensor die, thereby sealing one or more sensor elements in a vacuum package. There is no existing technology that can combine MIR and NIR functionality at the same time and also eliminate the vacuum packaging requirement. Summary of the Invention

[0005] The present disclosure relates to a sensor for sensing NIR and / or MIR radiation in a chip-scale package form factor. An exemplary non-vacuum packaged sensor chip is described herein. The non-vacuum packaged sensor chip includes a substrate and a sensing element disposed on the substrate. The sensing element is configured to change resistance with temperature. Furthermore, the non-vacuum packaged sensor chip includes an absorption layer configured to absorb mid-infrared ("MIR") radiation.

[0006] Furthermore, the sensing element is formed of a p-type semiconductor material.

[0007] In some embodiments, the substrate is an n-type semiconductor substrate. In other embodiments, the substrate is a p-type semiconductor substrate having an n-type well, and the sensing element is disposed in the n-type well. In other embodiments, the substrate is a CMOS substrate.

[0008] Alternatively or additionally, the substrate defines a top surface and a bottom surface. In some embodiments, the non-vacuum packaged sensor chip includes a dielectric layer disposed on the bottom surface. Optionally, an absorbent layer is disposed on the dielectric layer. Alternatively, the absorbent layer is disposed on the top surface.

[0009] Alternatively or additionally, the non-vacuum packaged sensor chip includes a plurality of terminals configured to measure the resistance of the sensing element.

[0010] Alternatively or additionally, the non-vacuum encapsulated sensor chip includes a plurality of photocurrent terminals configured to measure current induced by near infrared ("NIR") radiation. For example, NIR radiation has a wavelength between approximately 900 nm and 1 μm.

[0011] Alternatively or additionally, the absorbing layer is configured to absorb wavelengths between about 1 μm and about 20 μm.

[0012] Alternatively or additionally, the absorber layer is formed of silicon nitride, a metal or a polymer.

[0013] Alternatively or additionally, the non-vacuum packaged sensor chip has a chip scale package form factor.

[0014] This document also describes an exemplary sensor system. The sensor system includes the non-vacuum-encapsulated sensor chip described herein and an external circuit substrate, wherein the non-vacuum-encapsulated sensor chip is electrically and mechanically coupled to the external circuit substrate via solder bumps or pillars. Optionally, the external circuit substrate is a printed circuit board.

[0015] Another exemplary sensor chip is described herein. The sensor chip includes a substrate and a sensing element disposed on the substrate. The sensing element is configured to change resistance with temperature. In addition, the sensor chip includes an absorption layer configured to absorb mid-infrared ("MIR") radiation. The sensor chip also includes a plurality of terminals configured to measure the resistance of the sensing element and a plurality of photocurrent terminals configured to measure a current induced by near-infrared ("NIR") radiation.

[0016] Furthermore, the sensing element is formed of a p-type semiconductor material.

[0017] In some embodiments, the substrate is an n-type semiconductor substrate. In other embodiments, the substrate is a p-type semiconductor substrate having an n-type well, and the sensing element is disposed in the n-type well. In other embodiments, the substrate is a CMOS substrate.

[0018] Alternatively or additionally, the substrate defines a top surface and a bottom surface. In some embodiments, the sensor chip includes a dielectric layer disposed on the bottom surface. Optionally, an absorbent layer is disposed on the dielectric layer. Alternatively, the absorbent layer is disposed on the top surface.

[0019] Alternatively or additionally, the NIR radiation has a wavelength between about 900 nm and 1 μm.

[0020] Alternatively or additionally, the absorbing layer is configured to absorb wavelengths between about 1 μm and about 20 μm.

[0021] Alternatively or additionally, the absorber layer is formed of silicon nitride, a metal or a polymer.

[0022] Alternatively or additionally, the sensor chip has a chip scale package form factor.

[0023] Another exemplary sensor system is also described herein. The sensor system includes the sensor chip described herein and an external circuit substrate, wherein the sensor chip is electrically and mechanically coupled to the external circuit substrate via solder bumps or pillars. Optionally, the external circuit substrate is a printed circuit board.

[0024] By examining the following drawings and detailed description, other systems, methods, features and / or advantages will or may become apparent to those skilled in the art. It is intended that all such additional systems, methods, features and / or advantages be included within this description and be protected by the accompanying claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The components in the drawings are not necessarily to scale relative to each other. Like reference numerals indicate corresponding components throughout the several views. These and other features will become more apparent from the detailed description made with reference to the accompanying drawings, in which:

[0026] Figure 1 An IR sensor system is shown with an n-type silicon substrate and a MIR absorber layer at the bottom surface of the sensor.

[0027] Figure 2 An IR sensor system is shown with an n-type silicon substrate and a MIR absorber layer at the top surface of the sensor.

[0028] Figure 3 An IR sensor system is shown with a p-type silicon substrate and a MIR absorber layer at the bottom surface of the sensor.

[0029] Figure 4 An IR sensor system is shown with a p-type silicon substrate and a MIR absorber layer at the top surface of the sensor.

[0030] Figure 5 Shown Figure 4 Electrical connections for the combined NIR and MIR sensor system.

[0031] Figure 6 Shown Figure 2 Electrical connections for the combined NIR and MIR sensor system.

[0032] Figure 7 The induced photocurrent response to incident light of an exemplary sensor chip is shown. DETAILED DESCRIPTION

[0033] The present disclosure may be more readily understood by reference to the following detailed description, examples, drawings, and the descriptions preceding and following them. However, before disclosing and describing the present apparatus, systems, and / or methods, it should be understood that, unless otherwise indicated, the present disclosure is not limited to the specific apparatus, systems, and / or methods disclosed and, as such, may of course vary. It should also be understood that the terminology used herein is for the purpose of describing particular aspects only and is not intended to be limiting.

[0034] The following description is provided as a heuristic teaching. To this end, those skilled in the relevant art will recognize and appreciate that many changes can be made while still obtaining beneficial results. It is obvious that some of the desired benefits can be obtained by selecting some of the features without utilizing other features. Therefore, those skilled in the art will recognize that in some cases, many modifications and adaptations are possible and even desirable, and the present disclosure covers such modifications and adaptations. Therefore, the following description is provided as an illustration of the principles, not as a limitation thereof.

[0035] In addition, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to a "sensing element" may include two or more such sensor sensing elements unless the context dictates otherwise.

[0036] As used herein, the term "comprises" and variations thereof are used synonymously with the term "includes" and variations thereof and are open, non-limiting terms.

[0037] Ranges may be expressed herein as from "about" one particular value and / or to "about" another particular value. When such ranges are expressed, another aspect includes from the one particular value and / or to the other particular value. Similarly, when the word "about" is used to express a value as an approximation, it should be understood that the particular value forms another aspect. It should also be understood that the endpoints of each range are significant both relative to the other endpoint and independently of the other endpoint.

[0038] As used herein, the terms "about" or "approximately" when used with reference to a wavelength mean within plus or minus 20% of the reference wavelength. As used herein, NIR has a wavelength of about 900 nanometers ("nm") to about 1 micrometer ("μm"), and MIR has a wavelength of about 1 μm to about 20 μm. As used herein, the terms "about" or "approximately" when used with reference to the dimensions of a chip scale package ("CSP") mean within plus or minus 50% of the reference dimension. As used herein, the chip scale package form factor is about 1 millimeter ("mm") to about 5 mm.

[0039] As used herein, "optional" or "optionally" means that the subsequently described event or circumstance may or may not occur, and that the description includes instances where said event or circumstance occurs and instances where it does not.

[0040] In some implementations, the present disclosure relates to non-vacuum packaged sensor chips (e.g., Figure 1-Figure 4 The non-vacuum packaged sensor chip is configured to detect MIR. Optionally, the non-vacuum packaged sensor chip is also configured to detect MIR and NIR simultaneously. The present disclosure also relates to a combined NIR sensor chip and MIR sensor chip in a chip-scale package form factor that does not require vacuum packaging (e.g., Figure 5 and Figure 6 any one of the sensor chips shown in ).

[0041] Figure 1An IR sensor system 101 according to a specific implementation described herein is shown. The sensor system 101 includes a non-vacuum-encapsulated sensor chip. In some specific implementations, the non-vacuum-encapsulated sensor chip is configured to detect MIR. Optionally, the non-vacuum-encapsulated sensor chip is also used to simultaneously detect MIR and NIR. The sensor system 101 includes a sensor chip 102, which includes a substrate 104, a sensing element 105, and an absorption layer 109 configured to absorb MIR radiation. As described herein, MIR has a wavelength of approximately 1 μm to approximately 20 μm. The sensing element 105 is configured to change resistance with temperature. Therefore, the MIR radiation is absorbed by the absorption layer 109 and converted into heat energy, which causes a temperature change in the sensor chip 102, which can be detected by measuring the resistance of the sensing element 105. In addition, NIR can be detected by measuring the light-induced current in the sensor chip 102. As described herein, NIR has a wavelength of approximately 900 nm to approximately 1 μm. The MIR detection of the resistance change of the sensing element 105 can therefore be separated from the NIR detection of the induced photocurrent change. In addition, as described herein, the sensor chip 102 is a non-vacuum-encapsulated sensor chip. In other words, the sensing element 102 is not vacuum-sealed during manufacturing. For example, as shown in the figure below, one or more sensing elements are not arranged in a hermetically sealed cavity or pore. On the contrary, one or more sensing elements are formed (e.g., injected, diffused, etc.) on the surface of the substrate 105, and the substrate 105 is not vacuum-encapsulated during downstream processing. As shown in the figure, the non-vacuum-encapsulated sensor chip 102 is mounted to an external circuit via an electrical connector (e.g., solder bumps, pillars, etc.). In addition, the sensor chip 102 has a core chip-scale package form factor, for example, about 1 mm to 5 mm as described herein.

[0042] like Figure 1 As shown, the sensor chip 102 is implemented on an n-type silicon substrate 104. Although silicon (Si) is provided as an exemplary material, the present disclosure contemplates the use of substrates formed from other n-type semiconductors including, but not limited to, gallium arsenide (GaAs). Figure 1 The sensor chip 102 in FIG. 1 defines a top surface and a bottom surface opposite the top surface. The sensor chip 102 has a dielectric layer 103 (e.g., silicon dioxide) and a conductive layer 106 (e.g., metal) for electrical routing. It should be understood that the number and arrangement of the dielectric layers 103 and the conductive layers 106 are merely exemplary. The sensor chip 102 may include more than one dielectric layer 103 and / or more than one conductive layer 106. One or more dielectric layers 103 and one or more conductive layers 106 may be provided to route one or more electrical signals, for example, to facilitate measuring the resistance of a sensing element and / or measuring a light-induced current (see FIG. 1 ). Figure 5 and Figure 6). Furthermore, sensor chip 102 includes a p-type doped sensing element 105. In some implementations, sensor chip 102 includes a single sensing element 105. In other implementations, sensor chip 102 includes multiple sensing elements 105. The resistance of sensing element 105 is temperature-dependent, meaning that the resistance changes as a function of temperature. Sensing element 105 is formed on n-type silicon substrate 104 by implantation or diffusion.

[0043] As described above, the sensor chip 102 also includes an absorber layer 109 for IR absorption disposed on an outer surface of the sensor chip 102. Although a single absorber layer 109 is shown as an example, the present disclosure contemplates that the sensor chip 102 may include more than one absorber layer 109. Figure 1 In the embodiment of the present invention, an absorber layer 109 is disposed on a dielectric layer 103, which is disposed on the bottom surface of the sensor chip 102. IR radiation is absorbed by the absorber layer 109 and converted into heat energy, which causes a temperature change in the sensor chip 102. Thus, the sensor chip 102 can be used to detect IR radiation by measuring the resistance of the sensing element 105. In the specific implementation described herein, the absorber layer 109 absorbs wavelengths in the MIR, for example, one or more wavelengths between approximately 1 μm and approximately 20 μm. The absorber layer 109 can be formed of silicon nitride, a metal, or a polymer.

[0044] The sensor chip 102 may optionally include one or more electrical connectors 107. The electrical connectors 107 are used, for example, to route electrical signals between the conductive layer 106 and external circuits. Figure 1 In FIG, the sensor chip 102 is mounted on the printed circuit board 108 via the electrical connector 107. It should be understood that Figure 1 The number, size, shape, and / or arrangement of electrical connectors 107 in the embodiment are provided as examples only. The present disclosure contemplates providing sensor chips with different numbers, sizes, shapes, and / or arrangements of electrical connectors. Furthermore, in some implementations, the electrical connectors 107 are solder bumps. Although solder bumps are provided as examples, the present disclosure contemplates using metal pillars (e.g., copper, nickel, or other metals) in place of solder bumps with the implementations described herein. It should be understood that solder bumps and metal pillars are provided as examples only, and that other types of electrical connectors may be used with the implementations described herein. The printed circuit board 108 acts as a heat sink during operation, and heat flux will flow through the electrical connectors 107. The sensor chip 102, the electrical connectors 107, and the printed circuit board 108 together form the sensor system 101. Due to the size of the sensor chip 102 in the chip-scale package (CSP), heat loss is primarily due to thermal conduction through the electrical connectors 107. Heat radiation loss and air convection loss (typically not forced convection) are lower than heat conduction. Under typical conditions, the sensor chip temperature rises by approximately Therefore, the sensor chip 102 does not need to be vacuum packaged.

[0045] Figure 2 FIG2 shows an IR sensor system 201 according to another embodiment described herein. The sensor system 201 includes a non-vacuum packaged sensor chip. In some embodiments, the non-vacuum packaged sensor chip is configured to detect MIR. Optionally, the non-vacuum packaged sensor chip is also configured to detect MIR and NIR simultaneously. The sensor system 201 includes a sensor chip 202, which includes a substrate 104, a sensing element 105, and an absorption layer 209 configured to absorb MIR radiation. Figure 2 As shown, the sensor chip 202 is implemented on an n-type silicon substrate 104 . Figure 2 The sensor chip 202 in the embodiment defines a top surface and a bottom surface opposite to the top surface. The sensor chip 202 also has a dielectric layer 103 and a conductive layer 106 for electrical wiring. The dielectric layer and the conductive layer are described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 2 Further detailed description is given below. In addition, the sensor chip 202 includes a p-type doped sensing element 105. The resistance of the sensing element 105 depends on the temperature, that is, the resistance changes as a function of the temperature. The sensing element 105 is formed on the n-type silicon substrate 104 by implantation or diffusion. The sensing element is described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 2 A further detailed description is given.

[0046] As described above, the sensor chip 202 also includes an absorber layer 209 for IR absorption disposed on an outer surface of the sensor chip 202. Although a single absorber layer 209 is shown as an example, the present disclosure contemplates that the sensor chip 202 may include more than one absorber layer 209. Figure 2 In the embodiment of the present invention, an absorption layer 209 is provided on the n-type silicon substrate 104, which is the top surface of the sensor chip 202. IR radiation is absorbed by the absorption layer 209 and converted into heat energy, which causes a temperature change in the sensor chip 202. Therefore, the sensor chip 202 can be used to detect IR radiation by measuring the resistance of the sensing element 105.

[0047] The sensor chip 202 may optionally include one or more electrical connectors 107. Electrical connectors (eg, solder bumps, metal pillars, etc.) are described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 2The sensor chip 202 is mounted on the printed circuit board 108 via the electrical connector 107. The printed circuit board 108 acts as a heat sink during operation, and the heat flux will flow through the electrical connector 107. The sensor chip 202, the electrical connector 107 and the printed circuit board 108 together form the sensor system 201. Figure 1 For the same reasons mentioned above, the sensor chip 202 is advantageous for detecting MIR, and the sensor chip 202 does not require vacuum packaging.

[0048] Figure 3 FIG3 shows an IR sensor system 301 according to another embodiment described herein. The sensor system 301 includes a non-vacuum packaged sensor chip. In some embodiments, the non-vacuum packaged sensor chip is configured to detect MIR. Optionally, the non-vacuum packaged sensor chip is also configured to detect MIR and NIR simultaneously. The sensor system 301 includes a sensor chip 302, which includes a substrate 304, a sensing element 105, and an absorption layer 309 configured to absorb MIR radiation. Figure 3 As shown, sensor chip 302 is implemented on a p-type silicon substrate 304. Although silicon (Si) is provided as an exemplary material, the present disclosure contemplates the use of substrates formed from other p-type semiconductors including, but not limited to, gallium arsenide (GaAs). Figure 3 The sensor chip 302 in the embodiment defines a top surface and a bottom surface opposite to the top surface. The sensor chip 302 also has a dielectric layer 103 and a conductive layer 106 for electrical wiring. The dielectric layer and the conductive layer are described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 3 Detailed description is provided below. Furthermore, sensor chip 302 includes a p-type doped sensing element 105 and an n-type region or well (referred to herein as "N-well") 310 that is lightly doped with n-type material. To ensure proper functionality, p-type doped sensing element 105 resides in N-well 310. In some implementations, sensor chip 302 includes a single sensing element 105 / N-well 310. In other implementations, sensor chip 302 includes multiple sensing elements 105 / N-well 310. The resistance of sensing element 105 is temperature-dependent, meaning that the resistance varies as a function of temperature. P-type doped sensing element 105 and N-well 310 are formed on p-type silicon substrate 304 by implantation or diffusion.

[0049] As described above, the sensor chip 302 also includes an absorber layer 309 for IR absorption disposed on an outer surface of the sensor chip 302. Although a single absorber layer 309 is shown as an example, the present disclosure contemplates that the sensor chip 302 may include more than one absorber layer 309. Figure 3In the embodiment of the present invention, an absorption layer 309 is provided on a dielectric layer 103, which is arranged on the bottom surface of the sensor chip 302. IR radiation is absorbed by the absorption layer 309 and converted into heat energy, which causes a temperature change in the sensor chip 302. Therefore, the sensor chip 302 can be used to detect IR radiation by measuring the resistance of the sensing element 105.

[0050] The sensor chip 302 may optionally include one or more electrical connectors 107. Electrical connectors (eg, solder bumps, metal pillars, etc.) are described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 3 The sensor chip 302 is mounted on the printed circuit board 108 via the electrical connector 107. The printed circuit board 108 acts as a heat sink during operation, and the heat flux will flow through the electrical connector 107. The sensor chip 302, the electrical connector 107 and the printed circuit board 108 together form the sensor system 301. Figure 1 For the same reasons mentioned above, the sensor chip 302 is advantageous for detecting MIR, and the sensor chip 302 does not require vacuum packaging.

[0051] Figure 4 FIG4 shows an IR sensor system 401 according to another embodiment described herein. The sensor system 401 includes a non-vacuum packaged sensor chip. In some embodiments, the non-vacuum packaged sensor chip is configured to detect MIR. Optionally, the non-vacuum packaged sensor chip is also configured to detect MIR and NIR simultaneously. The sensor system 401 includes a sensor chip 402, which includes a substrate 304, a sensing element 105, and an absorption layer 409 configured to absorb MIR radiation. Figure 4 As shown, the sensor chip 402 is implemented on a p-type silicon substrate 304 . Figure 4 The sensor chip 402 in FIG. 4 defines a top surface and a bottom surface opposite to the top surface. The sensor chip 402 has a dielectric layer 103 and a conductive layer 106 for electrical wiring. The dielectric layer and the conductive layer are described above with respect to FIG. Figure 1 is described in detail and is therefore no longer described with respect to Figure 4Detailed description is provided below. Furthermore, sensor chip 402 includes a p-type doped sensing element 105 and an n-type region or well (referred to herein as "N-well") 310 that is lightly doped with n-type material. To ensure proper functionality, p-type doped sensing element 105 resides in N-well 310. In some implementations, sensor chip 402 includes a single sensing element 105 / N-well 310. In other implementations, sensor chip 402 includes multiple sensing elements 105 / N-well 310. The resistance of sensing element 105 is temperature-dependent, meaning that the resistance changes as a function of temperature. P-type doped sensing element 105 and N-well 310 are formed on p-type silicon substrate 304 by implantation or diffusion.

[0052] As described above, the sensor chip 402 also includes an absorption layer 409 for IR absorption disposed on an outer surface of the sensor chip 402. Although a single absorption layer 409 is shown as an example, the present disclosure contemplates that the sensor chip 402 may include more than one absorption layer 409. Figure 4 , an absorption layer 409 is provided on the p-type silicon substrate 304, which is the top surface of the sensor chip 402. IR radiation is absorbed by the absorption layer 409 and converted into heat energy, which causes a temperature change in the sensor chip 402. Therefore, the sensor chip 402 can be used to detect IR radiation by measuring the resistance of the sensing element 105.

[0053] The sensor chip 402 may optionally include one or more electrical connectors 107. Electrical connectors (eg, solder bumps, metal pillars, etc.) are described above with respect to Figure 1 is described in detail and is therefore no longer described with respect to Figure 4 The sensor chip 402 is mounted on the printed circuit board 108 via the electrical connector 107. The printed circuit board 108 acts as a heat sink during operation, and the heat flux will flow through the electrical connector 107. The sensor chip 402, the electrical connector 107 and the printed circuit board 108 together form the sensor system 401. Figure 1 For the same reasons mentioned above, the sensor chip 402 is advantageous for detecting MIR, and the sensor chip 402 does not require vacuum packaging.

[0054] Figure 5 The figure shows Figure 4 The electrical connections of the sensor chip 402 are shown in FIG. Figure 4The sensor system shown in has electrical connections for the sensing element 105 and the N-well 310. In a specific implementation, the sensor chip is configured as a combined MIR and NIR sensor. The sensor chip 402 includes a positive potential node 510 and a negative potential node 511, respectively. The positive potential node 510 and the negative potential node 511 are connected to the sensing element 105. The present disclosure contemplates that the positive potential node 510 and the negative potential node 511 can be made of a conductive material such as a metal. The positive potential node 510 and the negative potential node 511 are connected between opposite ends of the sensing element 105 and the corresponding conductive layer. The electrical signal can then be routed via the electrical connector 107. Nodes 510 and 511 are used to measure the resistance of the sensing element 105. For example, a measuring current can be passed through the sensing element 105 via nodes 510 and 511 to measure its resistance in relation to MIR radiation. As described herein, the resistance of the sensing element 105 depends on temperature, i.e., the resistance changes as a function of temperature. As a result of this relationship, MIR radiation can be detected. Figure 5 In the embodiment, a single sensing element 105 is provided as an example. In an implementation with more than one sensing element, it should be understood that a positive potential node and a negative potential node may be provided for each sensing element. During subsequent signal processing, the absolute resistance change may be converted into a voltage change.

[0055] At the same time, it should be understood that there is another light-induced current between the N-well and the p-type substrate junction diode. The photocurrent is caused by NIR radiation. Such responses are known in the art. For example, the induced photocurrent response of the exemplary sensor chip to incident light is as follows: Figure 7 As shown. Figure 7 As shown, the maximum induced photocurrent is between 900nm and 1μm for the wavelength of the incident light (i.e. NIR). Figure 5 , the sensor chip 402 further includes a positive diode node 512 and a negative diode node 513 that can be used to measure the light-induced current. The present disclosure contemplates that the positive diode node 512 and the negative diode node 513 can be made of a conductive material such as metal. Figure 5 As shown, the positive diode node 512 is connected between the p-type substrate 304 and the conductive layer, and the negative diode node 513 is connected between the N-well 310 and the conductive layer. The electrical signal can then be routed via the electrical connector 107. It should be understood that Figure 5The positive diode node connections and negative diode node connections shown are provided as examples only. The present disclosure contemplates the use of other electrical connection configurations for the positive diode node and the negative diode node. It should be understood that the current flowing through the sensing element 105 (e.g., measured at nodes 510, 511) is different from the light induced current (e.g., measured at nodes 512, 513). Therefore, by diverting the junction current of the N-well, the NIR response is separated from the MIR. This measurement method ensures that there is a gap between the MIR (MIR induced resistance change) and the NIR (NIR induced diode current). Figure 5 , a single sensing element 105 / N-well 310 is provided as an example. In embodiments having more than one sensing element / N-well, it will be understood that a positive diode node and a negative diode node may be provided for each N-well. The present disclosure contemplates that the silicon substrate may be replaced with a complementary metal oxide semiconductor ("CMOS") substrate, which is also substantially p-type silicon. In a specific implementation, electrical nodes 510, 511, 512, and 513 may be transferred to CMOS internal nodes rather than through electrical connector 107. As an example, the electrical connections are shown with respect to sensor chip 402. It will be understood that the Figure 3 The sensor chip shown provides similar electrical connections.

[0056] Figure 6 The figure shows Figure 2 The electrical connections of the sensor chip 202 are shown in FIG. The sensor system 601 and Figure 2 The sensor system shown has electrical connections for the sensing element 105 and the n-type silicon substrate 104. In a specific implementation, the sensor chip is configured as a combined MIR and NIR sensor. The sensor chip 202 includes a positive potential node 510 and a negative potential node 511, respectively. The positive potential node 510 and the negative potential node 511 are connected to the sensing element 105. The present disclosure contemplates that the positive potential node 510 and the negative potential node 511 can be made of a conductive material such as a metal. The positive potential node 510 and the negative potential node 511 are connected between opposite ends of the sensing element 105 and the corresponding conductive layer. The electrical signal can then be routed via the electrical connector 107. Nodes 510 and 511 are used to measure the resistance of the sensing element 105. For example, a measuring current can be passed through the sensing element 105 via nodes 510 and 511 to measure its resistance in relation to MIR radiation. As described herein, the resistance of the sensing element 105 depends on temperature, i.e., the resistance changes as a function of temperature. As a result of this relationship, MIR radiation can be detected. Figure 6 In the embodiment, a single sensing element 105 is provided as an example. In an implementation with more than one sensing element, it should be understood that a positive potential node and a negative potential node may be provided for each sensing element. During subsequent signal processing, the absolute resistance change may be converted into a voltage change.

[0057] At the same time, it should be understood that there is another light-induced current between the n-type silicon substrate 104 and the p-type junction diode. The photocurrent is caused by NIR radiation. As mentioned above, such a response is known in the art, and the induced photocurrent response to the incident light of the exemplary sensor chip is as follows: Figure 7 As shown. Refer again Figure 6 , the sensor chip 202 further includes a positive diode node 512 and a negative diode node 513 that can be used to measure the light-induced current. The present disclosure contemplates that the positive diode node 512 and the negative diode node 513 can be made of a conductive material such as metal. Figure 6 As shown, the positive diode node 512 and the negative diode node 513 are connected between different portions of the n-type substrate 104 and the corresponding conductive layers. The electrical signal can then be routed via the electrical connector 107. It should be understood that Figure 6 The positive diode node connections and negative diode node connections shown are provided as examples only. The present disclosure contemplates the use of other electrical connection configurations for the positive diode node and the negative diode node. It will be understood that the current flowing through the sensing element 105 (e.g., measured at nodes 510, 511) is different from the light induced current (e.g., measured at nodes 512, 513). Therefore, by shifting the junction current, the NIR response is separated from the MIR. This measurement method ensures that there is a spacing between the MIR (MIR induced resistance change) and the NIR (NIR induced diode current). As an example, the electrical connections are shown relative to the sensor chip 202. It will be understood that the NIR response can be Figure 1 The sensor chip shown provides similar electrical connections.

[0058] Although the subject matter has been described in language specific to structural features and / or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

1. A non-vacuum packaged sensor chip, comprising: a substrate defining a top surface and a bottom surface; a sensing element disposed on the substrate, wherein the sensing element is configured to change resistance with temperature; a dielectric layer disposed on the bottom surface; as well as An absorbing layer is disposed on the top surface and is configured to absorb mid-infrared radiation, wherein the mid-infrared radiation has a wavelength between 1 μm and 20 μm. 2 . The non-vacuum packaged sensor chip according to claim 1 , wherein the sensing element is formed of a p-type semiconductor material. 3 . The non-vacuum packaged sensor chip according to claim 1 , wherein the substrate is an n-type semiconductor substrate. 4 . The non-vacuum packaged sensor chip according to claim 1 , wherein the substrate is a p-type semiconductor substrate having an n-type well, and wherein the sensing element is arranged in the n-type well. 5 . The non-vacuum packaged sensor chip according to claim 1 , wherein the substrate is a CMOS substrate. 6 . The non-vacuum packaged sensor chip according to claim 1 , further comprising a plurality of terminals configured to measure the resistance of the sensing element. 7 . The non-vacuum packaged sensor chip according to claim 1 , further comprising a plurality of photocurrent terminals configured to measure current induced by near-infrared radiation.

8. The non-vacuum packaged sensor chip according to claim 7, wherein the near infrared radiation has a wavelength between 900 nm and 1 µm. 9 . The non-vacuum packaged sensor chip according to claim 1 , wherein the absorption layer is formed of silicon nitride, metal or polymer. 10 . The non-vacuum packaged sensor chip according to claim 1 , wherein the non-vacuum packaged sensor chip has a chip scale package form factor.

11. A sensor system, comprising: The non-vacuum packaged sensor chip according to any one of claims 1 to 10; and An external circuit substrate, wherein the non-vacuum packaged sensor chip is electrically and mechanically coupled to the external circuit substrate via solder bumps or pillars.

12. The sensor system of claim 11, wherein the external circuit substrate is a printed circuit board.

13. A sensor chip, comprising: a substrate defining a top surface and a bottom surface; a sensing element disposed on the substrate, wherein the sensing element is configured to change resistance with temperature; a dielectric layer disposed on the bottom surface; an absorbing layer disposed on the top surface and configured to absorb mid-infrared radiation, wherein the mid-infrared radiation has a wavelength between 1 μm and 20 μm; a plurality of terminals configured to measure a resistance of the sensing element; and A plurality of photocurrent terminals are configured to measure current induced by near infrared radiation. The sensor chip according to claim 13 , wherein the sensing element is formed of a p-type semiconductor material. 15 . The sensor chip according to claim 13 , wherein the substrate is an n-type semiconductor substrate. 16 . The sensor chip according to claim 13 , wherein the substrate is a p-type semiconductor substrate having an n-type well, and wherein the sensing element is arranged in the n-type well. 17 . The sensor chip according to claim 13 , wherein the substrate is a CMOS substrate.

18. The sensor chip according to any one of claims 13 or 14, wherein the near infrared radiation has a wavelength between 900 nm and 1 µm.

19. The sensor chip according to any one of claims 13 or 14, wherein the absorption layer is formed of silicon nitride, metal or polymer.

20. The sensor chip according to any one of claims 13 or 14, wherein the sensor chip has a chip scale package form factor.

21. The sensor chip according to any one of claims 13 or 14, wherein the sensor chip is not vacuum-packaged.

22. A sensor system, comprising: The sensor chip according to any one of claims 13 to 21; and An external circuit substrate, wherein the sensor chip is electrically and mechanically coupled to the external circuit substrate via solder bumps or pillars.

23. The sensor system of claim 22, wherein the external circuit substrate is a printed circuit board.

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