Improvements in capacitive element driving enabled by non-dissipative elements

Abstract

A circuit for driving the voltage of a capacitive element between two voltage levels has at least one driver unit having a first pair of switches connected in series between a first terminal of a voltage source and the capacitive element, and a second pair of switches connected in series between a second terminal of the voltage source and the capacitive element. One or more non-dissipative elements may be connected between a common node of the first pair of switches and a common node of the second pair of switches. Combinations of switches from the driver unit may be activated and deactivated in a defined sequence to provide a gradual transfer of energy to the capacitive element. In one sequence, switches in a selected driver unit may subtract a specified voltage from an input voltage, bypass the selected driver unit, and add a specified voltage to the input voltage.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 62 / 907,530 filed on September 27, 2019 (Agent Docket No. N03-P01-00US), U.S. Patent Application No. 63 / 075,083 filed on September 4, 2020 (Agent Docket No. N03-P01-01US), and U.S. Patent Application No. 63 / 082,556 filed on September 24, 2020 (Agent Docket No. N03-P01-03US), all of which are titled “IMPROVEMENTS TN NON-DISSIPATIVE ELEMENT-ENABLED CAPACITIVE ELEMENT DRIVING,” and the disclosures of all three are incorporated herein by reference. Technical Field

[0003] The present invention relates to the field of circuits, and in particular to circuits and systems for capacitive driving. Background Art

[0004] The present invention relates to a method and system for driving the voltage of a capacitive element between two voltage levels, such as a ground voltage and a power supply voltage. Non-dissipative elements, such as capacitors, can be used to improve the energy efficiency of driving the capacitive element.

[0005] Control of an electronic or electrical device is typically performed by applying a voltage to its control terminal, for example, to activate or deactivate the device. The control terminal may be a control gate of any type of transistor, including but not limited to a metal oxide semiconductor field effect transistor (MOSFET), a gallium nitride field effect transistor (GaN-FET), a silicon carbide field effect transistor (SiC-FET), a junction field effect transistor (JFET), or an insulated gate bipolar transistor (IGBT). The control terminal may also be a control input of another electronic or electrical device, including but not limited to an electrostatic actuator or other systems such as micromotors, micromirrors and microswitches based on microelectromechanical systems (MEMS) technology, memories and logic circuits based on multiferroic / magnetoelectric materials, ultrasonic transducers, piezoelectric actuators, electronic paper displays (E-paper), and actuators based on electroactive polymers.

[0006] In electronic or electrical systems where devices have control terminals with capacitive elements, drivers are used to drive the voltage of those control terminals between two voltage levels to activate or deactivate those devices. Systems that employ drivers include switched-mode power converters, motor drives, electrostatic actuators, electroactive polymer actuators, and multiferroic / magnetoelectric devices. Periodic switching helps keep the average voltage of these storage capacitors at a constant level.

[0007] In the conventional method of driving capacitor elements, such as Figure 1A The circuit 100 shown utilizes Figure 1B The operation of the circuit 100 shown in the waveforms may have two switches SW 1[1] , SW 1[2] , where switch SW 1[1] Connect the capacitor element C O1 and voltage source V DD1 between one terminal and the switch SW 1[2] Connect the capacitor element C O1 and voltage source V DD1 between the other terminals, which are alternately turned on and off to switch between two levels (e.g., 0V and V DD1 ) between the driving capacitor element C O1 However, this driving method is not energy-efficient.

[0008] Figure 1B The waveforms illustrate the operation of the circuit 100, wherein when the capacitor element voltage (V O1 ) is driven from ground (or power supply voltage) to the power supply voltage (or ground) of the driving circuit, a transient current flows through the switch SW 1[1] (or SW 1[2] ), until the voltage V O1 Stable. Then the energy E CAP1 =1 / 2C O1 V DD1 2 Stored in capacitor element C O1 (or from the capacitor element C O1 When the transient current I SW1[1] (or I SW1[2] ) flows through switch SW 1[1] (or SW 1[2] ), a voltage difference appears across the switch and energy is absorbed. Switch SW 1[1] (or SW 1[2] ) is a dissipative element, which absorbs the energy E DISS1 =1 / 2C O1 V DD1 2 is dissipated. Energy loss per drive cycle (E LOSS1) is CV DD1 2 .

[0009] One way to avoid energy dissipation in the circuit 100 is to introduce a resonant capacitor element driver, where an inductor is added to the input of the capacitor element and the capacitor element is periodically driven between two voltage levels. A circuit 200 for resonant capacitor element driving is shown in FIG. Figure 2A , where the operation of the circuit 200 is Figure 2B The waveform is shown in FIG.

[0010] like Figure 2A As shown, switch SW 2[1] and SW 2[2] In series with the voltage source V DD2 Between the terminals of the diode D 2[1] and D 2[4] Also connected in series with the voltage source V DD2 between the terminals of the diode D 2[3] and D 2[2] Also connected in series with the voltage source V DD2 The switch SW 2[1] 、Diode D 2[4] and diode D 2[2] share a common node 202, which is electrically connected to a voltage source V DD2 The positive terminal of the switch SW 2[1] 、Diode D 2[1] and diode D 2[3] share a common node 204, which is electrically connected to a voltage source V DD2 The negative terminal of the switch SW 2[1] , SW 2[2] 、Diode D 2[4] and diode D 2[1] The inductor L2 can be provided at the common node 206 and connected to the common node 206 by the diode D 2[2] and D 2[3] and the capacitance element C O2 Between the shared common nodes 208 .

[0011] In operation, the circuit 200 converts energy E DISS2 The use of a non-dissipative element such as inductor L2 in circuit 200 allows energy to be stored in the non-dissipative element rather than being dissipated as heat in a resistive element. 2[1] and D 2[2] (or D 2[3] and D 2[4] ) can be applied to the capacitor element voltage V O2 The power supply voltage V driven from ground to the driver circuit DD2 (or from the power supply voltage VDD2 After driving to ground) the stored energy E DISS2 Return voltage source V DD2 .

[0012] Therefore, including inductor L2 into circuit 200 reduces the energy E stored in the non-dissipative element CAP2 =1 / 2C O2 V DD2 2 dissipation, thereby making the circuit 200 more energy efficient. However, at V O2 There is a trade-off between the ramp rate and the peak inductor current. The inductor L2 and the capacitor C O1 The resonant network is formed, and its resonant period and characteristic impedance are proportional to the square root of L2. O2 The ramp rate may allow for the use of an inductor with a smaller value than inductor L2, but replacing it with circuit 200 also introduces a higher peak inductor current. Furthermore, including an additional component (inductor L2) in circuit 200 introduces additional current and, therefore, conduction losses due to resonant behavior, making circuit 200 bulky and expensive.

[0013] Networks with capacitors and inductors can also be used as resonant capacitive element drivers in circuits to avoid dissipating energy. Figure 3A A circuit 300 for driving a resonant capacitor element using an LC network is shown in FIG. Figure 3B The waveform is shown in FIG.

[0014] like Figure 3A As shown, an inductor and capacitor (LC) network LC3 is inserted between the switch SW 3[1] and SW 3[2] between the common node 310 and ground. Once the voltage V O3 From the power supply voltage V DD3 Change to ground, energy E CAP3 From the capacitor element C O3 Transfer to LC network LC3; when the voltage V O3 When the voltage changes from ground to the power supply voltage of the driving circuit, the voltage is transferred from the LC network LC3 back to the capacitor element C O3 .

[0015] As with circuit 200, the LC network LC3 incorporated into circuit 300 makes circuit 300 more energy efficient because it prevents the storage of O3 The energy E CAP3 =1 / 2C O3 V DD3 2 dissipation, but there is still V O2Furthermore, the additional components (LC network LC3) still introduce additional current to circuit 300 and thus conduction losses due to resonant behavior, making circuit 300 even bulkier and more expensive than circuit 200.

[0016] It would be desirable to have simple, convenient, energy efficient methods, circuits, and systems for driving systems employing capacitive elements. It would be desirable to have simple, convenient, energy efficient methods, circuits, and systems for driving capacitive elements that simply and efficiently store energy in at least one non-dissipative element, transfer energy to drive the capacitive element between two voltage levels, and can transfer energy in a series of steps. In addition, it would be desirable to develop simple, convenient, energy efficient methods, circuits, and systems for driving capacitive elements in which energy can be transferred from a non-dissipative element while the average voltage level value of the non-dissipative element remains constant over time. Summary of the invention

[0017] Disclosed are methods, circuits, and systems for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, wherein a capacitive element driver simply and efficiently stores energy in at least one non-dissipative element, transfers the energy to drive the capacitive element between the two voltage levels, and can transfer the energy in a series of steps by operating a sequence of stages of the at least one non-dissipative element, alternately turning switches on and off in a sequence order to drive the voltage of the capacitive element in a stepwise manner between the two levels.

[0018] The capacitive element driver may have a first switch electrically connected between an input terminal of the capacitive element and a negative terminal of a voltage source, and a last switch electrically connected between an input terminal of the capacitive element and a positive terminal of the voltage source. In some embodiments, one or more non-dissipative elements may be connected in series between the terminals of the voltage source, and one end of two or more switches may be connected to the input of the capacitive element. The other end of the first switch may be electrically connected to a common node between the negative terminal of the voltage source and the first non-dissipative element, and the other end of the last switch may be electrically connected to a common node between the positive terminal of the voltage source and the last non-dissipative element.

[0019] Furthermore, the driver may have more than one driver unit arranged to provide a stepwise transfer of energy through operation of its own stage sequence, such that switches in the unit are opened and closed in combination in a switching stage sequence to shift the output voltage of the capacitive element driver between two voltage levels while keeping the average voltage level value of the non-dissipative element constant over time.

[0020] In certain embodiments, switching may be applied to the capacitive element driver to reduce energy losses when the capacitive element is driven from one voltage to another voltage by activating and deactivating selected switches of a plurality of switches.

[0021] In another embodiment, switches may be applied to the capacitive element driver by activating and deactivating selected switches in a switching stage sequence defined to ensure that the average value of the storage capacitor voltage remains constant over time. The switching sequence may be further defined to form a capacitive element voltage drive cycle such that the combination of switch activations operates to keep the average value of the voltage of the storage capacitor(s) constant over time.

[0022] In certain embodiments, a capacitive element driver for driving a capacitive element between voltage levels is disclosed, wherein the capacitive element is an element having a capacitive function, and the capacitive element driver is configured to drive the capacitive element from a high voltage level to a low voltage level, or from a low voltage level to a high voltage level. The capacitive element driver may have a plurality of switches, wherein a first pair of switches may be electrically connected in series between a first input terminal of the capacitive element driver and an output terminal of the capacitive element driver, the first input terminal of the capacitive element driver may be electrically connected directly or indirectly to a first terminal of a voltage source for providing a selected voltage to the capacitive element driver, and the output terminal of the capacitive element driver may be electrically connected directly or indirectly to an input of the capacitive element.

[0023] The plurality of switches may also have a second pair of switches electrically connectable in series between a second terminal of the voltage source and an output terminal of the capacitive element driver; and a non-dissipative element configured to store and transfer energy to drive the capacitive element between voltage levels, wherein the non-dissipative element may be electrically connectable between a common node of the first pair of switches and a common node of the second pair of switches. The plurality of switches may be configured to open and close in combination in a switching stage sequence to maintain an average voltage level value of the non-dissipative element constant over time.

[0024] In further embodiments, the controller may be electrically connected to the plurality of switches to control the operation of the switches to open and close in combination in a switching stage sequence, the switching stage sequence being configured to provide a gradual transfer of energy to the capacitive element, and the capacitive element driver may be configured to drive the capacitive element from a high voltage level to a low voltage level, or from a low voltage level to a high voltage level.

[0025] In other embodiments, the capacitor element driver may be a first driver unit in a capacitor element driving circuit, which may have a second driver unit electrically connectable between the first driver unit and the capacitor element. The second driver unit may have a second unit first input terminal electrically connectable to the first unit output terminal, a second unit output terminal electrically connectable directly or indirectly to the capacitor element, and a second plurality of switches having a second unit first pair of switches electrically connectable in series between the second unit first input terminal and the second unit output terminal and a second unit second pair of switches electrically connectable in series between the first unit output terminal and the second unit output terminal. The second driver unit may also have a second non-dissipative element for storing and transferring additional energy for driving the capacitor element between two voltage levels, wherein the second non-dissipative element may be electrically connectable between a common node of the second unit first pair of switches and a common node of the second unit second pair of switches.

[0026] In a further embodiment, the switching stage sequence is a first stage sequence; and the second plurality of switches are arranged to be opened or closed in combination in a second switching stage sequence to maintain an average voltage level value of the second non-dissipative element constant over time.

[0027] In another embodiment, a circuit-wide switching sequence for providing a stepwise transfer of energy to a capacitive element is disclosed, wherein a first plurality of switches and a second plurality of switches are selectively opened or closed to drive the capacitive element from a high voltage level to a low voltage level or from a low voltage level to a high voltage level. A controller may also be electrically connected to the second plurality of switches to control the opening or closing of the second plurality of switches based on the circuit-wide switching stage sequence.

[0028] In other embodiments, methods and systems for driving the voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, are disclosed. In the disclosed methods and systems, a first pair of multiple switches may be connected in series between a first terminal of a voltage source and an input of the capacitive element; and a second pair of multiple switches may be connected in series between a second terminal of the voltage source and an input of the capacitive element. In addition, when the capacitive element is driven between the two voltage levels, a non-dissipative element, such as a storage capacitor, may be configured to store and transfer energy, wherein the non-dissipative element is connected between a common node of the first pair of switches and a common node of the second pair of switches.

[0029] In other embodiments, a process for driving a capacitive element between two voltage levels is disclosed, wherein a first input terminal of a first capacitive element driver can be directly or indirectly electrically connected to a first terminal of a voltage source, an output terminal of the first capacitive element driver can be directly or indirectly electrically connected to an input of the capacitive element, and a second input terminal of the first capacitive element driver can be directly or indirectly electrically connected to a second terminal of the voltage source.

[0030] In further embodiments, in a process for driving a capacitive element between two voltage levels, an average voltage level value of a non-dissipative element may remain constant over time as a first capacitive element driver operates through a first stage sequence.

[0031] The additional energy can be stored in a non-dissipative element of a first capacitive element driver, wherein the non-dissipative element is electrically connected between the first input terminal and the output terminal, and electrically connected between the second input terminal and the output terminal. The first capacitive element driver can be operated through a first stage sequence, wherein the first sequence is configured to directly or indirectly transfer energy in a first set of voltage steps from a first high voltage level to a first low voltage level or from a first low voltage level to a first high voltage level to the capacitive element. In a further embodiment, in a process for driving a capacitive element between two voltage levels, when the first capacitive element driver is operated through the first stage sequence, an average voltage level value of the non-dissipative element can remain constant over time.

[0032] In other embodiments, the first capacitive element driver may be a first driver unit, and the second driver unit may be electrically connected between the first driver unit and the capacitive element. The second driver unit may have:

[0033] a first input terminal of the second unit, directly or indirectly electrically connected to a first terminal of a voltage source via the first driver unit,

[0034] · A second unit output terminal, directly or indirectly electrically connected to the input of the capacitive element,

[0035] a second input terminal of the second unit, electrically connected directly or indirectly to a second terminal of the voltage source via the first driver unit, and

[0036] A non-dissipative element electrically connected between the second unit first input terminal and the second unit output terminal, and between the second unit second input terminal and the second unit output terminal.

[0037] Additional energy can be stored in the non-dissipative element of the second capacitive element driver, and the second driver unit can be operated through the second stage sequence to directly or indirectly transfer the additional energy in the second set of voltage steps from the second high voltage level to the second low voltage level or from the second low voltage level to the second high voltage level to the capacitive element. In addition, when the first driver unit is operated through the first stage sequence, the second driver unit can be combined and cooperatively operated through the second stage sequence with the first driver unit, the cooperation also including maintaining the application of the first portion of the first activation mode of the first driver unit during the application of the second activation mode of the second driver unit.

[0038] The disclosed devices, methods and systems improve the energy efficiency of driving a capacitive element because they allow a non-dissipative element to store and transfer energy when the capacitive element is driven between two voltage levels. In other embodiments, the energy efficiency is further improved by a switching method in which, during a drive cycle, selected switches are activated and deactivated in a sequence of switching stages that are defined to maintain an average value of the voltage across the non-dissipative element constant over time.

[0039] Therefore, the disclosed non-dissipative element enables the capacitive element to drive E LOSS Minimizes the use of relatively expensive, larger-sized conductors or other inductors used in conventional resonant capacitive element drives. In addition, the non-dissipative element(s) (in some embodiments, storage capacitor(s) and switch(es)) used in the disclosed apparatus, methods, and systems are relatively area efficient and inexpensive compared to the inductors used in conventional resonant capacitive element drives.

[0040] Additional purposes and advantages of the present invention will be explained in part in the following description, and in part will be obvious from the description, or can be understood through the practice of the present invention. The purposes and advantages of the present invention will be realized and obtained through the elements and combinations specifically pointed out in the appended claims.

[0041] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one (several) embodiments of the present invention and, together with the description, serve to explain the principles of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1A is a diagram of a conventional circuit 100 for driving a voltage of a capacitive element between two voltage levels, such as ground and a power supply voltage, and Figure 1B is a diagram showing waveforms associated with the operation of circuit 100;

[0044] Figure 2A is a circuit diagram of a conventional circuit 200 for driving a resonant capacitor element between two voltage levels, and Figure 2B is a diagram showing waveforms associated with the operation of circuit 200;

[0045] Figure 3A is a circuit diagram of a conventional circuit 300 using an inductor and capacitor (LC) network LC3 for driving a capacitive element between two voltage levels, and Figure 3B is a diagram showing waveforms associated with the operation of circuit 300;

[0046] Figure 4 is a circuit diagram of a capacitive element driver 400 of one embodiment of a storage capacitor enabled capacitive element driver of the present invention;

[0047] Figure 5A-5F is shown at full V O4 A circuit diagram of a capacitive element driver 400 operated in a drive cycle;

[0048] Figure 5G is shown at full V O4 A diagram of the switching sequence of the capacitive element driver 400 during a stage of a drive cycle;

[0049] Figure 5H Is the full V O4 During the drive cycle, when the switch SW 4[3] , SW 4[1] Close (and switch SW 4[0] , SW 4[2 ] is a circuit diagram of a capacitive element driver 400 operating when the capacitor element is kept disconnected;

[0050] Fig.5I Is the full V O4 During the drive cycle, when the switch SW 4[0] , SW 4[2] Close (and switch SW 4[3] , SW 4[1] A circuit diagram of a capacitive element driver 400 operating when the capacitor element is kept disconnected;

[0051] Fig. 6A is shown in the capacitive element driver 400 for the complete V O4 The voltage V input to the capacitor 430 during the drive cycle O4 A graph 600 of a waveform 602;

[0052] Figure 6B is shown with more detailed y-axis labeling Fig. 6A A graph 650 of a waveform 602;

[0053] Fig. 7A is a circuit diagram of a capacitive element driver 700A which is a more general embodiment of a storage capacitor-enabled capacitive element driver constituting the capacitive element driver 400;

[0054] Figure 7B is a circuit diagram of a capacitive element driver 780, which is an embodiment of a storage capacitor enabled capacitive element driver 700A having three (n=3) storage capacitors;

[0055] Figure 7Cis a circuit diagram of a capacitive element driver 700C, wherein one or more non-dissipative elements are connected in series between terminals of a voltage source, and two or more switches are connected at one end thereof to an input of the capacitive element;

[0056] Fig.7D and Fig. 7E is a circuit diagram of a capacitive element driver, wherein not all non-dissipative elements are electrically connected in series with one terminal of a first non-dissipative element (electrically and directly connected in series to one terminal of a voltage source) and one terminal of a last non-dissipative element (electrically and directly connected in series to another terminal of the voltage source), wherein

[0057] · Fig.7D is a circuit diagram of a capacitive element driver 700D constituting another alternative embodiment of the storage capacitor enabled capacitive element driver 700A having a set of common nodes, wherein the common node is associated with each non-dissipative element and is disposed between a negative terminal of a voltage source and one end of a target non-dissipative element; and

[0058] · Fig. 7E is a circuit diagram of a capacitive element driver 700E constituting another optional embodiment of a storage capacitor enabled capacitive element driver 700A having a set of common nodes associated with each non-dissipative element and disposed between a positive terminal of a voltage source and one end of a target non-dissipative element.

[0059] Fig. 8A is shown at the full V for a capacitive element driver of 700A O7A The voltage V input to the capacitor element 730A during the drive cycle O7A A graph 800 of a waveform 802;

[0060] Figure 8B is shown at full V O7A Graph 850 of an illustrative switching sequence method 80 for capacitive element driver 700A during a stage of a drive cycle;

[0061] Figure 8C is shown at full V O7B Graph 880 of the switching sequence of the capacitive element driver 780 during a stage of a drive cycle;

[0062] Figure 9A-9G is a circuit diagram of a switch illustrating an embodiment of a switch that may be deployed in the capacitive element driver 700A;

[0063] Figure 10-Figure 18is a circuit diagram showing an electrical system of an embodiment of the present invention, wherein a capacitor driving circuit is electrically connected to an electrical device / network having a capacitor function, wherein:

[0064] · Fig.10 A capacitive element driver 1000 is shown having a voltage source 1020 and a capacitive drive circuit 1010, the capacitive drive circuit 1010 being electrically connected to an electrical device / network 1030 through an impedance terminal to a node 1004 of the driver 1000 and through a node 1006 of the driver 1000, and wherein the node 1006 is electrically connected to a voltage source V of the driver 1000. DD10 (also referred to as voltage source 1020) has a positive terminal 1026,

[0065] · Fig.11 A capacitive element driver 1100 is shown having a voltage source and a capacitive drive circuit 1110 electrically connected to an n-terminal device / network 1130 through one terminal to a node 1104 of the driver 1100 and through a node 1108 of the driver 1100, wherein the node 1108 of the capacitive drive circuit 1110 is electrically connected to the voltage source V of the driver 1100. DD11 The negative terminal 1128, and

[0066] · Fig.12 A capacitive element driver 1200 is shown having a voltage source and a capacitive drive circuit 1210 electrically connected to an n-terminal device / network 1230 through one terminal to a node 1204 of the driver 1200 and through a node 1206 of the driver 1200, wherein the node 1206 is electrically connected to a voltage source V of the capacitive element driver 1200. DD12 The positive terminal 1226;

[0067] Figure 13-Figure 16 is a circuit diagram of an electrical system in which a capacitor driving circuit 1310, 1410, 1510, 1610 is electrically connected to a gate terminal of a transistor, wherein:

[0068] · Fig.13 A voltage source V connected to the capacitor driving circuit 1310 through the source terminal is shown. DD13 The negative terminal of transistor 1330,

[0069] · Fig.14 A voltage source V connected to the capacitor driving circuit 1410 through the source terminal is shown. DD14 The positive terminal of transistor 1430,

[0070] · Fig.15 A voltage source V connected to the capacitor driving circuit 1510 through the drain terminal is shown. DD15the positive terminal of transistor 1530, and

[0071] · Fig.16 A voltage source V connected to the capacitor driving circuit 1610 through the drain terminal is shown. DD16 The negative terminal of transistor 1630;

[0072] Figure 17-Figure 18 is a circuit diagram of an electrical system in which components 1740, 1840 may be driven by capacitor drive circuits 1710, 1810, respectively, through transistors 1730, 1830, respectively, the capacitor drive circuits 1710, 1810 being electrically connected to gate terminals of the transistors 1730, 1830, and wherein:

[0073] · Fig.17 A source terminal of transistor 1730 is shown connected to the source terminal of transistor 1730 through a terminal and a voltage source V of circuit 1710 is connected to the source terminal of transistor 1730 through another terminal. DD17 element 1740 between the positive and negative terminals, and

[0074] · Fig.18 A terminal is shown connected to the drain terminal of transistor 1830 and the voltage source V of circuit 1810 is connected to the drain terminal of transistor 1830 through the other terminal. DD18 Component 1840 between the positive and negative terminals;

[0075] Fig.19A and Fig.19B is a circuit diagram illustrating a high efficiency switching system 1900a, 1900b, wherein a capacitive drive element 1910a, 1910b may be electrically connected to a gate of a power switch such as a high frequency power switch 1930a, 1930b;

[0076] Fig. 20 is a circuit diagram showing a capacitor element driver unit 2000, which can be combined with other capacitor element driver units to construct a capacitor element driving circuit for further reducing the total energy dissipation of each output voltage driving cycle of the capacitor element driver;

[0077] Fig.21 is a circuit diagram showing an embodiment of a capacitor element driving circuit 2100 in which units 2101-1 and 2101-2 are electrically connected in series;

[0078] Figure 22A-22J is a circuit diagram of the dual-cell capacitor element driver circuit 2100 in operation, showing the full V O21 Embodiments of switches that may be deployed in the driver circuit 2100 during stages of a drive cycle;

[0079] Figure 22K It is shown Figure 22A-22JA diagram of an embodiment of a switching sequence method 2200 as shown in a circuit diagram of;

[0080] Figure 22L-1-Figure 22L-3 is a diagram showing the voltage distribution function of a closed switch group in an embodiment of a switching sequence of a driver unit in a selected drive circuit, wherein:

[0081] · Figure 22L-1 shows the voltage distribution function 2001-1 of a closed switch group in a driver unit x with one non-dissipative element (and four switches),

[0082] · Figure 22L-2 shows the voltage distribution function 2001-2 of a closed switch group in driver unit y with two non-dissipative elements (and five switches), and

[0083] · Figure 22L-3 shows the voltage distribution function 2001-q of a closed switch group in a generalized driver unit k having q non-dissipative elements (and q+3 switches);

[0084] Figure 22M-1A-Figure 22M-5B is a diagram showing a switching sequence method for selecting a drive circuit, showing the use of Figure 22L-1 , Figure 22L-2 , Figure 22L-3 The switching phases and modes of the symbols of the operation of the closed switch group outlined in the voltage distribution functions 2001-1, 2001-2, 2001-q are shown, wherein

[0085] · Figure 22M-1A Shown by Figure 22K A more detailed description of the voltages allocated to each stage of the switching sequence method 2200 for operating the driver circuit 2100 in stages of a complete output voltage drive cycle, wherein Figure 22M-1B The phases and switching modes in method 2200 are shown;

[0086] · Figure 22M-2A1 A method 2220 is shown of a switching sequence of a driver circuit [wxy] in stages of a complete output voltage drive cycle, wherein the circuit [wxy] has three driver units, each having a non-dissipative element, and Figure 22M-2A2 The phases and switching patterns in method 2220 are shown;

[0087] · Figure 22M-2B1 A method 2240 is shown of a switching sequence of a driver circuit [vwxy] in stages of a complete output voltage drive cycle, wherein the circuit [vwxy] has four driver units, each having a non-dissipative element, and Figure 22M-2B2 The phases and switching patterns in method 2240 are shown;

[0088] · Figure 22M-3A A method 2260 is shown of a switching sequence of a driving circuit [ab] in stages of a complete output voltage driving cycle, wherein the circuit [ab] includes a first unit [a] having one non-dissipative element and a second unit [b] having two non-dissipative elements, and Figure 22M-3B The phases and switching patterns in method 2260 are shown;

[0089] · Figure 22M-4A A method 2270 is shown of a switching sequence of a driving circuit [mn] at stages of a complete output voltage driving cycle, wherein the circuit [mn] includes a first unit [m] having two non-dissipative elements and a second unit [n] having a non-dissipative element, and Figure 22M-4B The phases and switching modes of method 2270 are shown; and

[0090] · Figure 22M-5A1 , Figure 22M-5A2 and Figure 22M-5B A method 2280 of a switching sequence of a drive circuit [mnp] in stages of a complete output voltage drive cycle is shown, wherein the drive circuit [mnp] comprises a first cell [m] and a second cell [n] each having two non-dissipative elements, and a third cell [p] having three non-dissipative elements, and wherein:

[0091] ο Figure 22M-5A1 A method 2280 of driving a circuit [mnp] from ground voltage to its peak voltage is shown,

[0092] ο Figure 22M-5A2 A method 2280 of driving a circuit [mnp] from its peak voltage to ground voltage is shown, and

[0093] ο Figure 22M-5B The phases and switching patterns in method 2280 are shown;

[0094] Fig.23A is a circuit diagram illustrating one embodiment of a capacitive element driving circuit 2300 constituting a more general embodiment of a storage capacitor enabled capacitive element driver 2100, wherein the circuit 2300 has K cells, each cell having at least one non-dissipative element (this embodiment is also referred to as a K-cell driving circuit 2300);

[0095] Fig. 23B is a circuit diagram showing one embodiment of a cell 2301 - i (2≤i≤(k-1)) for a K cell driver circuit 2300; and

[0096] Figure 24A-24B-3 is shown for the V O23A diagram of a portion of a switching sequence method 2400 of a generalized driver circuit 2300 of stage operation of a drive cycle, wherein the multi-cell circuit 2300 drives its output voltage from ground voltage to its peak voltage, wherein:

[0097] · Fig.24A shows the method stages and cell switching pattern for driving cell 2301-1 from ground voltage to its peak voltage, i.e., a portion of the start cell [1] stage 2412[1]-1 and the peak cell [1] stage 2414[1]; and

[0098] · Figure 24B-1 , Figure 24B-2 and Figure 24B-3 The method phases and cell switching patterns for driving the remaining cells 2301-z (2≤z≤K) from ground voltage to their peak voltages are shown, where Figure 24B-1 The starting unit [z] stage 2412 [z]-1 is shown, Figure 24B-2 Execution unit [z] stage 2413 [z]-1 is shown, and Figure 24B-3 A portion of the peak unit [z] stage 2414[z] is shown. DETAILED DESCRIPTION

[0099] Reference will now be made in detail to the present exemplary embodiments, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or like parts.

[0100] A basic non-dissipative element-enabled capacitive element driver

[0101] · Capacitor Driver 400

[0102] Figure 4 One embodiment of the invention shown has a capacitor element driver 400, also referred to as a non-dissipative element enabled capacitor element driver (or, in an illustrative but not necessarily preferred embodiment, the non-dissipative element may be a storage capacitor, a storage capacitor enabled capacitor element driver), which may also be referred to as a fractional capacitor element driver or a green capacitor element driver, for driving the voltage of a capacitor element 430 between two voltage levels such as a ground voltage and a power supply voltage.

[0103] The capacitive element driver 400 may have a series connection and be disposed at a voltage source 420 (also referred to as a power supply and voltage source V DD4 , used to provide a value V to the capacitor element driver 400 DD4 voltage) and capacitor 430 (also referred to as capacitor C O4 , or component C O4 ) between the first pair of switches SW 445 4[0] and SW4[1] , which is sized to maintain a voltage of value VO4 across its terminals. Figure 4 In the embodiment, the voltage source V DD4 is a component of the capacitive element driver 400 , but in other embodiments, it may be a unit that is separate from the capacitive driving circuit of the capacitive element driver 400 and may be electrically connected to the circuit.

[0104] Capacitive element 430 may be a capacitor or any element that can be positioned at the output terminal of a circuit and function as a capacitor there. For example, capacitive element 430 may be one or more capacitive loading elements. Figure 4 In the embodiment of the present invention, the capacitor element 430 is a unit that is separate from the capacitor driving circuit of the capacitor element driver 400 and can be electrically connected to the circuit, but in other embodiments, it can be a component of the capacitor element driver 400.

[0105] Switch SW 4[0] The negative terminal 428 of the voltage source 420 and the switch SW 4[0] With SW 4[1] A common node 416 between the switch SW 4[1] The capacitor C is electrically connected to the common node 416 and the terminal 432 (a terminal may also be referred to as an input or node) of the capacitor 430. O4 The other terminal 438 can be connected to the negative terminal 428 of the ground or voltage source.

[0106] The capacitive element driver 400 may have a second pair 440 of switches SW connected in series and disposed between the voltage source 420 and the capacitive element 430. 4[2] and SW 4[3] . Switch SW 4[3] The positive terminal 426 of the voltage source 420 and the switch SW are provided and electrically connected to the positive terminal 426 of the voltage source 420. 4[3] , SW 4[2] A common node 446 between the switch SW 4[2] The common node 446 and the input terminal 432 of the capacitor 430 are directly connected to the common node 446 and the input terminal 432 of the capacitor 430 .

[0107] The capacitive element driver 400 may also have a non-dissipative element 450, which (in an illustrative but not necessarily preferred embodiment) may be a storage capacitor C disposed between and electrically connected to the common nodes 416, 446. S4 When a transient current flows through capacitive element 430 , energy may be stored in or transferred from storage capacitor 450 .

[0108] The capacitor element driver 400 may also have or be electrically connected to a controller 460 for controlling the switch SW4[0] , SW 4[1] , SW 4[2] , SW 4[3] The activation and deactivation of O4 The switching stage sequence within the drive cycle (defined to ensure that the voltage V CS4 The controller 460 can be electrically connected to the switch SW through paths 470, 471, 472, and 473, respectively. 4[0] , SW 4[1] , SW 4[2] , SW 4[3] (exist Figure 4 ), to provide a control signal to signal the capacitive element driver 400 to start or stop the switching sequence method, as described below.

[0109] · Switching sequence

[0110] The controller 460 controls the switch SW 4[0] , SW 4[1] , SW 4[2] , SW 4[3] Activation and deactivation of Figure 5A-5G The set of stages shown in the full V O4 The capacitor element driver 400 is driven in a driving cycle:

[0111] In stage 501(1), switch SW 4[0] , SW 4[1] Close (and switch SW 4[2] , SW 4[3] disconnect) to reduce the voltage V O4 Drive to ground voltage ( Figure 5A );

[0112] In stage 501(2), switch SW 4[0] , SW 4[2] Close (and switch SW 4[1] , SW 4[3] disconnect) to make V o4 Drive to V CS4 ( Figure 5B );

[0113] In stage 501(3), switch SW 4[1] , SW 4[3] Close (and switch SW 4[0] , SW 4[2] disconnect) to V o4 Drive to (V DD4 -V CS4 )( Figure 5C);

[0114] In stage 501(4), switch SW 4[2] , SW 4[3] Close (and switch SW 4[0] , SW 4[1] disconnect) to V O4 Drive to V DD4 ( Figure 5D );

[0115] In stage 501 (5), switch SW 4[1] , SW 4[3] Close (and switch SW 4[0] , SW 4[2] disconnect) to V O4 Drive to (V DD4 -V CS4 )( Fig. 5F );as well as

[0116] In stage 501 (6), switch SW 4[0] , SW 4[2] Close (and switch SW 4[1] , SW 4[3] disconnect) to V O4 Drive to V CS4 ( Fig. 5F ).

[0117] Controller 460 may then return to stage 501 ( 1 ) to repeat the switching sequence. Figure 5G is shown at a full V O4 During the drive cycle, the voltage across the capacitive element 430 is driven to the switching sequence and V O4 A graph of the resulting values. Figure 5G Standard switching conventions are used to describe switching modes by identifying closed switches with the term "closed". Unless specified in the description of levels and phases below, switches not marked as "closed" are open. In the diagrams and tables later in this document, the term "closed" may be abbreviated as "C".

[0118] Figure 5H When the switch SW 4[3] , SW 4[1] Close (and switch SW 4[0] , SW 4[2] 1 ( 3 ) and ( 5 ) when the capacitor element driver 400 is in operation. Figure 5H , through the switch SW 4[3] , SW 4[1] The storage capacitor C S4 In series with the capacitor element C O4 and voltage source VDD4 When the transient current flows through the capacitor element C O4 When the energy is stored in the storage capacitor C S4 middle.

[0119] Fig.5I When the switch SW 4[0] , SW 4[2] Close (and switch SW 4[3] , SW 4[1] 1 (2) and (6), the capacitor element driver 400 operates as in stages 501(2) and 501(6). Fig.5I , through the switch SW 4[0] and SW 4[2] The storage capacitor C S4 With the capacitor C O4 In parallel. Stored in storage capacitor C S4 The energy in the capacitor is transferred to the capacitor C O4 .

[0120] The switching sequence applied in stages 501(1) through 501(6) maintains the average current on storage capacitor 450 at zero and O4 While the driving cycle is in progress, the average value of the voltage on the storage capacitor 450 is kept constant. Fig. 6A 5 is a graph showing the voltage V input to the capacitor 430 corresponding to the operation of the capacitor driver 400 according to the stages 501 ( 1 ) to 501 ( 6 ). O4 Graph 600 of waveform 602 of V is shown. Graph 600 shows the V provided by the operation of stages 501(1)-501(6). O4 drive cycle, which makes the voltage V O4 Gradually increase to the peak voltage V DD4 (the voltage provided by voltage source 420), and then the voltage V O4 Gradually reduce to ground voltage.

[0121] This switching sequence of stages 501(1)-501(6) ensures that the storage capacitor C S4 The average current (and therefore the net charge) remains zero. O4 The net charge entering the storage capacitor 450 during the drive cycle is equal to zero, and V can be calculated as follows CS4 The average value of (Equation 2):

[0122] Net charge C S4 =[-C O4 V CS4 +C O4 (V DD4 -2V CS4 )-CO4 V CS4 +C O4 (V DD4 -2V CS4 )] (1),

[0123] Make the net charge C S4 =0

[0124] [-C O4 V CS4 +C O4 (V DD4 -2V CS4 )-C O4 V CS4 +C O4 (V DD4 -2V CS4 )]=0

[0125] →V CS4 =V DD4 / 3. (2).

[0126] Therefore, the voltage V O4 Each level is V DD4 The energy dissipated in each switch can be expressed in the algorithm as Equation 3:

[0127]

[0128] Figure 6B It is shown Fig. 6A 650 of waveform 602 with the y-axis labeling modified accordingly.

[0129] like Figure 5A-5G As shown, a complete V O4 The six-stage switching sequence in the drive cycle to achieve total energy dissipation (Equation 4):

[0130]

[0131] In conventional drive devices, systems, and processes implemented in circuit 100, a complete V O1 The total energy dissipated in the drive cycle is E t_circuit_100 =C O1 V DD1 2 Therefore, the capacitor element driver 400 ( Figure 4 ) implemented in the capacitor element driving device, system and process to each V O4The total energy dissipation of the drive cycle is reduced by a factor of 3. Furthermore, the drive apparatus, system, and process implemented in capacitor element driver 400 do not introduce additional current, and therefore do not introduce additional conduction losses caused by including an inductor in a conventional resonant capacitor element driver, such as in circuit 200 ( Figure 2A ) and circuit 300( Figure 3A ) in the drive device, system and process implemented in ). In addition, unlike the conventional resonant capacitor element drive shown in circuits 200 and 300, the switches used in capacitor element driver 400 can be built on the same substrate (e.g., silicon), thereby further minimizing the cost and size of the capacitor element drive.

[0132] Since the storage capacitor voltage V CS4 The average value of V is maintained between the power supply voltage and ground voltage, thus resulting in energy savings provided by using a storage capacitor in the capacitive element driver 400. CS4 When V is equal to the power supply voltage or the voltage to ground, no energy saving is achieved. For the case of the capacitor element driver 400, when V CS4 The average value of the power supply voltage V DD4 When the power consumption is 1 / 3 of that, energy saving is optimal.

[0133] Generalized non-dissipative element enabled capacitive element driver

[0134] · Capacitor Driver 700A

[0135] although Figure 4 An embodiment of an improved capacitive element driver is shown, wherein a single non-dissipative element 450 and four switches are included in the capacitive element driver 400. Fig. 7A A generalized embodiment of a non-dissipative element enabled capacitive element driver is shown, wherein the capacitive element driver 700A has n non-dissipative elements (which may be storage capacitors in an illustrative but not necessarily preferred embodiment) (C S7A[1] , C S7A[2] , C S7A[3] , …, C S7A[n-1] , C S7A[n] ), n+3 switches (SW 7A[0] , S.W. 7A[1] , S.W. 7A[2] ,…,SW 7A[n] , S.W. 7A[n+1] , S.W. 7A[n+2] ); the voltage source 720A is used to provide a voltage V DD7A , and capacitor element 730A (also referred to as capacitor element C O7A , or component C O7A) is included in the capacitive element driver 700A. The number n can be any positive integer. As described above with respect to the capacitive element 430, the capacitive element 730A can be a capacitor or any element that can be positioned at the output terminal of the circuit and used as a capacitor. For example, the capacitive element 730A can be one or more capacitive loading elements.

[0136] Like the capacitor element driver 400, the capacitor element driver 700A may have a voltage source 720A (also referred to as a voltage source V DD7A ), for providing a voltage of a value as a component of the capacitor element driver 700A, but in other embodiments, it can be a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driver 700A. In addition, like the capacitor element 430, the capacitor element 730A is a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driver 700A, but in other embodiments, it can be a component of the capacitor element driver 700A.

[0137] Switch SW 7A[0] , SW 7A[1] connected in series and electrically connected to a voltage source 720A (for providing a voltage V DD7A ) and one terminal 732A of the capacitor 730A, and is disposed between them to maintain a voltage V O7A . Switch SW 7A[N+1] , SW 7A[N+2] is also connected in series and is electrically connected to and disposed between the positive terminal 726A of the voltage source 720A and the input terminal 732A of the capacitive element 730A. O7A The other terminal 738A can be electrically connected to ground or the negative terminal 728A of the voltage source 720A.

[0138] Switch SW 7A[0] The negative terminal 728A of the voltage source 720A and the switch SW 7A[0] , SW 7A[1] The switch SW is electrically connected to the common node 705A (1) between them. 7A[n+2] The positive terminal 726A of the voltage source 720A and the switch SW may be provided 7A[n+1] , SW 7A[n+2] The common node 705A(n+1) therebetween is electrically connected to them.

[0139] n storage capacitors may be electrically connected in series and disposed between common nodes 705A(1) and 705A(n+1), wherein the storage capacitor C S7A[x](where x ranges from 1 to n) is disposed between nodes 705A(x), 705A(x+1) and electrically connected to them. In addition, a switch SW 7A[x] , (where x ranges from 1 to n+1) can be set between node 705A(x) and capacitor element C O7A Specifically,

[0140] Switch SW 7A[1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the switch SW 7A[0] and SW 7A[1] The public node 705A (1);

[0141] Switch SW 7A[2] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[1] and CS 7A[2] The public node 705A (2);

[0142] Switch SW 7A[3] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[2] and CS 7A[3] (not shown) a common node 705A (3);

[0143] Switch SW 7A[n-1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[n-2] (not shown) and CS 7A[n-1] The public node 705A (n-1);

[0144] Switch SW 7A[n] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the storage capacitor CS can be electrically connected to the other terminal. 7A[n-1] and CS 7A[n] 705A(n); and

[0145] Switch SW 7A[n+1] One terminal can be electrically connected to the capacitive element C O7A The input terminal 732A of the switch SW 7A[n+1] , SW 7A[n+2]The common node 705A(n+1) of .

[0146] The capacitive element driver 700A also has a controller 760A or is electrically connected to the controller 760A via a path system 770A, and the controller 760A is arranged to provide a control signal to send a signal to the capacitive element driver 700A to start or stop the switching sequence method. The path system 770A electrically connects the controller 760A to the switch to allow the controller 760A to switch at a full V O7A The storage capacitor, the voltage source 720A and the capacitive element are selectively connected in stages during the drive cycle, wherein the switch is switched at a full V O7A The stages are switched on and off in combination in a sequence within a drive cycle. The stages can be implemented in a sequencing method with multiple phases; the method is defined to ensure that the average value of the voltage of the storage capacitor does not change over time.

[0147] · Switching sequence

[0148] Reference Fig. 8A , graph 800 shows the voltage V input to capacitor element 730A. O7A The waveform 802 corresponds to the operation of the capacitive element driver 700A according to the stages 801(1)-801(4n+2) and the switching sequence method disclosed herein. The graph 800 shows V O7A drive cycle, which makes the voltage V O7A Gradually increase to the peak voltage V DD7A (voltage provided by voltage source 720A), then voltage V O7A Gradually reduce to ground voltage.

[0149] The switching sequence method 80 requires a full V O7A The switches are activated in combination during the drive cycle to ensure that the voltage V CS7A[1] , V CS7A[2] , V CS7A[3] , …, V CS7A[n-1] , and V CS7A[n] The average value of does not change over time. Figure 8B , graph 850 shows the available O7A The stage controlling the n+3 switches in the drive cycle includes the phase of the switching method associated with the selected stage, the switches activated during the selected state, the V on the capacitive element 730A O7A The voltage to which the selected stage is driven.

[0150] Figure 8B A closed switch is identified with the term "C," which, as noted above, is short for "closed." Unless otherwise specified in the description of the stages and phases below, switches not marked with a "C" are open.

[0151] Switching sequence phase 810 of stages 801(1) to 801(n+1): Phase 810 constitutes the first phase of the switching sequence method 80, wherein the switch SW 7A[0] (electrically connected to a voltage source V DD7A of burden The switch at terminal 728A) closes and remains closed, and the switch SW 7A[n+2] (electrically connected to a voltage source V DD7A The switch at the positive terminal 726A of the transistor is disconnected until the stage 801(n+1) is completed.

[0152] ο Switching sequence sub-stage 811 of stage 801(1): Switch SW 7A[1] Close until V O7A is driven to ground level (eg, 0V).

[0153] ο Switching sequence sub-stage 812 of stage 801(2) to 801(n+1): Switch SW 7A[2] To SW 7A[n+1] The stages operate sequentially, and during stage 801(s) (s from 2 to n+1), switch SW 7A[w] (w also closes from 2 to n+1) until V O7A Driven to

[0154] It can be seen that through sub-stage 812, the value of w increases as s increases. To illustrate the capacitive element driver 700A:

[0155] In stage 801(2), switch SW 7A[2] First, it closes, which drives V O7A To VC S7A[1] .

[0156] In stage 801(3), switch SW 7A[3] Closed, it drives V O7A arrive

[0157] In stage 801(4), switch SW 7A[4] closed, which drives V O7A arrive

[0158] The switching sequence in sub-phase 812 continues until switch SW 7A[n+1] closed, which drives V O7A arrive

[0159] Switching sequence phase 820 of stage 801(n+2) to 801(3n+2): Phase 820 constitutes the second phase of the switching sequence method 80, in which the switch SW 7A[0] Open, and switch SW 7A[n+2]Close until stage 801(3n+2) ends. For this and the switch activation transitions described later, the conventional practice of opening the currently closed switch and then closing the currently open switch is described; first open the currently closed switch SW 7A[n+2] , and then closes the currently open switch SW 7A[0] , preventing current from flowing from the voltage source through all non-dissipative elements during switch activation transitions. Switching sequence sub-phase 821 and switching sequence sub-phase 822 constitute a first sub-phase of second phase 820 , and switching sequence sub-phase 823 constitutes a second sub-phase of second phase 820 .

[0160] ο Switching sequence sub-phase 821 for stage 801(n+2) to 801(2n+1): During a stage within the stage range [specifically, stage 801(s), s is (n+2) to (2n+1)], a switch within the switch range (SW 7A[1] To SW 7A[n] ), or more generally, the switch SW 7A[x] (x is 1 to n) closed sequentially until V O7A Driven to until.

[0161] It can be seen that, through sub-stage 821, the value of x increases as s increases. In summary, for the selected switch SW 7A[x] :

[0162] x = a + (sb), where

[0163] a is the first switch in the switching range in the selected subphase,

[0164] s is the current level, and

[0165] b is the first level in the sub-stage.

[0166] In the switching sequence sub-phase 821, where a=1 and b=n+2:

[0167] x=1+[s-(n+2)]

[0168] =1+sn-2

[0169] =s-n+1-2

[0170] =s-(n+1)

[0171] →SW 7A[x] =SW 7A[s-(n+1) ]

[0172] To illustrate the capacitive element driver 700A:

[0173] In stage 801(n+2), switch SW 7A[1] Closed, it drives VO7A arrive

[0174] In stage 801(n+3), switch SW 7A[2] Closed, it drives V O7A arrive

[0175] In stage 801(n+4), switch SW 7A[3] Closed, it drives V O7A arrive

[0176] The switching sequence in sub-phase 821 continues until switch SW 7A[n] Close to drive V O7A to (V DD7A -V C7A[n] ).

[0177] ο Switching sequence sub-stage 822 of stage 801(2n+2): During stage 801(2n+2), switch SW 7A[0] Open, and switch SW 7A[n+1] Close until V O7A The power supply voltage V driven to the driver circuit DD7A .

[0178] ο Switching sequence sub-stage 823 of stage 801(2n+3) to 801(3n+2) : During a stage within the stage range [specifically, stage 801(s), s from (2n+3) to (3n+2)], switches within the switch range (SW 7A[n] To SW 7A[i] ), or more generally switch SW 7A[y] (where y is n to 1) is closed in switching mode to achieve a voltage from the supply voltage V DD7A The switching pattern for implementing the step-down constitutes the reverse of the order of steps in the switching sequence of sub-stage 821. Stage 801(s) operates so that the associated switch SW 7A[y] Close until V O7A Driven to Continuing forward, the practice of adding a step-down to a switching pattern showing a step-up in voltage may be referred to as operating the switching pattern "in reverse order." Additionally, herein, a "switching pattern" may also be referred to as a "switched pattern," a "switch activation pattern," and a "switch-activated pattern."

[0179] It can be seen that, through sub-stage 823, the value of y decreases as s increases. In summary, for the selected switch SW 7A[y] :

[0180] y = a - (sb), where:

[0181] a is the first switch in the switching range in the selected subphase,

[0182] s is the current level, and

[0183] b is the first level in the selected substage.

[0184] In the switching sequence sub-phase 821, where a=n and b=(2n+3):

[0185] y=n-[s-(2n+3)]

[0186] =n-s+2n+3

[0187] =3n+3-s

[0188] →SW 7A[y] =SW 7A[3n+3-s]·

[0189] To illustrate the capacitive element driver 700A:

[0190] In stage 801(2n+3), switch SW 7A[n] First, it closes, which V O7A Drive to (V DD7A -V CS7A[n] ).

[0191] In stage 801(2n+4), switch SW 7A[n-1] Closed, it will V O7A Drive to

[0192] In stage 801(2n+5), switch SW 7A[n-2] Closed, it will V O7A Drive to

[0193] The switching sequence in sub-phase 823 continues until SW 7A[1] Close to set V O7A Drive to

[0194] Switching sequence phase 830 of stage 801(3n+3) to 801(4n+2): Phase 830 constitutes the third phase of the switching sequence method 80, in which the switch SW 7A[n+2] Open, and switch SW 7A[0] closure.

[0195] During the stages within the stage range of the switching sequence phase 830 [specifically, stage 801(s), s from (3n+3) to (4n+2)], the switches within the switching range are switched from SW 7A[n+1] To SW 7A[2] , or more generally, the switch SW7A[z] (z from (n+1) to 2) is closed in reverse order compared to sub-stage 812. Stage 801(s) operates so that the associated switches SW 7A[z] Close until V O7A Driven to

[0196] It can be seen that through stage 830, the value of z decreases as s increases.

[0197] In summary, for the selected switch SW 7A[Z] :

[0198] z = a - (sb), where:

[0199] a is the first switch in the switching range in the selected phase,

[0200] s is the current level, and

[0201] b is the first level in the stage.

[0202] In the switching sequence phase 830, where a=n+1 and b=(3n+3):

[0203] z=(n+1)-[s-(3n+3)]

[0204] =n+1-s+3n+3

[0205] =4n+4-s

[0206] →SW 7A[z] =SW 7A[4n+4-s)] .

[0207] To illustrate the capacitor element driver 700A:

[0208] In stage 801(3n+3), switch SW 7A[n+1] Closed, it will V O7A Drive to

[0209] In stage 801(3n+4), switch SW 7A[n] Closed, it will V O7A Drive to

[0210] In stage 801(3n+5), switch SW 7A[n-1] Closed, it will V O7A Drive to

[0211] The switching sequence in phase 830 continues until SW 7A[2] Close to set V O7ADrive to VC S7A[1] .

[0212] Switching sequence stage 840: Phase 840 , which constitutes the fourth phase of the switching sequence method 80 , wherein the switch may return to the switching sequence phase 810 to restart the sequence.

[0213] In summary, the switching sequence phase method is a complete V O7A There are 2(2n+1) stages in the drive cycle to ensure that the storage capacitor C S7A[u] The average current, so the net charge Q remains zero (e.g., QC S7A[u] =0), where u is any integer from 1 to n. Under the above 2(2n+1) level, V O7A The corresponding waveform is as follows Fig. 8A shown.

[0214] When Q CS7A[u] = 0 at a full V O7A When the driving cycle is equal, V CS7A[u] The average value of can be calculated as follows:

[0215]

[0216]

[0217] in Independent of u;

[0218] =V CS7A[v] , for u≠v, where u and v are any integers from 1 to n.

[0219] When V CS7A[u] =V CS7A ,{V DD7A -2nV CS7A -V CS7A}=0.

[0220]

[0221] Therefore, it can be seen that the voltage V O7A The increment of change in each level is V DD7A / [2n+1]; and the energy dissipated by the switch in each stage is shown in equation (5):

[0222]

[0223] Each complete V O7A The drive cycle has 2(2n+1) stages, and the total energy dissipation is:

[0224]

[0225] In conventional drive schemes (e.g. Figure 1A circuit 100), a complete V O1 The total energy dissipated in the drive cycle is E circuit 1 =C O1 V DD1 2 In the case of n storage capacitors and the switching sequence disclosed herein, the capacitive element driver 700A converts each V O7A The total energy dissipation of the drive cycle is reduced by a factor of (2n+1).

[0226] Other generalized non-dissipative components enable capacitive component drivers

[0227] As mentioned above, Fig. 7A A generalized embodiment of a capacitive element driver is shown, wherein the capacitive element driver 700A has a capacitive element 730A (also referred to as C O7A ), n non-dissipative elements (in an illustrative but not necessarily preferred embodiment, storage capacitors), and n+3 switches. The number n can be any positive integer.

[0228] · Capacitor Driver 400

[0229] The previously described Figure 4 An embodiment of a capacitive element driver is shown, wherein a single storage capacitor 450 (n=1) and four (n+3) switches SW are included in the capacitive element driver 400. 4[0] , SW 4[1] , SW 4[2] , SW 4[3] The capacitive element drives 400 through the full V O4 During operation of a drive cycle, the embodiment of the capacitive element driver 400 undergoes the stages and switching sequence phases and sub-phases disclosed with reference to the capacitive element driver 700A. For example, with reference to Figure 5G , the capacitive element driver 400 switches in six stages, which corresponds to 2(2n+1) stages of the switching sequence phases outlined for the capacitive element driver 700A. In addition, the stages that the capacitive element driver 400 goes through when switching correspond to the switching sequence phases outlined for the capacitive element driver 700A. Assuming n=1 for the capacitive element driver 400:

[0230] • Stage 501(1) corresponds to stage 801(1) (stages 811, 840).

[0231] Stage 501(2) corresponds to stages 801(2) and 801(n+1) (the first and last stages of phase 812, respectively).

[0232] Stage 501(3) corresponds to stages 801(n+2) and 801(2n+1) (the first and last stages of phase 821, respectively).

[0233] • Stage 501(4) corresponds to stage 801(2n+2) (stage 822).

[0234] Stage 501(5) corresponds to stages 801(2n+3) and 801(3n+2) (the first and last stages of phase 823, respectively).

[0235] Stage 501(6) corresponds to stages 801(3n+3) and 801(4n+2) (the first and last stages of phase 830, respectively).

[0236] · Capacitor Driver 780

[0237] Figure 7B Another embodiment of a capacitive element driver for an example (n=3) is shown, wherein the capacitive element driver 780 has a capacitive element 790 (also referred to as C O7B ), three (n=3) storage capacitors CS 7B[1] , CS 7B[2] , CS 7B[3] and six (n+3=6) switches SW 7B[0] , SW 7B[1] , SW 7B[2] , SW 7B[3] , SW 7B[4] and SW 7B[5] , with: switch SW 7B[0] , SW 7B[1] The common node 785 (1) between the capacitor CS 7B[1] , CS 7B[2] and switch SW 7B[2] A common node 785(2) between capacitor CS 7B[2] , CS 7B[3] and switch SW 7B[3] The common node 785(3) between the switch SW 7B[4] and SW 7B[5] The common node 785 (4) between the capacitor element 790 has a switch SW 7B[1] , SW 7B[2] , SW 7B[3] , SW 7B[4] The capacitor element driver 780 has a controller 781 or is electrically connected to the controller 781 via a path system 783 for electrically connecting the controller 781 to the switch to allow the controller 781 to operate at a full VO7B The storage capacitor is selectively connected to the positive terminal 786 and the negative terminal 788 of the voltage source 787 in a switching sequence during the driving cycle so that the voltage VC of the storage capacitor S7B[1] VC S7B[2] VC S7B[3] The average value does not change over time.

[0238] Already in Figure 7B The capacitor element driver 780 is shown in FIG. Fig. 7A The generalized capacitive element driver 700A, including its components and nomenclature, and therefore will not be described in detail here. Figure 8C shows a graph 880 which illustrates the voltages that can be used at the full V O7B The stages of controlling n+3=6 switches in a drive cycle include the phase of the switching method associated with the selected stage, the switches activated during the drill state, the V at the capacitive element 790 during the selected stage, and the V at the capacitive element 790. O7B The voltage to which it is driven.

[0239] The capacitive element drives 780 through the full V O7B During operation of a drive cycle, the embodiment of the capacitive element driver 780 undergoes the same stage and switching sequence phases and sub-phases as disclosed with reference to the capacitive element driver 700A. Figure 8C , the capacitive element driver 780 switches in fourteen stages, which correspond to the 2(2n+1) stages of the switching sequence phases outlined for the capacitive element driver 700A, and the same reference numerals are provided for ease of presentation. In addition, the stages that the capacitive element driver 780 goes through when switching correspond to the switching sequence phases outlined for the capacitive element driver 700A, and therefore the reference numbers for the stages and switching sequence phases and sub-phases of the capacitive element driver 700A are used here for the capacitive element driver 780. Assuming n=3 for the capacitive element driver 780:

[0240] Capacitor driver 780 V O7B The drive cycle begins at stage 801 ( 1 ) (phase 811 ).

[0241] Capacitive element driver 780 undergoes stage 812 in stages 801(2)-801(4).

[0242] Capacitive element driver 780 undergoes stage 821 in stages 801(5)-801(7).

[0243] Capacitive element driver 780 undergoes stage 822 in stage 801 (8).

[0244] Capacitive element driver 780 undergoes stage 823 in stages 801(9)-801(11).

[0245] Capacitive element driver 780 undergoes phase 830 in stages 801(12)-801(14).

[0246] • Capacitive element driver 780 returns to stage 801 ( 1 ) at stage 840 .

[0247] · Capacitor Driver 700C

[0248] Figure 7C A generalized embodiment of a non-dissipative element enabled capacitive element driver 700C is shown, which differs from the capacitive element driver 700 in that the first and last switches of the driver (which would be switches SW 7C[0] and SW 7C[n+2] ) is closed or replaced with a hardwired connection. 7C[1] , S.W. 7C[2] ,…,SW 7C[n+1] ) can be arranged in sequence (SW 7C[1] , S.W. 7C[2] ,…,SW 7C[n+1] ) are opened and closed one at a time to connect the capacitive element C O7C The voltage rises from ground (0V) to V DD7C The switches can be arranged to operate in reverse sequence (SW 7A[n+1] , S.W. 7C[n] ,…,SW 7C[1] ) one at a time, opening and closing the C O7C The voltage from V DD7C lowered to ground (0V).

[0249] Like the capacitor element driver 700A, the non-dissipative element enabled capacitor element driver 700C uses E LOSS The energy loss per drive cycle (E LOSS[7C] )

[0250] E loss[7C] =C O7C *(V DD7C ) 2 / (n+1).

[0251] Capacitive element driver 700C has n non-dissipative elements (which may be storage capacitors in an illustrative but not necessarily preferred embodiment) (C S7C[1] , C S7C[2] , C S7C[3] , …, CS7C[n-1] , C S7C[n] ); n+1 switches (SW 7C[1] , S.W. 7C[2] ,…,SW 7C[n] , S.W. 7C[n+1] ); used to provide voltage V DD7C The voltage source 720C and the capacitor element 730C (also referred to as the capacitor element C O7C , or component C O7C ) is included in the capacitive element driver 700C. The number n can be any positive integer. The capacitive element 730C can be a capacitor or any element that can be positioned at the output terminal of the circuit and used as a capacitor there. For example, the capacitive element 730C can be one or more capacitive loading elements.

[0252] Therefore, in the driver 700C, one or more non-dissipative elements are connected in series between the terminals of the voltage source, and one end of two or more switches is connected to the input terminal of the capacitive element. 7C[1] The other end of the voltage source 720C may be electrically connected to the negative terminal 728C and the first non-dissipative element C S7C[1] The common node 705C[1] between the two switches, and the last switch SW 7C[n+1] The other end can be electrically connected to the positive terminal 726C of the voltage source and the last non-dissipative element C S7C[n] The common node 705C[n+1] between them.

[0253] The capacitive element driver 700C may have a voltage source 720C (also referred to as a voltage source V DD7C ), for providing a voltage of a value as a component of the capacitor element driver 700C, but in other embodiments, it can be a unit separate from the capacitor driving circuit of the capacitor element driver 700C and electrically connectable to them. In addition, the capacitor element 730C can be a unit separate from the capacitor driving circuit of the capacitor element driver 700C and electrically connectable to them, but in other embodiments, it can be a component of the capacitor element driver 700C.

[0254] Switch SW 7C[1] Electrically connected to a voltage source 720C (for providing a voltage V DD7C ) and one terminal 732C of the capacitor 730C and is arranged between them to maintain the voltage V across the terminals thereof O7C . Switch SW 7C[n+1] The capacitor C is electrically connected to the positive terminal 726C of the voltage source 720C and the input 732C of the capacitor 730C and disposed therebetween. O7C The other terminal 738C can be electrically connected to ground or the negative terminal 728C of the voltage source 720C.

[0255] The negative terminal 728C of the voltage source 720C may be electrically connected to the non-dissipative element C S7C[1] and switch SW 7C[1] The common node 705C(1) between the positive terminal 726C of the voltage source 720C can be electrically connected to the non-dissipative element C S7C[n] and switch SW 7C[n+1] The common node 705C(n+1) between them.

[0256] n storage capacitors may be electrically connected in series and disposed between common nodes 705C(1) and 705C(n+1), wherein the storage capacitor C S7C[x] (where x ranges from 1 to n) is disposed between nodes 705C(x), 705C(x+1) and electrically connected to them. In addition, a switch SW 7C[x] (where x is between 1 and n+1) can be set at the node 705C(x) and the capacitive element C O7C The operation of the driver 700C allows the voltage of the capacitive element to be driven between two voltage levels, such as a ground voltage and a power supply voltage, by transferring the energy stored in the non-dissipative element of the driver to the capacitive element in a stepwise manner, and by alternately turning on and off two or more switches of the driver in a sequence order to drive the voltage of the capacitive element between the two voltage levels. Specifically,

[0257] Switch SW 7C[1] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[1] The common node 705C(1) of the switch SW and the negative terminal 728C of the voltage source 720C are connected when the other switches are open. 7C[1] The closing of causes the non-dissipative components of driver 700C to be "bypassed", passing the ground voltage of negative terminal 728C to capacitive element C O7C Input 732C;

[0258] Switch SW 7C[2] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[1] and CS 7C[2] The common node 705C (2) of the switch SW is open when the other switches are open. 7C[2] The closure of the CS7C[1] The voltage is transferred to the capacitor element C O7C Input;

[0259] Switch SW7C[3] One terminal (not shown) may be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[2] , CS 7C[3] (not shown) of the common node 705C (3), when the other open switches are open, the switch SW 7C[3] The closure of the CS7C[1] +V CS7C[2] The voltage is transferred to the capacitor element C O7C Input;

[0260] Switch SW 7C[n] One terminal can be electrically connected to the capacitive element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[n-1] (not shown) CS 7C[n] When the other switches are open, switch SW 7C[n] The closure of The voltage level is transferred from the non-dissipative element to the capacitive element C O7C Input;

[0261] Switch SW 7C[n+1] One terminal can be electrically connected to the non-dissipative element C O7C The input 732C, and the other terminal can be electrically connected to the non-dissipative element CS 7C[n+1] and the common node 705C(n+1) of the positive terminal 726C of the voltage source 720C. When the other switches are open, the switch SW 7C[n+1] The closing of causes the non-dissipative components of driver 700C to be "bypassed", passing the supply voltage at positive terminal 726C to capacitive element C O7C Input 732C; and

[0262] After the peak voltage is obtained through this switch activation sequence, switch SW 7C[1] To SW 7C[n+1] Can be in reverse order (SW 7C[n+1] To SW 7C[1] ) are closed one at a time to drive V O7C Return to the ground voltage level of negative terminal 728C.

[0263] The capacitive element driver 700C also has a controller not shown or is electrically connected to a controller not shown via a path system not shown, the controller being configured to provide a control signal to signal the capacitive element driver 700C to start or stop the switching sequence method. The path system electrically connects the controller to the switch to allow the controller to switch on or off at a full V O7CThe storage capacitor, the voltage source 720C and the capacitive element are selectively connected in stages within the drive cycle, wherein a full V O7C The switches are turned on and off in a sequence of stages within a drive cycle. As with driver 700A, the stages can be implemented in a sequencing method with multiple phases; the method is defined to ensure that the average value of the voltage of the storage capacitor does not change over time.

[0264] In a circuit with a single non-dissipative element and two switches, the other end of the first switch can be electrically connected to one end of the single non-dissipative element, and the other end of the last switch can be electrically connected to the other end of the single non-dissipative element. In a circuit with n non-dissipative elements and n+1 switches, for the remaining switches SW [i] (1≤i≤n), switch SW [i] One end of may be electrically connected to the input terminal of the capacitive element, and the other end may be electrically connected to the non-dissipative element c [i-1] 、c [i] The common nodes between them.

[0265] · Capacitor Driver 700D / 700E

[0266] Fig.7D and Fig. 7E Other embodiments of the capacitive element driver of the present invention are shown. In capacitive element drivers 700D and 700E, storage capacitors (non-dissipative elements) are not limited to having their terminals connected together with one terminal of the first non-dissipative element (in series, electrically and directly connected to a terminal of the voltage source) and one terminal of the last non-dissipative element (in series, electrically and directly connected to another terminal of the voltage source). In drivers 700D and 700E, the terminals of the non-dissipative elements can be connected to other nodes. For example, they can be electrically connected to the negative terminal of the voltage source (ground), or the positive terminal of the voltage source, or any number of other connections or combinations thereof. The terminals of the non-dissipative elements of the driver can be electrically connected to any number of other nodes in the ground, voltage source or circuit, for example, low impedance voltage nodes. In addition, as recognized by those of ordinary skill in the field of circuit design, the terminals of some non-dissipative elements can be connected in series, while others are connected to other common nodes. Typically, the terminals of the non-dissipative elements of the driver can be electrically connected directly or indirectly between the terminals of the voltage source.

[0267] In other embodiments of the driver having more than two non-dissipative elements and more than three switches, as described above, one end of the switch can be electrically connected to the input terminal of the capacitive element, wherein the other ends of the first switch and the last switch can be electrically connected to the negative terminal and the positive terminal of the voltage source, respectively. The other embodiments disclosed herein differ from the previously disclosed embodiments in that:

[0268] One or more non-dissipative elements are not connected in series between the voltage source terminals;

[0269] The other end of one of the first switch and the last switch may be electrically connected to a terminal of the voltage source, but the other end is not electrically connected to the non-dissipative element;

[0270] In the specific examples of drivers 700D and 700E, the other end of the other of the first switch and the last switch may be indirectly electrically connected to the voltage source via a set of common nodes (having the common node associated with one of the non-dissipative elements and disposed between the other terminal of the voltage source and one end of the target non-dissipative element); and

[0271] For the remaining switches SW [i] (1≤i≤n), switch SW [i] One end of may be electrically connected to the input terminal of the capacitive element, and the other end may be electrically connected to the non-dissipative element C [i-1] the other end.

[0272] exist Fig.7D In the driver 700D shown in FIG. 1 , the first switch SW 7D[1] The other end of the 705D can be electrically connected to a voltage source 720D through a set of common nodes 705D(1), ..., 705D(n), wherein the non-dissipative element C S7D[i] The associated generalized common node 705D(i) may be provided between the negative terminal 728D of the voltage source 720D and the target non-dissipative element SW 7D[i] and the last switch SW [n+1] The other end of can be electrically connected to the positive terminal 726D of the voltage source, but its other end is not electrically connected to the non-dissipative element.

[0273] The operation of driver 700D allows the voltage of the capacitive element to be driven between two voltage levels, such as a ground voltage and a power supply voltage, by transferring the energy stored in the non-dissipative element to the capacitive element in a stepwise transfer manner by alternately turning on and off two or more switches in a sequence order to drive the voltage of the capacitive element between the two levels. Driver 700D may need to initially operate over multiple switching cycles / sequences in order for the n non-dissipative elements of driver 700D to reach steady-state (equilibrium) values ​​that are similar to those reached by the non-dissipative elements of driver 700A from the start of driver operation. During the initial switching operation of driver 700D, charge will be redistributed from the capacitive elements to the n non-dissipative elements of driver 700D until the n non-dissipative elements reach their steady-state (equilibrium) values. When the n non-dissipative elements of driver 700D reach steady-state (equilibrium) values, the voltage they can provide becomes the voltage V DD7D Integer multiples of, specifically, V CS7D[i]=V DD7D *i / (n+1), where i is the ith non-dissipative element in the set of n non-dissipative elements of the driver 700D. After initial operation of multiple switching cycles / sequences, the switching method of the driver 700D may produce the following results:

[0274] When the switch SW 7D[1] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D causes the ground voltage at negative terminal 728D to be passed to capacitive element C O7D Input 732D;

[0275] When the switch SW 7D[2] When the switch is closed and the other switches are open, it is equal to V CS7D[1] The voltage is transferred to the capacitor element C O7D Input;

[0276] When the switch SW 7D[3] (not shown) is closed and the other switches are open, equal to V CS7D[2] The voltage is transferred to the capacitor element C O7D input; and

[0277] When the switch SW 7D[n] When one switch is closed and the other is open, it is equal to V CS7D[n] The voltage is transferred to the capacitor element C O7D input; and

[0278] When the switch SW 7D[n+1] When the switches are closed and the other switches are open, the “bypassing” of the non-dissipative components of driver 700D causes the supply voltage V at positive terminal 726D to DD7D Passed to the capacitor element C O7D Input terminal 732D.

[0279] The switching method for driver 700D may include a reverse switching process to drive the voltage of the capacitive element back to the initial level. Specifically:

[0280] When the switch SW 7D[n] When one switch is closed and the other is open, it is equal to V CS7D[n] The voltage is transferred to the capacitor element C O7D Input;

[0281] When the switch SW 7D[3] (not shown) is closed and the other switches are open, equal to V CS7D[2] The voltage is transferred to the capacitor element C O7D Input;

[0282] When the switch SW 7D[2]When closed and other switches are open, it is equal to V CS7D[1] The voltage is transferred to the capacitor element C O7D input; and

[0283] When the switch SW 7D[1] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D causes the ground voltage at negative terminal 728D to be passed to capacitive element C O7D Input 732D.

[0284] As described above, in driver 700D, the initial operation of a repeated cycle of the switching sequence will redistribute the charge between the non-dissipative elements until the steady-state average voltage across the non-dissipative elements is given by:

[0285] V CS7D[i] =V DD7D *i / (n+1).

[0286] exist Fig. 7E In the driver 700E, the first switch SW 7E[1] may be electrically connected to the negative terminal 728E of the voltage source 720E, but not electrically connected to the non-dissipative element at its other end; and the last switch SW 7E[n+1] The other end of the 705E can be electrically connected to a voltage source 720E through a set of common nodes 705E(1), ... 705E(n), wherein the non-dissipative element C S7E[i] The associated generalized common node 705E(i) may be provided between the positive terminal 726E of the voltage source 720E and the target non-dissipative element SW 7E[i] between one end of

[0287] The operation of driver 700E is similar to that of driver 700D and allows the voltage of the capacitive element to be driven between two voltage levels (e.g., ground and power supply voltages) by transferring energy stored in the non-dissipative elements to the capacitive elements in a stepwise transfer manner by alternately turning on and off two or more switches in a sequence order to drive the voltage of the capacitive element between two levels. As with driver 700D, driver 700E may need to initially operate over multiple switching cycles / sequences in order for the n non-dissipative elements of driver 700E to reach steady-state (equilibrium) values ​​that approximate those values ​​reached by the non-dissipative elements of driver 700A from the start of driver operation. During the initial switching operation of driver 700E, charge will be redistributed from the capacitive elements to the n non-dissipative elements of driver 700E until the n non-dissipative elements reach their steady-state (equilibrium) values. When the n non-dissipative elements of driver 700E reach steady-state (equilibrium) values, the voltage they can provide becomes voltage V DD7E Integer multiples, specifically V CS7E[i] =VDD7E *(n+1-i) / (n+1), where i is the ith non-dissipative element in the set of n non-dissipative elements of the driver 700E. After initial operation of multiple switching cycles / sequences, the switching method of the driver 700E may produce the following results:

[0288] When the switch SW 7E[1] When the switches are closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700E results in the ground voltage at negative terminal 728E being passed to capacitive element C O7E Input 732E;

[0289] When the switch SW 7E[2] When the switch is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[1] The voltage is transmitted to the capacitor element C O7E Input;

[0290] When the switch SW 7E[3] (not shown) is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[2] The voltage is transmitted to the capacitor element C O7E Input;

[0291] When the switch SW 7E[n] When one switch is closed and the other is open, it will be equal to V DD7E Subtract V CS7E[n] The voltage is transmitted to the capacitor element C O7E Input;

[0292] When the switch SW 7E[n+1] When the switches are closed and the other switches are open, the “bypassing” of the non-dissipative components of driver 700E causes the supply voltage V at positive terminal 726F to DD7E Passed to the capacitor element C 07E Input 732E.

[0293] As in the switching method for driver 700D, the switching method for driver 700E may include a reverse switching process to drive the voltage of the capacitive element back to the initial level. Specifically:

[0294] When the switch SW 7E[n] When the switch is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[n] The voltage is transmitted to the capacitor element C O7E Input;

[0295] When the switch SW 7E[3] (not shown) is closed and the other switches are open, it will be equal to V DD7E Subtract VCS7E[2] The voltage is transmitted to the capacitor element C O7E Input;

[0296] When the switch SW 7E[2] When the switch is closed and the other switches are open, it will be equal to V DD7E Subtract V CS7E[1] The voltage is transmitted to the capacitor element C O7E input; and

[0297] When the switch SW 7E[1] When the switch is closed and the other switches are open, the "bypassing" of the non-dissipative components of driver 700D causes the ground voltage at negative terminal 728E to be passed to capacitive element C O7E Input 732E;

[0298] As with driver 700D, the initial operation of a repeated cycle of the switching sequence will redistribute the charge among the non-dissipative elements until the steady-state average voltage across the non-dissipative elements is given by:

[0299] V CS7E[i] =V DD7E *(n+1-i) / (n+1)

[0300] =V DD7E -V DD7E *(i) / (n+1).

[0301] During operation of the capacitive element drivers 700D, 700E, through their complete drive cycles, embodiments of the capacitive element drivers 700D, 700E may undergo the same stage and switching sequence phases and sub-phases disclosed with reference to the capacitive element driver 700A, wherein the average voltage level value of the non-dissipative element may remain constant over time as the first capacitive element driver operates through the first stage sequence.

[0302] For example, as with driver 700A, the stage sequence for driver 700D may have a switch activation pattern with a bypass portion, wherein the capacitor element driver is bypassed during the application of the bypass portion to the capacitor element driver; and an additional portion, which may be applied to the capacitor element driver after the bypass portion is applied to the capacitor element driver, and wherein a voltage is added to the input voltage of the capacitor element driver during the application of the additional portion to the capacitor element driver. In addition, the switch activation pattern may have a second additional portion, which is applied to the capacitor element driver before the bypass portion is applied to the capacitor element driver and is configured to increase the input voltage of the capacitor element driver by another voltage during its application to the capacitor element driver.

[0303] In addition, as with driver 700A, the switching stage sequence may have a switching mode in the capacitor element driver, wherein a subtraction portion may be applied to the driver to subtract a voltage from an input voltage of the capacitor element driver during its application to the capacitor element driver; and a bypass portion, which is configured to be applied to the capacitor element driver after the subtraction portion is applied to the capacitor element driver, and to bypass the capacitor element of the capacitor element driver during its application to the capacitor element driver. In addition, the switching mode may have a second subtraction portion, which is configured to be applied to the capacitor element driver after the bypass portion is applied to the capacitor element driver, and is configured to cause another voltage to be subtracted from the input voltage of the capacitor element driver during its application to the capacitor element driver.

[0304] When drivers 700A, 700C are matched with appropriately sized components (which will be readily accomplished by a circuit designer of ordinary skill in the art), the “series” configuration of the non-dissipative elements in drivers 700A, 700C allows the power supply voltage (V DD7A 、V DD7C ) changes, the voltages on their respective storage capacitors (non-dissipative elements) are immediately set to their respective steady-state values. Alternatively, the independently connected or independently referenced (sometimes referred to as "nested") configuration of the non-dissipative elements in drivers 700D, 700E requires the driver to operate through multiple switching cycles to transfer charge between the non-dissipative elements before their non-dissipative elements reach their steady-state voltages.

[0305] Capacitor Component Driver Components

[0306] Since capacitor element drivers 400, 780 are embodiments of capacitor element driver 700A, for purposes of describing the components of the capacitor element driver of the present invention herein, the components of capacitor element driver 700A will be used herein to represent the components in capacitor element drivers 400, 780 and any other capacitor element drivers included in the present invention.

[0307] · Dissipative Components

[0308] The embodiment shown in the capacitive element driver 700A has no requirements and / or constraints on the relationship between the value of one non-dissipative element and the value of another different non-dissipative element. For example, the value of one non-dissipative element may be equal to the value of another different non-dissipative element; or the value of one non-dissipative element may be different from the value of another different non-dissipative element, and the two different values ​​may be close, or not close at all.

[0309] In addition, the embodiment shown in the capacitive element driver 700A has no requirements and / or constraints on the type of one non-dissipative element and the type of another different non-dissipative element. In illustrative but not necessarily preferred embodiments, the type of one non-dissipative element can be a storage capacitor. In these embodiments, the type of another non-dissipative element can also be a storage capacitor or another type of non-dissipative element, such as a rechargeable battery, a reverse biased semiconductor PN junction, or a capacitor whose capacitance is changed by a transformer.

[0310] The storage capacitor in the capacitive element driver 700A can be of any suitable type. For example, but not limited to, the storage capacitor can be a transistor; it can be ceramic or electrolytic, or it can be manufactured using any known method, including but not limited to poly-insulator-poly (PIP), metal-insulator-metal (MIM), metal-oxide-metal (MOM), or metal-oxide-semiconductor (MOS). The storage capacitors do not have to be of the same type; one storage capacitor can be the same, similar, or a different type than another storage capacitor.

[0311] · switch

[0312] There are no requirements and / or limitations on the implementation of the switches and / or the configuration of the switches in the capacitive element driver 700A. Figure 9A-9G Examples of suitable switches for use in the capacitive element driver 700A are shown without limitation in FIG. Although certain figures shown herein and disclosed herein describe certain transistors as n-channel or p-channel, it should be understood that any suitable transistor may be used. For example, an n-channel or p-channel field effect transistor (FET) may be used in place of an n-channel or p-channel transistor. An NPN or PNP bipolar junction transistor (BJT) may be used in place of an n-channel or p-channel transistor, wherein the BJT has an emitter instead of a source and a collector instead of a drain.

[0313] Fig. 9A Shown with terminal a 9a and b 9a Switch SW 9a (910) configuration.

[0314] Fig. 9B Two configurations are shown: n-channel transistor SW 9b1 (920), where terminal a 9b1 is at its source, and terminal b 9b1 at its drain; and an n-channel transistor SW 9b2 (925), where terminal a 9b2 Located at its drain, and terminal b 9b2 At its source.

[0315] Fig. 9C Two configurations are shown: p-channel transistor SW 9c1 (930), where terminal a 9c1 is at its source, and terminal b 9c1 at its drain; and a p-channel transistor SW 9c2 (935), where terminal a 9c2 Located at its drain, and terminal b 9c2 At its source.

[0316] Fig.9D Two configurations of switches formed by connecting n-channel and p-channel transistors in parallel are shown:

[0317] Switch SW 9d1 (940) n-channel transistor SW 9b2 The drain of (925) is at its terminal a 9d1 is electrically connected to the p-channel transistor SW 9c1 (930) source, and wherein the n-channel transistor SW 9b2 The source of (925) is at its terminal b 9d1 is electrically connected to the p-channel transistor SW 9c1 (930) drain.

[0318] Switch SW 9d2 (945) n-channel transistor SW 9b1 The source of (920) is at its terminal a 9d2 is electrically connected to the p-channel transistor SW 9c2 (935) has a drain, and wherein the n-channel transistor SW 9b1 The drain of (920) is at its terminal b 9d2 is electrically connected to the p-channel transistor SW 9c2 (935) source.

[0319] Fig.9E Two configurations of a switch formed by two n-channel transistors in series are shown.

[0320] Switch SW 9e1 (950) has an n-channel transistor SW 9b2 (925), whose drain is electrically connected to the switch terminal a 9e1 , whose source is electrically connected to the n-channel transistor SW 9b1 (920) (its drain is located at switch terminal b 9e1 ) source.

[0321] Switch SW 9e2 (955) has an n-channel transistor SW 9b1(920), whose source is electrically connected to the switch terminal a 9e2 , whose drain is electrically connected to the n-channel transistor SW 9b2 (925) (whose source is located at switch terminal b 9e2 ) of the drain.

[0322] Fig.9F Shown is the configuration of a switch formed by two p-channel transistors connected in series.

[0323] Switch SW 9f1 (960) has a p-channel transistor SW 9c2 (935), whose drain is electrically connected to the switch terminal a 9f1 , whose source is electrically connected to the p-channel transistor SW 9c1 (930) (its drain is located at switch terminal b 9f1 ) source.

[0324] Switch SW 9f2 (965) has a p-channel transistor SW 9c1 (930), whose source is electrically connected to the switch terminal a 9f2 , whose drain is electrically connected to the p-channel transistor SW 9c2 (935) (whose source is located at switch terminal b 9f2 ) of the drain.

[0325] Figure 9G Four configurations of switches formed by two n-channel and two p-channel transistors are shown.

[0326] Switch SW 9g1 (970) and switch SW 9g2 (975) shows two configurations of switches formed by connecting two switches in parallel, one switch having two n-channel transistors in series and the other switch having two p-channel transistors in series.

[0327] Switch SW 9g1 (970) with switch SW 9e1 (950), whose switch terminal a 9e1 Electrically connected to switch SW 9g1 (970) switch terminal a 9g1 and switch SW 9f2 (965) switch terminal a 9f2 ; and its switch terminal b 9e1 Electrically connected to switch SW 9g1 (970) switch terminal b 9g1 and switch SW 9f2 (965) switch terminal b 9g2 .

[0328] Switch SW 9g2 (975) with switch SW 9e2 (955), its switch terminal a 9e2 Electrically connected to switch SW 9g2 (975) switch terminal a 9g2 and switch SW 9f1 (960) switch terminal a 9f1 ; and its switch terminal b 9e2 Electrically connected to switch SW 9g2 (975) switch terminal b 9g2 and switch SW 9f1 (960) switch terminal b 9g1 .

[0329] Switch SW 9g3 (980) and switch SW 9g4 (985) shows two configurations of switches formed by two switches in series, each switch having an n-channel and a p-channel transistor in parallel.

[0330] Switch SW 9g3 (980) with switch SW 9d1 (940), whose switch terminal a 9d1 Electrically connected to switch SW 9g3 (980) switch terminal a 9g3 ; and its switch terminal b 9d1 Electrically connected to switch SW 9d2 (945) switch terminal a 9d2 , so that its switch terminal b 9d2 Electrically connected to switch SW 9g3 (980) switch terminal b 9g3 .

[0331] Switch SW 9g4 (985) with switch SW 9d2 (945), its switch terminal a 9d2 Electrically connected to switch SW 9g4 (985) switch terminal a 9g4 ; and its switch terminal b 9d2 Electrically connected to switch SW 9d1 (940) switch terminal a 9d1 , so that its switch terminal b 9d1 Electrically connected to switch SW 9g4 (985) switch terminal b 9g4 .

[0332] · Capacitor components

[0333] As described above, the capacitive element can be a capacitor or any element that can be positioned at the output terminal of the circuit and act as a capacitor there. For example, the capacitive element can be one or more capacitive loading elements. In addition, as with the capacitive elements 430, 730A, the capacitive element can be a unit that is separate from the capacitive driving circuit of the capacitive element driver and can be electrically connected to the circuit, but in other embodiments, it can be a component of the capacitive element driver.

[0334] There is no limitation on the type of capacitor element to be driven in the capacitor element driver 700A. Figure 10-Figure 18 The impedance (Z) between any two terminals shows the capacitance function in the electrical device / network, and the capacitance element driver 700A can be used to reduce the full V O7A Total energy dissipated in the drive cycle to drive the electrical device / network.

[0335] In operation, the electrical device / network 1030 can be operated by changing its impedance Z 10 The terminal 1034 is electrically connected to the first node 1004 (also referred to as V O10 node) to connect to Fig.10 The driver 1000, the node 1004 is electrically connected to the switch SW of the driving circuit 1010 10[1] To SW 10[n+1] The common node 1014 of the embodiment is connected to the terminal 1036 (which has the same impedance Z in this illustrative but not necessarily preferred embodiment) by connecting the terminal 1036 to the common node 1014 of the embodiment. 10 ) is electrically connected to a node 1006, which is electrically connected to a voltage source 1020 (e.g., a voltage source V DD10 )’s positive terminal 1026.

[0336] Fig.11 Another embodiment of a capacitive element driver is shown in FIG. 1, wherein an n-terminal device / network 1130 has a capacitor present at terminal X. 11 and terminal Y 11 The impedance between XY11 ), and illustrates the function of capacitance in an electrical device / network. Driver 1100 has a capacitance drive circuit 1110 that can be used to reduce the capacitance of each full V O11 The total energy dissipated by the drive cycle is used to drive the electrical device / network 1130. Fig.11 As shown, the terminal X of the n-terminal electrical device / network 1130 11 can be connected to the V O11 Node 1104, node 1104 is electrically connected to switch SW of capacitor driving circuit 1110 11[1] To SW11[n+1] The common node 1114 of the n-terminal electrical device / network 1130 is 11 can be connected to node 1108, which is electrically connected to a voltage source V of driver 1100 DD11 The negative terminal 1128.

[0337] Fig.12 Another embodiment of a capacitive element driver is shown in FIG. 1, wherein an n-terminal device / network 1230 has a capacitor present at terminal X. 12 and terminal Y 12 The impedance between XY12 ) and illustrates the function of capacitance in an electrical device / network. The driver 1200 has a capacitance drive circuit 1210 that can be used to reduce the capacitance of each full V O12 The total energy dissipated by the drive cycle to drive the electrical device / network 1230. Fig.12 As shown, the terminal X of the n-terminal electrical device / network 1230 12 Can be connected to the driver 1200 V O12 Node 1204, which is electrically connected to switch SW of capacitor driving circuit 1210 12[1] To SW 12[n+1] The common node 1214 of the n-terminal electrical device / network 1230 is 12 can be connected to node 1206, which is electrically connected to a voltage source V DD12 The positive terminal 1226.

[0338] The n-terminal device / network may be of any suitable type, including but not limited to a transistor, which may have an impedance (Z) present between its gate and source terminals, and may exhibit a capacitive function; thus, a capacitive drive circuit such as those described herein may be used to drive the transistor in a manner that reduces the total energy dissipation per complete output voltage drive cycle. Such a transistor may be of any suitable type, including a MOSFET, a GaN-FET, a SiC-FET, a JFET, or an IGBT, and may be formed from a single transistor or a plurality of transistors.

[0339] Figure 13-Figure 16 Four such embodiments are shown in FIG. 1 , wherein the gate terminals of transistors 1330, 1430, 1530, and 1630 are electrically connected to V of capacitor driving circuit 1310, respectively. O13 Node 1314, V of capacitor driving circuit 1410 O14 Node 1414, V of capacitor driving circuit 1510 O15 Node 1514, V of capacitor driving circuit 1610 O16 Node 1614.

[0340] ·exist Fig.13 , the source terminal 1337 of transistor 1330 is electrically connected to a voltage source V DD13 Negative terminal 1328 (electrically connected to circuit 1310).

[0341] ·exist Fig.14 , the source terminal 1437 of transistor 1430 is electrically connected to a voltage source M DD14 Positive terminal 1426 (electrically connected to circuit 1410).

[0342] ·exist Fig.15 , the drain terminal 1539 of transistor 1530 is electrically connected to a voltage source V DD15 Positive terminal 1526 (electrically connected to circuit 1510).

[0343] ·exist Fig.16 , the drain terminal 1639 of transistor 1630 is electrically connected to a voltage source V DD16 Negative terminal 1628 (electrically connected to circuit 1610).

[0344] exist Figure 13-Figure 16 In the circuit of , for simplicity, the source and drain terminals are shown as unconnected. It is obvious to those skilled in the art of circuits that such terminals can be electrically connected to another component such as a power source (e.g., a voltage source).

[0345] exist Figure 17-Figure 18 Two further embodiments of capacitive element drivers are shown in , where elements such as devices / networks 1740, 1840 can be driven by capacitive drive circuits 1710, 1810, respectively, through capacitive elements 1730, 1830, respectively. Devices / networks 1740, 1840 can be devices / networks formed by any combination of one or more transistors or different passive elements (e.g., resistors, capacitors, inductors) and / or active elements (e.g., transistors). Devices / networks 1740, 1840 can have more than two terminals and can have an impedance (Z) present across the terminals; therefore, devices / networks 1740, 1840 can exhibit capacitive functionality and can be driven by capacitive drive circuits, such as capacitive drive circuits 1710, 1810, respectively, so as to reduce the total energy dissipation per complete output voltage drive cycle.

[0346] Fig.17 and Fig.18Capacitor drive circuits 1710, 1810 are shown electrically connected to capacitor elements 1730, 1830 (which in turn are electrically connected to devices / networks 1740, 1840, respectively). Devices / networks 1740, 1840 are electrically connected to capacitor drive circuits 1710, 1810 through voltage sources 1720, 1820, terminals 1746, 1846 of devices / networks 1740, 1840 are electrically connected to positive terminals 1726, 1826 of voltage sources 1720, 1820, respectively; and terminals 1748, 1848 are electrically connected to voltage sources V DD17 、V DD18 Negative terminals 1728, 1828.

[0347] exist Fig.17 , Fig.18 In an illustrative but not necessarily preferred embodiment, the capacitor elements 1730 , 1830 are transistors, but it should be understood that any suitable electrical device or network having a capacitor function can be used as the capacitor elements 1730 , 1830 . Fig.17 , Fig.18 1710 through the gate terminals. O17 Node 1714 and V of capacitor drive circuit 1810 O18 Transistors 1730 , 1830 at node 1814 .

[0348] Fig.17 shows source terminal 1737 of transistor 1730 connected to node 1744 of device / network 1740; and Fig.18 The drain terminal 1839 of transistor 1830 is shown connected to node 1844 of device / network 1840. Fig.17 In other embodiments, drain terminal 1739 of transistor 1730 may be connected to an additional terminal of device / network 1740; and Fig.18 In other embodiments, source 1837 of transistor 1830 can be connected to an additional terminal of device / network 1840 .

[0349] In operation, the capacitor driving circuits 1710 and 1810 respectively pass through the capacitor elements 1730 and 1830 at a full V O17 、V O18 The drive cycle is hierarchical and the drive devices / networks 1740, 1840 are driven in stages, wherein the switches of the capacitor drive circuits 1710, 1810 are switched from ground to V DD17 、V DD18 A complete V O17 、V O18The switching stages are closed and opened in combination in a sequence within a drive cycle. The stages may be those described herein and implemented in a switching sequence method, defined to ensure that the average voltage value of the storage capacitor remains constant over time.

[0350] exist Fig.17 , Fig.18 , a device / network 1740, 1840 having three terminals is shown. When the device / network 1740, 1840 is a two-terminal system, one of the network / device terminals is connected to the drain or source terminal of the transistor 1730, 1830, and the other of the network / device terminals is electrically connected to the voltage source V DD17 、V DD18 In other embodiments, another of the network / device terminals can be connected between the device / network 1740, 1840 and the voltage source V DD17 、V DD18 Any one of the multiple terminals of the "black box" electrically connected between is electrically connected to a voltage source V DD17 、V DD18 positive or negative terminal.

[0351] Application of switching sequence

[0352] Although the switching sequence method described herein is contemplated to be repeatable over multiple output voltage drive cycles to provide periodic charging of a capacitive element or a device / system used as a capacitive element, it will be appreciated that the capacitive element driver and switching sequence method described herein may be used to provide periodic drive for a selected number of output voltage drive cycles or a selected period, followed by inactivity.

[0353] It can also be understood that the switching sequence method described herein can be implemented in a discontinuous manner without limiting at which stage the switching sequence method should start. Fig. 8A , the capacitive element driver may start at any stage from stage 801(1) to stage 801(4n+2). The capacitive element driver may then be switched by following a switching sequence method such as that disclosed herein, and may be stopped at any stage that is subsequently inactive.

[0354] It will be appreciated that while the capacitive driver and switching sequence method described herein may be used in applications where periodic switching is used to maintain the voltage of a storage capacitor in the driver, the capacitive driver and switching sequence method may also be used to reduce energy losses in applications involving one-time actuation of a capacitive element. While periodic switching may be used to maintain the voltage of a storage capacitor in the driver, it will be appreciated that once the voltage of the storage capacitor in the driver is maintained, a one-time actuation of the capacitive element may be performed with reduced energy losses.

[0355] High frequency switching capacitor element driving circuit

[0356] Apparatus, methods and systems for driving the voltage of a capacitive element between two voltage levels, such as a ground voltage and a power supply voltage, can be used to provide efficient high frequency switching.

[0357] The capacitive elements disclosed herein can be combined with power switches to produce high efficiency switches. Fig.19A 1 is a circuit diagram showing a high efficiency switching system 1900a, where a capacitive element driver 1910a can be electrically connected to the gate of a power switch 1930a (which can be a circuit, but in this illustrative but not necessarily preferred embodiment is a transistor, and can be switched at very high frequencies). The drain and source of the power switch 1930a can be accessed by the user through terminals 1915a, 1914a, respectively, and can be connected as required by the application. Similarly, Fig.19B is a circuit diagram illustrating a high-efficiency switching system 1900b, wherein a capacitor element driver 1910b may be electrically connected to the gate of a power switch 1930b; and the drain and source of the power switch 1930b may be accessible via terminals 1915b, 1914b. The high-efficiency switching system 1900b may have a switch controller 1960b electrically connected to the capacitor element driver 1910b via terminal 1912b. To control the gate of the power switch 1930a, the high-efficiency switching system 1900a may have a switch controller 1960a electrically connected to the capacitor element driver 1910a to provide a control signal to signal the capacitor element driver 1910a to start or stop a switching sequence method such as one of the methods disclosed herein (e.g., Fig. 8A ).

[0358] The high efficiency switching system 1900a can have a dual voltage source V DD19a and V SS19a .like Fig.19A As shown, the voltage source V DD19a The positive terminal of can be connected to the system 1900a through the terminal 1911a; the voltage source V SS19a The negative terminal of can be connected to the system 1900a through the terminal 1913a; the voltage source V DD19a The negative terminal and the voltage source V SS19a The positive terminal of can be connected to the system 1900a through the terminal 1916a. Fig.19B As shown, the voltage source V DD19b The positive terminal of can be connected to the system 1900b through the terminal 1911b; the voltage source V SS19b The negative terminal of can be connected to the system 1900b through the terminal 1913b; the voltage source V DD19b The negative terminal and the voltage source V SS19b The positive terminal of can be connected to system 1900b through terminal 1916b.

[0359] although Fig.19A Not shown, but reference Fig. 7A Capacitor element driver 700A or Fig.16 From the capacitor driving circuit 1610 shown in FIG. 1 , it can be seen that:

[0360] Voltage source V DD19a The positive terminal of the capacitor element driver 1910a can be electrically connected to the last switch SW through the terminal 1911a. 19[n+2] (not shown) (similar to the voltage source V DD7A The positive terminal can be electrically connected to the last switch SW of the capacitor element driver 700A. 7[n+2] And the voltage source V DD16 The positive terminal of the capacitor driving circuit 1610 can be electrically connected to the last switch SW 16[n+2] ), and

[0361] Voltage source V SS19a The negative terminal of the capacitor can be electrically connected to the first switch SW of the capacitor element driver 1910a through the terminal 1913a. 19[0] (not shown) (similar to the voltage source V DD7A The negative terminal of the capacitor element driver 700A may be electrically connected to the first switch SW 7[0] And the voltage source V DD16 The negative terminal of the capacitor driving circuit 1610 may be electrically connected to the first switch SW 16[0] method).

[0362] Terminal V GREF The two terminals (specifically, terminal 1916a and source terminal 1914a of power switch 1930a) can be electrically connected. It can be seen that if the voltage source V SS19a Remove the capacitor element driver 1910a and electrically connect terminal 1913a to terminal 1916a, and the circuit design of the capacitor element driver 1910a will be almost the same as Fig.16 The circuit design of the capacitor driving circuit 1610 shown is the same, except that the source and drain of the power switch 1930a and the power switch 1630 are connected to the driver 1910a and 1610, respectively. For comparison, you can also refer to Fig.13 ,because Fig.19A Shown in the removal from Fig.19A The voltage source V SS19a Afterwards Fig.13 The circuit is the same as the circuit shown.

[0363] In the switching sequence method 2200 (which is Figure 8B80), method 2200 reflects the number of non-dissipative components and switches in system 1900a, and the gate of power switch 1930a can be controlled according to the switch SW from controller 1960a (which can be electrically connected to capacitor element driver 1910a via terminal 1917a). 19[0] To SW 19[n+2] ) signal, from V GREF -V SS19a Drive to V GREF +V DD19a , then from V GREF +V DD19a Drive to V GREF -V SS19a In embodiments where the capacitor element driver 1910a has more than one driver unit, such as the dual-unit capacitor element driver circuit 2100 disclosed below, a configuration such as Figure 22K to Figure 22M-5B or Figure 24A-24B-3 Those switching sequence methods shown in .

[0364] It may be noted that in the previously described embodiments, e.g. Figure 4 In the illustrated embodiment, the voltage source is part of the disclosed system and is Fig.19A , Fig.19B In the embodiment shown, the voltage source V DD19a 、V SS19a 、V DD19b 、V SS19b Located external to the systems 1900a, 1900b. Either positioning is acceptable and the choice of voltage source location is a designer choice, whether or not one or more voltage sources are used in the system.

[0365] Similarly, in Fig.19A In some embodiments shown, the switch controller 1960a is located outside the system 1900a and is electrically connected to the system 1900a via the terminal 1917a, but in a manner such as Fig.19B In other embodiments shown, the switch controller 1960b is part of the system 1900b and is connected to a control path system (not shown) via terminal 1917b to receive instructions such as enabling triggering the switch controller 1960b to signal circuits and components of the system 1900b.

[0366] Additionally, in some embodiments, a capacitive element, such as Fig.10 The electrical device / network 1030 shown is located outside the system 1000 and has no direct connection to the switch controller. In other embodiments, the capacitive elements, such as capacitive elements 1930a and 1930b (e.g., respectively, Fig.19A , Fig.19B) is part of systems 1900a, 1900b and can be directly connected to switch controllers 1960a, 1960b.

[0367] Thus, it can be seen that the capacitive element drivers 1910a, 1910b and the capacitive elements 1930a, 1930b (one or both of which may be transistors) may be packaged together to form a highly efficient switching system 1900a, 1900b.

[0368] Multi-driver unit capacitor element driving circuit

[0369] · Capacitor element driver unit

[0370] Fig. 20 A capacitive element driver unit (also referred to as a "driver unit" or simply a "unit") 2000 is shown, which can be combined with other driver units to construct a capacitive element driving circuit (which can be used to further reduce the total energy dissipation of each output voltage driving cycle of the capacitive element driver). The driver unit 2000 can be similar to Fig. 7A The capacitive element driver 700A is constructed with n non-dissipative elements, which can be respectively capable of storing and releasing voltage V CS20[1] , V CS20[2] , V CS20[3] , …, V CS20[n-1] , V CS20[n] The storage capacitor (C S20[1] , C.S. 20[2] , C S20[3] , …, C S20[n-1] , C S20[n] The driver unit 2000 may also have n+3 switches (SW ) connected as n storage capacitors, except for the following exceptions: 20[0] , S.W. 20[1] , S.W. 20[2] , ..., SW 20[n+2] ) and n+3 switches of driver 700A, with switches SW 20[0] , SW 20[1] The common node 2205[1] between the switch SW 20[n+1] , SW 20[n+2] The common node 2205(n+1) between them:

[0371] Switch SW 20[0] One terminal (similar to a switch SW 7A[0] The connection to the voltage source V DD7A The negative terminal 728A of the drive unit 2000 is operated as the terminal V DOWN20 ;

[0372] Switch SW20[n+2] One terminal (similar to a switch SW 20[n+2] The connection to the voltage source V DD7A The positive terminal 726A of the drive unit 2000 is operated as the terminal V UP20 ;as well as

[0373] For each switch SW 20[y] (where y ranges from 1 to n+1), switch SW 20[y] One terminal (similar to a switch SW 7A[y] connected to the capacitive element 730A (e.g., C O7A ) of the terminal 732A) is operated as the terminal V of the driver unit 2000 X20 2004, the terminal is electrically connected to the switch SW 20[1] and SW 20[n+1] A common node 2014 of the switches included therein.

[0374] In an illustrative, but not necessarily preferred, embodiment, the non-dissipative element may be a storage capacitor. In other embodiments, the non-dissipative elements may all be another type of non-dissipative element, such as a rechargeable battery, a reverse biased semiconductor PN junction, or a capacitor whose capacitance is changed by a transformer. Furthermore, in some embodiments, the non-dissipative elements may all be of the same type, and in other embodiments, the non-dissipative elements may all be a combination of multiple types of non-dissipative elements.

[0375] · Fig.21 :Basic multi-unit drive circuit

[0376] The driver unit 2000 may be connected in series with one or more driver units 2000 to form a capacitor element multi-unit driving circuit 2100, which may further reduce the energy dissipation of the capacitor element driver with a smaller number of non-dissipative elements.

[0377] Fig.21 A basic embodiment of a capacitive element driving circuit 2100 (also referred to as “circuit 2100”) is shown. Fig.21 In the K-unit driver circuit shown, K is equal to 2, where the circuit 2100 has two driver units 2101-1, 2101-2, each with a single non-dissipative element to further reduce the energy dissipation of the capacitive element driver. In an illustrative but not necessarily preferred embodiment, the non-dissipative elements can all be storage capacitors. In other embodiments, the non-dissipative elements can all be different types, or at least one of the non-dissipative elements can be a different type.

[0378] In addition, despite Fig.21The K unit driving circuit 2100 shown in is shown as being formed by two driver units 2000 (which, as described above, can be constructed similarly to the capacitor element driver 700A), but it should be understood that in the multi-driver circuit 2100 and in any other embodiments of the multi-driver circuit disclosed below, the above-mentioned capacitor element drivers 700C, 700D and 700E can be used as the first driver unit 2101-1.

[0379] Figure 22A-22J Circuit 2100 is shown in operation.

[0380] Reference Fig.21 and Figure 22A-22J , driver units 2101-1 and 2101-2 are connected in series, wherein unit 2101-1 has:

[0381] electrically connected to terminal 2111 of its switch SW[3],

[0382] electrically connected to terminal 2113 of its switch SW[0], and

[0383] • Terminal 2104 electrically connected to the common node 2114 of its switches SW[1] and SW[2].

[0384] Voltage source V DD21 connected to unit 2101-1, where the voltage source V DD21 The positive terminal 2126 is electrically connected to the terminal 2111, and the voltage source V DD21 The negative terminal 2128 of is electrically connected to the terminal 2113. The terminal 2104 is electrically connected to the common node 2115 between the terminals 2121, 2123 of the driver unit 2101-2, wherein:

[0385] Terminal 2121 is electrically connected to switch SW[3] of unit 2101-2;

[0386] Terminal 2123 is electrically connected to switch SW[0] of unit 2101-2;

[0387] Terminal 2124 is electrically connected to a common node 2134 of switches SW[1] and SW[2] of cell 2101-2, and wherein terminal 2124 is electrically connected to capacitive element 2130 (e.g., C O21 ) terminal 2132.

[0388] In the K-unit driving circuit, the terminal 2104 of one driver unit is electrically connected to a common node between the input terminals of another driver unit, and hereinafter, one and another units may be referred to as "adjacent" to each other. In addition, when one unit is electrically connected between another unit and a voltage source of a circuit, hereinafter, the one unit may be referred to as "upstream" of the other unit; and in the case where another unit is electrically connected between one unit and an output terminal of a circuit, hereinafter, the other unit may be referred to as "downstream" of a unit in the circuit. Therefore, unit 2101-1 may be considered upstream of its neighboring unit 2101-2, and unit 2101-2 may be considered downstream of its neighboring unit 2101-1.

[0389] As shown in the previous discussion of circuit 400, circuit 400 has a single storage capacitor and is switched in accordance with the switching sequence of stages 501(1)-501(6), the storage capacitor C s The average current (and therefore the net charge) remains zero and the average value is V CS4 =V DD4 / 3. Using the same reasoning, V CS21[1] =V DD21 / 3.

[0390] During the operation of the units 2101-1 and 2101-2, the output V of the unit 2101-1 CS21[1] operates as the input to unit 2101-2. Therefore, using the same reasoning as above, V CS21[2] The average value is equal to V CS21[1] / 3=(V DD21 / 3) / 3=V DD21 / 9Therefore, V DD21 =3V CS21[1] =9V CS21[2] .

[0391] In the operation of the circuit 2100, the 18th stage with a full V O21 drive cycle is associated, and at a full V O21 Each of the 18 stages of the drive cycle generates a V DD21 / 9 changes.

[0392] As with the capacitor element driver 700A, the driver circuit 2100 has a controller 2160 or is electrically connected to the controller 2160 via a path system, and the controller 2160 is configured to provide a control signal to signal the capacitor element driver circuit 2100 to start or stop the switching sequence method. The switch controller 2160 controls the activation and deactivation of the switches in the driver units 2101-1, 2101-2 to pass the full V O21 Drive cycle driving circuit 2100, wherein VO21 Driven from ground to V DD21 , and then returns to ground voltage and uses Figure 22A-22J A set of levels is shown:

[0393] ·exist Fig.22A In stage 2201(1), the switch group (SW[0], SW[1]) of cell 2101-1 and the switch group (SW[0], SW[1]) of cell 2101-2 are closed, and V O21 is driven to ground level (e.g., 0V);

[0394] ·exist Fig. 22B In stage 2201(2), the switch group (SW[0], SW[1]) of cell 2101-1 and the switch group (SW[0], SW[2]) of cell 2101-2 are closed, and V O21 is driven to V CS21[2] .

[0395] ·exist Fig. 22C In stage 2201(3), the switch group (SW[0], SW[2]) of unit 2101-1 and the switch group (SW[1], SW[3]) of unit 2101-2 are closed, and V O21 is driven to (V CS21[1] -V CS21[2] =2V CS21[2] ).

[0396] ·exist Fig.22D In stage 2201(4), the switch group (SW[0], SW[2]) of cell 2101-1 and the switch group (SW[2], SW[3]) of cell 2101-2 are closed, and V O21 is driven to (V CS21[1] =3V CS21[2] ).

[0397] ·exist Fig.22E In stage 2201(5), the switch group (SW[0], SW[2]) of cell 2101-1 and the switch group (SW[0], SW[2]) of cell 2101-2 are closed, and V O21 is driven to (V CS21[1] +V CS21[2] =4V CS21[2] ).

[0398] ·exist Fig.22F In stage 2201(6), the switch group (SW[1], SW[3]) of cell 2101-1 and the switch group (SW[1], SW[3]) of cell 2101-2 are closed, and V O21 is driven to (VDD21 -V CS21[1] -V CS21[2] =5V CS21[2] ).

[0399] ·exist Figure 22G In stage 2201(7), the switch group (SW[1], SW[3]) of cell 2101-1 and the switch group (SW[2], SW[3]) of cell 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[1] =6V CS21[2] ).

[0400] ·exist Fig.22H In stage 2201(8), the switch group (SW[1], SW[3]) of cell 2101-1 and the switch group (SW[0], SW[2]) of cell 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[1] +V CS21[2] =7V CS21[2] ).

[0401] ·exist Fig.22I In stage 2201(9), the switch group (SW[2], SW[3]) of cell 2101-1 and the switch group (SW[1], SW[3]) of cell 2101-2 are closed, and V O21 is driven to (V DD21 -V CS21[2] =8V CS21[2] ).

[0402] ·exist Fig.22J In stage 2201(10), the switch group (SW[2], SW[3]) of cell 2101-1 and the switch group (SW[2], SW[3]) of cell 2101-2 are closed, and V O21 is driven to (9V CS21[2] =V DD21 ).

[0403] ·exist Fig.22I In stage 2201(11), the operation of the switch is the same as stage 2201(9), and V O21 is driven to 8V CS21[2] .

[0404] ·exist Fig.22H In stage 2201(12), the operation of the switch is the same as stage 2201(8), and V O21 is driven to 7V CS21[2] .

[0405] ·exist Figure 22G In stage 2201(13), the switch operation is the same as stage 2201(7), and V O21 is driven to 6V CS21[2] .

[0406] ·exist Fig.22F In stage 2201(14), the switch operation is the same as stage 2201(6), and V O21 is driven to 5V CS21[2] .

[0407] ·exist Fig.22E In stage 2201(15), the operation of the switch is the same as stage 2201(5), and V O21 is driven to 4V CS21[2] .

[0408] ·exist Fig.22D In stage 2201(16), the switch operation is the same as stage 2201(4), and V O21 is driven to 3V CS21[2] .

[0409] ·exist Fig. 22C In stage 2201(17), the operation of the switch is the same as stage 2201(3), and V O21 is driven to 2V CS21[2] .

[0410] ·exist Fig. 22B In stage 2201(18), the switch operates the same as stage 2201(2), and V O21 is driven to V CS21[2] .

[0411] Controller 2160 may then return to stage 2201(1) (at Fig.22A ) to drive the output voltage of circuit 2100 to ground voltage. It can therefore be seen that the incremental and selective closing and opening of switches in cells of a multi-cell driver circuit can provide a step-wise increase from ground voltage to a peak voltage for a selected cell, with each switch group providing a decrease or increase in the output voltage by a selected voltage amount, or no change in the output voltage. Figure 22K is shown at a full V O21 During the drive cycle, the voltage across the capacitor element 2130 is driven to the switching sequence and V O21 . It can be seen that the stages and phases in which the driver circuit operates to drive the voltage from ground to the power supply voltage are mirrored in the stages and phases in which the driver circuit operates to drive the voltage from the power supply voltage to ground. Therefore, by referring to stage 2201(1) to stage 2201(10), the stages after stage 2201(10) can be known, where VO21 is driven to ground.

[0412] exist Figure 22K It can also be seen that stage 2201(18) constitutes the final stage of the output voltage drive cycle for circuit 2100. In stage 2201(18), cell 2101-1 is bypassed to provide ground voltage to the input of cell 2101-2, and cell 2101-2 is driven to provide V CS21[2] To ground the output voltage of cell 2100 after stage 2201 (18) is completed, switching sequence method 2200 may switch stage 2201 (1) (e.g. Fig.22A A switching operation (as shown) is applied to circuit 2100 so as to bypass cell 2101-1, electrically connect the negative terminal 2128 of the voltage source of circuit 2100 which is grounded in such a manner that the input of cell 2101-2 is grounded, and bypass cell 2101-2 so that the output of cell 2101-2 (and therefore the output of circuit 2100) is grounded.

[0413] When the driver circuit 2100 is configured to cease operation after one application of an output voltage drive cycle, the final stage of the switching sequence method 2200 may constitute a repeating stage 2201(1) operation to ground the output of the circuit 2100. When the driver circuit is configured to continue operation, the final stage of the switching sequence method 2200 may constitute the first stage of the next iteration of the output voltage drive cycle of the circuit 2100.

[0414] Continuing on, it should be understood that future references to completing the output voltage drive cycle of the capacitor element driving circuit include: grounding the output of the capacitor element driving circuit by applying the first stage of the switching sequence method after the last stage of the switching sequence method; and future references to applying the first stage of the switching sequence method consider applying any of the above methods to ground the output of the capacitor element driving circuit.

[0415] · Voltage distribution function

[0416] Figure 22L-1 to Figure 22L-3 is a diagram of the voltage distribution function of a closed switch group in an embodiment specifying a switching sequence of a driver unit in a selected drive circuit. In this embodiment, for ease of calculation, it is assumed that the non-dissipative elements have the same voltage storage capacity, but it should be understood that the selection of the voltage storage capacity of any non-dissipative element in any driver unit of the drive circuit will be the designer's choice.

[0417] In certain embodiments where a cell has more than one non-dissipative element and the voltages of any two such elements are not equal to each other, such as FIG. 22A to FIG. 22JAs disclosed, switching may occur to produce a step-wise increase in voltage from ground to the supply voltage and then back to ground, but the step size (voltage change) may not be uniform.

[0418] · Figure 22L-1 : 1-Non-dissipative component driver unit

[0419] Specifically, Figure 22L-1 The voltage distribution function 2001-1 of a driver unit x having one non-dissipative element and four switches is shown. The driver unit x can be operated as Figure 22A-22J The cell 2101-2 in the embodiment has a voltage output and a voltage input electrically connectable to the output of the cell 2101-1 and to the voltage inputs of switches SW[0] and SW[3] of the cell 2101-2.

[0420] exist Figure 22A-22J It can be seen that in the cell 2101-1, when the switch group (SW[0], SW[1]) or (SW[2], SW[3]) is closed, the non-dissipative element of the cell 2101-1 is bypassed, the switch group (SW[0], SW[1]) electrically connects the negative terminal of the voltage source to the output of the cell 2101-1, and provides the ground as the output of the cell 2101-1. The switch group (SW[2], SW[3]) of the cell 2101-1 also operates to bypass the non-dissipative element, electrically connects the positive terminal of the voltage source to the output of the cell 2101-1, and provides the voltage output V of the voltage source. DD As the output of cell 2101-1. In cell 2101-2, since the voltage input of the cell operates as the voltage input of the two switches SW[0] and SW[3] of cell 2101-2, the two switch groups (SW[0], SW[1]) and (SW[2], SW[3]) both act as non-dissipative elements that bypass cell 2101-2, electrically connecting the input of cell 2101-2 to the output of cell 2101-2.

[0421] Therefore, the unit can be operated as a unit 2101-2 and has a voltage output V out[x] and voltage input V in[x] In cell x (which can be electrically connected to the output of its upstream adjacent cell and electrically connected to the two switches SW[0] and SW[3] of cell x), the switch groups (SW[0], SW[1]) and (SW[2], SW[3]) both act as non-dissipative elements that bypass cell x. Figure 22L-1 The function of the switch group (SW[0], SW[1]), (SW[2], SW[3]) of the driver unit x to electrically connect the input of the driver unit x to its output is shown. Figure 22L-1 Also shown is the switch group (SW[0], SW[2]) releasing V[x] (the voltage storage capacity of the non-dissipative components) to add to VIn[x] function; and the switch group (SW[1], SW[3]) from V In[x] The function of subtracting V[x] from .

[0422] · Figure 22L-2 : 2-Non-dissipative element driver unit

[0423] Figure 22L-2 The voltage distribution function 2001-2 of driver unit y (which may also operate as unit 2101-2) is shown. Driver unit y has two non-dissipative components and five switches, and switch groups (SW[0], SW[1]) and (SW[3], SW[4]) operate to bypass the non-dissipative components. Switch groups (SW[0], SW[2]), (SW[0], SW[3]) add a selected voltage amount to the input voltage V In[y] ; and the switch groups (SW[1], SW[4]), (SW[2], SW[4]) from V In[y] When non-dissipative components have the same voltage storage capacity, for example voltage V[y]:

[0424] The switch group (SW[0], SW[2]) adds V[y] to the input voltage V In[y] ,

[0425] The switch group (SW[0], SW[3]) adds twice V[y] to V In[y] superior,

[0426] · The switch group (SW[1], SW[4]) is connected from V In[y] subtract twice V[y] from

[0427] · The switch group (SW[2], SW[4]) is connected from V In[y] Subtract V[y] from .

[0428] · Figure 22L-3 : Generalized drive unit

[0429] Figure 22L-3 The voltage distribution function 2001-q of the closed switch group in the generalized driver unit k (which can also be operated as unit 2101-2) is shown. The driver unit k has q non-dissipative elements and q+3 switches. Figure 22L-1 and Figure 22L-2 As in the embodiment of the present invention, the switch groups (SW[0], SW[1]) and (SW[q+1], SW[q+2]) operate to bypass the input voltage V In[k] A non-dissipative element passed to the output of cell k; the switch group (SW[0], SW[2]) to (SW[0], SW[q+1]) adds the selected voltage amount to the input voltage V In[k]; and the switch group (SW[1], SW[q+2]) to (SW[q], SW[q+2]) from V In[k] When the non-dissipative components have the same voltage storage capacity, for example voltage V[k]:

[0430] The switch group (SW[0], SW[2]) adds V[k] to V In[k] ;

[0431] · The switch groups (SW[0], SW[3]) to (SW[0], SW[q+1]) are connected to V In[k] Add 2V[k] to qV[k]; and

[0432] · The switch groups (SW[1], SW[q+2]) to (SW[q-1], SW[q+2]) are respectively from V In[k] Subtract qV[k] to get 2V[k].

[0433] The switch group (SW[q], SW[q+2]) is connected from V In[k] Subtract V[k] from . Figure 22L-3 The voltage distribution function of 2001-q and Figure 22L-1 and Figure 22L-2 Comparison of the switch activations in the voltage distribution functions 2001-1 and 2001-2 shows that increasing the number of non-dissipative elements in the driver unit allows increasing the number of steps in the stepwise process and reducing the difference between the voltage amounts delivered per step. As a result, the voltage delivery to the drive circuit output can become smoother.

[0434] Switching sequence method

[0435] Figure 22M-1A to Figure 22M-5B is a diagram showing a method for selecting a switching sequence of a drive circuit when the non-dissipative elements of the cells in the drive circuit have the same voltage storage capacity, using Figure 22L-1 to Figure 22L-3 The voltage distribution function is shown in the symbol for the operation of the closed switch group.

[0436] · Figure 22M-1A , Figure 22M-1B Shown in Figure 22K A more detailed description of the voltage provided at each stage of the switching sequence method 2200, as described above, wherein the switches in the first cell 2101-1 and the second cell 2101-2 are opened and closed in a sequence to increase the voltage provided to V in a stepwise manner DD21 , and then opens and closes in sequence to step down the supplied voltage to ground. The entire switching sequence defines a V O21 Drive cycle.

[0437] · Figure 22M-2A1 , Figure 22M-2A2 A switching sequence method 2220 is shown for a driver circuit [wxy] having three driver units [w], [x], [y], each having a non-dissipative element.

[0438] · Figure 22M-2B1 , Figure 22M-2B2 A switching sequence method 2240 is shown for a driver circuit [vwxy] having four driver units [v], [w], [x], [y], each driver unit having a non-dissipative element.

[0439] · Figure 22M-3A , Figure 22M-3B A switching sequence method 2260 is shown for a drive circuit [ab] having two driver units, a first unit [a] having one non-dissipative element and four switches, and a second unit [b] having two non-dissipative elements and five switches.

[0440] · Figure 22M-4A , Figure 22M-4B A switching sequence method 2270 is shown for a driver circuit [mn] having two driver units, a first unit [m] having two non-dissipative elements and five switches, and a second unit [n] having one non-dissipative element and four switches.

[0441] · Figure 22M-5A1 , Figure 22M-5A2 , Figure 22M-5B A switching sequence method 2280 is shown for a driver circuit [mnp] having a first cell [m] and a second cell [n], each having two non-dissipative elements, and a third cell [p] having three non-dissipative elements.

[0442] As described above, in the illustrative but not necessarily preferred embodiments described herein, a switching sequence method can be defined to operate a multi-cell circuit to produce a step-wise change in the circuit output voltage. The switching sequence method of the circuit can be formed by a set of cell switching methods, which define a sequence for activating a switch group in a cell in the circuit. By applying the cell switching method on its associated cells simultaneously and synchronously in the circuit, the circuit can be operated according to the switching sequence method of the circuit. The cells in the multi-cell circuit are arranged in series, where the output voltage of one cell provides the input voltage of its downstream adjacent cell, so that the incremental change of the upstream cell affects the voltage generation of other cells downstream in the circuit.

[0443] Incremental changes in upstream and downstream cells can be seen in the selective closing and opening of switches in cells of a multi-cell drive circuit. The switches can provide a step-wise increase from ground to peak voltage for a selected cell, with each switch group providing a decrease or increase in output voltage by a selected voltage amount, or no change in output voltage. Figure 22M-1A and Figure 22M-1B The increase from level 2201(1) to 2201(10) can be seen in Figure 22M-1A and Figure 22M-1B A reduction from stage 2201 ( 10 ) to 2201 ( 1 ) can be seen in , the first stage of applying switching sequence method 2200 on circuit 2100 .

[0444] Figure 22M-1A to Figure 22M-5B Several examples of switching sequence methods for operating multi-cell circuits are shown. It can be seen that the methods described below are defined by an ordered set of phases, where the phases are defined by an ordered set of cell activation patterns, and the cell activation patterns are defined by an ordered set of stages, which are applied in a time sequence to activate groups of switches in the cells to produce a series of desired output voltage results. When these methods are operated simultaneously and synchronously, the desired result of incremental changes in cell output voltages can be achieved.

[0445] It can be seen that the method shown has common operating stages, wherein these stages activate switch groups according to a common switching pattern to produce a gradual increase in the output voltage of the multi-unit circuit 2100 up to its peak voltage, and, if necessary, provide operation of the stages and switching patterns in a reverse order to produce a gradual decrease in the output voltage of the multi-unit circuit 2100 from its peak voltage to near ground.

[0446] Continuing, reverse sequential operation of a method shall mean reverse sequential operation of its constituent stages, a stage operating in reverse sequence shall mean operating its constituent switching patterns in reverse sequence, and operating a switching pattern in reverse sequence shall mean that its defined constituent stages also operate in reverse chronological order. Furthermore, continuing, a stage operating in reverse sequence shall be referred to as a "reverse stage", and a switching pattern operating in reverse sequence shall be referred to as a "reverse switching pattern".

[0447] Except for the cell electrically connected to the voltage source (herein referred to as the "first cell"), the stepwise driving method of the cells in the multi-cell driving circuit has the following phases, which apply the following stepwise cell switching pattern to cell [i] (where 2≤i≤k):

[0448] The Start Unit [i] stage applies the Start Unit [i] switching mode on the selected unit [i], which is set to:

[0449] o providing the input voltage of cell [i] as its output voltage (bypassing cell [i]) by closing one of the switch groups (switch group (SW[0], SW[1]) or switch group (SW[n[i]+2], SW[n[i]+1]) (bypassing)), and

[0450] Then, by selectively activating cell [i], the output voltage V O[i] The switch group (where there is more than one such group) incrementally increases the output voltage of cell [i] by the voltage V provided by the non-dissipative element of cell [i] CS[i] , wherein switch activation is performed to produce an increased output voltage increase.

[0451] The execution unit [i] stage may be performed after the initiation unit [i] stage is completed. The execution unit [i] stage may implement a series of execution unit [i] switching modes on unit [i], wherein the application of the execution unit switching mode is set to:

[0452] o First, incrementally reducing the output voltage of cell [i] by selectively activating a switch group (where there is more than one such group) in cell [i] that subtracts the voltage storage capacity of the non-dissipative element from the input voltage of cell [i], wherein the switch activation is performed to produce a decreasing amount of reduction in the output voltage, and wherein when cell [i] includes a single non-dissipative element, the reduction in input voltage is V CS[i] , or when cell [i] contains multiple non-dissipative components, it is reduced to V [i] or multiples thereof.

[0453] It should be noted here that during the first stage of the switching mode of execution unit [i], V is subtracted from the input voltage of unit [i]. [i] or multiples thereof, does not result in a reduction in the output voltage of cell [i]. While subtracting a voltage from the input voltage of cell [i] during the switching mode of cell [i], a switching mode operation at one or more cells upstream of cell [i] increases the input voltage of cell [i] by a selected voltage amount for at least the duration of the switching mode of cell [i] at cell [i]. Thus, when the subtraction operation reduces the input voltage of cell [i] by an amount, the input voltage of cell [i] increases by an amount greater than the amount of voltage subtracted from the input voltage, resulting in a net increase in the amount of voltage available at the output of cell [i].

[0454] o then bypassing cell [i] by selectively activating a set of switches of cell [i] that provide the input voltage of cell [i] as its output voltage; and

[0455] o The output voltage of cell [i] is then incrementally increased by selectively activating a set of switches in cell [i] that increase the output voltage, wherein the switches are commanded to activate to produce the increased amount of output voltage.

[0456] The peak unit [i] stage applies the peak unit [i] switching mode on unit [i], which is set to:

[0457] o first, incrementally reducing the output voltage of cell [i] by selectively activating groups of switches in cell [i] that reduce the output voltage (where there is more than one such group), wherein the switch activations are commanded to produce decreasing amounts of output voltage reduction; and

[0458] o Cell [i] is then bypassed by selectively activating a switch group of cell [i] that provides the input voltage of cell [i] as its output voltage.

[0459] When the drive circuit is arranged to cease operation when its output voltage reaches its peak voltage, the peak cell [i] phase may end, and with it, the method ends.

[0460] If the drive circuit is arranged to operate through a complete output voltage drive cycle from ground to peak and then back to near ground, the method can continue on cell [i] to gradually reduce the output voltage of the cell from the peak voltage back to ground using the following phase of applying the step-by-step switching pattern to cell [i].

[0461] After cell [i+1] reaches its peak output voltage, the peak cell [i] stage applies the remainder of the peak cell [i] switching pattern to cell [i], which is set to:

[0462] o maintaining bypass of cell [i] for the duration of one stage of the cell [i] switching pattern when cell [i] is the cell having an output terminal that is electrically connected to the output terminal of the driver circuit or an output terminal that is electrically connected to the output terminal of the driver circuit (hereinafter referred to as the “last cell”), or otherwise until the remainder of the peak cell [i+1] switching pattern on cell [i+1] is completed, and

[0463] o Incrementally reducing the output voltage of cell [i] by selectively activating groups of switches in cell [i] that reduce the output voltage (where there is more than one such group), wherein the switches are commanded to activate to produce increasing amounts of output voltage reduction.

[0464] A reverse execution unit [i] phase (wherein a series of reverse execution unit switching patterns may be implemented in reverse order) may begin upon completion of the peak unit [i] phase. The reverse execution unit [i] phase may implement a series of reverse execution unit [i] switching patterns, where the stages of the execution unit [i] switching patterns are implemented in reverse order. The application of the reverse execution unit [i] switching patterns may be configured as:

[0465] o first, incrementally increasing the output voltage of cell [i] by selectively activating groups of switches in cell [i] that increase the output voltage (where there is more than one such group), wherein the switches are commanded to activate to produce decreasing increases in the output voltage;

[0466] o then bypassing cell [i] by selectively activating a switch group of cell [i] that provides the input voltage of cell [i] as its output voltage; and

[0467] o The output voltage of cell [i] is then incrementally reduced by selectively activating groups of switches in cell [i] (where there is more than one such group) that reduce the output voltage, wherein the switches are commanded to activate to produce increasing amounts of output voltage reduction.

[0468] Similar to the voltage subtraction operation in executing the cell [i] switching mode, during the first stage of the reverse execution of the cell [i] switching mode, adding V or a multiple thereof to the input voltage of cell [i] does not result in an increase in the output voltage of cell [i]. While adding voltage to the input voltage of cell [i] during the reverse cell [i] switching mode, the switching mode operation on one or more cells upstream of cell [i] reduces the input voltage of cell [i] by a selected voltage amount for at least the duration of the reverse cell [i] switching mode on cell [i]. Thus, when the addition operation increases the input voltage of cell [i] by an amount, the reduction in the input voltage of cell [i] is greater than the amount of voltage added to the input voltage, resulting in a net decrease in the amount of voltage available at the output of cell [i].

[0469] The Reverse Start Unit [i] stage may be performed upon completion of the Reverse Execution Unit [i] stage. In the Reverse Start Unit [i] stage, the Reverse Start Unit [i] switching pattern is then applied to Unit [i], wherein the stages of the Start Unit [i] switching pattern are performed in reverse order:

[0470] First, by selectively activating the cell [i], the output voltage V O[i] groups of switches (where there is more than one such group) to incrementally increase the output voltage of cell [i], wherein the switches are commanded to activate to produce decreasing increases in the output voltage; and

[0471] o Cell [i] is then bypassed by selectively activating a switch group of cell [i] that provides the input voltage of cell [i] as its output voltage, wherein the bypassing of cell [i] is maintained until the output voltage of the last cell (cell [K]) in the K cell circuit is V CS[K] , which is one step away from being driven to the ground.

[0472] At the last stage of the output voltage drive cycle, cell [i] (2≤i≤(K-1)) is bypassed to provide ground to the input of cell [K] to allow cell [K] to be driven to provide V CS[K] In order to ground the output voltage of unit [K], the switching sequence method can be applied in its first stage. As described above, when the output voltage of the driver circuit reaches V CS[K], and when the drive circuit is arranged to cease operation after one application of the output voltage drive cycle, the last stage of the reverse-starting cell [i] stage may require subjecting cell [i] to a single application of the first stage of the output voltage drive cycle to bypass cell [i]. When the drive circuit is arranged to continue operation, the last stage of the reverse-starting cell [i] stage may require subjecting cell [i] to the first stage of the output voltage drive cycle to bypass cell [i].

[0473] It can be seen that the first cell in the multi-cell driving circuit (cell [1]) operates in the above-mentioned starting cell [i] phase, and then operates in the above-mentioned peak cell [i] phase, where i=1 and the bypass operation of the starting cell [1] phase is achieved by selectively activating the switch group of cell [1], which switches the voltage of the negative terminal of the voltage source of the circuit 2100 (at Fig.21 The voltage source in the circuit is shown as grounded) is provided to the input of the unit [2]. Similarly, bypass operation of the unit during the peak phase can be achieved by selectively activating the switch group of the unit [1] that provides the supply voltage of the circuit voltage source to the input of the unit [2].

[0474] After completing the output voltage drive cycle, the output voltage of the drive circuit is V CS[K] , one step away from ground. When the drive circuit is arranged to cease operation after applying one output voltage drive cycle, unit [1] can be subjected to the application of the first stage of the output voltage drive cycle to bypass unit [1] in such a way that the negative terminal of the voltage source providing the circuit to ground is electrically connected to the output of unit [1] so that the input of unit [2] is also grounded. If the drive circuit is arranged to continue to operate to drive the circuit through repeated output voltage drive cycles, the method can continue after applying the last stage of the drive cycle to apply the first stage of the next iteration of the drive cycle. The first stage also bypasses unit [1], causing the output voltage of unit [1] to be grounded and returning the method to its starting unit [1] stage to begin the step-by-step driving of the output of the circuit from ground to peak and then to ground.

[0475] In embodiments disclosed herein, the number of levels of switched group activation maintained on a selected cell (cell [i]) that is not the last cell ("cell [K]") can be based on the number of non-dissipative elements in its adjacent downstream cell (hereinafter "cell [i+1]") in the K-cell circuit. As described in more detail in the outstanding but not necessarily preferred embodiments disclosed above and below, the switched group activation can be maintained in the selected cell [i] for the duration of the method switching pattern simultaneously performed on cell [i+1]. When the selected cell (cell [i]) is the last cell (cell [K]) of the K-cell circuit, cell [i+1] does not exist, and the switched group activation can be maintained in cell [i] for the duration of one level of the method switching pattern.

[0476] Furthermore, as described in more detail below, the number of steps in which the cell switching pattern operates on a selected cell is also based on the number of non-dissipative elements in the selected cell. For example, a cell with one non-dissipative element has only one switch group that can be closed to increase its output voltage, while a cell with three non-dissipative elements has three switch groups that can be closed to increase its output voltage. The same is true for the number of switch groups in cell [i] that can be closed to decrease its output voltage. Thus, the number of step-wise voltage changes in the cell switching pattern for a selected cell will be based on the number of non-dissipative elements in the cell.

[0477] In order to understand how cells of a multi-cell drive circuit operating simultaneously and synchronously to close and open switches provide incremental increases followed by decreases in the output voltages of the cells, which in turn drive incremental increases followed by decreases in the total output voltage of the drive circuit, attention is now turned to Figure 22M-1A to Figure 22M-5B , to describe examples of cell switching methods for circuits having a varying number of cells and for cells having a varying number of non-dissipative elements.

[0478] The initiation unit phase and switching mode, the execution unit phase and switching mode, and the peak unit phase and switching mode are respectively referred to in the figures as "Initiation" or "I", "Execution" or "E", and "Peak" or "P".

[0479] · K unit driving circuit, each unit has a non-dissipative element

[0480] Figure 22M-1A : 2 unit drive circuit

[0481] Figure 22K , Figure 22M-1A and Figure 22M-1BAn illustrative, but not necessarily preferred, embodiment of a method 2200 for opening and closing switches in a driver cell to increase the voltage output in a stepwise manner from a driver circuit having two cells, each having one non-dissipative element, is shown. Method 2200 begins at stage 2201(1), in which the switches (SW[0], SW[1]) of both driver cells are activated to drive the output of the driver circuit to ground. In stage 2201(2), the switches (SW[0], SW[1]) of driver cell 2101-1 remain activated to drive the output of the cell to ground (thus preventing driver cell 2101-1 from contributing voltage to the output of the driver circuit), while the switches (SW[0], SW[2]) of driver cell 2101-2 (the switches closest to the output terminal in the circuit) are activated to release the voltage storage capacity V from one of its non-dissipative elements. CS21[2] , so that V CS21[2] Becomes the output of the driving circuit 2100.

[0482] Once V CS21[2] , in stages 2201(3) to 2201(5), the switches (SW[0], SW[2]) of driver unit 2101-1 may be activated to release its voltage storage capacity V from its non-dissipative elements. CS21[1] , thus providing V CS21[1] As the voltage output of unit 2101-1.

[0483] In stage 2201 (3), the switches (SW[1], SW[3]) of driver unit 2101-2 are operated to set V CS21[1] Reduce V CS21[2] .

[0484] In stage 2201 (4), the switches (SW[2], SW[3]) of driver unit 2101-2 are operated to bypass the non-dissipative components of driver unit 2101-2, raising the output voltage to V CS21[1] , which is equal to the output voltage V CS21[2] In other equally illustrative but not necessarily preferred embodiments, bypassing in unit 2101-2 may be accomplished by operating switches (SW[0], SW[1]) of unit 2101-2 instead of switches (SW[2], SW[3]).

[0485] In stage 2201(5), the switches (SW[0], SW[2]) of driver unit 2101-2 are operated so that both driver units provide their available voltage storage capacity to increase the voltage from V CS21[1] The output voltage to V CS21[1] +V CS21[2] =4V CS21[2] .

[0486] In stages 2201(6) to 2201(8), the switch group (SW[1], SW[3]) of driver cell 2101-1 is activated to raise the input of cell 2101-1 to the power supply voltage V DD21 , then V DD21 Reduce the voltage storage capacity V of unit 2101-1 CS21[1] , in order to provide V DD21 -V CS21[1] As the voltage output of unit 2101-1.

[0487] In stage 2201 (6), the switch group (SW[1], SW[3]) of driver cell 2101-2 is activated to subtract the voltage storage capacity V of cell 2101-2 from the voltage output of cell 2101-1. CS21[2] , generates a voltage output 5V for driving the circuit CS21[2] .

[0488] In stage 2201 (7), cell 2101-2 is bypassed by activating the switch group (SW[2], SW[3]) or the switch group (SW[0], SW[1]) as described above to provide the voltage output of cell 2101-1, i.e., V DD21 -V CS21[1] or 6V CS21[2]

[0489] In stage 2201(8), the switch group (SW[0], SW[2]) of unit 2101-2 is activated to switch V CS21[2] added to the voltage output of unit 2101-1, thus providing 7V CS21[2] As the voltage output of the driving circuit.

[0490] In stages 2201(9) and 2201(10), the switch group (SW[2], SW[3]) or the switch group (SW[0], SW[1]) of driver cell 2101-1 is activated to bypass the non-dissipative elements of cell 2101-1, thereby passing the supply voltage V DD21 As the voltage output of unit 2101-1.

[0491] In stage 2201(9), the switch group (SW[1], SW[3]) of unit 2101-2 is activated to switch from V DD21 Subtract V CS21[2] , providing voltage output 8V for the drive circuit CS21[2] ;as well as

[0492] In stage 2201 (10), the switch group (SW[2], SW[3]) of cell 2101-2 or the switch group (SW[0], SW[1]) described above is activated to bypass the non-dissipative components of cell 2101-2 and provide a voltage output V to the driver circuit. DD21 =9V CS21[2] .

[0493] Switch activation according to method 2200 continues to provide a gradual increase in the voltage output of the driver circuit from ground to the maximum voltage that circuit 2100 can deliver, i.e., to V DD21 In stages 2201(11) to 2201(18), switch activation according to method 2200 may continue in reverse order from V DD21 To V CS21[2] The output voltage of the circuit is lowered from V to V by using stage 2201(1) as a stand-alone stage or as the first stage of the next operation of the output voltage drive cycle. CS21[2] Driven to ground, the output voltage of the circuit is gradually increased and driven back to V DD21 , and then gradually drives the output voltage down to V CS21[2] .

[0494] As described above, in some embodiments, in any selected cell that is not the first cell in the drive circuit (i.e., in a cell that does not have an input terminal electrically connected to the voltage source of the drive circuit), the pass switch groups (SW[0], SW[1]) and (SW[2], SW[3]) can be interchanged because when closed, these two groups of switches electrically connect the input of the selected cell to its output.

[0495] Figure 22M-1A and Figure 22M-1B The phases and patterns in the switching sequence are shown, and the switching sequence can be applied to enable the method 2200 to provide a step-wise increase and then decrease of the output voltage during a complete drive cycle. Specifically:

[0496] In the start cell [2] phase 2212-1 of the cell 2101-2, a two-stage start cell [2] switching pattern 2202-1 may be applied to the cell 2101-2 in the stages 2201-1 to 2201-2 so as to operate the switch of the second cell 2101-2 to bypass the cell 2101-2 in one stage and then provide V to the output voltage of the driver circuit 2100 in another stage. CS21[2] .

[0497] Execution unit [2] stage 2213-1 of cell 2101-2 may begin after the completion of the start unit [2] stage 2212-1. In execution unit [2] stage 2213-1, three levels of execution unit [2] switching pattern 2203-1 may be simultaneously applied to switches in cell 2101-2 while the start unit [1] stage 2215-1 (described below) is operated on cell 2101-1 to increase the input voltage of cell 2101-2 by V CS21[1] , so that the application of the switching mode 2203-1 of the execution unit [2] drives the output voltage of the circuit 2100 to 4V CS21[2] The switches in cell 2101-2 are operated to first subtract V from the input voltage of cell 2101-2. CS21[2] , then bypass cell 2101-2, and then V CS21[2] Output voltage provided to unit 2101-2.

[0498] As described above, during the first stage of switching mode 2203-1, V is subtracted from the output voltage of cell 2101-2. CS21[2] The output voltage of cell 2101-2 (and thus the output voltage of circuit 2100) does not decrease. While switching pattern 2203-1 subtraction is occurring, start cell [1] stage 2215-1 (described below) operates on cell 2101-1 to increase the input voltage of cell 2101-2 by V for the duration of executing cell [2] switching pattern 2203-1 on cell 2101-2. CS21[1] Therefore, when the subtraction operation on cell 2101-2 causes the newly added input voltage of cell 2101-2 to decrease, the output voltage of cell 2101-2 is V CS21[1] -V CS21[2] =2V CS21[2] .

[0499] In the next stage of execution unit [2] switching mode 2203-1 on unit 2101-2, unit 2101-2 is bypassed, allowing the output voltage of unit 2101-2 to reach V CS21[1] =3V CS21[2] ; and the next level of execution unit [2] switching mode 2203-1 will V CS21[2] The output voltage provided to unit 2101-2 causes V CS21[1] +V CS21[2] =4V CS21[2] output voltage.

[0500] In phase 2213-1, the execution unit [2] switching pattern 2203-1 may be repeated on cell 2101-2 while the peak unit [1] phase 2217 (described below) operates on cell 2101-1 to increase the input voltage of cell 2101-2 by V DD21 -V CS21[1] , so that the output voltage of the repeating driving circuit 2100 of the switching mode 2203-1 of the execution unit [2] is reduced to 5V CS21[2] , then to 6V CS21[2] , then to 7V CS21[2] .

[0501] Peak Cell [2] Stage 2214 may begin after Execute Cell [2] Stage 2213-1 is completed. In Peak Cell [2] Stage 2214, the input voltage of cell 2101-2 is first subtracted from V in stage 2201(9). CS21[2] , then bypassing cell 2101-2 in stage 2201(10), two levels of peak cell [2] switching mode 2204 can be applied to the second cell 2101-2 to achieve 9V CS21[2] The peak output voltage.

[0502] At the same time, the switch of unit 2101-1 can be activated as follows:

[0503] In the start cell [1] stage 2215-1, a five-level start cell [1] switching pattern 2205-1 may be applied to cell 2101-1. The start cell [1] switching pattern 2205-1 may be initiated by first operating the switch of cell 2101-1 to ground the input of cell 2101-2 during the application of the two-level start cell [2] switching pattern 2202-1 in stages 2201-1 to cell 2101-2, and then providing V to cell 2101-2 during the first application of the three-level execution cell [2] switching pattern 2203-1 to cell 2101-2. CS21[1] Throughout the start cell [1] phase 2215-1, in cell 2101-1, switch SW[0] (electrically connected to the negative terminal of the voltage source) remains closed, and switch SW[3] (electrically connected to the positive terminal of the voltage source) of cell 2101-1 remains open.

[0504] Peak cell [1] phase 2217 (in which switch SW[0] remains open and switch SW[3] (electrically connected to the positive terminal of the voltage source) remains closed) may begin upon completion of start cell [1] phase 2215-1. In peak cell [1] phase 2217, during stages 2201(6)-2201(10), a five-level peak cell [1] switching pattern 2207 may be applied to cell 2101-1 to drive cell 2101-1 to its peak output voltage, first during a second application of execution cell [2] switching pattern 2203-1 to cell 2101-2, activating switches in cell 2101-1 in stages 2201(6)-2201(8) to provide V to cell 2101-2. DD21 Subtract V CS21[1] as its input voltage, and then in stages 2201(9)-2201(10), during the application of peak cell [2] switching mode 2204 on cell 2101-2, the supply voltage V is provided to the input of cell 2101-2. DD21 (In effect, cell 2101-1 is bypassed.) In the peak cell [1] phase 2217 of cell 2101-1, switch SW[0] remains open, and switch SW[3] remains closed.

[0505] Thus, when stage 2201(10) is completed, V is achieved for driver circuit 2100. DD21 The switching method 2200 of the peak output can then be applied to the circuit 2100 in reverse order to operate a complete drive cycle in which V has been increased in a stepwise manner to V DD21 The output voltage of the cell 2100 can be returned to ground in a step-down manner. Cell switching will include activation of switches through stages 2201(11)-2201(18) to achieve a step-down of the circuit output voltage to V CS21[2] .

[0506] The drive cycle is completed at stage 2201 (18), and the next operation of the drive cycle can drive the output voltage to ground in its first stage. This cycle can be repeated in a stepwise manner to drive the output voltage to V DD21 , then returns to V CS21[2] .

[0507] The variation of the cell switching pattern for driving cell 2101-2 in reverse order through stages 2201(11)-2201(18) is as follows:

[0508] In the peak cell [2] switching phase 2214, the output voltage of the circuit 2100 is increased to V when the second stage of the peak cell [2] phase 2214 is completed in stage 2201 (10). DD21 =9V CS21[2]Thereafter, stage 2214 may continue at stage 2201(11) to activate the switch group activated in stage 2201(9), thereby increasing the power consumption from V DD21 Subtract the input voltage V of unit 2101-2 CS21[2] .

[0509] After the peak cell [2] stage 2214 on cell 2101-2 is completed, the reverse execution cell [2] stage 2213-2 may begin. The reverse execution cell [2] stage 2213-2 may constitute the execution cell [2] stage 2213-1 operating on cell 2101-2 in reverse order. In the reverse execution cell [2] stage 2213-2, the three-level reverse execution cell [2] switching pattern 2203-2 may be applied twice to the switches in cell 2101-2. The reverse execution cell [2] switching pattern 2203-2 (where the levels of the execution cell [2] switching pattern 2203-1 may be implemented in reverse order) may be applied to activate the switch group in cell 2101-2 to convert V CS21[2] The output voltage provided to the unit 2101-2 then bypasses the unit 2101-2, and then the input voltage V DD21 Subtract V CS21[2] The second application of the reverse execution unit [2] switching pattern 2203-2 causes the output voltage of the circuit 2100 to reach V when stage 2201 (17) is completed. CS21[1] Subtract V CS21[2] , or 2V CS21[2] .

[0510] After stage 2201(17) completes reverse execution unit [2] stage 2213-2, reverse start unit [2] stage 2212-2 may be started on unit 2101-2. Reverse start unit [2] stage 2212-2 (which may be configured as start unit [2] stage 2212-1 operating in reverse order) has two stages of reverse start unit [2] switching pattern 2202-2, wherein the stages of start unit [2] switching pattern 2202-1 may operate in reverse order. Reverse start unit [2] switching pattern 2202-2 may be applied to switches in unit 2101-2, first by switching V to V in stage 2201(18). CS21[2] The output voltage is then provided, and then in a repetition of stage 2201(1), the bypass cell 2101-2 is used to return the output voltage of circuit 2100 to ground.

[0511] The phases and switching pattern of the method 2200 for driving the unit 2101-1 in reverse order are changed as follows:

[0512] Peak Unit [1] stage 2217 can be performed when the first two stages 2201 (10) of Peak Unit [2] stage 2214 are completed. Peak Unit [1] switching mode 2207 of stage 2217:

[0513] o Continue to maintain the power supply voltage V at the input of unit 2101-2 DD21 , while cell 2101-2 is still experiencing peak cell [2] switching mode 2204, and

[0514] o Then, operation is performed during stages 2201(12)-2201(14) so ​​that V is again provided to the input of cell 2101-2 while cell 2101-2 is undergoing the first application of reverse execution cell [2] switching mode 2203-2. DD21 Subtract V CS21[1] .

[0515] After the peak cell [1] stage 2217 of the cell 2101-1 is completed, the reverse start cell [1] stage 2215-2 begins. The reverse start cell [1] stage 2215-2, which can be configured to operate in a reverse sequence, can be applied to the cell 2101-1. The reverse start cell [1] stage 2215-2 has a five-level reverse start cell [1] switching pattern 2205-2, wherein the levels of the start cell [1] switching pattern 2205-1 can operate in a reverse sequence. The reverse start cell [1] switching pattern 2205-2 can be applied to the switches in the cell 2101-1:

[0516] o First operates during stages 2201(15)-2201(17) to provide V to the input of cell 2101-2 CS21[1] , while unit 2101-2 is undergoing a second application of reverse execution unit [2] switch mode 2203-2, and

[0517] o Then, during stages 2201(18)-2201(1), with stage 2201(1) constituting the first stage of the next operation of the drive cycle of circuit 2100, ground is provided to the input of cell 2101-2 while cell 2101-2 is undergoing application of the reverse start cell [2] switching pattern 2202-2 so that the output voltage of circuit 2100 returns to ground in the manner described above.

[0518] Figure 22M-2A1 : 3 unit drive circuit

[0519] Figure 22M-2A1 The illustrated method 2220 identifies switch activations for operating a driver circuit [wxy] having three driver units [w], [x], [y], each driver unit having a non-dissipative element and four switches.

[0520] Compare Figure 22M-1A to Figure 22M-2A1 and Figure 22M-1B to Figure 22M-2A2 , it can be seen that the switching pattern that can be used to control the output voltage of a two-unit drive circuit can be modified to control a three-unit drive circuit. As in switching method 2200, the units in a drive circuit having three driver units can be electrically bypassed by closing the first pair of switches (SW[0], SW[1]) in the series of switches in the unit and by closing the last pair of switches in the series of switches in the unit. Other switch groups can be operated to release the voltage storage capacity (and multiples thereof) of the non-dissipative element, or to reduce the output voltage by the voltage storage capacity (and multiples thereof) of the non-dissipative element to provide a step-by-step change in the voltage output of the drive circuit. In further stages, the non-dissipative element of another unit can be bypassed, and then the previously bypassed unit can be activated with or without other units in the drive circuit to extend the step-by-step switching pattern to release and discharge different voltage amounts.

[0521] Continuing, it should be understood that references to the first switch group (SW[0], SW[1]) and the last switch group (in a non-dissipative element unit, group (SW[2], SW[3])) both identify cell bypass operations and, when used in descriptions of a method of switching all cells except the first cell in a multi-cell drive circuit, may be used interchangeably regardless of which of the bypass switch groups is described herein, shown in the figures, or selected for implementation in a system according to the present invention.

[0522] Now let’s look at it in more detail. Figure 22M-2A1 , shows a switching sequence method 2220 for a driving circuit having three driver units, unit [w], unit [x], unit [y], each unit having a non-dissipative element and four switches. Figure 22K and Figure 22M-1A The selective and sequential switch opening and closing modes disclosed in Figure 22M-2A1 and Figure 22M-2A2 As can be seen in FIG, the voltage output increases in a stepwise manner by opening and closing selected switches to release the voltage from the selected cell while preventing other cells from contributing voltage to the drive circuit output, and once the voltage output from the circuit equals the supply voltage (V DD[wxy] ), the stages of the process may be performed in reverse order to again step down the voltage output back to the output voltage of V[y] in stage 2221 (54). As with the exemplary drive cycle of circuit 2100, the output voltage of circuit [wxy] may be increased by applying V O[wxy] The first stage of the drive cycle (stage 2221 ( 1 )) is driven to ground.

[0523] Figure 22M-1A , Figure 22M-1B Many modes of switch closures and resulting voltage outputs of stages 2201(1) through 2201(18) of method 2200 may be present in Figure 22M-2A1 , Figure 22M-2A2 This is seen in the pattern of switch closures and resulting voltage outputs of stages 2221(1) through 2221(54) in method 2220.

[0524] In addition, as in the embodiments disclosed above, the number of levels of switched group activation maintained on a selected cell of a multi-cell circuit can be based on its position in the circuit. For cell [w] or [x] in circuit [wxy], the number of levels of switched group activation maintained can be based on the number of non-dissipative elements in its adjacent downstream cells in circuit [wxy]. The switched group activation can be maintained on the selected cell for the duration of the method switching mode (while being performed on its adjacent downstream cells). When the selected cell is cell [y], (the last cell), the switched group activation can be maintained in the selected cell for the duration of one level of the method switching mode.

[0525] For the last cell (cell [y]) of circuit [wxy]:

[0526] In the start cell [y] stage 2232-1, in stages 2221(1) to 2221(2), a two-stage start cell [y] switching pattern 2202-1 (which is the same switching pattern as the start cell [2] switching pattern 2202-1 in the above method 2200) may be operated on cell [y] (previously defined as the last cell electrically connected to the output terminal of the drive circuit [wxy]) to bypass it and then add V[y] to the input voltage of cell [y].

[0527] Then, in the execution phase 2233-1, the three-level execution cell [y] switching pattern 2203-1 may be applied to first subtract V[y] from the input voltage of cell [y], then bypass cell [y], and then add V[y] to the input voltage of cell [y]. The execution cell [y] switching pattern 2203-1 (which is the same switching pattern as the execution cell [2] switching pattern 2203-1 in the method 2200 described above) may apply seven more applications (for a total of eight applications of the switching pattern 2203-1) to cell [y] to bring the output voltage of cell [y] to:

[0528] V DD[wxy] -V[x]+V[y]=25V[y].

[0529] Peak cell [y] stage 2234 may begin after execution of cell [y] stage 2233-1 is completed. Peak cell [y] stage 2234 may have a peak cell [y] switching mode 2204, (which is the same switching mode as peak cell [2] switching mode 2204 in method 2200 disclosed above). Peak cell [y] switching mode 2204 may operate on cell [y] to bring cell [wxy] to a peak output voltage, first by subtracting V[y] from the input voltage of cell [y] in stage 2221 (27), and then by bypassing cell [y] in stage 2221 (28). When drive circuit [wxy] obtains V DD[wxy] As its output voltage is then operated to stop, the peak cell [y] stage 2234 may end at stage 2221 (28).

[0530] Simultaneously and synchronously, unit [x] may be activated as follows:

[0531] The start cell [x] stage 2235-1 may have a start cell [x] switching pattern 2205-1 (which is the same switching pattern as the start cell [1] switching pattern 2205-1 in the method 2200 disclosed above). The switching pattern 2205-1 operates five stages on cell [x], first bypassing cell [x] during the application of the two-stage start cell [y] switching pattern 2202-1 to cell [y], and then providing V[x] to the input of cell [y] during the first application of the three-stage execution cell [y] switching pattern 2203-1 to cell [y].

[0532] · Execution unit [x] stage 2236-1 may begin after the start unit [x] stage 2235-1 is completed. In execution unit [x] stage 2236-1, nine-stage execution unit [x] switch mode 2226-1 may repeat the operation on unit [x] across the three applications of execution unit [y] switch mode 2203-1 on unit [y],

[0533] o During the entire application of switching pattern 2203-1 on cell [y], V[x] is first subtracted from the voltage input to cell [x] (which is the output voltage of cell [w]),

[0534] o then bypassing cell [x] during another entire application of switching pattern 2203-1 on cell [y], and

[0535] o Then, during another complete application of switching pattern 2203-1 on cell [y], V[x] is added to the output voltage of cell [x].

[0536] Then, across three additional applications of execution unit [y] switch pattern 2203-1 on unit [y], the nine-level execution unit [x] switch pattern 2226-1 may be repeated on unit [x].

[0537] Peak cell [x] stage 2237 may begin after execution cell [x] stage 2236-1 is completed. Peak cell [x] stage 2237 may have a peak cell [x] switching pattern 2207 (which is the same switching pattern as peak cell [1] switching pattern 2207 in method 2200 disclosed above). Switching pattern 2207 may operate its first three stages on cell [x] to subtract V[x] from the input of cell [x] during the last application of the three-stage execution cell [y] switching pattern 2203-1 on cell [y], and then bypass cell [x] during the first two stages of applying peak cell [y] switching pattern 2204 to cell [y] until a peak voltage V of circuit [wxy] is reached at the output terminal of cell [y]. DD[wxy] When the driving circuit [wxy] obtains V DD[wxy] As its output voltage is then operated to stop, the peak cell [x] stage 2237 may end at stage 2221 (28).

[0538] Simultaneously and synchronously, unit [w] can be activated as follows:

[0539] In the Start Cell [w] phase 2238-1, the fourteen-stage Start Cell [w] switching pattern 2228-1 may begin by operating on Cell [w] to bypass Cell [w], thereby applying ground to the input of Cell [x] during the application of the Start Cell [x] phase 2235-1 on Cell [x], and then providing V[w] to the input of Cell [x] during the first application of the Execute Cell [x] switching pattern 2226-1 on Cell [x]. During the entire Start Cell [w] phase 2238-1 on circuit [wxy], switch SW[0] in Cell [w] remains closed, and switch SW[3] in Cell [w] remains open.

[0540] Peak cell [w] stage 2239 may begin after start cell [w] stage 2238-1 is completed. Throughout stage 2239, switch SW[0] in cell [w] remains open and switch SW[3] in cell [w] remains closed. In peak cell [w] stage 2239, peak cell [w] switching pattern 2229 operates its first nine stages on cell [w] to apply the input voltage of cell [w] (which is the supply voltage V electrically connected to the voltage source of circuit [wxy]) to cell [x] for the second time during the application of execution cell [x] switching pattern 2226-1 on cell [x]. DD[wxy]) and then during the five-stage peak cell [x] switching mode 2207, V is provided to the input of cell [x] from stages 2221 (24) through 2221 (28). DD[wxy] , until the output of unit [x] also reaches the supply voltage V DD[wxy] When the driving circuit [wxy] obtains V DD[wxy] As its output voltage is then operated to stop, the peak unit [w] stage 2239 may end at stage 2221 (28).

[0541] Switching method 2220 (thereby achieving V of driving circuit [wxy] DD[wxy] The output of stage 2221 (28) can continue to switch activation according to the stages and switching patterns used in method 2220, operating in reverse order so that in the application of stage 2221 (1) from V in stage 2221 (28) DD[wxy] The output voltage is reduced in a step-wise manner to ground.

[0542] For cell [y]:

[0543] As in switching method 2200, peak cell [y] phase 2234 may continue with the third stage of peak cell [y] switching pattern 2204 to increase the output voltage V DD[wxy] Subtract V[y] from .

[0544] After the peak unit[y] stage 2234 is completed, the reverse execution unit[y] stage 2233-2 can begin on unit[y]. The reverse execution unit[y] stage 2233-2 requires the repeated application of the reverse execution unit[y] switching pattern 2203-2 on unit[y]. Figure 22M-2A1 , Figure 22M-2A2 In an embodiment of the present invention, reverse execution of cell [y] switching pattern 2203-2 may be applied eight times to switches in cell [y]. Reverse execution of cell [y] switching pattern 2203-2 (wherein the stages of execution of cell [y] switching pattern 2203-1 may be applied to cell [y] in reverse order) is arranged to first add V[y] to the output voltage of cell [y], then bypass cell [y], and then subtract V[y] from the input voltage of cell [y] so that at the end of stage 2221 (53), after eight applications of reverse execution of cell [y] switching pattern 2203-2, the output voltage of circuit [wxy] becomes V[x] minus V[y].

[0545] Reverse Start Cell [y] stage 2232-2 may begin after reverse execute Cell [y] stage 2233-2 is completed. In Reverse Start Cell [y] stage 2232-2, a two-stage reverse start cell [y] switching pattern 2202-2 is executed on cell [y]. Reverse Start Cell [y] switching pattern 2202-2 (where the stages of start cell [y] switching pattern 2202-1 may be implemented in reverse) may operate on cell [y] by first adding V [y] to the input voltage of cell [y] in stage 2221 (54), and then bypassing cell [y] in the application of stage 2221 (1) to return the output voltage of cell [y] to ground.

[0546] For cell [x]:

[0547] Peak cell [x] stage 2237 may continue with stage 2221 (29) of peak cell [x] switching mode 2207 to bypass cell [x] to ensure that V is provided to the input of cell [y] for the duration of peak cell [y] switching mode 2204 on cell [y]. DD[wxy] Then, during the first application of the reverse execution unit [y] switching mode 2203-2 on unit [y], the voltage input to unit [y] is reduced by V [x] .

[0548] · Reverse Execution Unit [x] stage 2236-2 may begin after the peak unit [x] stage 2237 is completed. Reverse Execution Unit [x] stage 2236-2 invokes two applications on unit [x] of Reverse Execution Unit [x] switch pattern 2226-2, where the stages of Execution Unit [x] pattern 2226-1 are implemented in reverse order. During the three applications of Reverse Execution Unit [y] switch pattern 2203-2 on unit [y], each application of Reverse Execution Unit [x] switch pattern 2226-2 in stage 2236-2 operates on unit [x]:

[0549] o during application of reverse-acting cell [y] switching pattern 2203-2 to cell [y] (which in the current embodiment is the second application of reverse-acting cell [y] switching pattern 2203-2 (the first application having been operated on cell [y] during the last stage of peak cell [x] switching pattern 2207)), V[x] is first added to the input voltage of cell [x];

[0550] o then bypassing cell [x] during an additional application of reverse-execution cell [y] switching pattern 2203-2 to cell [y], which in the present embodiment is a third application of pattern 2203-2 to cell [y]; and

[0551] o Then, during another application of the reverse execution pattern 2203-2 on cell [y] (in the current embodiment, which is the fourth application of the pattern 2203-2 on cell [y]), V[x] is subtracted from the input voltage of cell [y].

[0552] In the current embodiment, the second application of reverse executing unit [x] switching pattern 2226-2 is performed during the fifth, sixth, and seventh applications of switching pattern 2203-2 on unit [y]. The two applications of reverse executing unit [x] switching pattern 2226-2 cause the output voltage of circuit [wxy] to reach V[w] minus V[x] and minus V[y], or 5V[y], when reverse unit [x] stage 2236-2 is completed.

[0553] Reverse Start Cell [x] phase 2235-2 may begin after reverse execute cell [x] pattern 2236-2 is completed. In phase 2235-2, a five-stage reverse start cell [x] pattern 2205-2 (where the stages of start cell [x] pattern 2205-1 may be implemented in reverse order) first provides V[x] to the voltage input of cell [y] during the eighth application of reverse execute cell [y] pattern 2203-2 on cell [y], and then bypasses cell [x] during the application of reverse start cell [y] switching pattern 2202-2 on cell [y] so that switching pattern 2202-2 may return the output voltage of circuit [wxy] to ground by applying stage 2221(1).

[0554] For unit [w]:

[0555] ·The peak cell [w] stage 2239 can be continued with stage 2221 (29) of the peak cell [w] switching pattern 2229 to provide the supply voltage of circuit [wxy] to the input of cell [x] and continue the supply voltage bypass of cell [w] for the duration of the peak cell [x] switching pattern 2207 on cell [x]; and then, during the first application of the reverse execution cell [x] switching pattern 2226-2, reduce the voltage input to cell [x] by V[w].

[0556] Upon completion of stage 2221(41), after completion of peak cell [w] stage 2239, reverse start cell [w] stage 2238-2 may commence. In stage 2238-2, a 14-stage reverse start cell [w] switching pattern 2228-2 (wherein the stages of the start cell [w] switching pattern 2228-1 are implemented in reverse order) may be applied to cell [w], first by adding V[w] to the input voltage of cell [w] during a second application of the reverse execute cell [x] switching pattern 2226-2 to cell [x], and then by ground bypassing cell [w] during application of the reverse start cell [x] switching pattern 2205-2 to cell [x], returning the input voltage of cell [x] to ground. As with cells [x], [y], cell [w] may be bypassed after the output voltage drive cycle is complete by applying stage 2221(1).

[0557] Figure 22M-2B1 : 4-unit drive circuit

[0558] Further summarizing the method 2200, Figure 22M-2B1 , Figure 22M-2B2 An exemplary switching method 2240 for operating a drive circuit [vwxy] having four driver units [v], [w], [x], [y], each having one non-dissipative element and four switches is shown. A fourth driver unit in drive circuit [vwxy] is presented here to illustrate how the same switch activation pattern that results in activation of switches in units in drive circuit [wxy] can be applied to activate switches in units in drive circuit [vwxy] and switches in drive circuits having any number of driver units.

[0559] Figure 22M-2B1 Adopted Figure 22L-1 to Figure 22L-3 The functional representation of the switching activation shown, which maps the switch groups activated in the stages of the method to the functional results of the switching. For example, in a unit with one non-dissipative element:

[0560] activating a first cell of the multi-cell circuit, specifically a switch group (SW[0], SW[1]) (also referred to as a first switch and a second switch) in the cell directly connected to a voltage source of the drive circuit, operating to bypass the non-dissipative element of the first cell and applying a voltage at a negative terminal of the voltage source (here, ground) to an output terminal of the first cell, Figure 22M-2B1 and in the switching diagrams that follow referred to as “b(ground)” or simply “b(g)”.

[0561] Activate the last and penultimate switches in the first cell of the multi-cell circuit (the switch group (SW[2], SW[3]) in a non-dissipative element driving cell also operates to bypass the cell; it increases the voltage at the positive terminal of the voltage source (here V DD[vwxy]) is applied to the output terminals of the first unit, Figure 22M-2B1 and the switching diagrams that follow are referred to as “b(V DD[*] )", where * is the identifier of the target circuit.

[0562] As described above, in any cell other than the first cell in the multi-cell circuit, activating the first and second switches or the last and penultimate switches (the switch group (SW[0], SW[1]) or (SW[2], SW[3]) in a non-dissipative element driven cell also operates to bypass the cell, applying the voltage at the cell input terminal to the cell output terminal, referred to as “b”.

[0563] Activating the first switch and the third switch (a non-dissipative element driving switch (SW[0], SW[2]) in any cell of the multi-cell circuit operates to activate the non-dissipative element of the cell to add the voltage storage capacity of the non-dissipative element of the cell to the input voltage of the cell, referred to as “+”.

[0564] Activating the last switch and the third-to-last switch (a non-dissipative element driving switch (SW[1], SW[3]) in any cell of the multi-cell circuit operates to activate the non-dissipative element of the cell to subtract an amount of the voltage storage capacity of the non-dissipative element of the cell, referred to as “-”, from the input voltage of the cell.

[0565] The symbol change allows the switching pattern to be illustrated in a single line of the diagram, allows fewer lines to be used in diagrams illustrating the switching sequence method, and allows the diagram to more easily show the repetition of the switching pattern. Figure 22M-2A1 The switching sequence method 2220 and Figure 22M-2B1 A direct comparison of the switching sequence method 2240 shows that although Figure 22M-2A1 shows a single level per row, while Figure 22M-2B1 The switching pattern in each row is shown, and although the driving circuits [wxy], [vwxy] have different numbers of cells in the circuit, the methods 2220, 2240 (and method 2200) have substantially the same phases of switch activation and switching patterns. Figure 22M-1A to Figure 22M-2B2 It is shown that as the number of cells in the driver circuit increases, the switching phases and switching patterns in a switching sequence method for operating the most basic multi-cell driver circuit can be applied to driver circuits with a larger number of cells to achieve a gradual change in the voltage delivered to the driver circuit output.

[0566] To simplify the example, Figure 22M-2B1, the cells in the drive circuit [vwxy] each contain a non-dissipative element, and all non-dissipative elements of the cell will have the same capacitance. The issue of relaxing these restrictions will be discussed below. At the same time, it can be seen that the switching sequence of the drive circuit [vwxy] continues to constitute a switching pattern with the following functions (subtracting the selected voltage from the output voltage of the cell, bypassing the circuit "b", and adding the selected voltage amount to the output voltage "+" of the cell), hereinafter referred to as "(-, b, +)"; and applying a similar switching pattern to the upstream cell in the circuit, applying a switching pattern in forward sequence or reverse sequence to the cell, resulting in a step-by-step change in the output voltage of the circuit.

[0567] The last cell in the driver circuit [vwxy] (it is directly connected to the output of the driver circuit and it is cell [y] in the driver circuit [vwxy]) can operate in the following phases and activation modes:

[0568] In the start cell [y] stage 2252-1, a two-stage start last cell switching pattern 2202-1 (which is the same switching pattern as the start cell [2] switching pattern 2202-1 in method 2200 and the start cell [y] switching pattern 2202-1 in method 2220) is shown with a switch activation function symbol (b, +) for bypassing the last cell and then for adding the voltage storage capacity of the non-dissipative element of the last cell (forming the voltage level V[y]) to the input voltage of cell [y]. As described above, in the last cell of the driver circuit, bypassing is achieved by activating switches (SW[0], SW[1]) or switches (SW[2], SW[3]) in cell [y],

[0569] Execution unit [y] stage 2253-1 begins after the start unit [y] stage 2252-1 is completed. Stage 2253-1 calls for repeated application of a three-level execution unit [y] switch pattern 2203-1 (which is the same switch pattern as execution unit [2] switch pattern 2203-1 in method 2200 and execution unit [y] switch pattern 2203-1 in method 2220). Execution unit [y] switch pattern 2203-1 with function (-, b, +) operates to first subtract voltage step V[y] from the input voltage of the last cell, then bypass the last cell, and then add V[y] to the input voltage of the last cell. In method 2240, pattern 2203-1 may be applied 26 times until the output voltage of circuit [vwxy] is equal to two voltage steps from the supply voltage from the voltage source.

[0570] Peak cell [y] stage 2254 begins after execution of cell [y] stage 2253-1 is completed. Peak cell [y] stage 2254 employs peak cell [y] switching pattern 2204 with (-, b, -) functionality (which is the same switching pattern as peak cell [2] switching pattern 2204 in method 2200 and peak cell [y] switching pattern 2204 in method 2220). The first two stages (-, b) of peak cell [y] switching pattern 2204 subtract V[y] from the input voltage of the last cell and then bypass the last cell to obtain the supply voltage as the output voltage of circuit [vwxy].

[0571] When operation of the drive circuit continues after the output voltage of cell [y] equals the obtained supply voltage, the peak cell [y] stage 2254 can allow the peak cell [y] switching mode 2204 to apply its full (-, b, -) functionality by operating the final stage of the peak cell [y] switching mode 2204 to again subtract V[y] from the cell [y] input voltage.

[0572] Reverse Execute Cell [y] Phase 2253-2 may begin after Peak Cell [y] Phase 2254 is completed. Phase 2253-2 may have Reverse Execute Cell [y] Switch Pattern 2203-2 where the stages of Execute Cell [y] Switch Pattern 2203-1 with (-, b, +) functions are applied to Cell [y] in reverse order where the switching pattern applies the (+, b, -) function on Cell [y]. Reverse Execute Cell [y] Switch Pattern 2203-2 may be repeated until the output voltage of circuit [vwxy] is two voltage steps away from ground.

[0573] The reverse start phase 2252-2 may be initiated after the reverse execution of the cell [y] phase 2253-2 is completed. The reverse start phase 2252-2 has a reverse start cell [y] switching pattern 2202-2, wherein the stages of the start cell [y] switching pattern 2202-1 having function (b, +) are applied to cell [y] in reverse order, employing a two-stage reverse start pattern 2202-2 having (+, b) function, which may be operated to drive the output voltage of the circuit [vwxy] to ground, wherein the b function is provided after the output voltage drive cycle is completed by the application of stage 2241(1).

[0574] A first cell in a drive circuit (which is directly connected to a voltage source for the drive circuit and is cell [v] in the drive circuit [vwxy]) is located upstream and adjacent to a second cell in the drive circuit. The second cell is also referred to herein as cell [2] and is referred to as cell [w] in the drive circuit [vwxy]. The first cell may operate in the following phases and activation modes:

[0575] In the start cell [v] stage 2218-1, the start cell [v] switching pattern 2208-1 may be operated on a first cell in the circuit, with a switch activation function symbol b (ground) repeated for 14 stages for the duration of applying the start cell [w] switching pattern 2228-1 on cell [w], and another activation function symbol + repeated for 27 stages for the duration of the first application of the execution cell [w] switching pattern 2241-1 on a second cell [w];

[0576] The peak cell [v] stage 2219 may be after the start cell [v] stage 2218-1 is completed. The peak cell [v] stage 2219 may have a peak cell [v] switching pattern 2209 that first reduces the supply voltage of the voltage source by V[v] during the second application of the execution cell [w] switching pattern 2241-1 to the downstream adjacent cell [w]; and then bypasses the cell [v] to ensure that the cell [v] provides the voltage source (V) during the application of the peak cell [w] switching pattern 2229 (described below). DD[vwxy] ) as the output of unit [v] until unit [w] reaches V DD[vwxy] as its output.

[0577] When method 2240 of driving circuit [vwxy] continues after stage 2241 (82):

[0578] Peak cell [v] switching mode 2209 can continue bypassing its cell [v] (V DD[vwxy] ) until the peak cell [w] switching pattern 2229 is completed on the downstream adjacent cell [w]; then, during the first application of the reverse execution cell [w] switching pattern 2241-2 on the second cell [w], from V DD[vwxy ] minus V[y].

[0579] After the first application of the reverse executing cell [w] switching pattern 2241-2 is completed, the reverse cell [v] switching start phase 2218-2 may be initiated after the peak cell [v] switching phase 2219 is completed. Phase 2218-2 may have a reverse start cell [v] switching pattern 2208-2, wherein the stages of the start cell [v] switching pattern 2208-1 are implemented in reverse order to provide the following functions (+ represents the duration of the second application of the reverse executing cell [w] switching pattern 2241-2 to cell [w], and b (ground) represents the duration of the reverse start cell [w] switching pattern 2228-2), so that after the output voltage drive cycle is completed, the output of cell [w] is driven to ground by applying stage 2241 (1).

[0580] refer to Figure 22M-2B1 , Figure 22M-2B2, it can be seen that method 2240 has the following phases and unit switching patterns:

[0581] The methods of unit [w] have:

[0582] o a start unit [w] stage 2258-1 having a start unit [w] switching pattern 2228-1 (which is the same switching pattern as the start unit [w] switching pattern 2228-1 in method 2220);

[0583] o Repeatedly apply the execution unit [w] stage 2251-1 of the execution unit [w] switching mode 2241-1;

[0584] o a peak cell [w] stage 2259 having a peak cell [w] switching pattern 2229 (which is the same switching pattern as the peak cell [w] switching pattern 2229 in method 2220);

[0585] o repeatedly applying the reverse execution unit [w] stage 2251-2 of the reverse execution unit [w] switching mode 2241-2; and

[0586] O has a reverse start unit [w] phase 2258-2 of a reverse start unit [w] switching pattern 2228-2.

[0587] The methods of unit [x] have:

[0588] o a start unit [x] stage 2255-1 having a start unit [x] switching pattern 2205-1 (which is the same switching pattern as the start unit [1] switching pattern 2205-1 in method 2200 and the start unit [x] switching pattern 2205-1 in method 2220);

[0589] o execution unit [x] stage 2256-1 with execution unit [x] switch pattern 2226-1 (which is the same switch pattern as execution unit [x] switch pattern 2206-1 in method 2220);

[0590] o a peak cell [x] stage 2257 having a peak cell [x] switching pattern 2207 (which is the same switching pattern as the peak cell [1] switching pattern 2207 in method 2200 and the start cell [x] switching pattern 2207 in method 2220);

[0591] o Reverse execution reverse unit [x] stage 2256-2 with reverse unit [x] switch execution mode 2226-2; and

[0592] o Reverse start unit [x] phase 2255-2 with reverse start unit [x] switching mode 2205-2.

[0593] It can be seen that the driving circuit [vwxy] is an example of a K-cell driving circuit in which the circuit has four cells, each cell in the driving circuit has a single non-dissipative element and four switches, and makes the cell [v] and the cell [y] of the circuit [vwxy] work as the cell [1] and the cell [K] in the multi-cell driving circuit, respectively. Therefore, the above method for controlling the cells [v], [y] can be used as an exemplary embodiment of a method for driving the cells [1], [K] of a generalized multi-cell circuit having a single non-dissipative element and four switches.

[0594] It can also be seen that cells [w] and [x] are instances of cells [i] in the defined generalized multi-cell drive circuit, where (2≤i≤K-1), and for cell [w] i=2, for cell [x] i=3 of circuit [vwxy]. The method for controlling cells [w], [x] can be understood in the method described below for controlling cell [i] of a multi-cell drive circuit, where each cell in the drive circuit has one non-dissipative element and four switches. Cell [i] can be operated according to a cell switching method having the following phases and switch activation patterns:

[0595] The start unit [i] phase comprises a start unit [i] switching pattern having the following functions: b a duration for applying the start unit [i+1] switching pattern on unit [i+1], + a duration for executing the first application of the unit [i+1] switching pattern on unit [i+1] for a drive cycle.

[0596] The execute unit [i] phase may be performed after the start unit [i] phase is completed. The execute unit [i] phase may operate multiple applications of the execute unit [i] switching pattern on unit [i]. When unit [i] has one non-dissipative element, the execute unit [i] phase may end when the second last application of the execute unit [i+1] switching pattern in a drive cycle on unit [i+1] is completed. When unit [i] has n non-dissipative elements, the execute unit [i] phase may end when the n+1th last application of the execute unit [i+1] switching pattern in a drive cycle on unit [i+1] is completed.

[0597] Executing unit[i] switch mode on unit[i] can have the following functions:

[0598] o- during the application of the execution unit [i+1] switching mode to unit [i+1],

[0599] o b during another application of switching execution unit [i+1] mode to unit [i+1], and

[0600] ο+During another application of the execution unit [i+1] switching mode on unit [i+1].

[0601] The peak unit [i] stage may be performed after the execution unit [i] switching stage is completed. The peak unit [i] stage may have a peak unit [i] switching mode, which has the following functions:

[0602] o - during the last application of the drive cycle of the execution unit [i+1] switching mode on unit [i+1], and

[0603] ob During the application of the peak cell [i+1] switching pattern on cell [i+1], until cell [i+1] reaches its peak voltage.

[0604] After the driver circuit reaches the power supply voltage as its output voltage, the operation of the driver circuit continues when:

[0605] ·The peak unit [i] switching pattern may continue: (b until the peak unit [i+1] switching pattern is completed on unit [i+1], - the duration of the first application of the drive cycle of the reverse execution unit [i+1] switching pattern on unit (i+1)).

[0606] ·The reverse actuation unit [i] phase may begin after the peak unit [i] phase is completed. The reverse actuation unit [i] phase may repeat the reverse actuation unit [i] switching pattern. When unit [i] has one non-dissipative element, the reverse actuation unit [i] phase may end upon completion of the second last application of the reverse actuation unit [i+1] switching pattern in a drive cycle on unit [i+1]. When unit [i] has n non-dissipative elements, the reverse actuation unit [i] phase may end upon completion of the (n+1)th last application of the actuation unit [i+1] switching pattern in a drive cycle on unit [i+1].

[0607] The reverse execution unit [i] stage can have the following functions:

[0608] During the application of the reverse execution unit [i+1] switching mode to unit [i+1],

[0609] o b during another application of the switch mode of unit [i+1] to unit [i+1] to be executed in reverse, and

[0610] o-During another application of the switching mode of unit [i+1] to unit [i+1], the reverse execution is to be performed.

[0611] The reverse start unit [i] phase may start after the reverse execution unit [i] phase is completed. The reverse start unit [i] phase may have a reverse start unit [i] switching mode, which has the following functions:

[0612] ο+ during the last application of the switching mode of unit [i+1] to unit [i+1], and

[0613] o b provides b function after completing the output voltage drive cycle by applying stage 2241 (1) during application of the reverse starting cell [i+1] switching mode on cell [i+1].

[0614] · K-cell driver circuit having a cell with multiple non-dissipative elements

[0615] Figure 22M-3A , Figure 22M-4A : 2-cell drive circuit, having a cell with a non-dissipative element, and a cell with Unit with two non-dissipative elements

[0616] exist Figure 22M-3A , Figure 22M-3B and Figure 22M-4A , Figure 22M-4B Similar switching patterns can also be seen in the switching sequence methods 2260, 2270 in FIG. 1 for a drive circuit having a unit with one non-dissipative element and another unit with two non-dissipative elements. For the purpose of simplicity, it is assumed that the capacitances of the non-dissipative elements are equal, but it should be understood that the drive circuit and switching sequence method can be developed for step-wise increase and decrease of the voltage output of a drive circuit having non-dissipative elements of unequal capacitance.

[0617] It can be seen in switching sequence methods 2260 and 2270 that the phases and switching patterns of a multi-unit driving circuit having non-dissipative elements distributed differently on the units of the driving circuit are similar to the switching patterns seen in methods 2200, 2220 and 2240, with the difference being caused by the number of non-dissipative elements in the units in the driving circuit, resulting in the switches in the switch activation group being different due to the number of non-dissipative elements in the units.

[0618] For example, a cell with a single non-dissipative element has one switch group (SW[0], W[2]) that, when activated, cause the output voltage of the driving cell to increase, while a cell with two non-dissipative elements has two switch groups (SW[0], SW[2]), (SW[0], SW[3]) that, when activated, cause the output voltage of the driving cell to increase. Activation of the switch group (SW[0], SW[2]) provides the voltage storage capacity of one non-dissipative element to the output voltage, while activation of the switch group (SW[0], SW[3]) provides the voltage storage capacity of two non-dissipative elements to the output voltage.

[0619] Furthermore, the unit with a single non-dissipative element has one switch group (SW[1], W[3]) which, when activated, causes the output voltage of the driving unit to be reduced by the voltage storage capacity of its one non-dissipative element, while the unit with two non-dissipative elements has two switch groups (SW[1], SW[4]), (SW[2], SW[4]) which, when activated, cause the output voltage of the driving unit to be reduced. Activation of the switch group (SW[2], SW[4]) reduces the output voltage by the voltage storage capacity of one non-dissipative element, while activation of the switch group (SW[1], SW[4]) reduces the output voltage by the voltage storage capacity of two non-dissipative elements.

[0620] Figure 22M-3A : Driving circuit [ab]. Having a unit with two non-dissipative elements [b]

[0621] Figure 22M-3A , Figure 22M-3B A switching sequence method 2260 of a drive circuit [ab] is shown, the drive circuit [ab] having one non-dissipative component unit [a] electrically connected to a voltage source of the drive circuit and two non-dissipative component units [b] electrically connected to output terminals of the drive circuit.

[0622] For cell [b] of circuit [ab], method 2260 mirrors method 2200, with:

[0623] a start cell [b] phase 2262-1 similar to the start cell [2] phase 2212-1 of method 2200 and having a start cell [b] switching pattern 2242-1 similar to the start cell [2] switching pattern 2202-1 used for the start cell [2] phase 2212-1, wherein both switching patterns 2242-1, 2202-1 apply switch activation that increases the output voltage of their respective cells via bypass;

[0624] an execution unit [b] stage 2263-1 similar to execution unit [2] stage 2213-1 of method 2200 and having an execution unit [b] switching pattern 2243-1 similar to execution unit [2] switching pattern 2203-1 for execution unit [2] stage 2213-1, wherein switching patterns 2243-1, 2203-1 both apply switch activations that increase the output voltage of the respective cell from a minimum cell voltage to a peak cell voltage;

[0625] a peak cell [b] stage 2264 similar to the peak cell [2] stage 2214 of method 2200 and having a peak cell [b] switching pattern 2244 similar to the peak cell [2] switching pattern 2204 for the peak cell [2] stage 2214, wherein both switching patterns 2244, 2204 apply switch activations that increase the output voltage of the respective cell from a minimum cell voltage to a peak cell voltage and back to the minimum cell voltage;

[0626] a reverse execution unit [b] stage 2263-2 similar to the reverse execution unit [2] stage 2213-2 of method 2200 and having a reverse execution unit [b] switch pattern 2243-2 similar to reverse execution unit [2] switch pattern 2203-2, wherein the stages of reverse switch patterns 2243-2, 2203-2 are applied to their respective units in reverse order to switch patterns 2243-1, 2203-1, respectively; and

[0627] · A reverse start unit [b] stage 2262-2 similar to the reverse start unit [2] stage 2212-2 of method 2200, and having a reverse start unit [b] switching mode 2242-2 similar to the reverse start unit [2] switching mode 2202-2, wherein the stages of the reverse switching modes 2242-2, 2202-2 are applied to their respective units in a reverse order to the switching modes 2242-1, 2202-1, respectively, wherein the b function is provided after the output voltage drive cycle is completed by applying stage 2261(1).

[0628] In addition, the switch closures and resulting output voltages of initial stages 2261(1), 2261(2) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(1), 2201(2), respectively, of method 2200, wherein stage 2261(3) is added after stage 2261(2) to allow activation of the switch group (SW[0], SW[3]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can provide a voltage to the output of driver circuit [ab]. When the two non-dissipative elements have equivalent voltage capacity, the driver circuit output is 2V[b].

[0629] The two-stage starting cell [2] switching pattern 2202-1 with (b, +) functionality of cell 2101-2 can be modified to provide a three-stage starting cell [b] switching pattern 2242-1 with (b, +, 2+) functionality for two non-dissipative element driver cells. By extension, the two-stage combination of the reverse starting cell [2] switching pattern 2202-2 for cell 2101-2 and the first stage of the starting cell [2] switching pattern 2202-1 with (+, b) functionality can be modified to provide a three-stage combination of the reverse starting cell [b] switching pattern 2242-2 for two non-dissipative element driver cells [b] and the first stage of the starting cell [b] switching pattern 2242-1 with (2+, +, b) functionality.

[0630] The switch closures and resulting voltage outputs of stages 2261(5), 2261(6), 2261(7) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(3), 2201(4), 2201(5), respectively, of method 2200, with the addition of the following stages:

[0631] Stage 2261(4) is added before stage 2261(5) to allow activation of the switch group (SW[1], SW[4]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can help reduce the input voltage of cell [b], i.e., V[a]. When the voltage capacity of the two non-dissipative elements is equal, the output voltage of the driver circuit is V[a]-2V[b]=3V[b].

[0632] Stage 2261(8) is added after stage 2261(7) to allow activation of the switch group (SW[0], SW[3]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] can contribute to increasing V[a]. When the voltage capacity of the two non-dissipative elements is equivalent, the driver circuit output voltage is V[a]+2V[b]=7V[b].

[0633] The switch closures and resulting voltage outputs of stages 2261(10), 2261(11), 2261(12) of method 2260 mirror the switch closures and resulting voltage outputs of stages 2201(6), 2201(7), 2201(8), respectively, of method 2200, with the addition of the following stages:

[0634] Stage 2261(9) is added before stage 2261(10) to allow activation of the switch set (SW[1], SW[4]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] helps reduce the input voltage of cell [b], i.e., V DD[ab] -V[a]), when the two non-dissipative components have equivalent voltage capacity, the output voltage in the drive circuit is (VDD[ab] -V[a])-2V[b]=8V[b].

[0635] Stage 2261 (13) is added after stage 2261 (12) to allow activation of the switch group (SW[0], SW[3]) in cell [b] so that the voltage storage capacity of the two non-dissipative elements in cell [b] contributes to increasing the input voltage of cell [b], resulting in an output in the driver circuit of (V DD[ab] -V[a])+2V[b]=12V[b].

[0636] Figure 22M-1A The three-level execution unit [2] switching mode 2203-1 of the (-, b, +) function of the unit 2101-2 can be modified to provide a five-level execution unit [b] switching mode 2243-1 with (2-, -, b, +, 2+) functions for two non-dissipative element driver units [b]. By extension, the three-level reverse execution unit [2] switching mode 2203-2 of the (+, b, -) function for the unit 2101-2 can be modified to provide a five-level reverse execution unit [b] mode 2243-2 with (2+, +, b, -, 2-) functions for two non-dissipative element driver units [b].

[0637] The switch closures and resulting output voltages of stages 2261(15), 2261(16) of method 2260 mirror the switch closures and resulting output voltages of stages 2201(9), 2201(10) of method 2200, respectively, wherein stage 2261(14) is added before stage 2261(15) to allow the switch group (SW[1], SW[4]) in cell [b] to be activated so that the voltage storage capacity of the two non-dissipative elements in cell [b] can help reduce the input voltage (V DD[ab] ), when the two non-dissipative components have equivalent voltage capacity, resulting in the output of the driver circuit being V DD[ab] -2V[b]=13V[b].

[0638] The three-level peak cell [2] switching mode 2204 with (-, b, -) functionality for cell 2101-2 may be modified to provide a five-level peak cell [b] switching mode 2244 with (2-, -, b, -, 2-) functionality for two non-dissipative element driver cells [b].

[0639] For cell [a] of circuit [ab], method 2260 mirrors method 2200, with:

[0640] a start cell [a] phase 2265-1 similar to the start cell [1] phase 2215-1 of method 2200 and having a start cell [a] switching pattern 2245-1 similar to the start cell [1] switching pattern 2205-1 used for the start cell [1] phase 2215-1, wherein the switching patterns 2245-1, 2205-1 both apply switch activations that increase the output voltage of their respective cells from ground to a peak cell voltage and wherein both modes 2245-1, 2205-1 maintain their sets of switch activations for the duration of the cell switching pattern being applied to adjacent downstream cells in their respective circuits;

[0641] a peak cell [a] stage 2267 similar to the peak cell [1] stage 2217 of method 2200 and having a peak cell [a] switching pattern 2247 similar to the peak cell [1] switching pattern 2207 of the peak cell [1] stage 2217, wherein the patterns 2247, 2207 both maintain their switch activation groups for the duration that the cell switching pattern is applied to adjacent downstream cells in their respective circuits; and

[0642] · A reverse start unit [a] stage 2265-2 similar to the reverse start unit [1] stage 2215-2 of method 2200, and having a reverse start unit [a] switching pattern 2245-2 similar to the reverse start unit [1] switching pattern 2205-2 used for the reverse start unit [1] stage 2215-2, wherein the levels of the two switching patterns 2245-2, 2205-2 are applied to their respective units in an order reverse to the switching patterns 2245-1, 2205-1, respectively.

[0643] In addition, to accommodate the additional non-dissipative elements in cell [b], the five-level start cell [1] switching pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level start cell [a] switching pattern 2245-1 with (b, b, b, +, +, +, +) functionality for cell [a]. By extension, the five-level combination of the reverse start cell [1] switching pattern 2205-2 and the first level of the start cell [1] switching pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level combination of the reverse start cell [a] switching pattern 2245-2 and the first level of the start cell [a] switching pattern 2245-1 with (+, +, +, +, +, b, b, b) functionality for cell [a].

[0644] The nine-level peak cell [1] switching pattern 2207 for cell 2101-1 with (-, -, -, b, b, b, -, -, -) functionality can be modified to provide a fifteen-level peak cell [a] switching pattern 2247 for cell [a] of (5 - applications, 3 b applications (until cell [b] reaches its peak voltage)) followed by (another 2 b applications, 5 - applications).

[0645] Figure 22M-4A : Circuit [mn], with cell [m] with 2 non-dissipative elements

[0646] exist Figure 22M-4A , Figure 22M-4B 22 shows a switching sequence method 2270 of a drive circuit [mn] having two non-dissipative component units [m] electrically connected to a voltage source of the drive circuit and one non-dissipative component unit [n] electrically connected to an output terminal of the drive circuit.

[0647] For unit [n], method 2270 mirrors method 2200, method 2270 having:

[0648] a start unit [n] stage 2272-1 that is identical to the start unit [2] stage 2212-1 of method 2200 and has a start unit [n] switching pattern 2202-1 that is identical to the start unit [2] switching pattern 2202-1 used for the start unit [2] stage 2212-1;

[0649] an execution unit [n] stage 2273-1 similar to the execution unit [2] stage 2213-1 of method 2200 and having the same execution unit [n] switch pattern 2203-1 as the execution unit [2] switch pattern 2203-1 for the execution unit [2] stage 2213-1;

[0650] a peak cell [n] stage 2274 that is identical to the peak cell [2] stage 2214 of method 2200 and has a peak cell [n] switching pattern 2204 that is identical to the peak cell [2] switching pattern 2204 used for the peak cell [2] stage 2214,

[0651] a reverse execution unit [n] stage 2273-2 similar to the reverse execution unit [2] stage 2213-2 of method 2200 and having the same reverse execution unit [n] switching pattern 2203-2 as the reverse execution unit [2] switching pattern 2203-2 for execution unit [2] stage 2213-2; and

[0652] a reverse start unit [n] stage 2272-2 identical to the reverse start unit [2] stage 2212-2 of method 2200 and having a reverse start unit [n] switching pattern 2202-2 identical to the reverse start unit [2] switching pattern 2202-2 for reverse start unit [2] stage 2212-2 for unit [n], and

[0653] For unit [m], method 2270 mirrors method 2200, with:

[0654] a start cell [m] phase 2275-1 similar to the start cell [1] phase 2215-1 of method 2200 and having a start cell [m] switching pattern 2248-1 similar to the start cell [1] switching pattern 2205-1 used for the start cell [1] phase 2215-1, wherein the switching patterns 2248-1, 2205-1 both apply switch activations that increase the output voltage of their respective cells from a bypass, and wherein the patterns 2248-1, 2205-1 both maintain their set of switch activations for the duration that the cell switching patterns are applied to adjacent downstream cells in their respective circuits;

[0655] a peak cell [m] stage 2277 similar to the peak cell [1] stage 2217 of method 2200 and having a peak cell [m] switching pattern 2249 similar to the peak cell [1] switching pattern 2207 for the peak cell [1] stage 2217, wherein the switching patterns 2249, 2207 both apply switch activations that increase the output voltage of their respective cells from a minimum cell voltage to a peak cell voltage and back to the minimum voltage, and wherein the patterns 2249, 2207 both maintain their groups of switch activations for the duration that the cell switching patterns are applied to adjacent downstream cells in their respective circuits; and

[0656] A reverse start unit [m] stage 2275-2 similar to the reverse start unit [1] stage 2215-2 of method 2200 and having a reverse start unit [m] switching pattern 2248-2 similar to the reverse start unit [1] switching pattern 2205-2 used for the reverse start unit [1] stage 2215-2, wherein the levels of the switching patterns 2248-2, 2205-2 are applied to their respective units in a reverse order to the switching patterns 2248-1, 2205-1, respectively.

[0657] In addition, the switch closures and resulting output voltages of stages 2271(1) to 2271(5) and 2271(12) to 2271(16) of method 2270 mirror the switch closures and resulting voltage outputs of stages 2201(1) to 2201(5) and 2201(6) to 2201(10) of method 2200, respectively.

[0658] Stages 2271(6) through 2271(11) have been added to method 2270 to allow activation of switch groups (SW[0], SW[3]) and (SW[1], SW[4]) in cell [m] so that the voltage storage capacity of the two non-dissipative elements in cell [m] can assist in the operation of drive circuit [mn].

[0659] To accommodate the two non-dissipative elements of cell [m], the five-level start cell [1] switching pattern 2205-1 for cell 2101-1 can be modified to provide an eight-level start cell [m] switching pattern 2248-1 with (b, b, +, +, +, 2+, 2+, 2+) functionality for the two non-dissipative element driver cells [m]. In switching pattern 2248-1, activation of the switch group (SW[0], SW[3]) of cell [m] provides the voltage storage capacity of its two non-dissipative elements, so that when the voltage storage capacity of both cells is V[m], the output voltage of cell [m] increases to 2V[m]. By extension, the five-level combination of the first level of the reverse starting cell [1] switching mode 2205-2 and the starting cell [1] switching mode 2205-1 for cell 2101-1 can be modified to provide an eight-level combination of the first level of the reverse starting cell [m] switching mode 2248-2 and the starting cell [m] switching mode 2248-1 for cell [m] (having the functionality of (2+, 2+, 2+, +, +, +, b, b) for two non-dissipative element driver cells [m]).

[0660] The nine-level peak cell [1] switching pattern 2207 with (-, -, -, b, b, b, -, -, -) functionality can be modified to provide a fifteen-level peak cell [m] switching pattern 2249 with (2-, 2-, 2-, -, -, -, b, b, b, -, -, -, 2-, 2-, 2-, 2-) functionality for two non-dissipative element driver cells [m]. Activation of the switch group (SW[1], SW[4]) of cell [m] causes the input voltage of cell [m] to decrease by the voltage storage capacity of the two non-dissipative elements of cell [m], so that when the voltage storage capacity of both cells is V[m], the output voltage of cell [m] is reduced to V DD[mn] -2V[m].

[0661] Figure 22M-5A1-Figure 22M-5A2 : driving circuit [mnp], unit [m], [n] with two non-dissipative elements, with A cell with three non-dissipative elements [p].

[0662] Figure 22M-5A1 , Figure 22M-5A2 A switching sequence method 2280 of a drive circuit [mnp] is shown, wherein the drive circuit [mnp] has two non-dissipative element units [m] electrically connected to a voltage source of the drive circuit, three non-dissipative element units [p] electrically connected to output terminals of the drive circuit, and two non-dissipative element units [n] electrically connected between the units [m] and the units [p]. Figure 22M-5A1 , Figure 22M-5A2 Level 2281(z) is shown, where 1≤z≤350.

[0663] Method 2280 mirrored Figure 22M-2A1 , Figure 22M-2A2 The method 2220 shown in , which is also configured to control the three-unit drive circuit [wxy]. For unit [p], the method 2280 has:

[0664] The start unit [p] stage 2292-1, the execution [p] stage 2293-1, the peak unit [p] stage 2294, the reverse execution unit [p] stage 2293-2, and the reverse start unit [p] stage 2292-2 are in the same order and have the same switching pattern as the start unit [y] stage 2232-1, the execution [y] stage 2233-1, the peak unit [y] stage 2234, the reverse execution unit [y] stage 2233-2, and the reverse start unit [y] stage 2232-2 of the method 2220, respectively, except for the number of stages therein;

[0665] ·For unit [n], the start unit [n] stage 2295-1, the execution unit [n] stage 2296-1, the peak unit [n] stage 2297, the reverse execution unit [n] stage 2296-2, and the reverse start unit [n] stage 2295-2 are in the same order, and except for the number of levels therein, their switching patterns are the same as the start unit [x] stage 2235-1, the execution unit [x] stage 2236-1, the peak unit [x] stage 2237, the reverse execution unit [x] stage 2236-2, and the reverse start unit [x] stage 2235-2 of method 2220, respectively.

[0666] ·For unit [m], the start unit [m] stage 2298-1, the peak unit [m] stage 2299 and the reverse start unit [m] stage 2298-2, their order is the same, and except for the number of levels therein, their switching pattern is the same as the start unit [w] stage 2238-1, the peak unit [w] stage 2239 and the reverse start unit [w] stage 2238-2 of method 2220.

[0667] In addition, the switching patterns of cells [m], [n] in method 2280 are similar to the corresponding switching patterns of the corresponding stages of cells [w], [x] in method 2220, where the switching patterns maintain their switch activation groups for the duration that the cell switching patterns are applied to adjacent downstream cells in their respective circuits.

[0668] Switching sequence method 2280 is presented here to illustrate how the switching patterns disclosed herein can be modified to accommodate drive circuits created with any number of driver units (each of which can be created with any number of non-dissipative elements).

[0669] Turning first to cell [p], which is the last cell in the multi-cell circuit and has three non-dissipative elements:

[0670] In the method 2220 for cell [y], the two-stage start cell [y] switching pattern 2202-1 for the (b, +) function of the start cell [y] stage 2232-1 can be modified to provide a four-stage start cell [p] switching pattern 2282-1 with the (b, +, 2+, 3+) function in the method 2280 for cell [p]. By extension, the two-stage combination of the reverse start cell [y] switching pattern 2202-2 and the first stage of the start cell [y] switching pattern 2202-1 for the (+, b) function of the reverse start cell [y] stage 2232-2 in the method 2220 can be modified to provide a four-stage combination of the reverse start cell [p] switching pattern 2282-2 and the first stage of the start cell [p] switching pattern 2282-1 with the (3+, 2+, +, b) function in the method 2280 for cell [p].

[0671] In method 2220 for unit [y], the three-level execution unit [y] switching pattern 2203-1 for the (-, b, +) function of execution unit [y] stage 2233-1 can be modified to provide a seven-level execution unit [p] switching pattern 2283-1 for the (3-, 2-, -, b, +, 2+, 3+) function of method 2280 for unit [p]. By extension, the three-level reverse execution switching pattern 2203-2 for the (+, b, -) function of reverse execution unit [y] stage 2233-2 in method 2220 can be modified to provide a seven-level reverse execution unit [p] switching pattern 2283-2 for the (3+, 2+, +, b, -, 2-, 3-) function of method 2280 for unit [p].

[0672] ·In method 2220 for unit [y], the three-level peak unit [y] switching mode 2204 for the (-, b, -) functionality of the peak unit [y] stage 2234 can be modified to provide a seven-level peak unit [p] switching mode 2284 for the (3-, 2-, -, b, -, 2-, 3-) functionality of method 2280 for unit [p].

[0673] Turning cell [n], which is the upstream two non-dissipative element driver cell and adjacent to the last cell with three non-dissipative elements:

[0674] In the method 2220 for cell [x], the five-level start cell [x] switching pattern 2205-1 with (b, b, +, +, +) functionality for the start cell [x] stage 2235-1 can be modified to provide an eighteen-level start cell [n] switching pattern 2285-1 with (4-level b, 7-level +, and 7-level 2+) functionality for cell [n]. By extension, the five-level combination of the reverse start cell [x] switching pattern 2205-2 with (+, +, +, b, b) functionality and the first level of the start cell [x] switching pattern 2205-1 in the method 2280 for the reverse start cell [x] stage 2235-2 of the method 2220 can be modified to provide an eighteen-level combination of the reverse start cell [n] switching pattern 2285-2 with (7-level 2+, 7-level +, 4-level b) functionality and the first level of the start cell [n] switching pattern 2285-1 in the method 2280 for cell [n].

[0675] In method 2220 for cell [x], nine-level execution cell [x] switching pattern 2226-1 with (3-level -, 3-level b, and 3-level +) functionality can be modified to provide a 35-level execution cell [n] switching pattern 2286-1 with (7-level 2-, 7-level -, 7-level bypass, 7-level +, and 7-level 2+) functionality for cell [n]. By extension, nine-level reverse execution cell [x] switching pattern 2226-2 with (+, +, +, b, b, b, -, -, -) functionality of method 2220 can be modified to provide a 35-level reverse execution cell [n] switching pattern 2286-2 with (7-level 2+, 7-level +, 7-level b, 7-, and 7-level 2-) functionality in method 2280 for cell [n].

[0676] ·In method 2220 for unit [x], the nine-level peak unit [x] switching mode 2207 having (-, -, -, b, b, b, -, -, -) functionality for peak unit [x] stage 2237 can be modified to provide a 35-level peak unit [n] switching mode 2287 having (7-level 2-, 7-level-, 7-level bypass, 7-level-, and 7-level 2-) functionality in method 2280 for unit [n].

[0677] Steering unit [m], which is the first unit of two non-dissipative elements in a three-driver unit drive circuit, where the second unit has two non-dissipative elements, and the third and last unit has three non-dissipative elements:

[0678] In method 2220 for unit [w], the 14-level starting unit [w] switching mode 2228-1 with (5-level b, 9-level +) functionality for the starting unit [w] stage 2238-1 can be modified to provide an 88-level starting unit [m] switching mode 2288-1 with (18-level b, 35-level + and 35-level 2+) functionality for method 2280 for unit [m]. By extension, in method 2220, the 14-level combination of the first level of the reverse start unit [w] switching pattern 2228-2 and the start unit [w] switching pattern 2228-1 with the functionality of (9 levels +, 5 levels b) for the reverse start unit [w] stage 2238-2 can be modified to provide an 88-level combination of the first level of the reverse start unit [m] switching pattern 2288-2 and the start unit [m] switching pattern 2288-1 with the functionality of (35 levels 2+, 35 levels +, and 18 levels b) for method 2280 for unit [m]; and

[0679] ·In method 2220 for unit [w], the 27-level peak unit [w] switching mode 2229 with the functionality of (9 level -, 9 level b, 9 level -) having a peak unit [w] stage 2239 can be modified to provide a 175-level peak unit [m] switching mode 2289 with the functionality of (35 level 2-, 35 level -, 35 level b, 35 level -, 35 level 2-) of method 2280 for unit [m].

[0680] For the i-th unit of the K-unit driving circuit, the comparison of the proposed method shows that:

[0681] When the circuit works repeatedly, the switching pattern of the starting unit [i] and the switching pattern of the peak unit [i] have the same order:

[0682] o when the i-th unit is the last unit and the drive circuit is configured to operate repeatedly through a plurality of drive cycles, the number of stages in the start and peak unit [i] switching pattern is twice the number of non-dissipative elements in the i-th unit plus 1 (when the drive circuit is configured to stop operating after only one drive cycle, the number of stages in the start and peak mode of the i-th unit is the number of non-dissipative elements in the i-th unit + 1); and

[0683] o when the i-th cell is not the last cell and the i-th cell has n non-dissipative elements, the number of stages in the start and peak cell [i] switching pattern is equal to the number of stages of the start or peak cell [i+1] switching pattern in one application plus the number of stages of the execution cell [i+1] switching pattern in n applications; and

[0684] When the i-th cell has an execution unit [i] switching pattern (i.e., not the first cell), the execution unit [i] switching pattern has the same order as twice the number of non-dissipative elements in the i-th cell plus one, multiplied by twice the number of non-dissipative elements in the (i+1)-th cell plus one.

[0685] exist Figure 22M-5A1 , Figure 22M-5A2 In the circuit [mnp] shown, where unit [n] has 2 non-dissipative elements and unit [p] has 3 non-dissipative elements, execution unit [n] switching mode 2286-1 has (2n[i]+1)(2n[i+1]+1) stages, where n[i]=2 and n[i+1]=3; and execution unit [p] switching mode 2283-1 has (2n[i]+1) stages, where n i =3.

[0686] In a general embodiment of a K-cell driving circuit, for cell [i], 2≤i≤k, cell [i] has an execution switching mode and n i non-dissipative elements and unit [i+1] has n[i+1] non-dissipative elements, and the switching mode of execution unit [i] has f(i-1) levels, where:

[0687] f(i)=N(K) / h(i)

[0688] =(2n[i+1]+1)(2n[i+2]+1)…(2n[K]+1)

[0689] f(i-1)=(2n[i]+1)(2n[i+1]+1)(2n[i+2]+1)…(2n[K]+1)

[0690] =(2·n[i]+1)·f(i); where i ranges from 2 to K.

[0691] It can be seen that f(i) is the number of combinations of switch activations of the remaining cells (e.g., for a K-cell driving circuit, in the output voltage driving cycle, cell [i+1], cell [i+2], ..., cell [K-1], and cell [K]).

[0692] · Figure 23A-23B : Driver circuits summarized by number of units and non-dissipative components

[0693] Although Fig.21An exemplary embodiment of a two-unit non-dissipative element enabled capacitive element driving circuit 2100 is shown, wherein two driver units each having one non-dissipative element are connected in series, but Fig.23A , Fig. 23B 2 shows a generalized embodiment of a non-dissipative element enabled capacitive element driving circuit 2300 with K driver units connected in series,

[0694] wherein each driver unit 2301 - i has a selected number n[i] of non-dissipative elements (i is a positive integer and 1≤i≤K);

[0695] Where N is the maximum number of non-dissipative elements in a cell in the driver circuit 2300, and n[i] is a positive integer with 1≤n[i]≤N, and

[0696] Wherein, j identifies the jth non-dissipative element in the driver unit 2301 - i , and j is a positive integer and 1≤j≤n[i]).

[0697] Thus, circuit 2100 is an example of circuit 2300, where K=2; and cell 2000 is an example of cell 2301-i, where n[i]=n. As with capacitor element driving circuit 2100, capacitor element driving circuit 2300 may have a voltage source 2320 (also referred to as voltage source V DD23 ), as a component of the capacitor element driving circuit 2300, but in other embodiments, the voltage source can be a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driving circuit 2300. In addition, like the capacitor element 2130, the capacitor element 2330 can be a unit that is separate from and electrically connectable to the capacitor driving circuit of the capacitor element driving circuit 2300; in other embodiments, it can be a component of the driving circuit 2300.

[0698] refer to Fig.23A , the drive units from 2301-1 to 2301-K can be designed similarly to Fig. 20 Driver unit 2000, having its n non-dissipative elements. In some embodiments, all units may have the same number of non-dissipative elements, and in other embodiments, at least one unit may have a different number of non-dissipative elements. Additionally, in illustrative but not necessarily preferred embodiments, the non-dissipative elements in one or more units may be of the same type, such as storage capacitors. In other embodiments, the non-dissipative elements in one or more driver units may be of different types. Additionally, in Fig.23A In this embodiment, for ease of calculation, it is assumed that the non-dissipative elements have the same capacitance, but it will be understood that the selection of the voltage storage capacity of any non-dissipative element in any driver unit of the drive circuit will be the designer's choice.

[0699] like Fig.23A and Fig. 23B As shown, and refer to Fig. 20 and Fig.21 , driver units 2301-1, 2301-2, ..., 2301-K are electrically connected to a voltage source V in the manner disclosed for units 2101-1, 2101-2, respectively. DD23 And capacitor element 2330:

[0700] Where, the voltage source V DD23 The positive terminal 2326 of is electrically connected to the input terminal 2311-1 of the unit 2301-1;

[0701] Where, the voltage source V DD23 The negative terminal 2328 of is electrically connected to the input terminal 2313-1 of the unit 2301-1;

[0702] Wherein, the output terminal 2304-1 of the unit 2301-1 is electrically connected to the common node of the switches including SW[1] and SW[n[1]+1] of the unit 2301-1 (at Fig.22A 2301-2), and between the common node 2315-2 of the input terminals 2311-2 and 2313-2 of the unit 2301-2;

[0703] ·Wherein, the input terminals 2311-K, 2313-K of the unit 2301-K are electrically connected to the unit 2301-(K-1) (at Fig. 23B The output terminal 2304-(K-1) (shown as unit 2301-i) in FIG. Fig. 23B It is shown as terminal 2304-i);

[0704] · Among them, the input terminals 2311-K and 2313-K of the unit 2301-K are also electrically connected to the switches SW[n[K]+2] and SW[0] of the unit 2301-K respectively. Fig. 23B SW 23[n[i]+2] , SW 23[0] );as well as

[0705] Wherein, the capacitor element 2330 (e.g., C O23 )'s input terminal 2332 is electrically connected to the output terminal 2304-K of the unit 2301-K.

[0706] like Fig. 23B As shown, unit 2301-i (for 2≤i≤(K-1), and for 1≤j≤n[i]) has:

[0707] Input terminals 2311-i and 2313-i are electrically connected to switches SW of unit 2301-i, respectively. 23[n[i]+2] , SW 23[0] ;

[0708] Input terminals 2311-i, 2313-i are connected to terminal 2304-(i-1) of driver unit 2301-(i-1) via common node 2315-i, and

[0709] Output terminal 2304-i, electrically connected to switch SW comprising unit 2301-i 23[1] and SW 23[n[i]+1] Between the common node 2314-i of the switches between the units, and the common node 2315-(i+1) of the input terminals 2311-(i+1), 2313-(i+1) (not shown) of the units 2301-(i+1) downstream of the unit 2301-i and adjacent to the unit 2301-i.

[0710] The driver circuit 2300 has a controller 2360 or is electrically connected to the controller 2360 via a path system, and the controller 2360 is configured to provide control signals to signal the capacitive element driver circuit 2300 to start and stop the switching sequence method (the phase and switching mode of operating the method). The switch controller 2360 controls the activation and deactivation of the switches in the K driver units to control the switching sequence method through V O23 The drive cycle drives the circuit 2300 using a set of stages that may be implemented in a sequential approach with multiple phases that is defined to ensure that the average voltage value of the storage capacitor remains constant over time.

[0711] The switching sequence level in a complete voltage drive cycle

[0712] The driver circuit 2300 can be operated as the driver circuit 2100, having phases and switching patterns of opening and closing switches, wherein the driver circuit voltage output is increased (or decreased) in a selected stepwise manner, the purpose of which is to release voltage from the non-dissipative elements (non-dissipative element by non-dissipative element) of one or more selected cells, while selectively preventing other cells from contributing voltage to the driver circuit output or allowing other cells to access the power supply voltage of the driver circuit to increase the driver circuit output. The method defines a circuit control process for generating a stepwise change provided by a multi-cell driver circuit by allowing an activated driver cell [i] to provide a selected amount of voltage to cell [i+1] to maintain the provided voltage while cell [i+1] produces a stepwise change in its voltage generation; and, once the output voltage of the activated driver cell [i+1] reaches a maximum level (or a minimum level when the incremental change is a voltage drop) that can be obtained from its non-dissipative elements, to change the selected amount of voltage to be provided to cell [i+1] so as to continue the stepwise change of the voltage that can be released from the driver circuit.

[0713] In the following discussion of a cell method for driving a K-cell circuit through a complete drive cycle, reference will be made to a “first cell” and a “last cell,” which will be defined in the remainder of the described embodiments, where a cell in the circuit having one input terminal electrically connected to a positive terminal of a voltage source of the circuit and another input terminal electrically connected to a negative terminal of the voltage source of the circuit is referred to as the first cell (or cell [1]), and a cell in the circuit whose output terminal constitutes or is electrically connected to an output terminal of the circuit is referred to as the last cell (or cell [K]).

[0714] For a cell[i] of a K-cell driver circuit having n[i] non-dissipative elements, method 2400 may begin with a start cell[i] phase having a start cell[i] switching pattern, where

[0715] (1) Bypass cell [i] to allow the input voltage of cell [i] to reach its output voltage, then

[0716] (2) incrementally increasing the output voltage of unit [i] by multiples of V[i], starting with an increase from V(i) to the output voltage of unit [i] at the beginning of the starting unit [i] phase, and achieving an overall increase of n[i]V(i) in the output voltage of unit [i] since the beginning of the starting unit [i] phase by the end of the incremental increase of the starting unit [i] phase.

[0717] Bypassing of cell [i] may be achieved by selectively activating a set of switches of cell [i] that provide the input voltage of cell [i] as its output voltage, the bypass being maintained for the duration of one stage of the method when cell [i] is the last cell in the circuit, or during application of the starting cell [i+1] switching pattern on cell [i+1].

[0718] When cell [i] is the first cell of the K cell circuit, the bypass operation in the starting cell [i] switching mode constitutes grounding of the output of the first cell and can be achieved by activating the first and second switches (switch group (SW[0], SW[1])) of cell [i] to electrically connect the negative terminal of the voltage source to the output terminal of cell [i]. Grounding occurs because switch SW[0] connects the negative terminal of the voltage source to the output terminal of cell [i], and switch SW[1] is one of the switches in the n[i] switch group in cell 2301-1 (which can be electrically connected to the common node of terminal 2314-1 (which can also be electrically connected to switch SW[0] without inserting a non-dissipative element between them)). Therefore, closing the switch group (SW[0], SW[1]) electrically connects the negative terminal of the voltage source to the output terminal of cell [i].

[0719] When cell [i] is any other cell in the K cell circuit, bypass operation in the starting cell [i] switching mode can be achieved by activating switch group (SW [0], SW [1]) or switch group (SW [n [i] + 2], SW [n [i] + 1]), i.e., the last and second to last switch groups of cell [i]. Switches SW [0], SW [n [i] + 2] can both be electrically connected to the output of cell 2301-(i-1), and switches SW [1], SW [n [i] + 1] are two switches in the n [i] switch group in cell 2301-i, which can be electrically connected to a common node to terminal 2314-i, and terminal 2314-i can also be electrically connected to the cell [i] input through one of the switch groups (SW [0], SW [1]) or (SW [n [i] + 2], SW [n [i] + 1]), without the intervention of non-dissipative elements. Therefore, closing the switch set (SW[0], SW[1]) or (SW[n[i]+2], SW[n[i]+1]) electrically connects the input of the cell to the output of cell[i].

[0720] An incremental increase in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that increases the output voltage of cell [i],

[0721] o performing activation of the switch group in order to produce an increased output voltage increase,

[0722] o the switching mode for the starting cell [i] ends when the highest cell [i] output voltage increase due to activation of the switch group has been completed, and

[0723] o When cell [i] is the last cell in the circuit, for the duration of one stage of the method, or for the duration of one application of the cell [i+1] switching pattern performed on cell [i+1], the switch group is activated to increase the input voltage of cell [i] by one times V(i) maintained at cell [i].

[0724] The method 2400 for cell [i] may proceed to the execute cell [i] stage upon completion of the start cell [i] stage, unless cell [i] is the first cell in a multi-cell circuit. The execute cell [i] stage repeats the execute cell [i] switching pattern, which:

[0725] (1) incrementally reducing the output voltage of unit [i] by a multiple of V(i) (starting with a reduction of n[i]V(i) in the output voltage of unit [i] at the start of the execution of the unit [i] switching mode, and at the end of the incremental reduction, achieving an overall reduction in the output voltage of unit [i] since the start of the execution of the unit [i] switching mode); then

[0726] (2) bypass cell [i] to allow the input voltage of cell [i] to reach its output voltage, and then

[0727] (3) Incrementally increasing the output voltage of unit [i] by multiples of V[i], starting with an increase from V(i) to the output voltage of unit [i] at the beginning of the incremental increase, and achieving an overall increase of n[i]V(i) in the output voltage of unit [i] since the beginning of the incremental increase by the end of the execution of the unit [i] stage switching mode.

[0728] An incremental reduction in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that reduces the output voltage of cell [i],

[0729] o performing switch group activation in order to produce a reduced output voltage drop,

[0730] o the incremental reduction ends when the switch group activation causes V[i] (the minimum amount by which the output voltage of cell[i] is reduced) to be completed, and

[0731] o When cell [i] is the last cell in the circuit, for the duration of one stage of the method, or for the duration of one application of the cell [i+1] mode performed on cell [i+1], the switch group is activated to reduce the input voltage of cell [i] by one times V(i) maintained on battery [i],

[0732] ·Bypassing of unit [i] in execution unit [i] switching mode can be accomplished using the above-described method for bypassing operations on units other than the first unit in unit [i] in the starting unit [i] switching mode, except that when unit [i] is the last unit in the circuit, the bypassing in execution unit [i] switching mode can be maintained within one level of the method, or during one application of the execution unit [i+1] switching mode on unit [i+1].

[0733] ·The incremental increase of the output voltage of unit [i] in the execution unit [i] switching mode (including the order of unit activation and the duration of the incremental increase operation) can be achieved using the method described above for incrementally increasing the output voltage of unit [i] in the start unit [i] switching mode.

[0734] When cell [i] is the last cell and n is the number of non-dissipative elements of the last cell, repeatedly applying the execute cell [i] switching pattern until the (n+2)th last stage. When cell [i] is not the last cell and n is the number of non-dissipative elements of cell [i], repeatedly applying the execute cell [i] switching pattern to cell [i] until the (n+1)th last application of the execute cell [i+1] switching pattern on cell [i+1] is completed. When cell [i] is the first cell in a multi-cell circuit, after the start cell [i] stage is completed, or when cell [i] is any other cell in a multi-cell circuit, after the execute cell [i] stage is completed, method 2400 for cell [i] may proceed to the peak cell [i] stage. The peak cell [i] stage may have a peak cell [i] switching pattern, wherein:

[0735] (1) incrementally reducing the cell [i] input voltage by multiples of V(i) (starting with a reduction of nV(i) at the beginning of the peak cell [i] phase and ending with an overall reduction of V(i) in the cell [i] output voltage since the beginning of the peak cell [i] switching mode);

[0736] (2) bypassing cell [i] to allow the output voltage of cell [i] to reach its input voltage; and

[0737] (3) performing a second set of incremental reductions in the cell[i] output voltage by multiples of V(i) (starting with a reduction in V(i) at the beginning of the second set of incremental reductions during the peak cell[i] phase and ending with a total reduction in the cell[i] output voltage by n[i]V(i) since the beginning of the incremental reductions):

[0738] ·The first set of incremental reductions in the output voltage of cell [i] in the peak cell [i] switching mode (including the order of cell activation and the duration of the incremental reduction operations) can be implemented using the method for incrementally reducing the output voltage of cell [i] described above in executing the cell [i] switching mode.

[0739] ·When cell [i] is not the first cell in the circuit, bypassing of cell [i] in the peak cell [i] switching mode can be accomplished using the above-described method for bypassing operation on a cell that is not the first cell in cell [i] in the starting cell [i] switching mode, except that when cell [i] is the last cell in the circuit, the bypass in the peak cell [i] switching mode can be maintained during one stage of the method, or during one application of the peak cell [i+1] switching mode on cell [i+1].

[0740] When cell [i] is the first cell of the K cell circuit, the bypass operation in the peak cell [i] switching mode can be achieved by activating the switch group (SW [n [i] + 2], SW [n [i] + 1]) to electrically connect the positive terminal of the voltage source to the output terminal of cell [i] so as to provide the supply voltage of the voltage source of the circuit to the input of cell [i + 1]. Since switch SW [n [i] + 2] is electrically connected to the positive terminal of the voltage source of circuit 2300, and switch SW [n [i] + 1] is one of the switches in the n [i] switch group in cell 2301-1, which is electrically connected to the common node to terminal 2314-1 and terminal 2314-1 is also electrically connected to switch SW [n [i] + 2] without non-dissipative elements intervening therebetween, the supply voltage bypass operation in the peak cell [i] switching mode can be achieved. Therefore, closing the switch group (SW [n [i] + 2], SW [n [i] + 1]) electrically connects the positive terminal of the voltage source to the output terminal of cell [i].

[0741] A second set of incremental reductions may be achieved by selectively activating a set of switches of cell [i] that reduce the output voltage of cell [i],

[0742] o performing switch activation so as to produce an increased output voltage reduction,

[0743] o the incremental reduction ends when the switch group activation results in n[i]V[i] (the maximum amount by which the output voltage of cell[i] is reduced) being completed, and

[0744] o When cell [i] is the last cell in the circuit, for the duration of one stage of the method, or for the duration of one application of the switching pattern of cell [i+1] reversed on cell [i+1], the switch group is activated, causing the input voltage of cell [i] to be reduced to maintain one times V(i) on battery [i].

[0745] The method 2400 for cell [i] may enter the reverse execution cell [i] phase upon completion of the peak cell [i] phase, except when cell [i] is the first cell in a multi-cell circuit. The reverse execution cell [i] phase may repeat the reverse execution cell [i] switching pattern, which

[0746] (1) incrementally increasing the output voltage of cell [i] by a multiple of V(i) (starting with an increase of n[i]V(i) in the output voltage of cell [i] at the start of the reverse execution of the cell [i] switching mode and ending at the end of the incremental increase, ending with an overall increase in the output voltage of cell [i] at the start of the reverse execution of the cell [i] switching mode;

[0747] (2) then bypassing cell [i] to allow the output voltage of cell [i] to reach its output voltage; and then

[0748] (3) The output voltage of unit [i] is incrementally reduced by V(i), starting from the output voltage reduction of unit [i] by V(i) at the beginning of the incremental reduction to the end of the incremental reduction, when the reverse execution unit [i] switching mode is completed, and the output voltage is reduced by n[i]V(i).

[0749] An incremental increase in the output voltage of cell [i] may be achieved by selectively activating a switch group of cell [i] that increases the output voltage of cell [i],

[0750] o To produce a reduced output voltage increase, a switch group activation is performed,

[0751] o the incremental increase ends when the switch group activation results in the lowest cell [i] output voltage increase being completed, and

[0752] o When cell [i] is the last cell in the circuit, the switch group is kept activated on cell [i] for the duration of one stage of the method, or for the duration of one application of the switching pattern of cell [i+1] performed in reverse on cell [i+1].

[0753] • Bypassing of unit [i] in the reverse execution unit [i] switching mode (including the duration of the bypass operation) may be accomplished using the method described above for executing the unit [i] switching mode for bypassing unit [i].

[0754] ·The reverse execution of the incremental reduction of the output voltage of unit [i] in the unit [i] switching mode (including the order of unit activation and the duration of the incremental reduction operation) can be accomplished using the above-mentioned second set of incremental reduction methods for incrementally reducing the output voltage of unit [i] in the peak unit [i] switching mode.

[0755] When cell [i] is the last cell and n is the number of non-dissipative elements of the last cell, repeatedly apply the reverse execution cell [i] switching pattern until the (n+2)th last stage. When cell [i] is not the last cell and n is the number of non-dissipative elements of cell [i], repeatedly apply the reverse execution cell [i] switching pattern to cell [i] until the (n+1)th last application of the cell [i+1] switching pattern is completed on cell [i+1].

[0756] The reverse start cell [i] phase may be initiated after the peak cell [i] phase is completed when cell [i] is the first cell in the multi-cell circuit, or after the reverse execution cell [i] phase is completed when cell [i] is any other cell in the multi-cell circuit. The reverse start cell [i] phase has a reverse start cell [i] switching pattern, where

[0757] (1) incrementally increasing the output voltage of cell [i] by a multiple of V(i), starting from an increase in the output voltage of cell [i] by n[i]V(i) at the beginning of the reverse start cell [i] phase and ending at the end of the incremental increase, at which the overall increase in the output voltage of cell [i] by V(i) from the beginning of the reverse start cell [i] phase ends; and

[0758] (2) Cell [i] is then bypassed, ending when the input voltage of cell [i] is applied to the output terminal of cell [i] when the reverse starting cell [i] switching pattern is completed.

[0759] ·The incremental increase of the output voltage of cell [i] of cell [i] in the reverse starting cell [i] phase (including the order of cell activation and the duration of the incremental increase operation) can be implemented using the above-mentioned method for implementing the incremental increase of the switching mode of execution cell [i].

[0760] The bypassing of cell [i] during the reverse starting cell [i] phase (including the duration of the bypassing) can be implemented using the method described above for implementing bypassing during the starting cell [i] switching phase. As described above, in the first cell, the bypassing operation electrically connects the negative terminal of the voltage source to the output terminal of the first cell, thereby grounding cell [i+1].

[0761] As with the operation of the driver circuit 2300, incremental changes in voltage output are achieved by releasing the voltage capacity of the cells that have performed switch activation and increasing the total voltage output through selective and sequential operation of non-dissipative elements in upstream cells, using selective opening and closing of switches at the terminals of the non-dissipative elements. It can be seen that the pattern of switch opening / closing and cell activation / bypassing that can be used for simpler driver circuits to achieve step-by-step delivery of voltage output can be adapted for use in more complex driver circuits (with a larger number of cells and non-dissipative elements) to achieve step-by-step delivery of voltage output.

[0762] The generalized driver circuit 2300 is configured to allow each of the K driver units in the driver circuit 2300 to have a number n[i] of non-dissipative elements (the number n is not necessarily the same in each unit). In summary, in this illustrative but not necessarily preferred embodiment, a complete V O23 The drive cycle can be Level completed, including:

[0763] n[i] is the number of non-dissipative elements in the ith driver unit in the driver circuit 2300; and

[0764] K is the number of driver units in the driver circuit, where 1≤i≤K.

[0765] Use in Fig.21 and Figure 22A-22J For the previously described embodiment of the basic two-unit drive circuit 2100 shown in , where each unit has one non-dissipative element (for two driver units, K=2 and n[i]=1), the number of stages in the switching sequence method 2200 can be calculated as:

[0766]

[0767] Therefore, a full V O21 The drive cycle is completed in 18 stages.

[0768] Figure 22M-3A A switching sequence method 2260 is shown for a two-unit drive circuit including a first driver unit having one non-dissipative element and a second unit having two non-dissipative elements. Figure 22M-3A As shown, K=2; n[1]=1; and n[2]=2, and the number of stages in the switching sequence method 2260 can be calculated as:

[0769]

[0770] Therefore, for the defined drive circuit, one complete voltage drive cycle is completed in 30 steps.

[0771] Figure 22M-4A A switching sequence method 2270 is shown for another two-unit drive circuit, where the first driver unit has two non-dissipative elements and the second unit has one non-dissipative element. Figure 22M-4A As shown in the diagram in , K=2; n[1]=2; and n[2]=1, and the number of levels in the switching sequence method 2270 can be calculated as:

[0772]

[0773] Thus, for a 2-unit drive circuit comprising one drive unit having one non-dissipative storage element and another drive unit having two non-dissipative storage elements, one complete voltage drive cycle will include 30 levels regardless of the position of the drive units relative to each other in the drive circuit.

[0774] Figure 22M-3A , Figure 22M-4ASome multi-unit drive circuits are shown having the same number of non-dissipative elements but with the non-dissipative elements distributed differently over the units of the drive circuit (the number of non-dissipative elements varies from unit to unit), and can have the same total number of stages regardless of the position of the unit in the drive circuit (regardless of whether the unit with more non-dissipative elements is the first, second or last in the drive circuit). Drive circuits with different numbers of units can still have the same number of stages as long as the drive circuits share the same number of non-dissipative elements.

[0775] As an example, Figure 22M-3A , Figure 22M-4A The multi-unit drive circuits [ab], [mn] each have two units and three non-dissipative elements as a whole. The drive circuit [ab] has a first unit [a] (having one non-dissipative element and four switches) and a second unit [b] (having two non-dissipative elements and five switches). The drive circuit [mn] has a first unit [m] (having two non-dissipative elements and five switches) and a second unit [n] (having one non-dissipative element and four switches). The switching sequence method of the operation of the circuits [ab], [mn] has 30 levels:

[0776] On the other hand, other drive circuits having the same number of non-dissipative elements overall may not have the same number of stages in their switching sequence method. As an example, two-unit drive circuits [cd], [ef], [gh] may each have four non-dissipative elements overall, where:

[0777] A circuit [cd] having a first unit [c] (having one non-dissipative element) and a second unit [d] (having three non-dissipative elements) (where K=2; n[c]=1; and n[d]=3);

[0778] A circuit [ef] having a first unit [e] (having three non-dissipative elements) and a second unit [f] (having one non-dissipative element) (where K=2; n[e]=3; and n[f]=1);

[0779] A circuit [gh] having a first unit [g] and a second unit [h], each having two non-dissipative elements, (where K=2; n[g]=2; n[h]=2).

[0780] The switching sequence method of operation of the circuits [cd], [ef] has 42 stages for stepwise operation, among which:

[0781]

[0782] The switching sequence methods used for circuit [gh] operation are:

[0783]

[0784] In addition, the switching sequence method for the operation of the circuits [pqr], [stuv] also has four non-dissipative elements. The switching sequence method for the operation of the three-unit circuit [pqr] (K=3; n[p]=1, n[q]=2; n[r]=1) has:

[0785]

[0786] The switching sequence method for the operation of the four-unit circuit [stuv] (where K=4; n[s]=n[t]=n[u]=n[v]=1) has:

[0787]

[0788]

[0789] The choice of the number of cells and non-dissipative elements in the driver circuit is selected by the driver circuit designer depending on the required operating and functional specifications.

[0790] In summary, when all K driver units of the driving circuit have the same number n of non-dissipative elements, n[1]=n[2]=n, and the number of stages in the switching sequence method 2400 can be calculated as:

[0791]

[0792] Therefore, for a K-cell driver circuit (each cell having the same number n of non-dissipative elements), a complete voltage drive cycle will include 2*[(2n+1) K ] level. When K = 1 (such as in Fig. 7A In the embodiment of the circuit 700A),

[0793]

[0794] Therefore, if Figure 8A-8C It is recognized that for a driver circuit having a driver unit comprising n non-dissipative storage elements, a complete voltage driving cycle will include (4n+2) stages.

[0795] The voltage level during a complete voltage drive cycle

[0796] Returning to the driver circuit 2300, in an illustrative and not necessarily preferred embodiment, and for convenience, within each driver unit 2301-i, for x≠y, V CS23[x] =V CS23[y] , where x and y are any integers from 1 to n[i]. CS23[i] =V CS23[x], where x is any integer from 1 to n[i], V as the voltage level at the driver unit 2301-i CS23[i] It can be expressed by equation (7), where i is any integer from 1 to K:

[0797]

[0798] By setting i=K, the voltage of the storage capacitor at the Kth driver unit (eg, V CS23[K] ) can be expressed by equation (8):

[0799]

[0800] Therefore, V CS23[K] represents a complete V in the driver circuit 2300 O23 Drive cycle Each level V O23 Therefore,

[0801] At stage 2401(1), V O23 is driven to ground level (e.g., 0V).

[0802] At stage 2401(2), V O23 is driven to V CS23[K] .

[0803] At stage 2401(3), V O23 is driven to (2·V CS23[K] ).

[0804] At stage 2401(4), V O23 is driven to (3·V CS23[K] ). ...

[0805] At stage 2401(r), where V O23 is driven to (V DD23 -V CS23[K] ).

[0806] At stage 2401(r), where V O23 is driven to V DD23 .

[0807] At stage 2401(r), where V O23 is driven to (V DD23 -V CS23[K] ). ...

[0808] At stage 2401(r), where V O23 is driven to (3·V CS23[K] ).

[0809] At stage 2401(r), where V O23 is driven to (2·V CS23[K] ).

[0810] At stage 2401(r), where V O23 is driven to V CS23[K] , after which another V can be started by returning to the above-mentioned stage 2401 (1) O23 Drive cycle.

[0811] It can be seen that:

[0812] From level 2401(2) to level 2401(r), where V O23 From V CS23[K] Drive to V DD23 -V CS23[K] , where V CS23[K] Yes V O23 The voltage changes at each level.

[0813] · Slave level 2401(r) (where ) to level 2401(r), where V O23 From (V DD23 -V CS23[K] ) driven to V CS23[K] , where V CS23[K] Yes V O23 The voltage changes at each level.

[0814] Stage 2401(p) is identical in operation and results to stage 2401(q) when

[0815] in

[0816] p is from 2 to Any integer of

[0817] q is from arrive Any integer of .

[0818] For example,

[0819] Stage 2401(2) is similar in operation and results to stage 2401(r) (where ) are the same as

[0820] Level 2401(r) (wherein ) is identical in operation and results to stage 2401(r),

[0821] in

[0822] It should be understood that in this embodiment, V CS23[x] =V CS23[y] , but the voltage capacity of each non-dissipative element is not required to be the same. The designer should select the voltage storage capacity of the non-dissipative element in any driver unit in the drive circuit and define a switching sequence method to complete the desired drive cycle, in which the available voltage output by the drive circuit is established and then reduced step by step. As described above, the number of levels (and the number of steps) in the switching sequence method depends on the number of driver units and the number of non-dissipative elements in the drive circuit. However, when the voltage capacity of each non-dissipative element in the circuit is not the same, the amount of voltage released or stored in each stage (and the amount of time spent in each stage) is not necessarily the same.

[0823] The energy dissipated by each switch can be calculated as follows:

[0824]

[0825] As mentioned above, each complete voltage drive cycle has level, so at full V O23 The total energy dissipated from circuit 2300 over a drive cycle can be calculated according to equation (10):

[0826]

[0827]

[0828] In the classic drive scheme, a complete V o The total energy dissipation of the drive cycle E t_classic =C O V DD 2 . It can be seen that the circuit 2300 composed of K capacitor element driver units 2000, each driver unit has n storage capacitors, which can store each V O23 The overall energy dissipation of the drive cycle is reduced times.

[0829] For example, when the capacitive element driving circuit is composed of K=3 capacitive element driver units, each with n=1 storage capacitors (n[i]=1 for all i ranging from 1 to 3), it can be seen that the total energy dissipation per Vo driving cycle is reduced by a factor of 27.

[0830] Figure 24A-24B-3 : Switching sequence method 2400

[0831] Switch controller 2360 controls activation and deactivation of switches in driver units 2301-1, 2301-2, ..., 2301-K to operate at full V using the stages identified above. O23 The driving circuit 2300 is driven during the driving cycle, which results in a voltage V O23 Gradually increase to the peak voltage V DD23 (voltage provided by voltage source 2320), then voltage V O23 Gradually reduce to ground voltage.

[0832] The switching sequence method 2400 is one embodiment of a sequence followed by the switch controller 2360, wherein a complete V O23 The switches are activated in a combined manner within a drive cycle. To simplify the definition of the levels and phases of method 2400, the following parameters may be defined:

[0833] ·

[0834] · as well as

[0835] ·

[0836] ο wherein i is any integer between 1 and k;

[0837] ο where K is the number of cells in the drive circuit;

[0838] o Where n[j], n[1] are the numbers of non-dissipative elements in driver units 2301-j, 2301-1, respectively;

[0839] οWhere N(K) is a complete V O23 Half the number of drive cycles, where N(K)+1 is the level at which the circuit and its components reach their peak voltage;

[0840] where h(i) is the value of the ith cell in the multi-cell circuit 2300 (e.g., cell 2301-1, cell 2301-2, ..., cell 2301-(i-1), and cell 2301-i) for a complete V O23 the number of combinations of switch activations to which the drive cycle has contributed;

[0841] o Where f(i) is the remaining cells (e.g., cell 2301-(i+1), cell 2301-(i+2), ..., cell 2301-(K-1), and cell 2301-K) for a complete V O23 The number of combinations of switch activations to which the drive cycle has contributed.

[0842] It can be seen that there are h(z-1)-1 execution unit [z] switching modes in one execution unit [z] stage.

[0843] Additionally, the following equations may be used to simplify the description of the stages and phases of method 2400:

[0844] ·

[0845] f(i-1)=(2·n[i]+1)·f(i); and

[0846] ·g(i-1)=n[i]·f(i)+g(i).

[0847] Assuming that the drive circuit 2300 operates continuously, and the number of switch groups in the reverse start switching mode is included in the count of the number of switch groups, it can be seen that:

[0848] f(i) is the number of stages that the selected switches in cell[i] (except the first and last switches in cell[i]) are closed in any cell[i] switching pattern;

[0849] f(il) is the number of levels in the switching mode of execution unit [i];

[0850] g(i) is the number of stages in the portion of the reverse starting cell [i+1] switching pattern that causes the multi-cell circuit output to ground; and

[0851] g(i) is also the number of stages in the peak cell [i+1] mode portion that causes the multi-cell circuit voltage to output to its power supply voltage, and thus g(i-1) is the number of stages in the peak cell [i] switching mode portion that causes the multi-cell circuit voltage to output to its power supply voltage.

[0852] Figure 24A to Figure 24B-3 The diagram shown represents a full V O23 A switching sequence method 2400 for activating switches in combinations within a drive cycle.

[0853] Fig.24A : Switching sequence method 2400 of unit 2301-1

[0854] Fig.24A The starting unit [1] stage 2412[1]-1 and the peak unit [1] stage 2414[1] of the first driver unit 2301-1 in the driving circuit 2300 are shown, and the levels, stages and switching patterns of controlling the (n[1]+3) switches in the first driver unit are shown as described below. Figure 24B-1 , Figure 24B-2 , Figure 24B-3The start unit [z] stage 2412[z]-1, execution unit [z] stage 2413[z]-1 and peak unit [z] stage 2414[z] of one of the remaining driver units in the driving circuit 2300 (typically unit 2301-z, where 2≤z≤K) are shown respectively. Figure 24B-1 to Figure 24B-3 The stages, phases, and switching patterns that can be used to control the (n[z]+3) switches in the remaining K-1 driver cells (e.g., cell 2301-2, cell 2301-3, ..., cell 2301-(K-1), and cell 2301-K) are shown to drive the circuit to its peak voltage in a stepwise manner. The following identifies V at the capacitor element 2330 during the selected stage. O23 The voltage to which it is driven.

[0855] The above is related and Figure 22M-1A to Figure 22M-5B The driver circuit shown in can be viewed as an example of a generalized driver circuit 2300, where the number of cells K in the driver circuit ranges from 1 to 4, and where the number of non-dissipative elements n in the cells ranges from 1 to 3. The method associated with the driver circuit illustrates how to drive a multi-cell driver circuit from ground to a peak voltage and then to ground in a stepwise incremental manner.

[0856] It will be appreciated that the phases, switching patterns, stages, and switch activations of method 2400 may be understood with reference to those previously described in detail for methods 2200, 2220, 2240, 2260, 2270, 2280, and will not be repeated in full here. Furthermore, it will be appreciated that, like the other switching methods disclosed herein, switching sequence method 2400 may be operated in reverse sequence to drive the output of generalized driver circuit 2300 to ground in a stepwise manner. The modifications proposed for the above methods to allow operation of their associated driver circuits to reduce their voltage outputs in a stepwise manner from a peak voltage to ground may be applied to method 2400 to allow driver circuit 2300 to operate in reverse sequence. To further simplify the description, stages 2401(1) through 2401(r) are shown. Figure 24A-24B-3 The control switch stage shown in This stage constitutes the voltage V O23 Drive from ground to V DD23 As shown, the stages, phases, and switching modes through which the driver circuit can drive the voltage from ground to the power supply voltage illustrate the stages and phases through which the driver circuit can operate to drive the voltage from the power supply voltage to ground. Therefore, the stages after stage 2401 (r), where It can be seen by referring to stage 2401(1) to stage 2401(r), where

[0857] Finally, unless specified otherwise in the description of the stages and phases below, the switches are open.

[0858] Starting Unit [1] Phase 2412 [1]-1:

[0859] In the start cell [1] phase 2412[1]-1 of the switching sequence method 2400 for the cell 2301-1, the switch SW[0] (electrically connected to the voltage source V DD23 of burden The switch at terminal 2328 is closed and remains closed until the start unit [1] phase 2412 [1]-1 ends, closing at stage 2401 (r), where r = (n [1] f (1) + g (1)), after which switch SW [0] is opened.

[0860] The start cell [1] stage 2412 [1]-1 may have a start cell [1] switching pattern 2402 [1]-1 that begins by grounding cell 2301-1 from stage 2401-1 to stage 2401(r), where r=g(1). Grounding may be achieved by closing switch SW[1] of cell 2301-1 (one of the n[1] switches in cell 2301-1 electrically connected to a common node to terminal 2314-1, which is also electrically connected to switch SW[0] without intervening non-dissipative elements), thereby bypassing cell 2301-1 such that the input voltage of cell 2301-1 (specifically, ground) is applied to the output of cell 2301-1 and, therefore, to the input of cell 2301-2. The bypass is maintained during the application of the starting unit [2] switching pattern 2402 [2]-1 to unit 2301-2, which ends when stage 2401 (r) is completed, where r = g(1).

[0861] The start unit [1] switch pattern 2402 [1] -1 may continue to close the remaining switches in the cell 2301 -1 in a sequential manner, specifically switches SW[2] through SW[n[1]+1], keeping the switches closed for the duration that the execute unit [2] switch pattern 2403 [2] -1 is applied to the cell 2301 -2:

[0862] ·For example,

[0863] o Switch SW[2] is closed from stage 2401(r) (where r=(g(1)+1)) to stage 2401(r) (where r=(f(1)+g(1))) and then opened; and

[0864] The switch SW[3] of the o unit 2301-1 is closed from the stage 2401(r) (where r=(f(1)+g(1)+1)) to the stage 2401(r) (where r=(g(1)+2·f(1))) and then opened.

[0865] The described switching operation continues until the switch SW[n[1]+1] of unit 2301-1 is closed from stage 2401(r) (where r={g(1)+[(n[1]-1)·f(1)]+1}) to stage 2401(r) (where r=(n[1]f(1)+g(1))), after which the starting unit [1] switching pattern 2402[1]-1 has been completed and the switch group (SW[0], SW[n[1]+1]) of unit 2301-1 is disconnected.

[0866] Peak Unit [1] Stage 2414 [1]:

[0867] Peak cell [1] stage 2414[1] drives cell 2301-1 to reach a peak voltage. In peak cell [1] stage 2414[1], peak cell [1] switching mode 2404[1] opens switch SW[0] and closes switch SW[n[1]+2] (the switch is electrically connected to voltage source V DD23 positive terminal 2326). Switch SW[n[1]+2] remains closed for the duration of the peak cell [1] stage, which will remain in effect until the end of stage 2401(r), where the driver circuit 2300 stops operating when the multi-cell circuit output voltage reaches its supply voltage, r=(2g(1)+2n[1]f(1)), or until the end of the peak cell [1] stage at stage 2401(r), where the driver circuit 2300 continues operating after the multi-cell circuit output voltage reaches its supply voltage, r=(3g(1)+3n[1]f(1)-1), after which switch SW[n[1]+2] opens.

[0868] During the entire application of the peak unit [1] switching mode 2404 [1], switches SW [1] to SW [n [1] + 1] are incrementally closed. The switching order of switches SW [1] to SW [n [1] + 1] in the peak unit [1] switching mode 2404 [1] follows the switching order of the start unit [1] switching mode 2402 [1] - 1 disclosed above. Specifically:

[0869] Each switch closure incrementally subtracts V from the output voltage of cell 2301-1 CS23[1] , from adding -n[1]V CS23[1] Start by adding -V CS23[1] End, and

[0870] The f(1) level of the application of the execution unit [2] switching mode 2403 [2]-1 to the unit 2301-2 remains closed. For example,

[0871] o switch SW[1] is closed from stage 2401(r), where r={(n[1]·f(1))+g(1)+1} to stage 2401(r), where r={[(n[1]+1)·f(1))+g(1)}, and then opened; and

[0872] οSwitch SW[2] is closed from stage 2401(r), where r={[(n[1]+1)·f(1)]+g(1)+1} to stage 2401(r), where r={[(n[1]+2)·f(1)]+g(1)}, and then opened.

[0873] The switching pattern described above continues until SW[n[1]] of cell 2301-1 is closed. SW[n[1]] remains closed during one application of execution unit [2] switching pattern 2403[2]-1 to cell 2301-2, and ends at stage 2401(r), where r = {[2·n[1]·f(1)]+g(1)}, after which peak switching pattern 2404[1] closes switch SW[n[1]+1] of cell 2301-1, thereby bypassing cell 2301-1 for use in circuit 2300(V DD23 ) is delivered to the input terminals of cell 2301-2. Bypassing, consistent with the initiation of peak cell [2] switching mode 2404[2] of peak cell [2] stage 2414[2] of cell 2301-2, continues until the output of cell 2301-2 reaches its peak voltage at stage 2401(r), where r = {[2·n[1]·f(1)]+2·g(1)}. Figure 24B-1 to Figure 24B-3 Shown at full V O23 In the driving cycle, the remaining (K-1) driver units (eg, unit 2301-2, unit 2301-3, ..., unit 2301-(K-1) and unit 2301-K) in the driving circuit 2300 are sequentially switched in the stage and switching sequence method 2400.

[0874] In cell 2301-z, switch SW[0] and switch SW[n[z]+2] are electrically connected to the output terminal of cell 2301-(z-1) via a common node. Therefore, bypassing of cell 2301-z can be achieved by closing switch group (SW[0], SW[1]) or (SW[n[z]+1], SW[n[z]+2]), where SW(n[z]+1) is one of the switches in the n[z] switch group in cell 2301-z, which is electrically connected to the common node to terminal 2314-z, and terminal 2314-z is also electrically connected to switch SW[n[z]+2] without non-dissipative elements intervening therebetween). As described above, Figure 24B-1 to Figure 24B-3 The indication of the bypass function of one of the bypass switch groups does not exclude the application of bypass with another bypass switch group.

[0875] Figure 24B-1 to Figure 24B-3 : Switching sequence method 2400 of unit 2301-z

[0876] The following method can be applied to the remaining units of circuit 2300:

[0877] Starting Unit [z] Phase 2412 [z]-1:

[0878] The start unit [z] stage 2412 [z]-1 (where 2≤z≤K) implemented in unit 2301-z is similar to the start unit [1] stage 2412 [1]-1 of unit 2301-1, such as Figure 24B-1 As shown. In stage 2412[1]-1, switch SW[0] in cell 2301-z may be closed and remain closed for the duration of stage 2412[z]-1 until the stage ends when stage 2401(r) is completed, where r=(n[z]f(z)+g(z)), after which switch SW[0] in cell 2301-z is opened.

[0879] The starting cell [z] phase 2412[z]-1 has a starting cell [z] switching pattern 2402[z]-1 that begins by closing switch SW[1] of cell 2301-z, thereby bypassing cell 2301-z for the duration of one level in the method when cell 2301-z is the last cell in the circuit, or for the duration of the starting cell [z+1] switching pattern 2402[z+1]-1 of the starting cell [z+1] phase 2412[z+1]-1 of cell 2301-(z+1).

[0880] The start cell [z] switching pattern 2402[z]-1 then continues to incrementally close and then open the remaining switches in cells 2301-z in a sequential manner, where switch closures place V CS23[z] Incrementally increases to the output voltage of cell 2301-z, starting with V at the beginning of the start cell [z] phase CS23[z] The output voltage of cell 2301-z increases and reaches N[z]V at the end of start cell[z] phase 2412[z]-1. CS23[z] When switch SW[0] is closed, the incremental switching of SW[2] to SW[n[z]+1] selectively activates the switch group of cells 2301-z that increases the output voltage of cells 2301-z to produce an increased output voltage increase.

[0881] When cell 2301-z is the last cell in circuit 2300, it may remain closed for the duration of one level in the method, or for f(z) levels of execution of the duration of cell [z+1] switching pattern 2403[z+1]-1 applied to cell 2301-(z+1).

[0882] The switching continues until the switch SW[n[z]+1] of unit 2301-z is closed from stage 2401(r), where r={g(z)+[(n[z]-1)·f(1)]+1} to stage 2401(r), where r=n[z]f(z)+g(z)=g(z-1), after which the starting unit 2301-z stage 2412[z]-1 has been completed and the switches SW[0], SW[n[z]+1] of unit 2301-z are opened.

[0883] Execution unit [z] stage 2413 [z] - 1:

[0884] The execution unit [z] stage 2413 [z]-1 may be performed after the start unit [z] stage 2412 [z]-1 is completed. Figure 24B-2 As shown, execution unit [z] stage 2413 [z] -1 may begin with switch SW [0] in unit 2301 -z opened and switch SW [n [z] + 2] in unit 2301 -z closed. Execution unit [z] stage 2413 [z] -1 may have execution unit [z] switching pattern 2403 [z] -1 applied h (z - 1) - 1 times.

[0885] Execution unit [z] switching mode 2403[z]-1 may be initiated by incrementally closing and opening switches SW[1] through SW[n[z]] in unit 2301-z in a sequential manner while switch SW[n[z]+2] in unit 2301-z is closed, causing the output voltage of unit 2301-z to incrementally decrease by V cs23[z] (At the beginning of execution unit [z] stage 2413 [z]-1, n[z]V is subtracted from the output voltage of unit 2301-(z-1) cs23[z] starts, and at the end of the incremental decrease, V is subtracted from the output voltage of unit 2301-(z-1) cs23[z] Finish).

[0886] When switch SW[n[z]+2] is closed, the incremental switching of SW[1] to SW[n[z]] selectively activates the switch group of cell 2301-z that reduces the output voltage of cell 2301-z to produce a reduced output voltage reduction amount. When cell 2301-z is the last cell in circuit 2300, it can remain closed for the duration of one stage in the method, or for f(z) stages of executing [z+1] switching pattern 2403 [z+1]-1 applied to cell 2301-(z+1) for the duration.

[0887] At the completion of the closing of switch SW[n[z]], which occurs at the end of stage 2401(r), where r = g(z-1) + (n[z])·f(z), the output voltage of cell 2301-z is V CS23[z] The incremental reduction has been completed and switch SW[n[z]] of cell 2301-z can be opened and switch SW[n[z]+1] can be closed to bypass cell 2301[z]-1 for the duration of one level in the method when cell 2301-z is the last cell in circuit 2300, or for the duration of applying execution unit [z+1] switching pattern 2403[z+1]-1 on cell 2301-(z+1).

[0888] Upon completion of bypassing of cell 2301-z at stage 2401(r), where r=g(z-1)+(n[z]+1)·f(z), switch SW[n[z]+2] of cell 2301-z may be opened, and switch SW[0] may be closed, and execution cell[z] switching pattern 2403[z]-1 may continue to incrementally close and then open switches SW[2] through SW[n[z]+1] in cell 2301-z in a sequential manner to incrementally increase V CS23[z] When switch SW[0] is closed, incremental switching of SW[2] to SW[n[z]+1] may be accomplished using the method described above in starting cell[z] switching pattern 2402[z]-1 to incrementally increase the output voltage of cell[i] from V to the output voltage of cell 2301-z. CS23[z] Starts and increases to n[z]V of output voltage CS23[z] End. When the execution unit switching pattern has been applied h(z-1)-1 times, and the output voltage of unit [i] at the beginning of execution unit [z] stage 2413[z]-1 has increased by n[z]V cs23 [z], execution unit [z] stage 2413[z]-1 has been completed.

[0889] Peak Unit [z] Stage 2414 [z]:

[0890] Peak unit [z] stage 2414 [z] may be performed after execution unit [z] stage 2413 [z]-1 is completed. Figure 24B-3 As shown, switch SW[0] that was closed during the last stage of execution unit [z] phase 2413[z]-1 has opened, and switch SW[n[z]+2] has closed and remains closed during the entire peak unit [z] phase 2414[z].

[0891] Peak cell [z] phase 2414[z] has peak cell [z] switching pattern 2404[z] that begins like execution cell [z] switching pattern 2403[z]-1 by incrementally closing and opening switches SW[1] through SW[n[z]] in cell 2301-z in a sequential manner when switch SW[n[z]+2] in cell 2301-z is closed, causing the output voltage of cell 2301-z to incrementally decrease by V cs23[z] (At the beginning of the peak cell [z] phase 2414[z], n[z]V is subtracted from the input voltage of cell 2301-z cs23[z] and at the end of the incremental decrease V is subtracted from the input voltage of cell 2301-z cs23[z] Finish)

[0892] When switch SW[n[z]+2] is closed, the incremental switching from SW[1] to SW[n[z]] can be achieved using the method for incrementally reducing the output voltage of unit [z] described above in executing unit [z] switching mode 2403[z]-1.

[0893] Upon completion of the closure of switch SW[n[z]], which occurs at the end of stage 2401(r), where r=N(K)+1-g(z-1)+n[z]·f(z), when cell 2301-z is the last cell in circuit 2300, switch SW[n[z]] of cell 2301-z may be opened and switch SW[n[z]+1] of cell 2301-z may be closed to bypass cell 2301-z for the duration of one stage of the method, or in other cases until operation of the output voltage of the peak voltage of cell 2301-(z+1) is achieved at stage 2401(r) at the peak [z+1] switching mode 2404[z+1] of cell 2301-(z+1), where r=N(K)+1-g(z-1)+g[z]+n(z)f(z)=N(K)+1.

[0894] Overview

[0895] The capacitor element driver disclosed herein can be formed by any type of transistor, including but not limited to metal oxide semiconductor field effect transistor (MOSFET), gallium nitride field effect transistor (GaN-FET), silicon carbide field effect transistor (SiC-FET), junction field effect transistor (JFET) or insulated gate bipolar transistor (IGBT). In addition, the capacitor element driver disclosed herein can be used to drive electrostatic actuators, electroactive polymer actuators, piezoelectric actuators, electroluminescent lighting / display devices, plasma displays, smart films / glasses based on liquid crystal technology, ultrasonic transducers, piezoelectric actuators, electronic paper displays (E-paper) and multiferroic / magnetoelectric devices.

[0896] The foregoing description is proposed for the purpose of illustration. They are not exhaustive and do not limit the present invention to the disclosed precise form or embodiment. In addition, although the above disclosed components are described as separate units, it will be appreciated by those of ordinary skill in the art that the functions provided by one or more units can be combined. As will be appreciated by those of ordinary skill in the art, one or more units can be optional and can be omitted from the implementation in certain embodiments. For example, in one configuration, a control processor and / or a capacitor element, including but not limited to items 730A, 730C, 730D, 730E, 1730, 1840, can be integrated into a capacitor element driver, or some or all of them can be electrically connected or can be connected to an independent electronic or electrical component of a capacitor element driver. In another configuration, a control processor, a control path system and a capacitor element driver can be integrated into a separate electronic device with a voltage source and a capacitor element. In other embodiments, a capacitor drive circuit can form the entirety of a "capacitor element driver", and for non-limiting examples, a voltage source and / or a controller are electrically connected to the terminals of the driver.

[0897] Modifications and adaptations of the present invention will be apparent to those skilled in the art by consideration of the specification and practice of the disclosed embodiments. For example, it can be seen that the non-dissipative elements in the capacitive element driver 700A need not be limited to being electrically connected in a series configuration. For example, when one terminal of the non-dissipative element in the driver 700A is electrically and directly connected to one of the switches in the driver 700A, the second terminal of the non-dissipative element can be connected to another node between nodes 705A[1] and 705A[n+1]. Similarly, the non-dissipative elements in the capacitive element driver 700C need not be limited to being electrically connected in a series configuration, and when one terminal of the non-dissipative element in the driver 700C is electrically and directly connected to one of the switches in the driver 700C, the second terminal of the non-dissipative element can be connected to another node between nodes 705C[1] and 705C[n+1]. The voltages at these nodes will have the same average value as in the non-dissipative element series configuration of the drivers 700A, 700C.

[0898] Modifications and adaptations of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the disclosed embodiments.The specification and embodiments are to be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

Claims

1. A driver unit, in a capacitive element driving circuit, electrically connectable between a capacitive element and a voltage source configured to provide a selected voltage to the capacitive element driving circuit, the capacitive element comprising an element having a capacitive function, and the driver unit being configured to drive the capacitive element between two voltage levels, wherein: The driver unit comprises: a first input terminal electrically connectable directly or indirectly to a first terminal of the voltage source; an output terminal capable of being directly or indirectly electrically connected to an input terminal of the capacitive element; a second input terminal capable of being directly or indirectly electrically connected to a second terminal of the voltage source; Multiple switches, also with a first switch electrically connectable in series between a first input terminal of the driver unit and an output terminal of the driver unit, and a second switch electrically connectable in series between the second input terminal of the driver unit and the output terminal of the driver unit; and a non-dissipative element configured to store and transfer energy for driving the capacitive element between the two voltage levels, wherein the non-dissipative element is electrically connectable between: a first end of a first node between the first input terminal and the output terminal, and a second end of a second node between the second input terminal and the output terminal; Wherein, the plurality of switches are arranged to be opened or closed in combination in a switching stage sequence while keeping the value of the average voltage level of the non-dissipative element unchanged over time, and the switching stage sequence also includes a switching mode, the switching mode having a voltage change portion, and the voltage change portion is arranged so that the output voltage of the capacitor element driver changes during the application of the voltage change portion to the capacitor element driver.

2. The driver unit according to claim 1, wherein: The first input terminal is electrically connectable to an output terminal of an additional driver unit, which is directly or indirectly electrically connectable to a first terminal of the voltage source.

3. The driver unit according to claim 2, further comprising an input common node between the first input terminal and the second input terminal, wherein The input common node can be electrically connected to an output terminal of the additional driver unit.

4. The driver unit according to claim 1, wherein: The output terminal can be electrically connected to an additional driver unit, which can be electrically connected directly or indirectly to an input terminal of the capacitive element. 5 . The driver unit of claim 1 , further comprising a controller electrically connectable to the plurality of switches to control operation of the switches to open or close in combination in the switching stage sequence.

6. A capacitive element driver for driving a capacitive element between two voltage levels, the capacitive element comprising an element having a capacitive function, and the capacitive element driver comprising a first circuit having: a first circuit first voltage receiving connection electrically connectable directly or indirectly to a first terminal of a voltage source for receiving a selected voltage from said voltage source; a first circuit voltage output connection capable of being electrically connected directly or indirectly to an input terminal of the capacitive element; a first circuit second voltage receiving connection capable of being directly or indirectly electrically connected to a second terminal of the voltage source; as well as A first circuit non-dissipative element configured to store and transfer energy for driving the capacitive element between the two voltage levels, wherein the first circuit non-dissipative element is electrically connectable to: a first end of a first circuit first node between the first circuit first voltage receiving connection and the first circuit voltage output connection, and a second end of a first circuit second node between the first circuit second voltage receiving connection and the first circuit voltage output connection; wherein the first circuit is configured to transfer the energy to the capacitive element stepwise directly or indirectly from a first high voltage level to a first low voltage level or from the first low voltage level to the first high voltage level; and Wherein, the first circuit is configured to perform the step-by-step transfer by operating a first switching stage sequence on the non-dissipative element of the first circuit, the first switching stage sequence also including a switching mode, the switching mode including a voltage change portion, the voltage change portion being arranged so that the output voltage of the capacitor element driver changes during the application of the voltage change portion to the capacitor element driver.

7. The capacitive element driver according to claim 6, in, The first circuit also includes a first plurality of switches, the first plurality of switches having: a first circuit first switch electrically connectable in series between the first circuit first voltage receiving connection and the first circuit voltage output connection; and a first circuit second switch capable of being electrically connected in series between the first circuit second voltage receiving connection and the first circuit voltage output connection; as well as Wherein, the first circuit is further configured to maintain a value of an average voltage level of a non-dissipative element of the first circuit constant over time while operating a first capacitive element driver through the first switching stage sequence.

8. The capacitive element driver of claim 7, further comprising a controller electrically connectable to the first plurality of switches to control operation of the first plurality of switches to open or close in combination in the first switching stage sequence.

9. The capacitive element driver according to claim 6, The capacitor element driver includes a multi-unit capacitor element driving circuit, and the multi-unit capacitor element driving circuit has: The first circuit includes a first driver unit, The first circuit first voltage receiving connection has a first unit first input terminal directly or indirectly connectable to a first terminal of the voltage source, The first circuit voltage output connection has a first cell output terminal that can be directly or indirectly connected to an input terminal of the capacitive element, The first circuit second voltage receiving connection has a first unit second input terminal that can be directly or indirectly connected to a second terminal of the voltage source, The first circuit first node comprises a first unit first node arranged between the first unit first input terminal and the first unit output terminal, a first circuit second node, comprising a first unit second node arranged between the first unit second input terminal and the first unit output terminal, The first circuit non-dissipative element comprises a first unit non-dissipative element having a first end electrically connected to the first unit first node and a second end electrically connected to the first unit second node, Also included is a second driver unit, the second driver unit having: A second unit first input terminal can be electrically connected to the first unit output terminal, The second unit output terminal can be directly or indirectly electrically connected to the capacitive element, a second unit second input terminal electrically connectable to the first unit output terminal, and a second unit non-dissipative element arranged to store and transfer additional energy for driving the capacitive element between the two voltage levels, wherein The second unit non-dissipative element can be electrically connected to: one end of the second unit first node disposed between the second unit first input terminal and the second unit output terminal, and the other end of the second unit second node disposed between the second unit second input terminal and the second unit output terminal; wherein the second driver unit is configured to directly or indirectly transfer the additional energy to the capacitive element step by step from a second high voltage level to a second low voltage level or from the second low voltage level to the second high voltage level; and Wherein, the second driver unit is arranged to transfer the additional energy stepwise by operating a second switching stage sequence on the second unit non-dissipative element.

10. The capacitive element driver according to claim 9, in, The first driver unit further comprises a first plurality of switches, the first plurality of switches having: A first switch of a first unit can be electrically connected in series between a first input terminal of the first unit and an output terminal of the first unit; as well as A first unit second switch capable of being electrically connected in series between the first unit second input terminal and the first unit output terminal; Wherein, the second driver unit further includes a second plurality of switches, and the second plurality of switches have: a second unit first pair of switches electrically connectable in series between the second unit first input terminal and the second unit output terminal; and a second unit second pair of switches electrically connectable in series between the second unit second input terminal and the second unit output terminal; and wherein the first switching stage sequence is arranged so that the first plurality of switches are opened or closed in combination while the value of the average voltage level of the first unit non-dissipative element remains constant over time; wherein the second switching stage sequence is arranged to open or close the second plurality of switches in combination while the value of the average voltage level of the second unit non-dissipative element remains constant over time; and wherein the first switching level sequence and the second switching level sequence together comprise a circuit-wide switching level sequence to drive the capacitive element between two voltage levels, wherein the first switching level sequence and the second switching level sequence operate in conjunction with each other such that application of a first portion of a first mode of switch activation of the first driver unit is maintained during application of a second mode of switch activation of the second driver unit.

11. The capacitive element driver of claim 10, further comprising a controller electrically connectable to the first plurality of switches and the second plurality of switches to control operation of the first plurality of switches and the second plurality of switches to open or close in combination in the circuit-wide switching stage sequence.

12. The capacitive element driver according to claim 9, in, The first driver unit has a first number of the first unit non-dissipative elements and the second driver unit has a second number of the second unit non-dissipative elements, and The first number of the first unit non-dissipative elements is different from the second number of the second unit non-dissipative elements.

13. The capacitive element driver according to claim 9, in, The first driver unit has a first number of the first unit non-dissipative elements and the second driver unit has a second number of the second unit non-dissipative elements, and The first number of the first unit non-dissipative elements is the same as the second number of the second unit non-dissipative elements.

14. The capacitive element driver according to claim 6, in, The capacitive element driver further has one or more driver units that can be electrically connected in series, wherein the first circuit includes a first driver unit that can be electrically and directly or indirectly connected to the voltage source and to an input terminal of an additional driver unit, the first driver unit having: The first unit first input terminal can be directly or indirectly connected to the first terminal of the voltage source, a first unit output terminal, directly or indirectly connectable to an input terminal of said capacitive element, The second input terminal of the first unit can be directly or indirectly connected to the second terminal of the voltage source, A first unit non-dissipative element configured to store and transfer energy for driving the capacitive element between the two voltage levels, wherein the first unit non-dissipative element can be electrically connected to: a first end of a first unit first node between the first unit first input terminal and the first unit output terminal, and a second end of the first unit second node between the first unit second input terminal and the first unit output terminal; and The additional driver unit can be directly or indirectly electrically connected to the capacitive element; Wherein, the additional driver unit comprises: an additional unit first input terminal capable of being electrically connected to the first unit output terminal; an additional unit output terminal capable of being directly or indirectly electrically connected to an input terminal of the capacitive element; an additional unit second input terminal electrically connectable to the first unit output terminal; and an additional unit first node, arranged between the additional unit first input terminal and the additional unit output terminal; an additional unit second node arranged between the additional unit second input terminal and the additional unit output terminal; and a first additional unit non-dissipative element configured to store and transfer additional energy for driving the capacitive element between two additional voltage levels, wherein the additional unit non-dissipative element is electrically connectable between: one end of the first node of the additional unit, and The other end of the second node of the additional unit; and wherein the additional driver unit is arranged to provide an additional stepwise transfer of the additional energy to the capacitive element directly or indirectly from an additional high voltage level to an additional low voltage level or from the additional low voltage level to the additional high voltage level; and Therein, the additional driver unit is arranged to provide an additional stepwise transfer of the additional energy by operation of an additional sequence of switching stages on the additional unit non-dissipative elements.

15. The capacitive element driver according to claim 6, wherein: The first switching stage sequence has an execution pattern of switch activation in the first circuit including subtracting a specified voltage from an input voltage of the first circuit, bypassing the first circuit, and adding the specified voltage to the input voltage of the first circuit.

16. The capacitive element driver according to claim 14, in, The additional driver unit has an additional driver unit input common node between the additional unit first input terminal and the additional unit second input terminal, and Wherein, the additional driver unit input common node is electrically connectable to the first unit output terminal.

17. The capacitive element driver according to claim 6, wherein: The first cell output terminal is electrically connectable to an input terminal of an additional driver cell having an additional cell output terminal which is directly or indirectly electrically connectable to an input terminal of the capacitive element.

18. The capacitive element driver according to claim 6, wherein the capacitive element driver comprises a multi-unit capacitive element driving circuit having one or more driver units electrically connected in series, wherein a driver unit of the one or more driver units has a driver unit input common node between a driver unit first input terminal and a driver unit second input terminal, wherein the one driver unit input common node is electrically connected to the output terminal of another driver unit, and The first circuit includes the one driver unit or the other driver unit.

19. The capacitive element driver according to claim 6, wherein: The voltage changing section further includes: a subtracting section configured to cause a voltage to be subtracted from an input voltage of the first circuit during application of the subtracting section to the first circuit; and The switching mode also includes a bypass part: is arranged to be applied to the first circuit after the subtraction part is applied to the first circuit, and The device is configured to bypass the first circuit during application of the bypass portion to the first circuit.

20. The capacitive element driver according to claim 19, wherein: The switching mode also has a second subtraction part: is configured to be applied to the first circuit after the bypass portion is applied to the first circuit, and The method is arranged such that, during application of the second subtraction section to the first circuit, another voltage is subtracted from an input voltage of the first circuit.

21. The capacitive element driver according to claim 6, wherein: The switching mode further includes a bypass portion configured to bypass the first circuit during application of the bypass portion to the first circuit; Wherein the voltage changing part of the switching mode further comprises an additional part: is configured to be applied to the first circuit after the bypass portion is applied to the first circuit, and The method is configured to increase an input voltage of the first circuit by a voltage during application of the additional portion to the first circuit.

22. The capacitive element driver according to claim 21, wherein: The switching mode also includes a second additional part: is configured to be applied to the first circuit before applying the bypass portion to the first circuit, and The device is arranged to increase the input voltage of the first circuit by another voltage during application of the second additional portion to the capacitive element driver.

23. The capacitive element driver according to claim 6, wherein: The switching mode further includes a bypass portion configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver; as well as Wherein the voltage changing part of the switching mode further comprises a subtraction part: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is configured such that, during application of the subtraction portion to the capacitive element driver, a voltage is subtracted from an input voltage of the capacitive element driver.

24. The capacitive element driver according to claim 23, wherein: The switching mode also includes the additional part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver.

25. The capacitive element driver according to claim 6, wherein: The switching mode further comprises an additional portion configured to increase the input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver; as well as The switching mode also includes a bypass part: is arranged to be applied to the capacitive element driver after the additional portion is applied to the capacitive element driver, and The device is configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver.

26. A capacitive element driving circuit, comprising a capacitive element driver, the capacitive element driver being configured to drive a capacitive element between two voltage levels, the capacitive element having a capacitive function: in, The capacitive element driver is directly or indirectly electrically connectable to a first terminal of a voltage source for delivering a first voltage level to the capacitive element driver, and the capacitive element driver is directly or indirectly electrically connectable to a second terminal of the voltage source for delivering a second voltage level to the capacitive element driver; Wherein, the capacitive element driver comprises: a non-dissipative element arranged to store and transfer energy for driving the capacitive element between the two voltage levels, directly or indirectly through an output terminal of the capacitive element driver; and A plurality of switches can be electrically connected directly or indirectly to the non-dissipative element and are configured to be opened or closed in combination in a switching stage sequence to pass the output voltage of the capacitor element driver while keeping the value of the average voltage level of the non-dissipative element unchanged over time, and the output voltage changes incrementally from the first voltage level to the second voltage level. The switching stage sequence also includes a switch activation mode in the capacitor element driver, the switch activation mode having a voltage change portion, and the voltage change portion is arranged to cause the output voltage of the capacitor element driver to change during the period when the voltage change portion is applied to the capacitor element driver.

27. The capacitive element driving circuit according to claim 26, wherein: The switch activation mode further includes a bypass portion configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver; as well as Wherein the voltage changing portion of the switch activation mode further comprises an additional portion: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver.

28. The capacitive element driving circuit according to claim 27, wherein: The switch activation mode also includes a second additional part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by another voltage during application of the second additional portion to the capacitive element driver.

29. The capacitive element driving circuit according to claim 27, wherein: The switch activation mode also includes a subtraction portion: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is configured such that a voltage is subtracted from an input voltage of the capacitive element driver during application of the subtracting portion to the capacitive element driver.

30. The capacitive element driving circuit according to claim 26, wherein: The switch activation mode further includes a bypass portion configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver; as well as The voltage changing portion of the switch activation mode also includes a subtraction portion: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is configured to subtract a voltage from an input voltage of the capacitive element driver during application of the subtraction portion to the capacitive element driver.

31. The capacitive element driving circuit according to claim 30, wherein: The switch activation mode also has a second subtraction part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is configured such that, during application of the second subtraction section to the capacitive element driver, another voltage is subtracted from an input voltage of the capacitive element driver.

32. The capacitive element driving circuit according to claim 30, wherein: The switch activation mode also includes the additional parts: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver.

33. The capacitive element driving circuit according to claim 26, in, The capacitive element driver further comprises a first driver unit, wherein the output terminal comprises a first unit output terminal, the plurality of switches comprises a first plurality of switches, and the sequence of switching stages comprises a first sequence of switching stages having a first switch activation pattern; further comprising a second driver unit connected in series with the first driver unit in the capacitor element driving circuit and located between the first driver unit and the capacitor element, wherein the second driver unit is electrically and directly connectable to the first unit output terminal, and wherein the second driver unit has a second plurality of switches, the second plurality of switches being arranged to be opened or closed in combination in a second switching stage sequence, wherein the second switching stage sequence has a second switch activation pattern, and The first switching stage sequence and the second switching stage sequence are operable in cooperation with each other such that application of a first portion of the first switch activation pattern on the first driver unit is maintained during application of the second switch activation pattern on the second driver unit.

34. The capacitor element driving circuit according to claim 26: in, The capacitive element driver further comprises a first driver unit, wherein the output terminal comprises a first unit output terminal; The invention also includes a second driver unit adjacent to the first driver unit and located between the first driver unit and the capacitor element in the capacitor element driving circuit, wherein the second driver unit has: a second unit first input terminal capable of being indirectly electrically connected to a first terminal of the voltage source, and a second unit second input terminal capable of being indirectly electrically connected to a second terminal of the voltage source; and The second unit first input terminal and the second unit second input terminal can be electrically connected to the first unit output terminal through a common node between the second unit first input terminal and the second unit second input terminal.

35. The capacitive element driving circuit according to claim 26, wherein: The voltage changing portion of the switch activation mode further includes a subtracting portion configured to subtract a voltage from an input voltage of the capacitive element driver during application of the subtracting portion to the capacitive element driver; as well as The switch activation mode also includes a bypass section: is configured to be applied to the capacitive element driver after the subtracting portion is applied to the capacitive element driver, and The device is configured to bypass the capacitive element driver during the period when the bypass portion is applied to the capacitive element driver.

36. The capacitive element driving circuit according to claim 26, wherein: The voltage changing portion of the switch activation mode further includes an additional portion configured to increase the input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver; as well as The switch activation mode also includes a bypass section: is arranged to be applied to the capacitive element driver after the additional portion is applied to the capacitive element driver, and The device is configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver.

37. The capacitive element driving circuit according to claim 26, wherein: The switches are configured to be opened or closed in combination to gradually transfer the energy to the capacitive element.

38. A method for driving a capacitive element between two voltage levels, the method comprising: directly or indirectly electrically connecting a first voltage receiving connection of a first capacitive element driver to a first terminal of a voltage source; directly or indirectly electrically connecting a voltage output connection of the first capacitive element driver to an input terminal of the capacitive element; directly or indirectly electrically connecting a second voltage receiving connection of the first capacitive element driver to a second terminal of the voltage source; as well as storing energy in a non-dissipative element of the first capacitive element driver, the non-dissipative element having: a first end electrically connected to a first node disposed between the first voltage receiving connection and the voltage output connection, and a second end electrically connected to a second node disposed between the second voltage receiving connection and the voltage output connection, and The first capacitive element driver is operated by a first sequence of switching stages, wherein the first sequence is arranged to transfer the energy in a first set of voltage steps directly or indirectly to the capacitive element from a first high voltage level to a first low voltage level or from the first low voltage level to the first high voltage level.

39. The method of claim 38, further comprising maintaining a value of an average voltage level of the non-dissipative element constant over time while operating the first capacitive element driver through the first sequence of switching stages.

40. The method of claim 38, wherein: The first capacitive element driver further includes a first driver unit, wherein the first driver unit has: a first voltage receiving connection having a first unit first input terminal connectable directly or indirectly to said first terminal of said voltage source, a voltage output connection having a first unit output terminal connectable directly or indirectly to an input terminal of said capacitive element, a second voltage receiving connection having a first unit second input terminal connectable directly or indirectly to a second terminal of said voltage source, a first node, comprising a first unit first node arranged between the first unit first input terminal and the first unit output terminal, a second node including a first unit second node disposed between the first unit second input terminal and the first unit output terminal, and a non-dissipative element, comprising a first unit non-dissipative element having a first end electrically connected to the first unit first node and a second end electrically connected to the first unit second node; and Also includes: The second driver unit is electrically connected between the first driver unit and the capacitive element by the following steps: directly or indirectly electrically connecting a second unit first input terminal of the second driver unit to a first terminal of the voltage source via the first driver unit, directly or indirectly electrically connecting a second unit output terminal of the second driver unit to an input terminal of the capacitive element, and directly or indirectly electrically connecting a second unit second input terminal of the second driver unit to a second terminal of the voltage source via the first driver unit; storing additional energy in a second cell non-dissipative element of the second driver cell, the second cell non-dissipative element being electrically connected at one end to a second cell first node disposed between the second cell first input terminal and the second cell output terminal and at another end to a second cell second node disposed between the second cell second input terminal and the second cell output terminal, and operating the second driver unit by a second switching stage sequence, a second sequence transferring the additional energy in the second set of voltage steps directly or indirectly to the capacitive element from a second high voltage level to a second low voltage level or from the second low voltage level to the second high voltage level, and The second driver unit operated by the second switching level sequence is combined and cooperates with the first driver unit operated by the first switching level sequence, and the cooperation also includes maintaining the application of the first part of the first activation mode of the first driver unit during the application of the second activation mode of the second driver unit.

41. The method of claim 38, further comprising opening or closing switches in combination to gradually transfer the energy to the capacitive element.

42. A capacitive element driver for driving a capacitive element between voltage levels, the capacitive element comprising an element having a capacitive function, and the voltage being supplied to the capacitive element driver by a voltage source, the capacitive element driver comprising: Multiple switches with: a first switch capable of being directly or indirectly electrically connected in series between a first terminal of the voltage source and an input terminal of the capacitive element, and a second switch capable of being directly or indirectly electrically connected in series between the second terminal of the voltage source and the input terminal of the capacitive element; as well as a non-dissipative element configured to store and transfer energy for driving the capacitive element between the voltage levels, wherein the non-dissipative element can be electrically connected directly or indirectly to: a first end of a first node between a first terminal of the voltage source and an input terminal of the capacitive element, and a second end of a second node between a second terminal of the voltage source and an input terminal of the capacitive element; Wherein, the multiple switches are configured to be opened or closed in combination in a switching stage sequence to gradually transfer the energy to the capacitor element, and the switching stage sequence also includes a switching mode, the switching mode has a voltage change part, and the voltage change part is arranged so that the output voltage of the capacitor element driver changes during the application of the voltage change part to the capacitor element driver.

43. The capacitive element driver according to claim 42, Also includes: a first input terminal disposed between the first switch and the first terminal of the voltage source and directly or indirectly electrically connected in series between the first switch and the first terminal of the voltage source; an output terminal electrically connected directly or indirectly to an input terminal of the capacitive element; a second input terminal disposed between the second switch and the second terminal of the voltage source and electrically connected in series directly or indirectly between the second switch and the second terminal of the voltage source; The first node is arranged between the first input terminal and the output terminal, and the second node is arranged between the second input terminal and the output terminal.

44. The capacitive element driver according to claim 42, wherein: The switching stage sequence is arranged to maintain a value of an average voltage level of the non-dissipative element constant over time.

45. The capacitive element driver according to claim 42, wherein: The capacitive element driver is configured to drive the capacitive element from a high voltage level to a low voltage level or from a low voltage level to a high voltage level.

46. ​​The capacitive element driver according to claim 42, wherein: The capacitive element includes a power switch.

47. The capacitive element driver of claim 42, further comprising a controller electrically connectable to the plurality of switches to control operation of the switches to open or close in combination in the switching stage sequence.

48. The capacitive element driver according to claim 47, wherein: The controller is configured to control the operation of the plurality of switches through the switching stage sequence while maintaining a constant value of an average voltage level of the non-dissipative element over a complete voltage level drive cycle.

49. The capacitive element driver according to claim 42, wherein: The capacitive element driver is configured to drive the capacitive element between two voltage levels across a plurality of voltage level drive cycles.

50. The capacitive element driver according to claim 42, in, The non-dissipative element comprises n non-dissipative elements, wherein n is a number greater than or equal to 1, and When n>1 and 2≤i≤n, the switch SW[i] can be electrically connected to and arranged between the input terminal of the capacitive element and a common node between the (i-1)th non-dissipative element and the (i)th non-dissipative element.

51. The capacitive element driver according to claim 42, in, The first switch further comprises a first pair of switches electrically connected in series between a first terminal of the voltage source and an input terminal of the capacitive element; Wherein, the second switch further comprises a second pair of switches, the second pair of switches being electrically connected in series between the second terminal of the voltage source and the input terminal of the capacitive element; and The non-dissipative element can be electrically connected and arranged between a first common node of the first pair of switches and a second common node of the second pair of switches.

52. The capacitive element driver according to claim 51, in, The non-dissipative element comprises n non-dissipative elements, wherein n is a number greater than or equal to 1; wherein, when n>1 and 2≤i≤n, the switch SW[i] can be electrically connected to and disposed between an input terminal of the capacitive element and a common node between the (i-1)th non-dissipative element and the (i)th non-dissipative element; and Wherein, the switching level sequence comprises a method having multiple stages, further comprising: a first stage, in which the switch SW[0] is closed, the switch SW[n+2] is opened, and the switches including the switch SW[1] and the switch SW[n+1] and the switch between the switch SW[1] and the switch SW[n+1], if any, are closed in a first sequence, wherein, starting from the switch SW[1] and ending with the switch SW[n+1], the switches SW[i] (1≤i≤n+1) are closed until the predetermined voltage V(i) can be delivered to the capacitive element; and A second phase having a first sub-phase, in which the switch SW[0] is opened, the switch SW[n+2] is closed, and the switches including the switch SW[1] and the switch SW[n+1] and the switch between the switch SW[1] and the switch SW[n+1], if any, are closed in sequence in a second sequence, wherein, starting from the switch SW[1] and ending with the switch SW[n+1], the switch SW[i] (1≤i≤n+1) is closed until the predetermined voltage V(i+n+1) can be delivered to the capacitor element, wherein the switch SW[n+1] is closed until the power supply voltage VDD can be delivered to the capacitor element.

53. The capacitive element driver according to claim 52, in, The second phase further includes a second sub-phase, in which switches including the switch SW[n+1] and the switch SW[1] and, if present, a switch between the switch SW[n+1] and the switch SW[1] are closed in a third sequence in a decreasing continuous order, wherein, starting from the switch SW[n] and ending with the switch SW[1], the switch SW[i] (1≤i≤n) is closed until the predetermined voltage V(i+n+1) can be delivered to the capacitive element; and The method further includes a third phase, in which the switch SW[0] is closed, the switch SW[n+2] is opened, and the switches including the switch SW[n+1] and the switch SW[1] and, if any, the switch between the switch SW[n+1] and the switch SW[1] are closed in a fourth sequence in a reverse sequence, wherein, starting from the switch SW[n+1] and ending with the switch SW[2], the switch SW[i] (2≤i≤n+1) is closed until the predetermined voltage V(i) can be delivered to the capacitive element.

54. The capacitive element driver of claim 53, further comprising a fourth phase having a return to the first phase.

55. The capacitive element driver according to claim 43, further comprising a capacitive element driving circuit; in, The capacitive element driver comprises a first driver unit of the capacitive element driving circuit, the plurality of switches comprises a first plurality of switches, the first input terminal comprises a first unit first input terminal, the output terminal comprises a first unit output terminal, and the non-dissipative element comprises a first unit non-dissipative element; and wherein the capacitive element driving circuit further comprises a second driver unit electrically connectable between the first driver unit and the capacitive element, the second driver unit having: A second unit first input terminal can be electrically connected to the first unit output terminal, a second unit output terminal capable of being directly or indirectly electrically connected to the capacitive element; A second plurality of switches having: a second unit first pair of switches electrically connectable in series between the second unit first input terminal and the second unit output terminal, and a second pair of switches of a second unit, electrically connectable in series between the first unit output terminal and the second unit output terminal; and a second non-dissipative element configured to store and transfer additional energy for driving the capacitive element between two voltage levels, and wherein the second non-dissipative element can be electrically connected between a first common node of the first pair of switches of the second cell and a second common node of the second pair of switches of the second cell.

56. The capacitive element driver according to claim 55, in, The switching level sequence includes a first switching level sequence; and The second plurality of switches are configured to be opened or closed in combination in a second switching stage sequence to gradually transfer the additional energy to the capacitive element.

57. The capacitive element driver according to claim 56, Also included is a circuit-wide switching stage sequence, where The application of the first switching stage sequence to the first driver unit cooperates with the application of the second switching stage sequence to the second driver unit to perform a stepwise shift of voltage; as well as The controller can also be electrically connected to the first plurality of switches and the second plurality of switches to control the opening or closing of the first plurality of switches and the second plurality of switches based on the switching level sequence of the circuit range.

58. The capacitive element driver according to claim 42, wherein: The voltage changing portion of the switching mode further includes a subtracting portion configured to subtract a voltage from an input voltage of the capacitive element driver during application of the subtracting portion to the capacitive element driver; as well as The switching mode also includes a bypass part: is configured to be applied to the capacitive element driver after the subtracting portion is applied to the capacitive element driver, and The device is configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver.

59. The capacitive element driver according to claim 58, wherein: The switching mode also has a second subtraction part: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is configured such that, during application of the second subtraction section to the capacitive element driver, another voltage is subtracted from an input voltage of the capacitive element driver.

60. The capacitive element driver according to claim 42, wherein: The switching mode further includes a bypass portion configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver; as well as Wherein the voltage changing part of the switching mode further comprises an additional part: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver.

61. The capacitive element driver according to claim 60, wherein: The switching mode also includes a second additional part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by another voltage during application of the second additional portion to the capacitive element driver.

62. The capacitive element driver according to claim 42, wherein: The switching mode further includes a bypass portion configured to bypass the capacitive element driver during application of the bypass portion to the capacitive element driver, and Wherein the voltage changing part of the switching mode further comprises a subtraction part: is configured to be applied to the capacitive element driver after the bypass portion is applied to the capacitive element driver, and The device is configured such that, during application of the subtraction portion to the capacitive element driver, a voltage is subtracted from an input voltage of the capacitive element driver.

63. The capacitive element driver according to claim 62, wherein: The switching mode also includes the additional part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is arranged to increase an input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver.

64. The capacitive element driver according to claim 42, wherein: The voltage changing portion of the switching mode further includes an additional portion configured to increase the input voltage of the capacitive element driver by a voltage during application of the additional portion to the capacitive element driver; as well as The switching mode also includes a bypass part: is arranged to be applied to the capacitive element driver after the additional portion is applied to the capacitive element driver, and The device is configured to bypass the capacitive element driver during the period when the bypass portion is applied to the capacitive element driver.

65. The capacitive element driver according to claim 60, wherein: The switching mode also includes a subtraction part: is arranged to be applied to the capacitive element driver before the bypass portion is applied to the capacitive element driver, and The device is configured such that, during application of the subtraction portion to the capacitive element driver, a voltage is subtracted from an input voltage of the capacitive element driver.

66. The capacitive element driver according to claim 50, wherein: The switches are configured to be opened or closed in combination to gradually transfer the energy to the capacitive element.

67. The capacitive element driver according to claim 51, wherein: The first switching stage sequence and the second switching stage sequence operate in conjunction with each other such that application of a first portion of a first pattern of switch activation of the first driver unit is maintained during application of a second pattern of switch activation of the second driver unit.

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