Maximum voltage selection circuit

Abstract

The present disclosure relates to the technical field of integrated circuits, and provides a maximum voltage selection circuit, which includes: an input unit connected to a first input port and a second input port, the input unit generating a detection signal according to a first input voltage and a second input voltage; a first output unit, responding to a detection signal of a first state, generating an output voltage according to the aforementioned first input voltage; a second output unit, responding to a detection signal of a second state, generating the aforementioned output voltage according to the aforementioned second input voltage, and the maximum voltage selection circuit selects one of the aforementioned first output unit and the aforementioned second output unit to be turned on according to the state of the detection signal, and provides the aforementioned output voltage to the load end. In this way, the maximum voltage selection can be achieved while effectively reducing its voltage drop loss, and the size of the transistor in the circuit can be reduced, thereby reducing the circuit integration area and reducing the manufacturing cost.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a maximum voltage selection circuit. Background Art

[0002] A maximum voltage selection circuit is often required in an integrated circuit. The main function of the maximum voltage selection circuit is to select a maximum voltage output from multiple existing voltages for use by other circuits in the integrated circuit.

[0003] Figure 1 FIG. 1 is a schematic diagram showing a maximum voltage selection circuit of three voltage paths in the prior art. Figure 1 As shown, in the maximum voltage selection circuit 100, it includes: a first input port connected to the first input voltage VCC1, a second input port connected to the second input voltage VCC2, a third input port connected to the third input voltage VCC3 and an output port providing the output voltage Vmax, as well as transistors Mp1 to Mp6. When the voltage difference between the first input voltage VCC1, the second input voltage VCC2 and the third input voltage VCC3 is large, the maximum voltage selection circuit 100 can select the maximum voltage as the output voltage Vmax. However, since the first input voltage VCC1, the second input voltage VCC2 and the third input voltage VCC3 are generally not 0, the P-type metal oxide semiconductor field effect transistor (PMOS) with the first input voltage VCC1, the second input voltage VCC2, or the third input voltage VCC3 as the gate voltage will result in insufficient driving capability of the output voltage Vmax; and when the voltage difference between the first input voltage VCC1, the second input voltage VCC2 and the third input voltage VCC3 is small or equal, the PMOS in the maximum voltage selection circuit 100 cannot work normally and cannot generate the output voltage Vmax.

[0004] Figure 2 FIG. 2 is a schematic diagram showing another maximum voltage selection circuit in the prior art. Figure 2As shown, in the maximum voltage selection circuit 200, it includes: a first input port connected to the first input voltage Vin1, a second input port connected to the second input voltage Vin2 and an output port providing an output voltage Vmax, as well as a transistor Mp1, a transistor Mp2, a diode D1 and a diode D2, wherein the transistor Mp1 is connected between the first input port and the output port, and the control end of the transistor Mp1 is connected to the second input port, the positive electrode of the diode D1 is connected to the first input port, and the negative electrode is connected to the output port; the transistor Mp2 is connected between the second input port and the output port, and the control end of the transistor Mp2 is connected to the first input port, the positive electrode of the diode D2 is connected to the second input port, and the negative electrode is connected to the output port, when the transistor Mp1 / Mp2 is not turned on, the voltage Vmax of the output node is MAX(Vin1, Vin2)-Vd, that is, the larger of the first input voltage Vin1 and the second input voltage Vin2, minus the voltage drop Vd of the diode (D1 / D2). Vth is defined as the turn-on threshold voltage of transistor Mp1 / Mp2. When the first input voltage Vin1 is low and lower than (Vin2-Vd-Vth), transistor Mp2 is turned on, and the output node is selectively connected to the second input voltage Vin2 through transistor Mp2. Similarly, when the second input voltage Vin2 is lower than (Vin1-Vd-Vth), transistor Mp1 is turned on, and the output node is selectively connected to the first input voltage Vin1 through transistor Mp1. Since Iload*Ron is much smaller than Vd, the voltage output node voltage at this time is Vmax=Vin2-Iload*Ron2, or Vmax=Vin1-Iload*Ron1. Among them, Iload is the load current under the output node, and Ron1 / Ron2 is the on-resistance of transistor Mp1 / Mp2.

[0005] In order to avoid voltage drop loss, the closer the voltage Vmax of the output node is to the second input voltage Vin2 (or the first input voltage Vin1), the better. That is, the smaller Ron2 (Ron1), the better. The Ron of the transistor is inversely proportional to its own width-to-length ratio (W / L) and the gate-source voltage Vgs. When the first input voltage Vin1 is low, the transistor Mp2 is turned on, and the gate-source voltage Vgs = Vmax-Vin1. When the second input voltage Vin2 is low, the transistor Mp1 is turned on, and the gate-source voltage Vgs = Vmax-Vin2. Here Vin1 / Vin2 is fixed. In order to reduce Ron, the size of W / L can only be increased, thereby increasing the area, which increases the manufacturing cost of the circuit. Summary of the invention

[0006] In order to solve the above technical problems, the present disclosure provides a maximum voltage selection circuit, which can realize the selection of the maximum voltage while effectively reducing its voltage drop loss, and can reduce the size of the transistors in the circuit, thereby reducing the circuit integration area and reducing the manufacturing cost.

[0007] According to a maximum voltage selection circuit provided by the present disclosure, the maximum voltage selection circuit has a first input port connected to a first input voltage, a second input port connected to a second input voltage, and an output port for providing an output voltage, wherein the maximum voltage selection circuit further includes:

[0008] An input unit connected to the first input port and the second input port, and generating a detection signal according to the first input voltage and the second input voltage;

[0009] A first output unit connected to the output end of the input unit, the first input port and the output port, and generating the output voltage according to the first input voltage in response to the detection signal of the first state;

[0010] The second output unit is connected to the output end of the input unit, the second input port and the output port, and generates the output voltage according to the second input voltage in response to the detection signal of the second state.

[0011] The maximum voltage selection circuit selects one of the first output unit and the second output unit to be turned on according to the state of the detection signal, and provides the output voltage to the load end.

[0012] Preferably, the first state of the detection signal is a low level, and the second state is a high level.

[0013] Preferably, the aforementioned input unit includes:

[0014] A first transistor, wherein a first end of the first transistor is connected to the aforementioned second input port, and a control end of the first transistor is connected to the aforementioned first input port;

[0015] A first current source connected between the second terminal of the first transistor and ground;

[0016] The first inverter has an input terminal connected to the connection node between the first transistor and the first current source, an output terminal for providing the detection signal, a positive source terminal connected to the output port, and a negative power supply terminal connected to the ground.

[0017] Preferably, in response to the sum of the first input voltage and the on-voltage of the first transistor being less than the second input voltage, the first transistor is in an on-state, and the input unit provides a detection signal of the first state.

[0018] Preferably, in response to the sum of the second input voltage and the on-voltage of the first transistor being less than the first input voltage, the first transistor is in an off state, and the input unit provides a detection signal of the second state.

[0019] Preferably, the aforementioned first output unit includes:

[0020] A second inverter, wherein the input end of the second inverter is connected to the output end of the first inverter, and the output end of the second inverter is used to provide an inverted signal of the detection signal;

[0021] A second transistor, wherein a first end of the second transistor is connected to the aforementioned output port, a second end of the second transistor is connected to the aforementioned first input port, and a control end of the second transistor is connected to the output end of the aforementioned second inverter;

[0022] A first diode, wherein the anode of the first diode is connected to the second end of the second transistor, and the cathode of the first diode is connected to the output port.

[0023] Preferably, the aforementioned second output unit includes:

[0024] a third transistor, wherein a first end of the third transistor is connected to the aforementioned output port, a second end of the third transistor is connected to the aforementioned second input port, and a control end of the third transistor is connected to the output end of the aforementioned first inverter;

[0025] A second diode, wherein the anode of the second diode is connected to the second end of the third transistor, and the cathode of the second diode is connected to the output port.

[0026] Preferably, any one of the first diode and the second diode is a Schottky diode.

[0027] Preferably, any one of the first transistor, the second transistor and the third transistor is a metal oxide semiconductor field effect transistor.

[0028] Preferably, the first transistor, the second transistor and the third transistor are all P-type metal oxide semiconductor field effect transistors.

[0029] The beneficial effects of the present disclosure are as follows: the maximum voltage selection circuit provided by the present disclosure has a first input port connected to a first input voltage, a second input port connected to a second input voltage, and an output port for providing an output voltage, and the maximum voltage selection circuit also includes: an input unit, connected to the aforementioned first input port and the second input port, and generating a detection signal according to the aforementioned first input voltage and the second input voltage; a first output unit, connected to the output end of the aforementioned input unit, the first input port, and the aforementioned output port, and generating the aforementioned output voltage according to the aforementioned first input voltage in response to the detection signal of the first state; a second output unit, connected to the output end of the aforementioned input unit, the second input port, and the aforementioned output port, and generating the aforementioned output voltage according to the aforementioned second input voltage in response to the detection signal of the second state, and the maximum voltage selection circuit selects one of the aforementioned first output unit and the aforementioned second output unit to be turned on according to the state of the detection signal, and provides the aforementioned output voltage to the load end. Therefore, the maximum voltage selection circuit can achieve maximum voltage selection while effectively reducing its voltage drop loss, and reduce its on-resistance by increasing the gate-source voltage Vgs of the transistor in the circuit, so that a transistor with a smaller W / L size can be used to achieve the same on-resistance as the prior art solution, thereby reducing the size of the transistor in the circuit, thereby reducing the circuit area and reducing its manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings.

[0031] Figure 1 A schematic diagram showing a maximum voltage selection circuit of three voltages in the prior art;

[0032] Figure 2 A schematic diagram showing another maximum voltage selection circuit in the prior art;

[0033] Figure 3 A structural block diagram of a maximum voltage selection circuit provided by an embodiment of the present disclosure is shown;

[0034] Figure 4 Show Figure 3 Circuit schematic diagram of the maximum voltage selection circuit shown. DETAILED DESCRIPTION

[0035] In order to facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure can be implemented in different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the content of the present disclosure more thorough and comprehensive.

[0036] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuit, a programmable circuit, a state machine circuit and / or an element that can store instructions executed by a programmable circuit. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0038] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] Figure 3 A structural block diagram of a maximum voltage selection circuit provided by an embodiment of the present disclosure is shown. Figure 4 Show Figure 3 Circuit schematic diagram of the maximum voltage selection circuit shown.

[0040] refer to Figure 3 and Figure 4 According to an embodiment of the present disclosure, a maximum voltage selection circuit 300 is provided. The maximum voltage selection circuit 300 has a first input port connected to a first input voltage Vin1, a second input port connected to a second input voltage Vin2, and an output port providing an output voltage Vmax, and the maximum voltage selection circuit 300 further includes: an input unit 310, a first output unit 320 and a second output unit 330,

[0041] The input unit 310 is connected to the aforementioned first input port and the second input port, and generates a detection signal V2 according to the aforementioned first input voltage Vin1 and the second input voltage Vin2;

[0042] The first output unit 320 is connected to the output end of the input unit 310, the aforementioned first input port and the aforementioned output port, and generates the aforementioned output voltage Vmax according to the first input voltage Vin1 in response to the detection signal V2 of the first state;

[0043] The second output unit 330 is connected to the output end of the input unit 310, the second input port and the output port, and generates the output voltage Vmax according to the second input voltage Vin2 in response to the detection signal V2 of the second state.

[0044] The maximum voltage selection circuit 300 selects one of the first output unit 320 and the second output unit 330 to be turned on according to the state of the detection signal V2 to provide the output voltage Vmax to the load end.

[0045] Furthermore, the first state of the detection signal V2 is a low level, and the second state is a high level.

[0046] Furthermore, the aforementioned input unit 310 at least includes: a transistor Mp0, a current source I1 and an inverter 301,

[0047] Among them, the first end of the transistor Mp0 is connected to the aforementioned second input port, and the control end is connected to the aforementioned first input port; the current source I1 is connected between the second end of the transistor Mp0 and the ground, and the connection node between the transistor Mp0 and the current source I1 provides an intermediate node signal V1; the input end of the inverter 301 is connected to the connection node between the transistor Mp0 and the current source I1, the output end is used to provide the aforementioned detection signal V2, the positive source end is connected to the aforementioned output port, and the negative power supply end is grounded.

[0048] In a specific implementation scenario, in response to the sum of the first input voltage Vin1 and the on-voltage (Vth) of the transistor Mp0 being less than the second input voltage Vin2, the transistor Mp0 is in an on state, and the input unit 310 provides the detection signal V2 of the first state.

[0049] In another specific implementation scenario, in response to the sum of the second input voltage Vin2 and the on-voltage (Vth) of the transistor Mp0 being less than the first input voltage Vin1, the transistor Mp0 is in the off state, and the input unit 310 provides the detection signal V2 of the second state.

[0050] Furthermore, the first output unit 320 comprises: an inverter 302, a transistor Mp1 and a diode D1.

[0051] Among them, the input end of the inverter 302 is connected to the output end of the aforementioned inverter 301, and the output end is used to provide the inverted signal V3 of the aforementioned detection signal V2; the first end of the transistor Mp1 is connected to the aforementioned output port, the second end is connected to the aforementioned first input port, and the control end is connected to the output end of the aforementioned inverter 302; the positive electrode of the diode D1 is connected to the second end of the transistor Mp1, and the negative electrode is connected to the aforementioned output port.

[0052] Furthermore, the second output unit 330 includes a transistor Mp2 and a diode D2.

[0053] Among them, the first end of the transistor Mp2 is connected to the aforementioned output port, the second end is connected to the aforementioned second input port, and the control end is connected to the output end of the aforementioned inverter 301; the anode of the diode D2 is connected to the second end of the transistor Mp2, and the cathode is connected to the aforementioned output port.

[0054] Further, any one of the aforementioned transistor Mp0, transistor Mp1 and transistor Mp2 is a Metal Oxide Semiconductor Field Effect Transistor (MOS transistor for short). More specifically, the aforementioned transistor Mp0, transistor Mp1 and transistor Mp2 are all PMOS transistors.

[0055] Further, in this embodiment, the aspect ratio of the transistor Mp1 is the same as that of the transistor Mp2, and the on-voltage of the transistor Mp1 and the transistor Mp2 is the same, both Vth. Of course, the present disclosure is not limited thereto, and in other alternative embodiments, the aspect ratios of the two can also be other different combinations.

[0056] Furthermore, any of the aforementioned diodes D1 and D2 is a Schottky diode, and the forward conduction voltages of the aforementioned diodes D1 and D2 are the same, both Vd. Of course, the present disclosure is not limited thereto, and in other alternative embodiments, the diodes D1 and D2 may also be other types of diodes, and the conduction voltages of the two may also be other different combinations.

[0057] according to Figure 2 The maximum voltage selection circuit 200 in the prior art shown, in order to avoid voltage drop loss, the closer the output voltage Vmax is to the second input voltage Vin2 (or the first input voltage Vin1), the better. That is, the smaller the on-resistance Ron2 of transistor Mp2 (the on-resistance Ron1 of transistor Mp1), the better. Ron of the transistor is inversely proportional to both W / L and the gate-source voltage Vgs. When the first input voltage Vin1 is low, transistor Mp2 is turned on, and the gate-source voltage Vgs=Vmax-Vin1; and when the second input voltage Vin2 is low, transistor Mp1 is turned on, and the gate-source voltage Vgs=Vmax-Vin2. Vin1 / Vin2 here is constant. In order to reduce Ron, the size of W / L can only be increased, which leads to an increase in circuit area, thereby increasing its manufacturing cost.

[0058] In the maximum voltage selection circuit 300 provided in the embodiment of the present disclosure, when Vin1 is lower than Vin2-Vth, the transistor Mp0 is turned on, and the potential of the intermediate node signal V1 is pulled to the second input voltage Vin2, and the output voltage is:

[0059] Vmax=Vin2-Vd (1)

[0060] Wherein, Vd is the forward conduction voltage of the diode D2. Since the potential of the intermediate node signal V1 is higher than the potential of the output voltage Vmax, the voltage of the detection signal V2 is 0V, and the inverted signal V3 of the detection signal V2 is output as Vmax. The final result is that the transistor Mp1 is disconnected and the transistor Mp2 is turned on, thereby selecting the second input voltage Vin2. At this time, the output voltage is:

[0061] Vmax=Vin2-Iload*Ron2 (2)

[0062] Wherein, Iload is the load current at the output end, and Ron2 is the on-resistance of transistor Mp2.

[0063] Since the voltage of the detection signal V2 is 0 V, the gate-source voltage Vgs of the transistor Mp2 is Vmax.

[0064] Similarly, when the second input voltage Vin2 is lower than Vin1-Vth, the transistor Mp0 is turned off, the potential of the intermediate node signal V1 is pulled to 0V by the current source I1, and the voltage of the detection signal V2 is:

[0065] V2=Vmax=Vin1-Vd (3)

[0066] Wherein, Vd is the forward conduction voltage of the diode D1. At the same time, the inverted signal V3 of the detection signal V2 is output as 0V, the transistor Mp2 is turned off, and the transistor Mp1 is turned on, thereby selecting the first input voltage Vin1. At this time, the output voltage is:

[0067] Vmax=Vin1-Iload*Ron1 (4)

[0068] Wherein, Iload is the load current of the output end, and Ron1 is the on-resistance of the transistor Mp1. Since the voltage of the inverted signal V3 of the detection signal V2 is 0V, the gate-source voltage Vgs of the transistor Mp1 is Vmax.

[0069] By comparing the two, it can be found that the maximum voltage selection circuit 300 provided in the embodiment of the present disclosure increases the gate-source voltage Vgs of the transistor Mp1 / transistor Mp2 by the value of the first input voltage Vin1 or the second input voltage Vin2. Therefore, a small W / L size can be used to achieve the same Figure 2 The same on-resistance Ron in the technical solution shown in the figure reduces the integrated circuit area and saves its manufacturing cost.

[0070] In summary, the maximum voltage selection circuit 300 provided in the embodiment of the present disclosure has a first input port connected to the first input voltage Vin1, a second input port connected to the second input voltage Vin2, and an output port providing the output voltage Vmax, and the maximum voltage selection circuit 300 also includes: an input unit 310, connected to the first input port and the second input port, generating a detection signal V2 according to the first input voltage Vin1 and the second input voltage Vin2; a first output unit 320, connected to the output end of the input unit 310, the first input port, and the output port. And in response to the detection signal V2 of the first state, the aforementioned output voltage Vmax is generated according to the aforementioned first input voltage Vin1; the second output unit 330 is connected to the output end of the aforementioned input unit 310, the second input port and the aforementioned output port, and in response to the detection signal V2 of the second state, the aforementioned output voltage Vmax is generated according to the aforementioned second input voltage Vin2. The maximum voltage selection circuit 300 selects one of the aforementioned first output unit 320 and the aforementioned second output unit 330 to be turned on according to the state of the detection signal V2, and provides the aforementioned output voltage Vmax to the load end. Therefore, the maximum voltage selection circuit 300 can achieve the maximum voltage selection while effectively reducing its voltage drop loss, and reduce its on-resistance by increasing the gate-source voltage Vgs of the transistor (Mp1 / Mp2) in the circuit, so that a transistor with a smaller W / L size can be used to achieve the same technical solution as the prior art ( Figure 2 The same on-resistance as shown in the figure can be achieved by reducing the size of the transistor in the circuit, thereby reducing the circuit integration area and reducing its manufacturing cost.

[0071] It should be noted that, although in this article, the device is described as a certain N-channel or P-channel device, or a certain N-type or P-type doped region, it can be understood by those skilled in the art that complementary devices can also be realized according to the present invention. It can be understood by those skilled in the art that the conductivity type refers to the mechanism by which conduction occurs, such as conduction by holes or electrons, so the conductivity type does not involve doping concentration but involves doping type, such as P-type or N-type. It can be understood by those skilled in the art that the words "during", "when" and "when..." used in this article in connection with the operation of the circuit are not strict terms indicating an action that occurs immediately at the beginning of the start-up action, but there may be some small but reasonable one or more delays between it and the reaction action initiated by the start-up action, such as various transmission delays, etc. The words "approximately" or "substantially" used in this article mean that the element value has a parameter that is expected to be close to the declared value or position. However, as is well known in the art, there are always slight deviations that make it difficult for the value or position to be strictly the declared value. It has been well established in the art that a deviation of at least ten percent (10%) (or at least twenty percent (20%) for semiconductor doping concentrations) is a reasonable deviation from the exact ideal goal described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive logic or negative logic is used.

[0072] In addition, it is also necessary to explain that the relational terms such as first and second, etc. in this article are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0073] Finally, it should be noted that: Obviously, the above embodiments are only examples for clearly illustrating the present disclosure, and are not intended to limit the implementation methods. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from this are still within the scope of protection of the present disclosure.

Claims

1. A maximum voltage selection circuit, the maximum voltage selection circuit having a first input port connected to a first input voltage, a second input port connected to a second input voltage, and an output port for providing an output voltage, wherein: The maximum voltage selection circuit also includes: an input unit, connected to the first input port and the second input port, and generating a detection signal according to the first input voltage and the second input voltage; a first output unit connected to the output end of the input unit, the first input port and the output port, and generating the output voltage according to the first input voltage in response to a detection signal of a first state; a second output unit connected to the output end of the input unit, the second input port and the output port, and generating the output voltage according to the second input voltage in response to a detection signal of a second state, The maximum voltage selection circuit selects one of the first output unit and the second output unit to be turned on according to the state of the detection signal, and provides the output voltage to the load end. The first output unit includes: a second inverter, a second transistor, and a first diode. The input end of the second inverter receives the detection signal, and the output end is used to provide an inverted signal of the detection signal. The first end of the second transistor is connected to the output port, the second end is connected to the first input port, and the control end is connected to the output end of the second inverter. The positive electrode of the first diode is connected to the second end of the second transistor, and the negative electrode is connected to the output port. The second output unit includes: a third transistor and a second diode, the first end of the third transistor is connected to the output port, the second end is connected to the second input port, the control end receives the detection signal, the anode of the second diode is connected to the second end of the third transistor, and the cathode is connected to the output port, When the voltage of the detection signal is in the first state, the inverted signal output by the detection signal after passing through the second inverter is the maximum voltage, the second output unit is turned on, at this time the second transistor is in the off state, and the third transistor is in the on state, and the gate-source voltage of the third transistor is the maximum voltage; Alternatively, when the detection signal voltage is in the second state, the first output unit is turned on, and the inverted signal output after the detection signal passes through the second inverter is a low voltage. At this time, the third transistor is in the off state, and the second transistor is in the on state, and the gate-source voltage of the second transistor is the maximum voltage.

2. The maximum voltage selection circuit according to claim 1, wherein: The first state of the detection signal is a low level, and the second state is a high level.

3. The maximum voltage selection circuit according to claim 2, wherein: The input unit comprises: a first transistor, wherein a first end of the first transistor is connected to the second input port, and a control end of the first transistor is connected to the first input port; A first current source connected between the second terminal of the first transistor and ground; A first inverter, wherein the input end of the first inverter is connected to the connection node between the first transistor and the first current source, the output end is used to provide the detection signal, the positive source end is connected to the output port, and the negative power supply end is grounded.

4. The maximum voltage selection circuit according to claim 3, wherein: In response to the sum of the first input voltage and the first transistor on-voltage being less than the second input voltage, the first transistor is in an on-state, and the input unit provides a detection signal of the first state.

5. The maximum voltage selection circuit according to claim 3, wherein: In response to the sum of the second input voltage and the first transistor on-voltage being less than the first input voltage, the first transistor is in an off state, and the input unit provides a detection signal of the second state.

6. The maximum voltage selection circuit according to claim 5, wherein: Either the first diode or the second diode is a Schottky diode.

7. The maximum voltage selection circuit according to claim 5, wherein: Any one of the first transistor, the second transistor and the third transistor is a metal oxide semiconductor field effect transistor.

8. The maximum voltage selection circuit according to claim 7, wherein: The first transistor, the second transistor and the third transistor are all P-type metal oxide semiconductor field effect transistors.

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