Step response test method and system for current transformer

Abstract

The present application relates to a method and system for testing the step response of a current transformer, the method comprising: generating a test signal according to preset signal parameters; obtaining a reference signal output by a transient standard device and a response signal output by a current transformer; determining the mutation moment of the reference signal within each signal cycle, and recording the response signal based on the mutation moment; interpolating the recorded response signal to obtain a reconstructed signal; and determining the test result of the step response test based on the reference signal and the reconstructed signal. This scheme cyclically generates multiple step signals to test the current transformer under test, obtains multiple groups of sampling data, and eliminates the influence of random moments by increasing the step sampling data of the test product; interpolates and reconstructs the recorded response signal, so that various test results of measuring the DC transformer can be accurately obtained without changing the sampling rate of the current transformer under test.

Description

Technical Field

[0001] The present application relates to the technical field of transient step testing, and in particular to a method and system for testing the step response of a current transformer. Background Art

[0002] With the rapid development of high-power fully controlled power electronic devices and the continuous improvement of DC grid manufacturing level, UHV DC transmission technology has received more and more attention and application in the field of UHV transmission. Compared with AC systems, DC system faults develop faster and are more difficult to control and protect. As the core measurement equipment in the UHV DC control and protection system, electronic transformers also face higher technical and reliability requirements, and their transient performance is their core indicator.

[0003] At present, transient tests for current transformers basically use transient closed-loop test methods, such as Figure 1 As shown, the DC step source sends out a transient step signal, and the DC current transient standard converts the transient signal into a small voltage signal, which is then sent to the tester and the DC current transformer after analog-to-digital conversion to complete a closed-loop transient step test.

[0004] According to the technical requirements for transient step response in IEC-61869-14 "Transformers Part 14: Supplementary Technical Requirements for DC Current Transformers", the input current of the test is approximately an ideal step signal relative to the response process of the test product (current transformer under test). As the sampling rate and response time requirements of flexible DC current transformers are further improved, and at the same time, the domestic transient step response test generally requires 10% of the rated current, this approximately ideal large current step source is impossible to achieve.

[0005] The sampling rate of the UHV DC current transformer is generally 10kHz, which means there is one sampling point every 100μs. For a transient step source, the step response rise time is generally within 30μs, and the overshoot generally occurs within 50μs. Therefore, within one sampling cycle (100μs) of the current transformer, the step response process has basically ended, and the DC current transformer cannot measure this process at all.

[0006] In the related art, it is obvious that the above-mentioned test method cannot reflect the response characteristics of the DC current transformer in the step response process, and the test results are closely related to the sampling time of the DC current transformer. Different sampling times will bring different test results, resulting in random errors of the test results up to 100μs, and the overshoot is also difficult to capture. Summary of the invention

[0007] In order to overcome the problems existing in the related art to at least a certain extent, the present application provides a step response test method and system for a current transformer.

[0008] According to a first aspect of an embodiment of the present application, a step response test method of a current transformer is provided, comprising:

[0009] Generate a test signal according to preset signal parameters, wherein the test signal is a square wave signal including N cycles, wherein N is a preset number of cycles;

[0010] Synchronously transmitting the test signal to the transient standard device and the current transformer to be tested;

[0011] Acquiring a reference signal output by the transient standard device and a response signal output by the current transformer;

[0012] Determine, in each signal cycle, a mutation moment of the reference signal in the signal cycle, and record the response signal based on the mutation moment;

[0013] interpolating the recorded response signal to obtain a reconstructed signal;

[0014] A test result of a step response test is determined based on the reference signal and the reconstructed signal.

[0015] Furthermore, the signal parameters include a single step time t j and the duty cycle δ of the square wave;

[0016] The step of generating a test signal according to preset signal parameters comprises:

[0017] Determine the correction time according to the sampling period and the number of cycles N of the current transformer;

[0018] N step signals are generated in sequence according to the correction time and the signal parameter.

[0019] Furthermore, the correction time is: Δt=T 0 / N; where T 0 is the sampling period of the current transformer.

[0020] Further, N step signals are sequentially generated according to the correction time and the signal parameter, including:

[0021] The first step signal is:

[0022]

[0023] The nth step signal is:

[0024]

[0025] Wherein, 2≤n≤N, and n is a positive integer.

[0026] Further, determining the mutation moment of the reference signal within the signal period includes:

[0027] The current mutation value is calculated according to the reference signal: Δi=|[i(t)-i(tT)]-[i(tT)-i(t-2T)]|; wherein i is the instantaneous current value of the reference signal, t is the current moment, and T is the sampling period of the reference signal;

[0028] When Δi is greater than a preset starting value, the current moment t is determined as the mutation moment.

[0029] Furthermore, the reference signal and the response signal are both digital signals, and the sampling frequency of the reference signal is greater than the sampling frequency of the response signal;

[0030] The response signal is recorded based on the mutation time, including:

[0031] In each cycle of the step signal, the arrival time t of each frame of the response signal is recorded. nm And the sampling value i corresponding to that moment nm ; Wherein the subscript n is the number of step signals, and m is the current sampling number in the cycle;

[0032] Loop recording N times until the test signal ends.

[0033] Further, the recorded response signal is interpolated, including:

[0034] The data of the response signal is calculated according to the arrival time t nm Sort and fill in the corresponding sampling value i nm Complete initial reconstruction;

[0035] The data after preliminary reconstruction is subjected to cubic spline interpolation to generate a reconstructed signal.

[0036] Further, determining a test result of a step response test based on the reference signal and the reconstructed signal includes:

[0037] Determine the step start time T based on the reference signal s1 and the step end time T e1 ;

[0038] Determine the step start time T based on the reconstructed signal s2 and the step end time T e2 ;

[0039] Calculate the rise time as T e2-T s2 , the delay time is T e2 -T e1 , and the overshoot is the difference between the maximum value of the reconstructed signal and the maximum value of the reference signal.

[0040] Further, based on the reconstructed signal, the step start time T is determined. s2 and the step end time T e2 ,include:

[0041] Determine the step height value D based on the reconstructed signal h With step low value D l ;

[0042] Calculate the amplitude corresponding to a 10% step and the value is D 10％ =D l +0.1×(D h -D l ), the amplitude corresponding to 90% of the step is D 90％ =D l +0.9×(D h -D l );

[0043] Determine D based on the reconstructed signal 10％ The corresponding step start time T s2 With D 90％ The corresponding step end time T e2 .

[0044] According to a second aspect of an embodiment of the present application, a step response test system for a current transformer is provided, comprising:

[0045] Power amplifier, shunt, transient standard, tester host and host computer;

[0046] The host computer is used to generate a test signal according to preset signal parameters, and the test signal is a square wave signal containing N cycles; wherein N is a preset number of cycles;

[0047] The host computer sends the test signal to the tester host, and the tester host controls the output of the power amplifier through the D / A module, and the power amplifier performs current power amplification and output according to the control signal of the D / A module;

[0048] The shunt synchronously transmits the amplified test signal to the transient standard and the current transformer to be tested;

[0049] The tester host has two built-in optical fiber receiving modules, which are used to obtain the reference signal output by the transient standard device and the response signal output by the current transformer respectively;

[0050] The host computer is used to determine the mutation moment of the reference signal within each signal cycle, and record the response signal based on the mutation moment; interpolate the recorded response signal to obtain a reconstructed signal; and determine the test result of the step response test based on the reference signal and the reconstructed signal.

[0051] The technical solution provided by the embodiments of the present application has the following beneficial effects:

[0052] This scheme cyclically generates multiple step signals to test the current transformer under test and obtains multiple groups of sampling data. By increasing the step sampling data of the test product, the influence of random moments is eliminated. The mutation moment is determined by the reference signal, and the response signal is recorded based on the mutation moment. The recorded response signal is then interpolated and reconstructed. In this way, various test results of measuring the DC transformer can be accurately obtained without changing the sampling rate of the current transformer under test.

[0053] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0055] Figure 1 A closed-loop DC current transformer step response test architecture is shown according to an exemplary embodiment.

[0056] Figure 2 A current transformer step response delay testing system is shown according to an exemplary embodiment.

[0057] Figure 3 A test index and definition of a DC step response are shown according to an exemplary embodiment.

[0058] Figure 4 is a step response test recording diagram at a sampling rate of 10 kHz according to an exemplary embodiment.

[0059] Figure 5 The present invention is a flow chart of a step response testing method of a current transformer according to an exemplary embodiment.

[0060] Figure 6 The figure is a diagram showing an architecture of a step response test system for a current transformer according to an exemplary embodiment.

[0061] Figure 7The figure is a logic block diagram of a transient step test method for a DC current transformer according to an exemplary embodiment.

[0062] Figure 8 This is an exemplary result waveform diagram of a step response test using the solution of the present application. DETAILED DESCRIPTION

[0063] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of methods and systems consistent with some aspects of the present application as detailed in the appended claims.

[0064] like Figure 2 As shown in the figure, the transient step response test of DC current transformer generally adopts the closed-loop transient step response delay test method. The step response signals of the standard source and the test product (the current transformer under test) are collected simultaneously with a unified timing sequence, and then the three indicators of step response time, rise time and stabilization time are calculated. The test waveform is as follows Figure 3 As shown, u(t) is the input signal; v(t) is the output signal of the current transformer under test; a represents the periodic characteristic, b represents the non-periodic characteristic; T sr is the step response time, T s The stabilization time.

[0065] Test results such as Figure 4 As shown in the figure, due to the insufficient sampling rate, there are very large deviations in the test results, making it difficult to evaluate the step response characteristics of the DC current transformer. It can be seen that the current test method has the following disadvantages: when testing the ideal step signal, the test results have large errors due to the low sampling rate of the test product, and the response delay may have a maximum error of 100μs; a large number of random errors will occur during the test, and the overshoot test results are closely related to the sampling time.

[0066] In order to solve the above problems, the present invention proposes a DC transformer step response test method with multi-sample data reconstruction. The present invention changes the generation method of the original step response current source to control the generation time of the step response, and then reconstructs the data according to the time after recording the arrival time of the test product through multiple cycles of recording. Finally, the reconstructed waveform is used to perform the step response test, which greatly improves the test accuracy and eliminates the random error caused by the sampling time.

[0067] Figure 5 1 is a flow chart showing a method for testing a step response of a current transformer according to an exemplary embodiment. The method may include the following steps:

[0068] Step S1, generating a test signal according to preset signal parameters, wherein the test signal is a square wave signal including N cycles, wherein N is a preset number of cycles;

[0069] Step S2, synchronously transmitting the test signal to the transient standard device and the current transformer to be tested;

[0070] Step S3, obtaining a reference signal output by the transient standard device and a response signal output by the current transformer;

[0071] Step S4, determining the mutation moment of the reference signal in each signal cycle, and recording the response signal based on the mutation moment;

[0072] Step S5, interpolating the recorded response signal to obtain a reconstructed signal;

[0073] Step S6: Determine a test result of a step response test based on the reference signal and the reconstructed signal.

[0074] This scheme cyclically generates multiple step signals to test the current transformer under test and obtains multiple groups of sampling data. By increasing the step sampling data of the test product, the influence of random moments is eliminated. The mutation moment is determined by the reference signal, and the response signal is recorded based on the mutation moment. The recorded response signal is then interpolated and reconstructed. In this way, various test results of measuring the DC transformer can be accurately obtained without changing the sampling rate of the current transformer under test.

[0075] It should be understood that although Figure 5 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 5 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0076] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention are further described in detail below with reference to the accompanying drawings.

[0077] like Figure 6As shown, the DC transformer step response test method for multi-sample data reconstruction involved in this patent is composed of a current power amplifier, a shunt, a transient standard, and a DC electronic transformer tester host and a host computer.

[0078] like Figure 7 As shown, the host computer is responsible for generating human-computer interaction and generating square wave test data according to the configuration and sending the test data to the host of the DC electronic transformer tester. The host controls the output of the current power amplifier through the D / A module, and the power amplifier performs current power amplification and output according to the control signal of the D / A module. The shunt is connected in series in the current loop and outputs a small voltage signal to the transient standard. The transient standard collects the small voltage signal of the shunt and converts it into a digital signal, and then sends it to the host of the DC electronic transformer tester via optical fiber. The DC electronic transformer tester has two built-in optical fiber receiving modules that collect optical fiber digital signals from the transient standard and the DC current transformer merging unit, respectively, and sends the data to the host computer after marking the precise arrival time stamp. The host computer performs cyclic recording and records, and then performs step response calculation after completing the waveform data reconstruction.

[0079] Step S0, host computer test parameter configuration. The host computer performs parameter configuration, configures the step target current value, sets its target current value to "1", and configures the number of cycles N of its step response waveform. In some embodiments, the signal parameters include a single step time t j and the duty cycle δ of the square wave.

[0080] Step S1, test data generation. In some embodiments, step S1 specifically includes: determining a correction time according to a sampling period and a cycle number N of a current transformer; and sequentially generating N step signals according to the correction time and the signal parameter.

[0081] The correction time may be: Δt=T 0 / N; where T 0 is the sampling period of the current transformer. The host computer calculates the test correction time Δt = (100 / N) μs according to the configuration parameters and the single frame time of the test sample sampling rate of 100 μs to generate the test data waveform.

[0082] According to the correction time and the signal parameters, N step signals are generated in sequence, and the first step signal is:

[0083]

[0084] The nth step signal is:

[0085]

[0086] Wherein, 2≤n≤N, and n is a positive integer.

[0087] The embodiment of the present application controls the step occurrence time, increases the step sampling data of the test sample by controlling the increment of the step occurrence time of the test source (introducing correction time) without changing the sampling rate of the test sample, and eliminates the influence of random time.

[0088] Step S2, synchronously transmitting the test signal to the transient standard device and the current transformer to be tested. The test signal can be sent to the transient standard device and the current transformer to be tested respectively through a shunt.

[0089] Steps S3-S4: cyclic recording: using a mutation cyclic recording method to record multiple step test data.

[0090] First, step S3 is performed to obtain the reference signal output by the transient standard device and the response signal output by the current transformer. After the experiment starts, the DC electronic transformer tester receives two digital signals and sends the data to the host computer.

[0091] Then execute step S4, determine the mutation moment of the reference signal in each signal cycle, and record the response signal based on the mutation moment. The host computer records the mutation of the standard and the test sample according to the mutation amount algorithm:

[0092] Δi=|[i(t)-i(tT)]-[i(tT)-i(t-2T)]|;

[0093] Where i is the instantaneous value of current, t is the current moment, and T is a sampling interval. When Δi is greater than the starting constant, it is judged as a sudden change start.

[0094] In some embodiments, determining the mutation moment of the reference signal within the signal cycle includes: calculating the current mutation value Δi according to the reference signal; when Δi is greater than a preset start-up constant, determining the current moment t as the mutation moment. Wherein Δi = |[i(t)-i(tT)]-[i(tT)-i(t-2T)]|; i is the instantaneous value of the current of the reference signal, t is the current moment, and T is the sampling period of the reference signal.

[0095] The response signal is recorded based on the mutation time, including: in each period of the step signal, the arrival time t of each frame message of the response signal is recorded; nm And the sampling value i corresponding to that moment nm ; Wherein the subscript n is the number of step signals, and m is the current sampling number in the cycle;

[0096] Specifically, the mutation time of the standard source is used as a reference (since the sampling rate of the standard source is 1MHz, the single frame interval is 1μs, the error can be ignored, and the time recording can be made more accurate). The mutation time of the standard source is used as the "0" time of the test data of the test product, and the real-time sampling value of the test data is recorded. The waveform is recorded N times in a loop until the test signal ends. After the waveform recording is completed, step S5 is executed to reconstruct the waveform data according to the recorded time.

[0097] Step S5: Waveform reconstruction. After the waveform recording is completed, the recorded response signal is interpolated, specifically including: the host computer reconstructs the data of the response signal according to the arrival time t nm Sort and fill in the corresponding sampling value i nm Complete the preliminary reconstruction; perform cubic spline interpolation on the data after preliminary reconstruction to generate a reconstructed signal. Since the preliminary reconstructed data is sampled at non-equal intervals (time errors will be generated due to the influence of crystal oscillator errors), cubic spline interpolation is used to generate the final sample sampling value function waveform. Cubic spline interpolation is used to achieve curve fitting of the sample data waveform to improve test accuracy. The following briefly introduces the specific implementation method of cubic spline interpolation.

[0098] The length of the input arrays X and Y is n, x0<x1<...<xn-1, as shown in the following equations.

[0099] f(x i )=y i

[0100] The interpolation function g(x) is a piecewise function in the following equation:

[0101]

[0102] The function pi(x) is a third-order polynomial that satisfies the following conditions:

[0103] (1)g(x i )=y i =p i (x i )

[0104] (2) In x i The first and second order derivatives are continuous at the continuous point (i=1,...,n-2): g′(x i ) = p′ i (x i ) = p′ i-1 (x i );g″(x i )=p″ i (x i )=p″ i-1 (x i ).

[0105] In the formula, g″(x i ) is the second-order derivative of the cubic interpolation spline function. In the interval [x i , x i+1 ], the following equation is the output interpolation y:

[0106] y=Ay i +By i+1 +Cy″ i +Dy″ i+1 ;

[0107] in:

[0108]

[0109] B = 1-A;

[0110]

[0111]

[0112] Step S6: Step response calculation. Determine the test result of the step response test based on the reference signal and the reconstructed signal, including: determining the step start time T based on the reference signal s1 and the step end time T e1 ; Determine the step start time T based on the reconstructed signal s2 and the step end time T e2 ; Calculate the rise time as T e2 -T s2 , the delay time is T e2 -T e1 , and the overshoot is the difference between the maximum value of the reconstructed signal and the maximum value of the reference signal.

[0113] Determine the step start time T based on the reconstructed signal s2 and the step end time T e2 , including: obtaining the step height value D based on the fitting curve (reconstructed signal) h With step low value D l , and then we can find the amplitude corresponding to the 10% step is D 10％ =D l +0.1×(D h -D l ), the amplitude corresponding to 90% of the step is D 90％ =D l +0.9×(D h -D l ). Obtain D based on the reconstructed signal data after interpolation 10％ With D 90％ The corresponding step start time Ts2 and the step end time T e2 .

[0114] Since the standard source uses a 1MHz sampling rate, D can be directly recorded without sampling interpolation processing. 10％ With D 90％ The corresponding step start time T s1 and the step end time T e1 The final rise time of the test sample is T e2 -T s2 , the delay time is T e2 -T e1 The overshoot is the difference between the maximum value of the test product and the standard maximum value.

[0115] Figure 6 is a circuit block diagram of a step response test system for a current transformer according to an exemplary embodiment. Figure 6 The system includes: a power amplifier, a shunt, a transient standard, a tester host and a host computer.

[0116] The host computer is used to generate a test signal according to preset signal parameters, and the test signal is a square wave signal containing N cycles; wherein N is a preset number of cycles.

[0117] The host computer sends the test signal to the tester host, and the tester host controls the output of the power amplifier through the D / A module. The power amplifier performs current power amplification and output according to the control signal of the D / A module.

[0118] The shunt synchronously transmits the amplified test signal to the transient standard device and the current transformer to be tested.

[0119] The tester host has two built-in optical fiber receiving modules, which are respectively used to obtain the reference signal output by the transient standard device and the response signal output by the current transformer.

[0120] The host computer is used to determine the mutation moment of the reference signal within each signal cycle, and record the response signal based on the mutation moment; interpolate the recorded response signal to obtain a reconstructed signal; and determine the test result of the step response test based on the reference signal and the reconstructed signal.

[0121] Regarding the system in the above embodiment, the specific steps of the host computer performing the operation have been described in detail in the embodiment of the method, and will not be described in detail here. It can be understood that the same or similar parts in the above embodiments can refer to each other, and the content not described in detail in some embodiments can refer to the same or similar content in other embodiments.

[0122] The following is an expanded explanation of the selection of specific implementation devices in the embodiments of the present application in conjunction with specific application scenarios.

[0123] The step current source can be a linear power amplifier. The output voltage signal is a control signal of positive and negative 5V, and the maximum output current can reach 800A, which can meet the test requirements of 10% step response of DC current transformer.

[0124] The shunt can use high-precision non-inductive resistors with distributed resistance less than 1nH and resistance of 0.2 ohms. Under the existing test frequency, the influence of inductance can be basically ignored.

[0125] The transient standard can be developed and implemented using FPGA, a pure hardware design, with a sampling rate of 1MHz, and an 18-bit successive approximation A / D sampling chip, which effectively improves the acquisition accuracy of transient instantaneous values. The high sampling rate, the standard source uses a 1MHz sampling rate to complete the test of the step response time characteristics of the DC current transformer by directly finding the corresponding time of the value range, thereby improving the test accuracy of the time characteristics.

[0126] The DC electronic transformer tester can use the Linux embedded operating system to realize optical fiber data acquisition while increasing D / A control output to achieve closed-loop control of automatic frequency sweep. The host computer test software uses C language programming to improve software calculation efficiency and has a friendly human-computer interface. The test results are output in charts to facilitate the analysis of the test results by testers.

[0127] The scheme of the present application adopts the above-mentioned embodiment, which has the following beneficial effects: 1. Controlling the moment when the step occurs, increasing the step sampling data of the test product by controlling the increment of the step occurrence moment of the test source without changing the sampling rate of the test product, and eliminating the influence of random moments. 2. Recording test data of multiple steps by using the method of sudden change cycle recording. 3. Accurate time recording, using the sudden change moment of the standard source as the "0" moment of the test data of the test product, recording the real-time sampling value of the test data, and reconstructing the waveform data according to the recorded time after the recording is completed. 4. Using cubic spline interpolation to achieve waveform curve fitting of the test product data, thereby improving the test accuracy. 5. High sampling rate, the standard source adopts a sampling rate of 1MHz, which can complete the test of the step response time characteristics of the DC current transformer by directly finding the corresponding time of the value range, thereby improving the test accuracy of the time characteristics.

[0128] It should be noted that, in the description of this application, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0129] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0130] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0131] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0132] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0133] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0134] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0135] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A step response test method for a current transformer, characterized in that: include: Generate a test signal according to preset signal parameters, wherein the test signal is a square wave signal containing N cycles; Where N is the preset number of cycles; Synchronously transmitting the test signal to the transient standard device and the current transformer to be tested; Acquiring a reference signal output by the transient standard device and a response signal output by the current transformer; Determine, in each signal cycle, a mutation moment of the reference signal in the signal cycle, and record the response signal based on the mutation moment; interpolating the recorded response signal to obtain a reconstructed signal; determining a test result of a step response test based on the reference signal and the reconstructed signal; The interpolation method is: the length of the input arrays X and Y is n, x0 < x1 < … < xn - 1, as shown in the following equation: The interpolation function g(x) is a piecewise function in the following equation: function pi ( x ) is a third-order polynomial that satisfies the following conditions: （1） g ( x i ) = y i = p i ( x i ) (2) In x i The first and second derivatives are continuous at the continuous point ( i = 1, …, n – 2): g '( x i ) = p ' i ( x i ) = p ' i - 1 ( x i ); g "( x i ) = p " i ( x i ) = p " i – 1 ( x i ); In the formula g "( x i ) is the second-order derivative of the cubic interpolation spline function; In the interval [x i , x i + 1 ], the following equation is the output interpolation y: in: ； Determining a test result of a step response test based on the reference signal and the reconstructed signal, comprising: Determine the step start time based on the reference signal and step end time ; Determine the step start time based on the reconstructed signal and step end time ; Calculate the rise time as , the delay time is , and the overshoot is the difference between the maximum value of the reconstructed signal and the maximum value of the reference signal; Determine the step start time based on the reconstructed signal and step end time ,include: Determine a step height value based on the reconstructed signal D h With step low value D l ; The amplitude corresponding to the calculated step of 10% is , the amplitude corresponding to 90% of the step is ; Determining based on the reconstructed signal The corresponding step start time and The corresponding step end time .

2. The method according to claim 1, characterized in that The signal parameters include single step time t j And the duty cycle of the square wave ; The step of generating a test signal according to preset signal parameters comprises: Determine the correction time according to the sampling period and the number of cycles N of the current transformer; N step signals are generated in sequence according to the correction time and the signal parameter.

3. The method according to claim 2, characterized in that The correction time is: ;in is the sampling period of the current transformer.

4. The method according to claim 3, characterized in that Generate N step signals in sequence according to the correction time and the signal parameter, including: The first step signal is: The nth step signal is: in, , n is a positive integer.

5. The method according to any one of claims 1 to 4, characterized in that: Determining the sudden change moment of the reference signal within the signal period includes: The current mutation value is calculated according to the reference signal: ;in, i is the instantaneous value of the current of the reference signal, t is the current moment, T is the sampling period of the reference signal; when Δi When it is greater than the preset starting value, the current moment t is determined as the mutation moment.

6. The method according to claim 5, characterized in that The reference signal and the response signal are both digital signals, and the sampling frequency of the reference signal is greater than the sampling frequency of the response signal; The response signal is recorded based on the mutation time, including: In each cycle of the step signal, record the arrival time of each frame of the response signal And the sampling value corresponding to that moment ; Wherein the subscript n is the number of step signals, and m is the current sampling number in the cycle; Loop recording N times until the test signal ends.

7. The method according to claim 6, characterized in that Interpolate the recorded response signals, including: The data of the response signal is calculated according to the arrival time. Sort and fill in the corresponding sampling values Completed initial reconstruction; The data after preliminary reconstruction is subjected to cubic spline interpolation to generate a reconstructed signal.

8. A step response test system for a current transformer, characterized in that: include: Power amplifier, shunt, transient standard, tester host and host computer; The host computer is used to generate a test signal according to preset signal parameters, and the test signal is a square wave signal containing N cycles; wherein N is a preset number of cycles; The host computer sends the test signal to the tester host, and the tester host controls the output of the power amplifier through the D / A module, and the power amplifier performs current power amplification and output according to the control signal of the D / A module; The shunt synchronously transmits the amplified test signal to the transient standard and the current transformer to be tested; The tester host has two built-in optical fiber receiving modules, which are used to obtain the reference signal output by the transient standard device and the response signal output by the current transformer respectively; The host computer is used to determine the mutation moment of the reference signal in each signal cycle, and record the response signal based on the mutation moment; interpolate the recorded response signal to obtain a reconstructed signal; and determine the test result of the step response test based on the reference signal and the reconstructed signal; The interpolation method is: the length of the input arrays X and Y is n, x0 < x1 < … < xn - 1, as shown in the following equation: The interpolation function g(x) is a piecewise function in the following equation: function pi ( x ) is a third-order polynomial that satisfies the following conditions: （1） g ( x i ) = y i = p i ( x i ) (2) In x i The first and second derivatives are continuous at the continuous point ( i = 1, …, n – 2): g '( x i ) = p ' i ( x i ) = p ' i - 1 ( x i ); g "( x i ) = p " i ( x i ) = p " i – 1 ( x i ); g "( x i ) is the second-order derivative of the cubic interpolation spline function; In the interval [x i , x i + 1 ], the following equation is the output interpolation y: in: ； Determining a test result of a step response test based on the reference signal and the reconstructed signal, comprising: Determine the step start time based on the reference signal and step end time ; Determine the step start time based on the reconstructed signal and step end time ; Calculate the rise time as , the delay time is , and the overshoot is the difference between the maximum value of the reconstructed signal and the maximum value of the reference signal; Determine the step start time based on the reconstructed signal and step end time ,include: Determine a step height value based on the reconstructed signal D h With step low value D l ; The amplitude corresponding to the calculated step of 10% is , the amplitude corresponding to 90% of the step is ; Determining based on the reconstructed signal The corresponding step start time and The corresponding step end time .

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