An INP wafer thinning and polishing process method

By combining chemical corrosion and mechanical grinding, the mechanical damage and warping problems in the thinning process of INP sheets are solved, the flatness and metal adhesion are improved, the cost is reduced, and the production of high-quality chips is achieved.

CN114864383BActive Publication Date: 2025-07-29FUJIAN Z K LITECORE LTD
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Patent Information

Application Number
CN202210504658.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-10
Publication Date
2025-07-29
Estimated Expiration
2042-05-10

AI Technical Summary

Technical Problem

In the thinning process of INP sheet, the prior art problems of mechanical damage, warping, poor heat dissipation, high processing costs and difficulty in completing N-side metal coating at one time.

Method used

The polishing process of combining chemical corrosion and mechanical grinding with polyurethane polishing pad and alumina polishing liquid ASCP2002 is used to control the flow of the polishing liquid with a peristaltic pump, followed by cleaning and pickling, and finally N-side metal coating and annealing are carried out.

Benefits of technology

The flatness of the INP sheet and the adhesion of the metal adhesion layer are improved, processing costs are reduced, warping and lobe risks are reduced, and the process flow is simplified.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a process method for thinning and polishing INP wafers, comprising the following steps: (1) Wax the wafer with photoresist and stick the wafer, and thin it to 120 - 125 um on a thinning device; (2) Remove the wafer from the thinning device and place it on a polishing device, and make the wafer contact with the polishing pad on the polishing disc; (3) Polish for 10 - 20 minutes to polish the wafer to 80 - 100 um; During the polishing process, control the continuous outflow of the polishing liquid, the polishing temperature is 23 - 27 °C, and the polishing pressure is 180 - 300 g / cm<supgt;2< / supgt>; (4) After cleaning and drying the wafer, remove the wafer by melting the wax; (5) Perform the first metal coating on the N side; (6) Anneal, and then scribe and cleave the bars. This method is beneficial to improving the product performance and obtaining high-quality chips.
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Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a thinning and polishing process method for INP wafers. Background Art

[0002] When the INP wafer is processed to the thinning process, the back substrate is ground to remove a certain thickness of material, effectively reducing the chip packaging volume and meeting the heat dissipation and size requirements. After thinning, the required thickness is between 100 and 120 μm, and then the wafer is unloaded. Subsequently, the first metal coating on the N side, alloying on the N side, and the second metal coating on the N side are carried out respectively. However, the existing technology has the following problems: 1) Mechanical damage is caused after thinning, and the back of the wafer is rough; 2) For high-speed laser products, the passivation layer is relatively thick, with poor heat dissipation. After thinning and unloading, the wafers will warp to varying degrees, and alloying cannot improve it either; 3) High-speed laser products need to be thinned to 80 - 100 μm, which is difficult to achieve simply by thinning, and it is easy to crack the wafers; 4) The metal on the N side cannot be processed in one operation, resulting in high processing costs. Summary of the Invention

[0003] The purpose of the present invention is to provide a thinning and polishing process method for INP wafers, which is beneficial to improving product performance and obtaining high-quality chips.

[0004] To achieve the above purpose, the technical solution adopted by the present invention is: a thinning and polishing process method for INP wafers, including the following steps:

[0005] (1) Wax the wafer with photoresist and stick the wafer, and thin it to 120 - 125 μm on a thinning device;

[0006] (2) Remove the wafer from the thinning device and place it on a polishing device, making the wafer contact with the polishing pad on the polishing disc;

[0007] (3) Polish for 10 - 20 minutes to polish the wafer to 80 - 100 μm; during the polishing process, control the continuous outflow of the polishing liquid, with the polishing temperature of 23 - 27 °C and the polishing pressure of 180 - 300 g / cm 2 ;

[0008] (4) After cleaning and drying the wafer, remove the wax and unload the wafer;

[0009] (5) Carry out the first metal coating on the N side;

[0010] (6) Anneal, and then scribe and split the bars.

[0011] Further, in step (2), the polishing pad uses a polyurethane polishing pad, which is a porous material with a certain elasticity, used to store and transport the polishing liquid, provide a certain pressure on the INP wafer and friction on its surface.

[0012] Further, in step (3), the polishing liquid is alumina polishing liquid ASCP2002.

[0013] Further, in step (3), the peristaltic pump is used to control the continuous liquid output of the polishing liquid, and the total polishing flow rate is controlled between 250 - 300 ml.

[0014] Further, in step (4), a cleaning liquid with a ratio of cleaning powder : water = 100 : 1 is used for cleaning, and then it is dried with nitrogen.

[0015] Further, in step (5), a solution of hydrochloric acid : water = 1 : 3 is used for static pickling for 1 minute, and then metal coating is performed on the N side for the first time.

[0016] Compared with the prior art, the present invention has the following beneficial effects: The method performs polishing after thinning. By using the polishing liquid ASCP2002, the chemical corrosion and mechanical grinding on the surface of the INP wafer act simultaneously, greatly improving the flatness, reducing the roughness, making the wafer surface smooth, with less waste residue, and improving the metal adhesion layer. At the same time, the stress is eliminated, the warping problem is improved, and the surface characteristics of the chip are enhanced. In addition, by performing metal coating on the N side for the first time in this method, the process is simplified, the processing cost is greatly reduced, the number of thin wafer operations is reduced, the chipping is reduced, and the product yield is increased. Description of the Drawings

[0017] Figure 1 is the flowchart of the method implementation in the embodiment of the present invention.

[0018] Figure 2 is the schematic diagram of the polishing process in the embodiment of the present invention. Detailed Embodiments

[0019] The present invention will be further described below in conjunction with the drawings and embodiments.

[0020] It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs.

[0021] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0022] Such as Figure 1As shown in the figure, this embodiment provides a thinning and polishing process method for INP wafers, including the following steps:

[0023] (1) Wax the wafer with photoresist and stick it to the wafer, and thin it to 120 - 125 um on the thinning equipment.

[0024] (2) Remove the wafer from the glass disk of the thinning equipment and place it on the polishing equipment, making the wafer contact with the polishing pad on the polishing disk;

[0025] Among them, the polishing pad uses a polyurethane polishing pad, which is a porous material with certain elasticity, used to store and transport the polishing liquid, provide a certain pressure to the INP wafer and friction its surface.

[0026] (3) Polish for 10 - 20 minutes to polish the wafer to 80 - 100 um; during the polishing process, control the continuous outflow of the polishing liquid, the polishing temperature is 23 - 27 °C, and the polishing pressure is 180 - 300 g / cm 2 . The polishing process is as Figure 2 shown.

[0027] Among them, the polishing liquid uses alumina polishing liquid ASCP2002, which is a colorless, odorless, non-toxic white emulsion with 50 nm suspended particles; the PH range is between 11 - 12, and the solid content at 25 °C is 8% - 12%. It is adapted to the polishing pressure and polishing speed to improve the polishing rate and the surface quality of polishing. In addition, the present invention uses an advanced dispersant to improve the suspension and dispersion of alumina particles, improve the polishing efficiency and surface flatness, and the service life of the polishing liquid. At the same time, the water-soluble surfactant technology is used to improve lubrication, spreading and fluidity, improve the suspension dispersion of the polishing liquid, and reduce the surface scratches after polishing.

[0028] The polishing pressure refers to the pressure of the polishing pad on the wafer. If the polishing pressure is too high, it will cause the polishing temperature to rise, and the chip is easily scratched or even cracked. The polishing pressure is 180 - 280 g / cm 2 is appropriate.

[0029] The present invention uses the polishing liquid ASCP2002 to chemically corrode the surface of the INP wafer, acting simultaneously with mechanical grinding, greatly improving the flatness, almost no damage, and eliminating stress.

[0030] In this embodiment, the peristaltic pump is used to control the continuous outflow of the polishing liquid, and the total polishing flow rate is controlled between 250 - 300 ml. If the flow rate is too small, the polishing liquid will be unevenly distributed, affecting the flatness of the chip surface. If the polishing flow rate is appropriately increased, the waste generated during the grinding process can be discharged, and the heat generated by mechanical friction can be reduced.

[0031] (4) After cleaning and drying the wafer, remove the wafer by melting the wax.

[0032] Specifically, use absorbent cotton dipped in a cleaning solution with a ratio of cleaning powder to water of 100:1 for cleaning, and then blow dry with nitrogen.

[0033] (5) Perform pickling, and then perform the first metal coating on the N side.

[0034] Specifically, use a hydrochloric acid:water solution for static pickling for 1 minute. After polishing, it is relatively brittle, and a more dilute acid solution is used for cleaning than in the simple thinning process to avoid unevenness caused by excessive backside corrosion. After washing, the surface is clean, smooth, and free of black spots.

[0035] (6) Anneal, and then scribe cleavage bars.

[0036] To make the technical solution of the present invention clearer, the present invention will be further described in detail below with reference to several specific embodiments.

[0037] Embodiment 1

[0038] (1) Wax and stick the wafer with photoresist, thin it to 120 um, and measure the thickness.

[0039] (2) Remove the wafer from the thinned glass disk, replace it with a polishing disk, and make the wafer contact the polishing pad.

[0040] (3) Polish for 15 min, polish the wafer to 80 - 100 um, use alumina polishing liquid ASCP2002, control the peristaltic pump to keep discharging liquid, the total polishing flow rate is 250 - 300 ml, the polishing temperature is 25 °C, and the polishing pressure is 230 g / cm 2 .

[0041] (4) Use absorbent cotton dipped in a liquid with a ratio of cleaning powder to water of 100:1 for cleaning, then blow dry with nitrogen, and unload the wafer.

[0042] (5) Clean with hydrochloric acid:water = 1:1 for 20 s, and perform metal coating on the N side.

[0043] (6) Anneal, and finally scribe cleavage bars.

[0044] Embodiment 2 and Embodiment 3 are similar to Embodiment 1, and the difference lies in the pickling conditions after unloading the wafer:

[0045] In Embodiment 2, in step (5), clean with hydrochloric acid:water = 1:2 for 45 s, and perform metal coating on the N side.

[0046] In Embodiment 3, in step (5), clean with hydrochloric acid:water = 1:3 for 60 s, and perform metal coating on the N side.

[0047] Other steps are the same as those in Embodiment 1.

[0048] The shear force test results after thinning and polishing are as follows:

[0049]

[0050] After thinning and polishing, the appearance of the wafer source is smoother. There is no metal pulling phenomenon during bar separation and scribing, and the appearance of the shear force residue is qualified. According to the above data, the pickling condition of hydrochloric acid: water = 1:3 and cleaning for 60 s is the best process condition.

[0051] Therefore, by using the thinning and polishing process method of the present invention, the surface roughness of the chip can be reduced, the adhesion of the N-side metal can be improved, the damage stress can be reduced, the warping problem after wafer thinning can be solved, the verification parameters at the test end are all qualified, and the process can be simplified.

[0052] The above are only the preferred embodiments of the present invention, and are not limitations to the present invention in other forms. Any person skilled in the art may use the technical content disclosed above to make changes or modifications into equivalent embodiments with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the technical solution content of the present invention still belong to the protection scope of the technical solution of the present invention.

Claims

1. A thinning and polishing process method for INP wafers, characterized in that, It includes the following steps: (1) Wax and stick the wafer with photoresist, and thin it to 120 - 125 um on a thinning device; (2) Remove the wafer from the thinning device and place it on a polishing device, making the wafer contact the polishing pad on the polishing disc; (3) Polish for 10 - 20 minutes to polish the wafer to 80 - 100 um; during the polishing process, control the continuous liquid discharge of the polishing liquid, the polishing temperature is 23 - 27 °C, and the polishing pressure is 180 - 300 g / cm 2 ; (4) After cleaning and drying the wafer, melt the wax and unload the wafer; (5) Conduct the first metal coating on the N side; (6) Anneal, and then scribe cleavage bars; In step (2), the polishing pad uses a polyurethane polishing pad, which is a porous material with certain elasticity, used for storing and transporting polishing liquid, providing a certain pressure on the INP wafer and friction on its surface; In step (3), the polishing liquid uses alumina polishing liquid ASCP2002, which is a colorless, odorless, non-toxic white emulsion with 50 nm suspended particles; the pH range is between 11 - 12, and the solid content at 25 °C is 8% - 12%, which is adapted to the polishing pressure and polishing speed to improve the polishing rate and the surface quality of polishing; In step (3), control the polishing liquid to keep flowing out through a peristaltic pump, and control the total polishing flow rate between 250 - 300 ml; In step (4), use a cleaning solution with a ratio of cleaning powder: water = 100:1 for cleaning, and then dry it with nitrogen; In step (5), use a solution of hydrochloric acid: water = 1:3 to soak and pickle for 1 minute statically, and then conduct the first metal coating on the N side.

Citation Information

Patent Citations

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    CN114131434A

  • Thin semiconductor chip and its manufacturing method

    CN1442889A