A wafer dicing process
By attaching carrier pads to both sides of the wafer and coating them with sealant to form a multi-layer sealing structure, the problem of wafer breakage during thin wafer transfer is solved, and the stability and integrity of the processing are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG TONGXINQI TECH CO LTD
- Filing Date
- 2022-05-20
- Publication Date
- 2026-05-26
AI Technical Summary
In semiconductor manufacturing processes, thin wafers are prone to breakage during the transfer process, and existing technologies are unable to effectively avoid this problem.
By attaching multiple carrier disks to the front and back of the wafer and coating them with sealant, a multi-layer sealing structure is formed, which provides support and restraint, reducing the risk of wafer breakage during the transfer process.
This effectively reduces the risk of wafer breakage during the transfer process between the carrier disk and the dicing mold, ensuring the stability and integrity of the processing.
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Figure CN114864489B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of wafer processing, and more specifically to a wafer dicing process. Background Technology
[0002] In semiconductor manufacturing, wafers need to be cut into individual dies, and then these dies are made into different semiconductor package structures.
[0003] Before dicing, the wafer needs to be transferred from the preprocessing equipment to the dicing equipment. For thin wafers, the transfer process can easily cause wafer breakage. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention proposes a wafer dicing process.
[0005] The objective of this invention can be achieved through the following technical solutions:
[0006] A wafer dicing process includes the following steps:
[0007] Multiple first trenches are pre-formed on the front side of the wafer, and then the first carrier pad is attached to the front side of the wafer.
[0008] A first sealant is applied to the outer edge of the first carrier disk to enclose and limit the wafer.
[0009] A second carrier disk is attached to the front side of the wafer. The first seal is removed, and a second seal is applied to the outer edge of the second carrier disk to surround and limit the wafer. The first carrier disk is removed, and the back-side process is performed on the wafer. Multiple second trenches corresponding one-to-one with the first trenches are formed on the back side of the wafer, and the first trenches and the second trenches are not connected. The wafer is fixed on the dicing die frame, and the second seal is removed to release the wafer from the second carrier disk.
[0010] Remove the second carrier disk, flip the entire wafer and the second carrier disk over, and perform the die cutting process.
[0011] Optionally, the method for fixing the wafer and the first carrier disk is as follows: the first seal and the second seal are arranged by annular coating.
[0012] Optionally, a third seal is applied to the second seal, and the third seal partially covers the outer edge of the upper end face of the wafer.
[0013] Optionally, after the first trench is created, polishing tape is applied to the front side of the wafer, and the back side of the wafer is polished.
[0014] Optionally, the method for releasing the wafer from the first carrier disk is to cut the sealing layer using a laser.
[0015] Optionally, the first, second, and third plugs are made of SOG.
[0016] Optionally, the back-side process includes: metal processing, ion implantation, and ion activation processes.
[0017] Optionally, the second seal adheres to the second carrier and the wafer without contacting the first carrier. Attached Figure Description
[0018] The invention will now be further described with reference to the accompanying drawings.
[0019] Figures 1-3 This is a flowchart of this application. Detailed Implementation
[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0021] like Figures 1-3 As shown, some examples of the present invention disclose a wafer dicing process involving wafer carrier bearing and transfer between different carriers, including the following steps:
[0022] At the initial stage of processing, the wafer can be a relatively thick piece of material, thus requiring grinding to thin it. Specifically, the front side of the wafer can be attached to a grinding tape, and then the back side of the wafer is ground to complete the thinning. The grinding can be done using a grinding machine or by etching.
[0023] After thinning, the wafer carrier method needs to be changed to facilitate wafer processing. However, directly transferring the thin wafer and removing the polishing tape can lead to wafer breakage. Therefore, after polishing, a first carrier pad is attached to the back of the wafer as a new carrier. A first sealant is applied to the outer edge of the first carrier pad to contain and limit the wafer. In this way, the support and containment provided by the first carrier pad and the first sealant effectively reduce the risk of wafer breakage.
[0024] After the polishing tape is removed, the front side of the wafer is exposed and constrained by the first carrier disk and the first seal. In this state, the front side process of the wafer is performed. Here, the first seal covers the outer edge of the first carrier disk and the sidewall of the wafer. Therefore, a fourth seal can be placed on the basis of the first seal. The fourth seal partially covers the first seal and partially covers the front side of the wafer, thereby providing fixation in the wafer thickness direction.
[0025] In this example, the front-side process of the wafer can include, for example, the front-side etching process, metal processing, contact hole creation, ILD layer placement, ion implantation and ion activation processes, etc. After completing the front-side process, a first trench is cut on the front side of the wafer to initially form a dicing channel.
[0026] After the front-side processing of the wafer is completed, the back-side processing also needs to be considered. Therefore, to ensure the back-side of the wafer is exposed while maintaining its support, the support carrier needs to be replaced again. Specifically, a second carrier is attached to the front side of the wafer. If necessary, the seal covering the front side of the wafer needs to be removed first to allow for attachment of the front side to the second carrier; or, in other words, to make room for the subsequent application of the second seal. There is also a risk of wafer breakage when transferring the wafer from the first carrier to the second carrier. Therefore, the second carrier can be attached first without removing the first seal; after the entire wafer is flipped and the second seal is applied, thus confining the wafer to the second carrier, the first seal is then removed, and the first carrier is removed.
[0027] After the first carrier disk is removed, the back side of the wafer is exposed and constrained by the second carrier disk and the second seal. In this state, the back side process of the wafer is performed. Similarly, as with the first seal, the second seal covers the outer edge of the second carrier disk and the sidewall of the wafer. Therefore, a third seal can be placed on top of the second seal. The third seal partially covers the second seal and partially encloses the back side of the wafer, thereby providing fixation in the wafer thickness direction.
[0028] The back-side fabrication process includes metal processing, ion implantation, and ion activation. After the back-side fabrication process is completed, multiple second trenches corresponding one-to-one with the first trenches are formed on the back side of the wafer, and the first trenches and the second trenches are not interconnected.
[0029] After double-sided processing is completed, the wafer is transferred to the dicing mold frame, and the second and third plugs are cut off and removed.
[0030] In this example, the removal of the first, second, third, and fourth seals is, for example, by laser cutting. Furthermore, to facilitate laser intervention, both the first and second carrier disks can be made of transparent material, more specifically, transparent glass.
[0031] Optionally, the first, second, and third plugs are made of SOG.
[0032] In the above operation, grinding is performed using a grinding tape. The back-side processing of the wafer is then carried out on the first carrier tray, followed by the transfer to the second carrier tray for the creation of the second trench. Finally, the wafer is transferred to the dicing die for dicing or die cutting. During this process, the placement of the first, second, and third sealing layers provides excellent support and restraint for the wafer, effectively avoiding the risk of breakage during transfer via the grinding tape, first carrier tray, second carrier tray, and dicing die.
[0033] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0034] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention.
Claims
1. A wafer dicing process, characterized in that, Includes the following steps: Polishing tape is applied to the front side of the wafer, the back side of the wafer is polished, and then the back side of the wafer is attached to the first carrier. A first sealant is applied to the outer edge of the first carrier to surround and limit the wafer. After the polishing tape is removed, the front side of the wafer is processed, and multiple first trenches are opened. A second carrier disk is attached to the front side of the wafer, and a second sealant is applied to the outer edge of the second carrier disk to surround and limit the wafer. The first sealant is removed after the second sealant is applied to the outer edge of the second carrier disk. The wafer undergoes a back-side process; and multiple second trenches corresponding one-to-one with the first trenches are formed on the back side of the wafer, wherein the first trenches and the second trenches are not connected; the wafer is fixed on the dicing mold frame, and the second seal is removed to release the wafer from the second carrier. Remove the second carrier disk, flip the entire wafer and the second carrier disk over, and perform die cutting.
2. The wafer dicing process according to claim 1, characterized in that, The method for fixing the wafer to the first carrier disk is as follows: the first and second seals are arranged by annular coating.
3. The wafer dicing process according to claim 1, characterized in that, A third seal is applied to the second seal, and the third seal partially covers the outer edge of the upper end face of the wafer.
4. The wafer dicing process according to claim 1, characterized in that, The method to release the wafer from the first carrier disk is to cut the sealing layer with a laser.
5. The wafer dicing process according to claim 1, characterized in that, The back-side fabrication process includes: metal processing, ion implantation, and ion activation processes.
6. The wafer dicing process according to claim 1, characterized in that, The second seal adheres to the second carrier and the wafer without contacting the first carrier.
7. The wafer dicing process according to claim 1, characterized in that, The wafer front-side process includes ILD deposition, metal processing, ion implantation, and ion activation processes.