A timing protection power supply device and a power supply method for a gallium nitride power amplifier

Abstract

The application provides a timing protection power supply device and a power supply method for a gallium nitride power amplifier. The structure of a negative voltage neutralization circuit is arranged as the structure of the application, so that a fixed positive voltage signal can be obtained. The negative voltage generated by a negative voltage generation circuit is neutralized with the fixed positive voltage signal in the negative voltage neutralization circuit. When the negative voltage generation circuit outputs a normal negative voltage, the neutralized signal is at a low level. When the negative voltage generation circuit outputs a positive voltage signal, the neutralized signal is at a high level. The neutralization of the negative voltage signal and the positive voltage signal is used to determine whether the negative voltage signal meets the requirements. Compared with a traditional negative voltage discrimination method, the negative voltage discrimination method of the application has a simpler structure and is not affected by external environment, and has high stability.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication radio frequency power amplifiers, and in particular to a gallium nitride power amplifier timing protection power supply device and a power supply method. Background Art

[0002] Gallium nitride semiconductors, due to their superior broadband characteristics, high electron mobility, high breakdown voltage, and excellent thermal conductivity, can operate at high frequencies, high powers, and high temperatures. Due to the specialized manufacturing process of GaN power amplifiers, the gate is typically powered by a negative voltage, while the drain is typically powered by a high-voltage positive voltage. Furthermore, there are very strict requirements for the gate and drain power supply sequence. Generally speaking, the drain can only be powered after the gate meets the power supply requirements; otherwise, the amplifier will be damaged. Existing GaN power amplifier protection circuits operate by applying a negative voltage directly to the gate of the GaN amplifier. A chip or comparator circuit determines whether the negative voltage is normal. If the negative voltage is normal, a switch circuit closes the circuit between the high-voltage positive power supply and the GaN amplifier's drain. Otherwise, the switch circuit disconnects the circuit between the high-voltage positive power supply and the GaN amplifier's drain. However, this method requires a single-chip microcomputer (MCU), which determines whether the negative voltage and current meet the requirements and outputs a pulse signal to control the MOS transistor to shut down. This makes the negative voltage signal difficult to collect and analyze. Furthermore, the comparison circuit structure is complex and susceptible to environmental interference, leading to circuit instability and low accuracy. Therefore, to address these issues, the present invention provides a gallium nitride power amplifier timing protection power supply device and power supply method. This method determines whether the negative voltage signal meets the requirements by neutralizing the negative voltage signal with the positive voltage signal. This method has a simpler structure, is unaffected by external environmental interference, and has high stability. Summary of the Invention

[0003] In view of this, the present invention proposes a timing protection power supply device and power supply method for a gallium nitride power amplifier. By neutralizing the negative voltage signal with the positive voltage signal, it is determined whether the negative voltage signal meets the requirements. This method has a simpler structure, is not affected by external environmental interference, and has high stability.

[0004] The technical solution of the present invention is achieved as follows: The present invention provides a GaN power amplifier timing protection power supply device, which includes a GaN power amplifier, a negative voltage generating circuit, a drain voltage source, a MOS transistor driving circuit, a MOS transistor and a current detection circuit, and also includes a negative voltage neutralization circuit and an OR gate;

[0005] The drain voltage source is electrically connected to the source of the MOS transistor and the input terminal of the current detection circuit respectively. The drain of the MOS transistor is electrically connected to the drain of the gallium nitride power amplifier. The output terminal of the current detection circuit is electrically connected to the first input terminal of the OR gate.

[0006] The output end of the negative voltage generating circuit is electrically connected to the input end of the negative voltage neutralization circuit and the gate of the gallium nitride power amplifier respectively. The output end of the negative voltage neutralization circuit is electrically connected to the second input end of the OR gate. The output end of the OR gate is electrically connected to the gate of the MOS transistor through the MOS transistor driving circuit.

[0007] The negative voltage generating circuit generates a negative voltage, which is divided into two paths. One path is output to the gate of the gallium nitride power amplifier; the other path is output to the negative voltage neutralization circuit. The negative voltage neutralization circuit is used to provide a fixed positive voltage signal. The negative voltage signal is neutralized with the positive voltage signal. When the negative voltage generating circuit generates a normal negative voltage, the neutralized signal is at a low level and is output to the second input terminal of the OR gate. When the negative voltage generating circuit generates a positive voltage signal, the neutralized signal is at a high level and is output to the second input terminal of the OR gate.

[0008] The current detection circuit detects the magnitude of the output current of the drain voltage source. When the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate.

[0009] When the negative voltage generated by the negative voltage generating circuit meets the requirement and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier; otherwise, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier.

[0010] On the basis of the above technical solution, preferably, the negative voltage neutralization circuit includes a +5V voltage source, a diode D1, a resistor R41 and a resistor R46;

[0011] The output end of the negative voltage generating circuit is electrically connected to one end of the resistor R41 and one end of the resistor R46 through a forward series diode D1. The other end of the resistor R41 is electrically connected to the +5V voltage source, and the other end of the resistor R46 is electrically connected to the second input end of the OR gate.

[0012] On the basis of the above technical solution, preferably, the resistor R41 and the resistor R46 divide the +5V voltage output by the +5V voltage source;

[0013] When the negative voltage generating circuit outputs normal negative voltage, the negative voltage reaches the other end of the resistor R41 through the diode D1 and is neutralized with the signal divided by the resistors R41 and R46. After neutralization, the negative voltage neutralization circuit outputs a low level; otherwise, the negative voltage neutralization circuit outputs a high level.

[0014] On the basis of the above technical solution, preferably, it further includes a negative pressure regulating circuit;

[0015] The negative voltage regulating circuit is connected in series between the output end of the negative voltage generating circuit and the gate of the gallium nitride power amplifier.

[0016] On the basis of the above technical solution, preferably, the negative voltage regulation circuit includes a switch control circuit, a resistor voltage divider circuit and a power amplifier tube;

[0017] The control end of the switch control circuit inputs an external TTL signal, the output end of the negative voltage generating circuit is electrically connected to the input end of the switch control circuit and the input end of the resistor voltage divider circuit respectively, the output end of the switch control circuit and the output end of the resistor voltage divider circuit are electrically connected to the input end of the power amplifier tube respectively, and the output end of the power amplifier tube is electrically connected to the gate of the gallium nitride power amplifier.

[0018] On the basis of the above technical solution, preferably, when the external TTL signal is at a high level, the switch control circuit cuts off the line between the negative voltage generating circuit and the power amplifier tube. At this time, the -5V voltage generated by the negative voltage generating circuit is divided by the resistor voltage divider circuit, and the power amplifier tube is turned on;

[0019] When the external TTL signal is at a low level, the switch control circuit connects the line between the negative voltage generating circuit and the power amplifier tube. At this time, the -5V voltage generated by the negative voltage generating circuit is directly passed to the power amplifier tube, and the power amplifier tube is closed.

[0020] On the basis of the above technical solution, preferably, the switch control circuit includes: a MOS tube V1 and a resistor R31;

[0021] The external TTL signal is transmitted to the gate of the MOS transistor V1. The source of the MOS transistor V1 is electrically connected to the output end of the negative voltage generating circuit. The drain of the MOS transistor V1 is electrically connected to the input end of the power amplifier tube. The resistor R31 is connected in parallel between the gate and source of the MOS transistor V1.

[0022] On the basis of the above technical solution, preferably, the resistor voltage divider circuit includes: a resistor R18, a resistor R19, a resistor R22 and a variable resistor R32;

[0023] The output end of the negative voltage generating circuit is electrically connected to one end of the resistor R22 and one end of the variable resistor R32 respectively. The other end of the resistor R22 is electrically connected to the adjustment end of the variable resistor R32. The other end of the variable resistor R32 is grounded. The resistors R18 and R19 are connected in series and then connected in parallel at both ends of the resistor R22.

[0024] On the basis of the above technical solution, preferably, it further includes a first display device and a second display device;

[0025] The first display device is electrically connected to the first input terminal of the OR gate, and the second display device is electrically connected to the second input terminal of the OR gate.

[0026] A power supply method for a timing protection power supply device for a gallium nitride power amplifier comprises the following steps:

[0027] S1. Build a timing protection power supply device for a gallium nitride power amplifier. The negative voltage generating circuit generates a -5V signal. The -5V signal is divided into two paths, one path is output to the gate of the gallium nitride power amplifier, and the other path is output to a negative voltage neutralization circuit. The negative voltage neutralization circuit is used to provide a fixed positive voltage signal, which neutralizes the negative voltage signal with the positive voltage signal. When the negative voltage generating circuit generates a normal negative voltage, the neutralized signal is at a low level and is output to the second input terminal of an OR gate. When the negative voltage generating circuit generates a positive voltage signal, the neutralized signal is at a high level and is output to the second input terminal of the OR gate.

[0028] S2. The current detection circuit detects the output current of the drain voltage source and outputs the detected value; when the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate;

[0029] S3. When the negative voltage generating circuit generates a normal negative voltage and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier. Conversely, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier.

[0030] The gallium nitride power amplifier timing protection power supply device and power supply method of the present invention have the following beneficial effects compared with the prior art:

[0031] (1) The structure of the negative pressure neutralization circuit is set to the structure of the present invention, and a fixed positive pressure signal can be obtained. The negative pressure generated by the negative pressure generating circuit is neutralized with the fixed positive pressure signal in the negative pressure neutralization circuit. When the negative pressure generating circuit outputs a normal negative pressure, the neutralized signal is a low level; when the negative pressure generating circuit outputs a positive pressure signal, the neutralized signal is a high level. By neutralizing the negative pressure signal with the positive pressure signal, it is judged whether the negative pressure signal meets the requirements. Compared with the traditional negative pressure discrimination method, the negative pressure discrimination method of the present invention has a simpler structure, is not affected by external environmental interference, and has high stability.

[0032] (2) The judgment condition of the OR gate is set to that the OR gate can output a low level to control the MOS tube driving circuit to turn on the MOS tube only when the negative voltage generated by the negative voltage generating circuit meets the requirements and the output current of the drain voltage source is within a preset range, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier; that is, the present invention uses the OR gate to judge whether the negative voltage and current meet the requirements, and generates a low level for controlling the MOS tube, replacing the traditional method of using a single-chip microcomputer to generate a low level, using a hardware circuit instead of a traditional software algorithm, and its structure is simpler. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0034] Figure 1 This is a structural diagram of a timing protection power supply device for a gallium nitride power amplifier according to the present invention;

[0035] Figure 2 This is a circuit diagram of a negative voltage generating circuit, a negative voltage neutralizing circuit, an OR gate, and a MOS tube driving circuit in a timing protection power supply device for a gallium nitride power amplifier according to the present invention;

[0036] Figure 3 The present invention provides a circuit diagram of a negative voltage regulation circuit in a timing protection power supply device for a gallium nitride power amplifier. DETAILED DESCRIPTION

[0037] The following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0038] Example 1

[0039] like Figure 1As shown, a timing protection power supply device for a gallium nitride power amplifier of the present invention comprises a gallium nitride power amplifier, a negative voltage generating circuit, a drain voltage source, a negative voltage neutralization circuit, an OR gate, a MOS transistor driving circuit, a MOS transistor, and a current detection circuit. The drain voltage source is electrically connected to the source of the MOS transistor and the input of the current detection circuit, respectively; the drain of the MOS transistor is electrically connected to the drain of the gallium nitride power amplifier; the output of the current detection circuit is electrically connected to the first input of the OR gate; the output of the negative voltage generating circuit is electrically connected to the input of the negative voltage neutralization circuit and the gate of the gallium nitride power amplifier, respectively; the output of the negative voltage neutralization circuit is electrically connected to the second input of the OR gate; and the output of the OR gate is electrically connected to the gate of the MOS transistor via the MOS transistor driving circuit.

[0040] A drain voltage source is used to provide a high-voltage positive power supply to the drain of the GaN power amplifier. A high-voltage power supply such as 28V or 48V can be used, but a 28V power supply is preferred in this embodiment. The 28V power supply output is electrically connected to the source of the MOS transistor, and the drain of the MOS transistor is electrically connected to the drain of the GaN power amplifier. The MOS transistor acts as the drain power switch for the GaN power amplifier, switching the drain power supply circuit of the GaN power amplifier on and off by controlling the on and off of the MOS transistor.

[0041] The current detection circuit is used to detect the current output by the drain voltage source to prevent overcurrent from damaging the gallium nitride power amplifier. In this embodiment, the input of the current detection circuit is electrically connected to the drain voltage source, and the output of the current detection circuit is electrically connected to the first input of an OR gate. When the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input of the OR gate; otherwise, the current detection circuit outputs a high level to the first input of the OR gate. This embodiment does not involve structural improvements to the current detection circuit and can be implemented using existing technologies. For example, a current sensor and a single-chip microcomputer can be used to implement the above-mentioned current detection function.

[0042] A negative voltage generating circuit is used to provide a negative voltage to the gate of a gallium nitride power amplifier. The output end of the negative voltage generating circuit is electrically connected to the input end of the negative voltage neutralization circuit and the gate of the gallium nitride power amplifier respectively. The output end of the negative voltage neutralization circuit is electrically connected to the second input end of the OR gate. The output end of the OR gate is electrically connected to the gate of the MOS tube through the MOS tube driving circuit. Generally, the maximum required negative voltage of the gate of a gallium nitride power amplifier is -5V. A negative voltage smaller than -5V also meets the requirement, as long as the voltage on the gate of the gallium nitride power amplifier is a negative voltage. Therefore, in this embodiment, the negative voltage generating circuit can generate -5V. This embodiment does not involve structural improvements to the negative voltage generating circuit and can be implemented using existing technologies, for example, Figure 2As shown in the figure, the +5V power supply can be converted into a -5V power supply by passing it through the SGM7SZ04YC5G / TR inverter.

[0043] Currently, there are many technologies for implementing negative pressure detection, which can be divided into two categories. One is to use a single-chip microcomputer to collect negative pressure signals and analyze them using a negative pressure detection algorithm to determine whether the negative pressure meets the requirements. However, negative pressure signals are difficult to collect and analyze. The other is to set up a comparison circuit to convert the negative pressure signal into a positive pressure signal before comparing it with a reference voltage. This method has the problems of low accuracy and complex circuit structure during the negative pressure to positive pressure conversion process. Both of the above methods are based on the premise that the signal to be detected is a negative pressure signal, and the duty cycle of the negative pressure signal is determined. For example, when the negative pressure duty cycle is lower than a preset value, it is determined that the negative pressure does not meet the requirements. In practical applications, the negative voltage generated can meet the negative voltage requirements of the GaN power amplifier tube gate. Only when the GaN power amplifier tube gate is at positive voltage, it cannot meet the requirements. However, the existing judgment method is based on the negative voltage signal for judgment. When the GaN power amplifier tube gate inputs a positive voltage signal, it cannot be known and cannot be judged. Therefore, in order to solve this problem, this embodiment provides a solution for judging the positive voltage signal and cutting off the power supply line between the drain voltage source and the GaN power amplifier drain when the negative voltage generating circuit generates a positive voltage signal. Specifically, the negative voltage neutralization circuit is first used to determine whether a positive voltage signal is generated. If so, and the current does not exceed the threshold, the OR gate outputs a high level to cut off the MOS tube between the drain voltage source and the GaN power amplifier drain. The specific working principle is as follows:

[0044] The negative pressure neutralization circuit is used to provide a fixed positive pressure signal, which neutralizes the negative pressure signal with the positive pressure signal. When the negative pressure generating circuit generates a normal negative pressure, the neutralized signal is low and output to the second input of the OR gate; when the negative pressure generating circuit generates a positive pressure signal, the neutralized signal is high and output to the second input of the OR gate. There are two traditional methods for determining negative pressure. The first is to collect the negative pressure signal and determine whether the negative pressure meets the requirements based on a software algorithm. This method has the problem that the negative pressure signal is difficult to collect and analyze. The second is to set up a comparison circuit to convert the negative pressure signal into a positive pressure signal and then compare it with a reference voltage. This method has the problem of low accuracy and complex circuit structure during the negative pressure to positive pressure conversion process. To solve this problem, this embodiment adopts a different discrimination method from the traditional discrimination method. Specifically, the negative pressure signal is neutralized with a fixed positive pressure signal. If the negative pressure signal is normal, the neutralized signal is a low-level signal; when the negative pressure generating circuit generates a positive pressure signal, the neutralized signal is a high-level signal. The method of this embodiment can realize the determination of the negative pressure signal without collecting the negative pressure signal or converting the negative pressure signal into a positive pressure signal for comparison.

[0045] Preferably, Figure 2 As shown, the negative voltage neutralization circuit includes a +5V voltage source, a diode D1, a resistor R41, and a resistor R46. The output end of the negative voltage generating circuit is electrically connected to one end of resistor R41 and one end of resistor R46, respectively, via a forward-connected diode D1. The other end of resistor R41 is electrically connected to the +5V voltage source, and the other end of resistor R46 is electrically connected to the second input of the OR gate. Resistors R41 and R46 divide the +5V voltage output by the +5V voltage source. When the negative voltage generating circuit outputs a normal negative voltage, the negative voltage passes through diode D1 and reaches the other end of resistor R41, where it is neutralized with the signal divided by resistors R41 and R46. After neutralization, the negative voltage neutralization circuit outputs a low level. Otherwise, the negative voltage neutralization circuit outputs a high level.

[0046] In traditional GaN power amplifier power supply protection circuits, a circuit generally first determines whether a negative voltage signal meets requirements. If so, the circuit between the drain voltage source and the drain of the GaN power amplifier is closed; otherwise, the circuit between the drain voltage source and the drain of the GaN power amplifier is disconnected. Simultaneously, to prevent overcurrent, the current on the drain of the GaN power amplifier is detected. If the current exceeds a warning value, the circuit between the drain voltage source and the drain of the GaN power amplifier is disconnected. However, this method requires a single-chip microcomputer, which determines whether the negative voltage and current values ​​meet requirements and outputs a pulse signal to control the MOS transistor to shut down. This leads to a complex structure and the need for software algorithms. Therefore, to address the above issues, this embodiment provides an OR gate for logical AND processing. Its first input terminal is electrically connected to the output terminal of the current detection circuit, and its second input terminal is electrically connected to the output terminal of the negative voltage neutralization circuit. The OR gate outputs a low level to control the operation of the MOS transistor drive circuit only when both input terminals of the OR gate are low. That is, when the negative voltage generated by the negative voltage generating circuit meets the requirements and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor drive circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the GaN power amplifier. Conversely, the OR gate outputs a high level and cannot control the MOS transistor drive circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the GaN power amplifier. Specifically, there are four combinations of the two inputs of the OR gate, each corresponding to a different application scenario, as follows:

[0047] First, when the negative voltage generated by the negative voltage generating circuit meets the requirement and the source of the MOS transistor monitored by the current detection circuit is within the normal range, the current detection circuit outputs a low level to the first input terminal of the OR gate, the negative voltage neutralization circuit outputs a low level to the second input terminal of the OR gate, and the OR gate outputs a low level. The low level output by the OR gate controls the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier;

[0048] Second, when the negative voltage generated by the negative voltage generating circuit meets the requirement and the source of the MOS transistor monitored by the current detection circuit is outside the normal range, the current detection circuit outputs a high level to the first input terminal of the OR gate, the negative voltage neutralization circuit outputs a low level to the second input terminal of the OR gate, and the OR gate outputs a high level. The high level output by the OR gate cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot power the drain of the gallium nitride power amplifier.

[0049] Third, when the negative voltage generated by the negative voltage generating circuit does not meet the requirement and the current detection circuit monitors that the source of the MOS tube is within the normal range, the current detection circuit outputs a low level to the first input terminal of the OR gate, the negative voltage neutralization circuit outputs a high level to the second input terminal of the OR gate, and the OR gate outputs a high level. The high level output by the OR gate cannot control the MOS tube driving circuit to turn on the MOS tube, and the drain voltage source cannot power the drain of the gallium nitride power amplifier;

[0050] Fourth, when the negative voltage generated by the negative voltage generating circuit does not meet the requirements and the source of the MOS tube monitored by the current detection circuit is in an abnormal range, the current detection circuit outputs a high level to the first input terminal of the OR gate, the negative voltage neutralization circuit outputs a high level to the second input terminal of the OR gate, and the OR gate outputs a high level. The high level cannot control the MOS tube driving circuit to turn on the MOS tube, and the drain voltage source cannot power the drain of the gallium nitride power amplifier.

[0051] The MOS transistor driving circuit is used to drive the MOS transistor on and off when the negative voltage generated by the negative voltage generating circuit meets the requirements and the current detection circuit monitors that the source of the MOS transistor is within the normal range, thereby realizing the control of the drain power supply of the gallium nitride power amplifier. This embodiment does not involve the structural improvement of the MOS transistor driving circuit. Preferably, it can adopt the following method: Figure 2 The MOS transistor driving circuit shown in the figure. When the OR gate outputs a low level, the tertiary transistor V3 is in the off state, the tertiary transistor V2 is in the on state, the MOS transistor is in the on state, and the drain voltage source directly supplies power to the drain of the GaN power amplifier. When the OR gate outputs a high level, the tertiary transistor V3 is in the on state, the tertiary transistor V2 is in the off state, the MOS transistor is in the off state, and the drain voltage source cannot supply power to the drain of the GaN power amplifier.

[0052] The first and second display devices visually display the output signals of the current detection circuit and the negative voltage neutralization circuit, allowing technicians to quickly identify the cause of the GaN power amplifier's drain failure. The first and second display devices can be implemented using existing technologies. Preferably, light-emitting diodes are selected, and light up when the output of the current detection circuit or the negative voltage neutralization circuit is high.

[0053] The working principle of this embodiment is as follows: the current detection circuit detects the current output by the drain voltage source in real time. When the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate.

[0054] At the same time, the negative voltage generating circuit generates a negative voltage, which is divided into two paths. One path is output to the gate of the gallium nitride power amplifier; the other path is output to the negative voltage neutralization circuit. The negative voltage neutralization circuit identifies the negative voltage generated by the negative voltage generating circuit. When the negative voltage generating circuit generates a normal negative voltage, the negative voltage neutralization circuit outputs a low level to the second input terminal of the OR gate; otherwise, the negative voltage neutralization circuit outputs a high level to the second input terminal of the OR gate.

[0055] Only when the negative voltage generated by the negative voltage generating circuit meets the requirement and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier. Otherwise, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier.

[0056] The beneficial effects of this embodiment are as follows: by setting the structure of the negative pressure neutralization circuit to the structure of this embodiment, a fixed positive pressure signal can be obtained, and the negative pressure generated by the negative pressure generating circuit is neutralized with the fixed positive pressure signal in the negative pressure neutralization circuit. When the negative pressure generating circuit outputs a normal negative pressure, the neutralized signal is a low level; otherwise, the neutralized signal is a high level. By neutralizing the negative pressure signal with the positive pressure signal, it is determined whether the negative pressure signal meets the requirements. Compared with the traditional negative pressure discrimination method, the negative pressure discrimination method of this embodiment has a simpler structure, is not affected by external environmental interference, and has high stability.

[0057] The judgment condition of the OR gate is set to output a low level to control the MOS transistor drive circuit to turn on the MOS transistor and the drain voltage source to supply power to the drain of the gallium nitride power amplifier only when and only when the negative voltage generated by the negative voltage generating circuit meets the requirements and the output current of the drain voltage source is within a preset range. That is, this embodiment uses the OR gate to determine whether the negative voltage and current meet the requirements and generates a low level for controlling the MOS transistor, replacing the traditional method of using a single-chip microcomputer to generate a low level. The hardware circuit replaces the traditional software algorithm, and its structure is simpler.

[0058] Example 2

[0059] Traditional negative voltage generation circuits generally generate a -5V voltage. Different levels of negative voltage may be used in practical applications. Therefore, based on Example 1, this embodiment provides a negative voltage regulation circuit. The negative voltage regulation circuit includes a switch control circuit, a resistor voltage divider circuit, and a power amplifier tube. An external TTL signal is input to the control terminal of the switch control circuit. The output terminal of the negative voltage generation circuit is electrically connected to the input terminal of the switch control circuit and the input terminal of the resistor voltage divider circuit, respectively. The output terminal of the switch control circuit and the output terminal of the resistor voltage divider circuit are electrically connected to the input terminal of the power amplifier tube, respectively. The output terminal of the power amplifier tube is electrically connected to the gate of the gallium nitride power amplifier.

[0060] The maximum output voltage of the negative voltage generating circuit is -5V. Therefore, if the negative voltage does not need to be adjusted, there is no need to divide and amplify the -5V signal. Otherwise, the negative voltage needs to be adjusted through a resistor divider circuit and amplified through a power amplifier tube. The amplified signal is then transmitted to the gate of the GaN power amplifier. In order to realize the output of -5V signal and adjust the negative voltage signal according to actual needs, in this embodiment, a switch control circuit is provided in series between the output end of the negative voltage generating circuit and the power amplifier tube. When the -5V signal needs to be output, the switch control circuit directly connects the output end of the negative voltage generating circuit to the power amplifier tube, and the -5V signal reaches the power amplifier tube directly without attenuation. Since the -5V signal exceeds the working voltage of the power amplifier tube, the power amplifier tube is turned off at this time, and the -5V signal is directly output to the gate of the gallium nitride power amplifier; when the -5V signal voltage needs to be divided, the switch control circuit disconnects the output end of the negative voltage generating circuit from the power amplifier tube. At this time, the -5V signal can only reach the power amplifier tube through the resistor voltage divider circuit. The voltage value reaching the power amplifier tube can turn on the power amplifier tube, and the power amplifier tube amplifies the negative voltage signal and outputs it to the gate of the gallium nitride power amplifier. Preferably, as Figure 3 As shown, the switch control circuit includes: a MOS transistor V1 and a resistor R31. An external TTL signal is input to the gate of the MOS transistor V1, and the source of the MOS transistor V1 is electrically connected to the output terminal of the negative voltage generating circuit. The drain of the MOS transistor V1 is electrically connected to the input terminal of the power amplifier tube. Resistor R31 is connected in parallel between the gate and source of the MOS transistor V1. The external TTL signal can be generated by a key switch or a single-chip microcomputer.

[0061] Preferably, Figure 3 As shown, the resistor voltage divider circuit includes resistors R18, R19, R22, and a variable resistor R32. The output end of the negative voltage generating circuit is electrically connected to one end of resistor R22 and one end of variable resistor R32, respectively. The other end of resistor R22 is electrically connected to the adjustment end of variable resistor R32, and the other end of variable resistor R32 is grounded. Resistors R18 and R19 are connected in series and then in parallel across resistor R22. The magnitude of the negative voltage signal is adjusted by adjusting the resistance value of resistor R32.

[0062] Preferably, the power amplifier tube is selected as follows Figure 3 The device shown in Figure 1. VG represents the gate of the gallium power amplifier.

[0063] Example 3

[0064] Based on Example 1, this embodiment provides a power supply method for a timing protection power supply device for a gallium nitride power amplifier, comprising the following steps:

[0065] S1. Build the timing protection power supply device for a gallium nitride power amplifier as described in Example 1, wherein the negative voltage generating circuit generates a -5V signal, and the -5V signal is divided into two paths, one path being output to the gate of the gallium nitride power amplifier; and the other path being output to a negative voltage neutralization circuit; the negative voltage neutralization circuit is configured to provide a fixed positive voltage signal, which neutralizes the negative voltage signal with the positive voltage signal; when the negative voltage generating circuit generates a normal negative voltage, the neutralized signal is at a low level and is output to the second input terminal of an OR gate; and when the negative voltage generating circuit generates a positive voltage signal, the neutralized signal is at a high level and is output to the second input terminal of the OR gate.

[0066] S2. The current detection circuit detects the output current of the drain voltage source and outputs the detected value; when the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate;

[0067] S3. When the negative voltage generating circuit generates a normal negative voltage and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier. Conversely, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier.

[0068] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A GaN power amplifier timing protection power supply device, comprising a GaN power amplifier, a negative voltage generating circuit, a drain voltage source, a MOS transistor driving circuit, a MOS transistor, and a current detection circuit, characterized in that: It also includes a negative pressure neutralization circuit and an OR gate; The drain voltage source is electrically connected to the source of the MOS transistor and the input of the current detection circuit respectively; the drain of the MOS transistor is electrically connected to the drain of the gallium nitride power amplifier; the output of the current detection circuit is electrically connected to the first input of the OR gate; The output end of the negative voltage generating circuit is electrically connected to the input end of the negative voltage neutralization circuit and the gate of the gallium nitride power amplifier respectively. The output end of the negative voltage neutralization circuit is electrically connected to the second input end of the OR gate. The output end of the OR gate is electrically connected to the gate of the MOS transistor through the MOS transistor driving circuit. The negative voltage generating circuit generates a negative voltage, which is divided into two paths. One path is output to the gate of the gallium nitride power amplifier; the other path is output to the negative voltage neutralization circuit. The negative voltage neutralization circuit is used to provide a fixed positive voltage signal. The negative voltage signal is neutralized with the positive voltage signal. When the negative voltage generating circuit generates a normal negative voltage, the neutralized signal is at a low level and is output to the second input terminal of the OR gate. When the negative voltage generating circuit generates a positive voltage signal, the neutralized signal is at a high level and is output to the second input terminal of the OR gate. The current detection circuit detects the magnitude of the output current of the drain voltage source. When the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate. When the negative voltage generating circuit generates a normal negative voltage and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier; otherwise, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier; It also includes a negative voltage regulating circuit; the negative voltage regulating circuit is connected in series between the output end of the negative voltage generating circuit and the gate of the gallium nitride power amplifier; The negative voltage regulation circuit includes a switch control circuit, a resistor voltage divider circuit and a power amplifier tube; the control end of the switch control circuit inputs an external TTL signal, the output end of the negative voltage generating circuit is electrically connected to the input end of the switch control circuit and the input end of the resistor voltage divider circuit respectively, the output end of the switch control circuit and the output end of the resistor voltage divider circuit are electrically connected to the input end of the power amplifier tube respectively, and the output end of the power amplifier tube is electrically connected to the gate of the gallium nitride power amplifier.

2. The gallium nitride power amplifier timing protection power supply device according to claim 1, characterized in that: The negative voltage neutralization circuit includes a +5V voltage source, a diode D1, a resistor R41 and a resistor R46; The output end of the negative voltage generating circuit is electrically connected to one end of the resistor R41 and one end of the resistor R46 through a forward-connected diode D1. The other end of the resistor R41 is electrically connected to the +5V voltage source, and the other end of the resistor R46 is electrically connected to the second input end of the OR gate.

3. The gallium nitride power amplifier timing protection power supply device according to claim 2, characterized in that: The resistor R41 and the resistor R46 divide the +5V voltage output by the +5V voltage source; When the negative voltage generating circuit outputs normal negative voltage, the negative voltage reaches the other end of the resistor R41 through the diode D1 and is neutralized with the signal after voltage division by the resistors R41 and R46. After neutralization, the negative voltage neutralization circuit outputs a low level; when the negative voltage generating circuit outputs a positive voltage signal, the negative voltage neutralization circuit outputs a high level.

4. The GaN power amplifier timing protection power supply device according to claim 1, wherein: When the external TTL signal is high, the switch control circuit cuts off the line between the negative voltage generating circuit and the power amplifier tube. At this time, the -5V voltage generated by the negative voltage generating circuit is divided by the resistor voltage divider circuit, and the power amplifier tube is turned on. When the external TTL signal is at a low level, the switch control circuit connects the line between the negative voltage generating circuit and the power amplifier tube. At this time, the -5V voltage generated by the negative voltage generating circuit is directly passed to the power amplifier tube, and the power amplifier tube is closed.

5. The gallium nitride power amplifier timing protection power supply device according to claim 4, characterized in that: The switch control circuit includes: a MOS tube V1 and a resistor R31; The external TTL signal is transmitted to the gate of the MOS transistor V1. The source of the MOS transistor V1 is electrically connected to the output end of the negative voltage generating circuit. The drain of the MOS transistor V1 is electrically connected to the input end of the power amplifier tube. The resistor R31 is connected in parallel between the gate and source of the MOS transistor V1.

6. The gallium nitride power amplifier timing protection power supply device according to claim 5, characterized in that: The resistor voltage divider circuit includes: a resistor R18, a resistor R19, a resistor R22 and a variable resistor R32; The output end of the negative voltage generating circuit is electrically connected to one end of the resistor R22 and one end of the variable resistor R32 respectively, the other end of the resistor R22 is electrically connected to the adjustment end of the variable resistor R32, and the other end of the variable resistor R32 is grounded; the resistor R18 and the resistor R19 are connected in series and then connected in parallel at both ends of the resistor R22.

7. A GaN power amplifier timing protection power supply device according to claim 1 or 2, characterized in that: Also included are a first display device and a second display device; The first display device is electrically connected to a first input terminal of the OR gate, and the second display device is electrically connected to a second input terminal of the OR gate.

8. A power supply method for a timing protection power supply device of a gallium nitride power amplifier, characterized in that The following steps are involved: S1. Construct the timing protection power supply device for a gallium nitride power amplifier as described in claim 1, wherein the negative voltage generating circuit generates a -5V signal, and the -5V signal is divided into two paths, one path being output to the gate of the gallium nitride power amplifier; and the other path being output to the negative voltage neutralization circuit; the negative voltage neutralization circuit is configured to provide a fixed positive voltage signal, which neutralizes the negative voltage signal with the positive voltage signal; when the negative voltage generating circuit generates a normal negative voltage, the neutralized signal is at a low level and is output to the second input terminal of an OR gate; when the negative voltage generating circuit generates a positive voltage signal, the neutralized signal is at a high level and is output to the second input terminal of the OR gate; S2. The current detection circuit detects the output current of the drain voltage source and outputs the detected value; when the output current of the drain voltage source is within a preset range, the current detection circuit outputs a low level to the first input terminal of the OR gate; otherwise, the current detection circuit outputs a high level to the first input terminal of the OR gate; S3. When the negative voltage generating circuit generates a normal negative voltage and the output current of the drain voltage source is within a preset range, the OR gate outputs a low level to control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source supplies power to the drain of the gallium nitride power amplifier. Conversely, the OR gate outputs a high level and cannot control the MOS transistor driving circuit to turn on the MOS transistor, and the drain voltage source cannot supply power to the drain of the gallium nitride power amplifier.

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