Data processing device, method, chip, board, electronic device and storage medium

Abstract

The present disclosure provides a data processing device, method, chip, board, electronic device and storage medium, wherein the device includes: a control unit and a register, wherein the control unit is used to respond to the arrival of the current data processing cycle and determine the first data block corresponding to the current data processing cycle according to the preset data block processing order; read the first data element corresponding to the newly added processing position in the first data block from the preset storage space and store it in the register; and read the second data element corresponding to the position overlapping with the first data block in the data block processed by the historical data processing cycle from the register. The embodiment of the present disclosure improves the data reuse rate, reduces the number and number of data reads, reduces the throughput rate in the data reading process, reduces the bandwidth pressure, and improves the efficiency of data processing by adjusting the processing order of the data blocks.

Description

Technical Field

[0001] The present disclosure relates to the field of data processing technology, and in particular to a data processing device, method, chip, board, electronic device and storage medium. Background Art

[0002] The processing object of convolution is generally a two-dimensional plane image. For a two-dimensional data, it is impossible to load a large amount of data at one time. Usually, a carpet-style data reading method is chosen, that is, a method of reading data one piece at a time. For example, for a convolution with a convolution kernel size of 3*3, each data reading process will load at least 3 data until all data are read, and the data processing efficiency is low. Summary of the invention

[0003] The embodiments of the present disclosure at least provide a data processing device, method, chip, board, electronic device and storage medium.

[0004] In a first aspect, an embodiment of the present disclosure provides a data processing device, including: a control unit, and a register;

[0005] The control unit is configured to determine, in response to the arrival of the current data processing cycle, the first data block corresponding to the current data processing cycle according to a preset data block processing sequence; and

[0006] Reading a first data element corresponding to a newly added processing position in the first data block from a preset storage space, and storing the first data element in the register; and

[0007] A second data element corresponding to a position overlapping with the first data block in a data block processed in a historical data processing cycle is read from the register.

[0008] In an optional implementation, in response to the current data processing cycle arriving, determining the first data block corresponding to the current data processing cycle according to a preset data block processing order includes:

[0009] In response to the arrival of the current data processing cycle, the data reading window is controlled to move in a data matrix formed by the to-be-processed data in an arcuate route according to a preset step length, corresponding to the current data processing cycle; and

[0010] Determine a first data block corresponding to the data reading window after the movement;

[0011] The destination position of each movement corresponds to an inflection point of the arcuate route.

[0012] In an optional implementation, the starting moving direction of the data reading window includes: the direction of the columns of the data matrix, or the direction of the rows of the data matrix.

[0013] In an optional implementation, in response to the current data processing cycle arriving, the data reading window is already at the last first data block of the current arcuate route, and the data matrix has not yet been read, determining the data blocks in the data matrix that have not been processed in the starting moving direction of each arcuate route of the data reading window;

[0014] The position of the unprocessed data block is used as the data block reading position corresponding to the data reading window in the current data processing cycle, and in the subsequent data processing cycle, the data block reading position is used as the starting point of the new arch route, and movement and data reading are performed according to the starting moving direction of the arch route.

[0015] In an optional implementation, the device further includes: a memory access circuit;

[0016] The control unit, when reading the first data element corresponding to the newly added processing position in the first data block from the preset storage space and storing it in the register, is used to: generate a first read instruction for reading the corresponding first data element in the current data processing cycle; in response to the arrival of the current data processing cycle, send the first read instruction corresponding to the current data processing cycle to the memory access circuit;

[0017] The memory access circuit is used for reading a first data element corresponding to the first read instruction from the preset storage space in response to receiving a first read instruction sent by the control unit, and storing the first data element in the register.

[0018] In an optional implementation, the method further includes: a computing unit;

[0019] The control unit is further configured to generate a second data read instruction corresponding to a current data processing cycle; in response to the first data element corresponding to the newly added processing position in the first data block being stored in the register, send the second data read instruction corresponding to the current data processing cycle to the computing unit;

[0020] The computing unit is configured to, in response to receiving a second data read instruction sent by the control unit, read a first data element and a second data element of the data block corresponding to the current data processing cycle from the register, and perform preset processing based on the first data element and the second data element to obtain result data of the data block corresponding to the data processing cycle.

[0021] In an optional implementation, the control unit, when generating a first read instruction for reading a first data element corresponding to the current data processing cycle, is configured to:

[0022] Determine identification information of a first data element corresponding to the current data processing cycle; the identification information is used to represent a position of the first data element in the data to be processed;

[0023] Determine address information of the first data element based on the starting address, address width, and identification information of the data to be processed;

[0024] Based on the address information of the first data element, a first data read instruction corresponding to the first data element is generated.

[0025] In a second aspect, the present disclosure also provides a data reading method, including:

[0026] In response to the current data processing cycle arriving, determining a first data block corresponding to the current data processing cycle among a plurality of data processing cycles according to a preset data block processing sequence;

[0027] The first data element corresponding to the newly added processing position in the first data block is read from the preset storage space and stored in the register; and the second data element corresponding to the overlapping position of the first data block in the data block processed in the historical data processing cycle is read from the register.

[0028] In a third aspect, an embodiment of the present disclosure further provides a data processing chip, comprising a data processing device as described in any one of the above items.

[0029] In a fourth aspect, an embodiment of the present disclosure further provides a board, comprising a packaging structure encapsulating at least one chip as described in the third aspect.

[0030] In a fifth aspect, an embodiment of the present disclosure further provides an electronic device, comprising: a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate through the bus, and when the machine-readable instructions are executed by the processor, the above-mentioned second aspect, or the steps in any possible implementation of the second aspect are performed.

[0031] In a sixth aspect, an embodiment of the present disclosure further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned second aspect, or any possible implementation of the second aspect are executed.

[0032] For a description of the effects of the above-mentioned data reading method, electronic device, and computer-readable storage medium, please refer to the description of the above-mentioned data processing device, which will not be repeated here.

[0033] The data processing device, method, chip, board, electronic device and storage medium provided by the embodiments of the present disclosure include: a control unit and a register, wherein the control unit is used to determine the first data block corresponding to the current data processing cycle in response to the arrival of the current data processing cycle according to the preset data block processing order; and read the first data element corresponding to the newly added processing position in the first data block from the preset storage space and store it in the register; and read the second data element corresponding to the position overlapping with the first data block in the data block processed in the historical data processing cycle from the register. By adjusting the processing order of the data blocks, the reuse rate of the data is improved, the number and number of data reads are reduced, the throughput rate in the data reading process is reduced, the bandwidth pressure is reduced, and the efficiency of data processing is improved.

[0034] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following is a brief introduction to the drawings required for use in the embodiments. The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used together with the specification to illustrate the technical solutions of the present disclosure. It should be understood that the following drawings only illustrate certain embodiments of the present disclosure and should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can also be obtained based on these drawings without creative work.

[0036] Figure 1 A schematic diagram of a data reading process in the prior art is shown.

[0037] Figure 2 A schematic diagram of the structure of a data processing device provided by an embodiment of the present disclosure is shown;

[0038] Figure 3 A schematic diagram of a data reading process provided by an embodiment of the present disclosure is shown;

[0039] Figure 4a One of the schematic diagrams showing another data reading process provided by an embodiment of the present disclosure;

[0040] Figure 4b A second schematic diagram showing another data reading process provided by an embodiment of the present disclosure;

[0041] Figure 5 A schematic diagram showing the structure of another data processing device provided by an embodiment of the present disclosure is shown;

[0042] Figure 6 A flow chart of a data reading method provided by an embodiment of the present disclosure is shown;

[0043] Figure 7 A schematic diagram of a board provided by an embodiment of the present disclosure is shown.

[0044] Figure 8 A schematic diagram of an electronic device provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical scheme and advantages of the embodiments of the present disclosure clearer, the technical scheme in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the present disclosure for protection, but merely represents the selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present disclosure.

[0046] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0047] The term "and / or" herein only describes an association relationship, indicating that three relationships may exist. For example, A and / or B may represent the following three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C may represent including any one or more elements selected from the set consisting of A, B, and C.

[0048] Convolution is a mathematical method of integral transformation, which has been widely used in many fields, such as image processing. Convolution is a mathematical operator that generates a third function through two functions f and g, which represents the area of ​​the overlapping part of the functions f and g after flipping and translation. Convolution can also be applied to some mathematical calculations. For example, the convolution theorem points out that the Fourier transform of the function convolution is the product of the Fourier transform of the function. That is, the convolution in one domain is equivalent to the product in another domain. For example, the convolution in the time domain corresponds to the product in the frequency domain. Then, the convolution principle can be combined with the image processing method to improve the accuracy and efficiency of the processing.

[0049] like Figure 1 As shown, Figure 1 It is a schematic diagram of the data reading process in the prior art. It is found through research that when convolution is applied to the field of image processing, the processing object of convolution is generally a two-dimensional plane image. Figure 1 For the two-dimensional data shown, since a large amount of data cannot be read all at once, it can only be read piece by piece.

[0050] For example, Figure 1 Take the convolution with a kernel size of 3x3 and stride=1 as an example. When the 9 data in the first data block are read and the second data is loaded, a03, a13, and a23 need to be newly loaded, and the 6 data a01, a11, a21, a02, a12, and a22 in the middle of the first data block are reused, and the second data block is processed based on the 9 data. When loading the third data, a04, a14, and a24 need to be newly loaded, and the 6 data a02, a12, a22, a03, a13, and a23 in the middle of the second data block are reused, and the third data block is processed based on the 9 data. And so on, each time the next data is loaded, 3 new data need to be loaded. This results in a huge amount of data reading and data processing load.

[0051] Based on the above research, the present disclosure provides a data processing device, which improves the data reuse rate, reduces the amount and number of data reads, reduces the throughput rate during data reading, reduces bandwidth pressure, and improves data processing efficiency by adjusting the processing order of data blocks.

[0052] The defects existing in the above solutions are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above problems and the solutions proposed by the present disclosure for the above problems below should be the contributions made by the inventor to the present disclosure during the disclosure process.

[0053] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0054] The data processing device provided in the embodiment of the present disclosure can be applied to electronic devices; the electronic devices include, for example, terminal devices, servers or other processing devices, etc. Among them, the terminal device can be a user equipment (User Equipment, UE), a mobile device, a user terminal, a terminal, a cellular phone, a cordless phone, a personal digital assistant (Personal Digital Assistant, PDA), a handheld device, a computing device, a vehicle-mounted device, a wearable device, etc. The electronic device can use the data processing device provided in the embodiment of the present disclosure to process data. In addition, the data processing device provided in the embodiment of the present disclosure can also be deployed in a data processing chip, such as an artificial intelligence (Artificial Intelligence, AI) chip, a graphics processing unit (Graphics Processing Unit, GPU), a central processing unit (Central Processing Unit, CPU), etc.

[0055] The data to be processed in the embodiments of the present disclosure include, for example: an image, or a feature map obtained by extracting features from an image, or partial data in a feature map, or data after standardization, binarization, or normalization of the feature map.

[0056] To facilitate understanding of this embodiment, a data processing device disclosed in the embodiment of the present disclosure is first introduced in detail.

[0057] See also Figure 2 FIG. 2 is a schematic diagram of the structure of a data processing device provided in an embodiment of the present disclosure, wherein the data processing device includes: a control unit 210 and a register 220, wherein:

[0058] The control unit 210 is configured to determine, in response to the arrival of the current data processing cycle, the first data block corresponding to the current data processing cycle according to a preset data block processing sequence; and

[0059] Reading a first data element corresponding to a newly added processing position in the first data block from a preset storage space, and storing the first data element in the register 220; and

[0060] A second data element corresponding to a position overlapping with the first data block in a data block processed in a historical data processing cycle is read from the register 220 .

[0061] Among them, the control unit 210 can determine the processing order of the data blocks, and control the movement of the convolution kernel based on the processing order to read the data in the corresponding data blocks.

[0062] The control unit 210 is used to control the processing order of the data blocks. The register 220 is used to store the data elements corresponding to each data processing cycle read by the control unit 210 from the storage space 250. Specifically, after the control unit 210 reads the corresponding data elements and stores them in the register 220, the calculation unit calls the data in the register 220 to complete the calculation process.

[0063] In one possible implementation, the data block corresponding to each data processing cycle in multiple data processing cycles and the first data block corresponding to the current data processing cycle in multiple data processing cycles can be determined according to a preset data block processing order and data reuse relationship information determined based on the data block processing order; in response to the arrival of any data processing cycle and the arrival of the current data processing cycle, the first data element corresponding to any data processing cycle and the first data element corresponding to the newly added processing position in the first data block are read from the preset storage space and stored in the register 220.

[0064] Among them, the data multiplexing relationship information is specifically used to indicate that when the current data processing cycle is an odd data processing cycle, the second data element in the current data processing cycle includes: part of the data elements in the previous data processing cycle; when the current data processing cycle is an even data processing cycle, the second data element in the current data processing cycle includes: part of the data elements in the previous even data processing cycle and the previous odd data processing cycle.

[0065] In the disclosed embodiment, the data block processing order is determined by the control unit 210, including the processing information of the convolution kernel moving direction, moving step, etc. Correspondingly, a data processing cycle means that the control unit 210 determines the data block corresponding to each operation, reads the target data corresponding to each data block, and stores the read data in the register 220 in the form of a data block, so that the calculation unit can call the data from the register 220 to calculate the corresponding processing result. Due to the large amount of data, it is necessary to perform the data processing operation multiple times, so there are multiple data processing cycles.

[0066] In the disclosed embodiment, the data block refers to multiple data corresponding to a convolution kernel during the data reading process, that is, when a convolution operation is performed on the target data. The data is in the form of M×N, such as 3×3, 5×5, etc., and the data result corresponding to each data block is obtained by performing operations on each data block.

[0067] For example, taking the image processing process as an example, a digital image is a two-dimensional discrete signal, and the convolution operation on a digital image is: using the convolution kernel (or convolution template) to move on the image, multiplying the grayscale value of the pixel on the image point with the corresponding value on the convolution kernel, and then adding all the multiplied values ​​as the grayscale value of the pixel on the image corresponding to the middle pixel of the convolution kernel, and finally moving all the images to obtain the corresponding processing result.

[0068] See also Figure 3 , Figure 3 A schematic diagram of a data reading process provided by an embodiment of the present disclosure.

[0069] In the disclosed embodiment, the data block includes: a first data element that needs to be read from a preset storage space in the current convolution operation, and a second data element that reuses a data element of the data block corresponding to a historical data processing cycle.

[0070] Among them, the first data element is the data for the first execution of the operation called from the storage space, whose position in this convolution operation does not overlap with the data in the historical data block, and the second data element is the data included in the data block that has completed data processing and needs to be read again in the data block.

[0071] For example, Figure 3 Taking the second data block shown in as an example, the first data elements include a03, a13, and a23, and the second data elements include a01, a11, a21, a02, a12, and a22.

[0072] In the embodiment of the present disclosure, the data reuse relationship information is used to indicate that each data processing cycle other than the first data processing cycle can reuse data elements of at least one historical data processing cycle of the data processing cycle.

[0073] See also Figure 4a , 4b , Figure 4a One of the schematic diagrams of another data reading process provided by the embodiment of the present disclosure; Figure 4b The second schematic diagram of another data reading process provided by the embodiment of the present disclosure.

[0074] In the embodiment of the present disclosure, when the current data processing cycle arrives, the first data block corresponding to the current data processing cycle may be determined according to a preset data block processing sequence:

[0075] In response to the arrival of the current data processing cycle, the data reading window is controlled to move in a data matrix formed by the data to be processed in an arcuate route according to a preset step length, corresponding to the current data processing cycle; and the first data block corresponding to the data reading window after the movement is determined; wherein the destination position of each movement corresponds to an inflection point of the arcuate route.

[0076] The starting moving direction of the data reading window includes: the direction of the columns of the data matrix, or the direction of the rows of the data matrix.

[0077] Exemplarily, the preset step size can be any number such as 1, 2, etc., which is not limited here. When in the first data processing cycle, the data reading window can be located at the vertex, edge or any position in the data matrix, that is, any position in the data matrix can be used as the starting point to start data reading. In response to the completion of a data reading, the data reading window changes the reading path or direction, that is, the destination position of each movement corresponds to an inflection point of the arcuate route.

[0078] In one embodiment, the data reading window moves once according to a preset step length in each data processing cycle, and in the arcuate route of the movement, the direction of each movement is different from that of the previous movement (for example, the directions of two adjacent movements are perpendicular), and the destination position of each movement is an inflection point of the arcuate route. In addition, the size of the data reading window and the size of the step length can be set according to actual needs. The appropriate data reading window size and step length can enable the data reading window to reuse the previous data in multiple movements. The data processing device provided by this embodiment can improve the data reuse rate, reduce the amount and number of data reads, and improve the efficiency of data processing.

[0079] Specifically, in response to the arrival of the current data processing cycle, the data reading window is already at the last first data block of the current arcuate route, and the data matrix has not yet been read, determining the data blocks that have not been processed in the data matrix in the starting moving direction of each arcuate route of the data reading window;

[0080] The position of the unprocessed data block is used as the data block reading position corresponding to the data reading window in the current data processing cycle, and in the subsequent data processing cycle, the data block reading position is used as the starting point of the new arch route, and movement and data reading are performed according to the starting moving direction of the arch route.

[0081] For example, Figure 4a As shown in FIG4b, the arcuate route formed by the movement of the data block can be a horizontal route relative to the data matrix, or a vertical route relative to the data matrix.

[0082] In one possible implementation, the control unit 210 may control the data reading window to read data in a reciprocating, i.e., arcuate, manner, with each data reading corresponding to an inflection point of the arcuate route. Specifically, the control unit 210 may control the data reading window to read data in a reciprocating, i.e., arcuate, manner. Figure 4a Or read the data according to the graph shown in 4b.

[0083] In a possible implementation, the control unit 210 may control the data reading window to move in the longitudinal direction, and may also control the data reading window to move in the transverse direction. The above two methods are implemented in a similar manner and can achieve the same technical effect, which will not be described in detail herein.

[0084] In a possible implementation, after completing the data reading of one row or column, the data reading process of another row or column can be started, and the data reading direction can be the same as or opposite to the data reading direction of the row or column, which is not limited here.

[0085] In the embodiment of the present disclosure, for ease of understanding, it can be considered that there is a data frame, and the data frame can be moved up, down, left, and right, and the data included in the corresponding position of each movement is a data block.

[0086] Exemplarily, the data size corresponding to the data frame is determined to be A rows and B columns, and for a data array including M rows and N columns of data elements, data is read according to the following method:

[0087] Starting from the initial first data block containing data elements of row A and column B, the corresponding data elements are added to the next data block each time the data block is moved, and the data elements in the current data block are retained until the M rows and N columns of data elements are added. Specifically, the data frame is moved along the row or column for the first time to obtain a second data block including elements of added data, and the data elements included in the first data block are retained; the data frame is moved along a direction perpendicular to the moving direction of the first movement to obtain a third data block including added data elements, and the data elements included in the second data block are retained; the data frame is moved along a direction perpendicular to the moving direction of the second movement to obtain a fourth data block, which includes a newly read data element and eight reused data elements.

[0088] For example, Figure 3 Take the data reading process shown as an example. Figure 3The corresponding data reading step length is 1. After the reading process of the 3×3 data elements in the first data block is completed, the control unit 210 controls the data frame to move to the right and stores the 3×3 data elements in the first data block in the cache. At this time, three new data elements a03, a13, and a23 need to be read. In addition, the data elements a01, a11, a21, a02, a12, and a22 that have been read in the first data block are reused. After the reading process of the 3×3 data elements in the second data block is completed, the control unit 210 controls the data frame to move downward. At this time, three new data elements a31, a32, and a33 need to be read. In addition, the data elements a11, a12, a23, a21, a22, and a23 that have been read in the second data block are reused. After the reading process of the 3×3 data elements in data 3 is completed, the control unit 210 controls the data frame to move to the left. At this time, since the data elements a10 and a20 are stored in the cache in advance, only one new data element a30 needs to be read. In addition, the data elements a11, a21, a31, a12, a22, and a32 that have been read in the third data block and the data elements a10 and a20 that have been read in the first data block are reused.

[0089] In this example, in the disclosed embodiment, it can be found that according to the data reading route shown in FIG. 4, the fifth frame needs to load 3 numbers, the sixth frame needs to load 1 number, ... the odd-numbered frame needs to load 3 numbers, and the even-numbered frame needs to load 1 number. In this way, relative to the solution of loading 3 numbers each time, the data throughput can be reduced by about 1 / 3. That is, starting from the third data reading, for odd-numbered data readings, A or B data elements are added each time, and the data elements corresponding to the previous data block are retained; wherein, if the moving direction of the previous data frame is horizontal, A data elements are added; if the moving direction of the previous data frame is vertical, B data elements are added. For even-numbered data readings, 1 data element is added each time and the data corresponding to the previous data frame is retained. In this way, the number of data reads for even-numbered data readings can be reduced, and the data throughput can be reduced by a certain percentage.

[0090] In another possible implementation, when the data reading step length is 2 or other values, the amount of data read can also be reduced to a certain extent, which will not be described in detail here.

[0091] Reference Figure 5 As shown, Figure 5 A schematic diagram of the structure of a data processing device provided in an embodiment of the present disclosure.

[0092] In one possible implementation, Figure 5 As shown, the data processing device further includes: a memory access circuit 230;

[0093] The control unit 210, in response to the arrival of the current data processing cycle, reads the first data element corresponding to the newly added processing position in the first data block from the preset storage space 250 and stores it in the register 220, is used to: generate a first read instruction for reading the corresponding first data element in the current data processing cycle; in response to the arrival of the current data processing cycle, send the first read instruction corresponding to the current data processing cycle to the memory access circuit 230;

[0094] The memory access circuit 230 is used to read a first data element corresponding to the first read instruction from the preset storage space 250 in response to receiving a first read instruction sent by the control unit 210, and store the first data element in the register 220.

[0095] In the embodiment of the present disclosure, for a data processing cycle, when the control unit 210 controls to read the first data element corresponding to the data processing cycle from the preset storage space 250 and store it in the register 220, the control unit 210 generates a first read instruction for the data processing cycle to read the first data element, and after the data processing cycle needs to be ended, the first read instruction is sent to the memory access circuit 230. After the memory access circuit 230 receives the first read instruction sent by the control unit 210, it reads the first data element corresponding to the first read instruction from the preset storage space 250, and stores the first data element in the register 220, so that the subsequent calculation unit calls the corresponding data element to complete the calculation process.

[0096] In a possible implementation, when generating a first read instruction for reading a first data element corresponding to a current data processing cycle, the control unit 210 is specifically configured to:

[0097] Determine identification information of a first data element corresponding to each data processing cycle; the identification information is used to characterize a position of the first data element in the data to be processed; the data to be processed includes the data block;

[0098] Determine address information of the first data element based on the starting address, address width, and identification information of the data to be processed;

[0099] Based on the address information of the first data element, a first data read instruction corresponding to the first data element is generated.

[0100] In the embodiment of the present disclosure, the data elements corresponding to each data processing can be determined, and based on the determined data elements, including the first data element and the second data element, and the address information of the second data element in the register 220 and the address information of the first data element in the storage space 250, a second data read instruction is generated.

[0101] For example, Figure 3 Taking the data array shown as an example, the corresponding data block in the first data processing cycle is the first data block, the data uses a00 as the starting address, and the corresponding size of the data block is 3×3, so the starting address of the data to be processed is determined to be a00, and the address bit width is 3×3, so the address information of the first data element is determined to be a00, a01, a02, a10, a11, a12, a20, a21, a22, and based on the address information of the first data element, a first data read instruction corresponding to the first data element can be generated, that is, a read instruction for data elements a00, a01, a02, a10, a11, a12, a20, a21, a22.

[0102] In a possible implementation, the data processing device further includes: further includes: a computing unit;

[0103] The control unit 210 is further configured to generate second data read instructions corresponding to each data processing cycle respectively; in response to the first data element corresponding to the newly added processing position in the first data block being stored in the register 220, send the second data read instruction corresponding to the current data processing cycle to the computing unit;

[0104] The computing unit is configured to, in response to receiving a second data read instruction sent by the control unit 210, read a first data element and a second data element of the data block corresponding to the current data processing cycle from the register 220, and perform preset processing based on the first data element and the second data element to obtain result data of the data block corresponding to the data processing cycle.

[0105] In the embodiment of the present disclosure, when the control unit 210 stores the second data corresponding to each data processing cycle in the register 220 and generates second data reading instructions corresponding to each data processing cycle, the computing unit receives the second data reading instruction corresponding to the current data processing cycle sent by the control unit 210, and completes the corresponding convolution operation based on the second data reading instruction and the second data called from the register 220 and the first data element read from the preset storage space 250 to obtain the result data of the data block corresponding to the data processing cycle.

[0106] In another possible implementation, the storage space 250 may be composed of multiple forms, such as a memory, a hard disk, a USB flash drive, etc., which are not limited in the present disclosure, and the storage space 250 is used for data input. The storage space 250 may also include a shared memory and an external storage, the shared memory may correspond to data with medium bandwidth and medium capacity, and the external storage may correspond to data with low bandwidth and high capacity, etc., which will not be described in detail here.

[0107] In response to the arrival of the current data processing cycle, the disclosed embodiment determines the first data block corresponding to the current data processing cycle among multiple data processing cycles according to the preset data block processing order, reads the first data element corresponding to the newly added processing position in the first data block from the preset storage space and stores it in the register, and reads the second data element corresponding to the position overlapping with the first data block in the data block processed in the historical data processing cycle from the register. By adjusting the processing order of the data blocks, the data reuse rate is improved, the number and number of data reads are reduced, the throughput rate in the data reading process is reduced, the bandwidth pressure is reduced, and the efficiency of data processing is improved.

[0108] Based on the same inventive concept, a data reading method corresponding to the data processing device is also provided in the embodiment of the present disclosure. Since the principle of solving the problem by the method in the embodiment of the present disclosure is similar to that of the above-mentioned data processing device in the embodiment of the present disclosure, the implementation of the method can refer to the implementation of the device, and the repeated parts will not be repeated.

[0109] The execution subject of the data reading method provided in the embodiment of the present disclosure is generally an electronic device with certain computing power, and the electronic device includes, for example: a terminal device or a server or other processing device. The electronic device can be a processor or a processing chip, etc. In one example, the electronic device can be a central processing unit (CPU, Central Processing Unit), a graphics processing unit (GPU, Graphics Processing Unit), an artificial intelligence (AI, Artificial Intelligence) processor or other general-purpose processors. In some possible implementations, the data reading method can be implemented by a processor calling a computer-readable instruction stored in a memory.

[0110] The data reading method provided by the embodiment of the present disclosure is described below by taking the execution subject as a terminal device as an example.

[0111] See also Figure 6 FIG. 6 is a flow chart of a data reading method provided by an embodiment of the present disclosure, wherein the method includes steps S601 to S602, wherein:

[0112] S601: In response to the arrival of the current data processing cycle, determine, according to a preset data block processing order, a first data block corresponding to the current data processing cycle among multiple data processing cycles;

[0113] S602: Read the first data element corresponding to the newly added processing position in the first data block from the preset storage space and store it in the register; and read the second data element corresponding to the position overlapping with the first data block in the data block processed in the historical data processing cycle from the register.

[0114] In an optional implementation, in response to the current data processing cycle arriving, determining the first data block corresponding to the current data processing cycle according to a preset data block processing order includes:

[0115] In response to the arrival of the current data processing cycle, the data reading window is controlled to move in a data matrix formed by the to-be-processed data in an arcuate route according to a preset step length, corresponding to the current data processing cycle; and a first data block corresponding to the data reading window after the movement is determined;

[0116] The destination position of each movement corresponds to an inflection point of the arcuate route.

[0117] In an optional implementation, the starting moving direction of the data reading window includes: the direction of the columns of the data matrix, or the direction of the rows of the data matrix.

[0118] In an optional implementation, in response to the current data processing cycle arriving, the data reading window is already at the last first data block of the current arcuate route, and the data matrix has not yet been read, determining the data blocks in the data matrix that have not been processed in the starting moving direction of each arcuate route of the data reading window;

[0119] The position of the unprocessed data block is used as the data block reading position corresponding to the data reading window in the current data processing cycle, and in the subsequent data processing cycle, the data block reading position is used as the starting point of the new arch route, and movement and data reading are performed according to the starting moving direction of the arch route.

[0120] In an optional implementation, the method further includes:

[0121] When reading the first data element corresponding to the newly added processing position in the first data block from the preset storage space and storing it in the register, it is used to: generate a first read instruction for reading the corresponding first data element in the current data processing cycle; in response to the arrival of the current data processing cycle, send the first read instruction corresponding to the current data processing cycle to the memory access circuit;

[0122] In response to receiving a first read instruction sent by the control unit, a first data element corresponding to the first read instruction is read from the preset storage space, and the first data element is stored in the register.

[0123] In an optional implementation, the method further includes:

[0124] generating a second data read instruction corresponding to a current data processing cycle; in response to a first data element corresponding to a newly added processing position in the first data block being stored in the register, sending the second data read instruction corresponding to the current data processing cycle to the computing unit;

[0125] In response to receiving a second data read instruction sent by the control unit, a first data element and a second data element of the data block corresponding to the current data processing cycle are read from the register, and preset processing is performed based on the first data element and the second data element to obtain result data of the data block corresponding to the data processing cycle.

[0126] In an optional implementation manner, generating a first read instruction for reading a first data element corresponding to the current data processing cycle includes:

[0127] Determine identification information of a first data element corresponding to the current data processing cycle; the identification information is used to characterize a position of the first data element in the data to be processed; the data to be processed includes the data block;

[0128] Determine address information of the first data element based on the starting address, address width, and identification information of the data to be processed;

[0129] Based on the address information of the first data element, a first data read instruction corresponding to the first data element is generated.

[0130] For the description of the processing flow and the interaction flow in the method, reference may be made to the relevant description in the above-mentioned device embodiment, which will not be described in detail here.

[0131] Those skilled in the art will appreciate that, in the above method of specific implementation, the order in which the steps are written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of the steps should be determined by their functions and possible internal logic.

[0132] Based on the same technical concept, the embodiment of the present disclosure also provides a data processing chip, including any of the data processing devices described above.

[0133] An embodiment of the present disclosure further provides a data processing chip, comprising a data processing device as described in any embodiment of the present disclosure.

[0134] The present disclosure also provides a board, which includes a packaging structure encapsulating at least one of the above chips. Figure 7 , which provides an exemplary board card, the board card includes the above chip, and may also include other components, including but not limited to: a storage device 701 and an interface device 704.

[0135] The memory device is connected to the chip in the chip package structure via a bus for storing data. The memory device may include multiple groups of memory cells 702, such as DDR SDRAM (Double Data Rate SDRAM, double data rate synchronous dynamic random access memory), etc. Each group of memory cells is connected to the chip via a bus.

[0136] The interface device is electrically connected to the chip in the chip packaging structure. The interface device is used to realize data transmission between the chip and an external device 705 (e.g., a terminal, a server, a camera, etc.). In one embodiment, the interface device may include a PCIE interface, or a network interface, or other interface, which is not limited by the present disclosure.

[0137] The present disclosure also provides an electronic device, including the data processing device described in any embodiment of the present disclosure, or the data processing chip described in any embodiment of the present disclosure. Figure 8 As shown, it is a schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure, including a processor 801, a memory 802, and a bus 803. Among them, the memory 802 is used to store execution instructions, including a memory 8021 and an external memory 8022; the memory 8021 here is also called an internal memory, which is used to temporarily store the operation data in the processor 801, and the data exchanged with the external memory 8022 such as a hard disk. The processor 801 exchanges data with the external memory 8022 through the memory 8021. When the electronic device is running, the processor 801 communicates with the memory 802 through the bus 803, so that the processor 801 executes the following instructions:

[0138] In response to the current data processing cycle arriving, determining a first data block corresponding to the current data processing cycle among a plurality of data processing cycles according to a preset data block processing sequence;

[0139] The first data element corresponding to the newly added processing position in the first data block is read from the preset storage space and stored in the register; and the second data element corresponding to the overlapping position of the first data block in the data block processed in the historical data processing cycle is read from the register.

[0140] The present disclosure also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the data reading method described in the above method embodiment are executed. The storage medium can be a volatile or non-volatile computer-readable storage medium.

[0141] The computer program product of the data reading method provided in the embodiment of the present disclosure includes a computer-readable storage medium storing program code, and the instructions included in the program code can be used to execute the steps of the data reading method described in the above method embodiment. For details, please refer to the above method embodiment, which will not be repeated here.

[0142] The present disclosure also provides a computer program, which implements any one of the methods of the aforementioned embodiments when executed by a processor. The computer program product can be implemented in hardware, software, or a combination thereof. In an optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK), etc.

[0143] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the system and device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. In the several embodiments provided in the present disclosure, it should be understood that the disclosed system, device and method can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the device or unit can be electrical, mechanical or other forms.

[0144] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0145] In addition, each functional unit in each embodiment of the present disclosure may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0146] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present disclosure, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling an electronic device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0147] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present disclosure, which are used to illustrate the technical solutions of the present disclosure, rather than to limit them. The protection scope of the present disclosure is not limited thereto. Although the present disclosure is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed in the present disclosure, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present disclosure, and should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A data processing device, characterized in that: include: A control unit and a register; The control unit is used to control the data reading window to move in a data matrix formed by the data to be processed in an arcuate route according to a preset step length in response to the arrival of the current data processing cycle, corresponding to the current data processing cycle; and determining a first data block corresponding to the data reading window after the movement; wherein the destination position of each movement corresponds to an inflection point of the arcuate route; and Reading a first data element corresponding to a newly added processing position in the first data block from a preset storage space, and storing the first data element in the register; and The second data element corresponding to the position overlapping with the first data block in the data block processed by the historical data processing cycle is read from the register; the first data element is the data for the first execution of the operation called from the storage space, whose position does not overlap with the data in the historical data block in this convolution operation; the second data element is the data included in the data block for which data processing has been completed and which needs to be read again in the data block.

2. The data processing device according to claim 1, characterized in that: The starting moving direction of the data reading window includes: the direction of the columns of the data matrix, or the direction of the rows of the data matrix.

3. The data processing device according to claim 1 or 2, characterized in that: In response to the arrival of the current data processing cycle, the data reading window is already at the last first data block of the current arcuate route, and the data matrix has not yet been read, determining the data blocks in the data matrix that have not been processed in the starting moving direction of each arcuate route of the data reading window; The position of the unprocessed data block is used as the data block reading position corresponding to the data reading window in the current data processing cycle, and in the subsequent data processing cycle, the data block reading position is used as the starting point of the new arch route, and movement and data reading are performed according to the starting moving direction of the arch route.

4. The data processing device according to claim 1, characterized in that: Also includes: Memory access circuit; The control unit, when reading the first data element corresponding to the newly added processing position in the first data block from the preset storage space and storing it in the register, is used to: generate a first read instruction for reading the corresponding first data element in the current data processing cycle; In response to the arrival of a current data processing cycle, sending a first read instruction corresponding to the current data processing cycle to the memory access circuit; The memory access circuit is used for reading a first data element corresponding to the first read instruction from the preset storage space in response to receiving a first read instruction sent by the control unit, and storing the first data element in the register.

5. The data processing device according to claim 1, characterized in that: Also includes: Computational unit; The control unit is further configured to generate a second data reading instruction corresponding to the current data processing cycle; In response to the first data element corresponding to the newly added processing position in the first data block being stored in the register, sending a second data read instruction corresponding to the current data processing cycle to the computing unit; The computing unit is configured to, in response to receiving a second data read instruction sent by the control unit, read a first data element and a second data element of the data block corresponding to the current data processing cycle from the register, and perform preset processing based on the first data element and the second data element to obtain result data of the data block corresponding to the data processing cycle.

6. The data processing device according to claim 4, characterized in that: The control unit, when generating a first read instruction for reading a first data element corresponding to the first data element in a current data processing cycle, is configured to: Determine identification information of a first data element corresponding to the current data processing cycle; the identification information is used to represent a position of the first data element in the data to be processed; Determine address information of the first data element based on the starting address, address width, and identification information of the data to be processed; Based on the address information of the first data element, a first data read instruction corresponding to the first data element is generated.

7. A data processing method, characterized in that: include: In response to the arrival of the current data processing cycle, the data reading window is controlled to move in a data matrix formed by the to-be-processed data in an arcuate route according to a preset step length, corresponding to the current data processing cycle; and determining a first data block corresponding to the data reading window after the movement; wherein the destination position of each movement corresponds to an inflection point of the arcuate route; The first data element corresponding to the newly added processing position in the first data block is read from the preset storage space and stored in the register; and the second data element corresponding to the position overlapping with the first data block in the data block processed by the historical data processing cycle is read from the register; the first data element is the data for the first execution of the operation called from the storage space, whose position in this convolution operation does not overlap with the data in the historical data block; the second data element is the data included in the data block for which data processing has been completed and which needs to be read again in the data block.

8. A data processing chip, characterized in that: The method comprises a data processing device as claimed in any one of claims 1 to 6.

9. A board, characterized in that: A package structure comprising at least one chip as claimed in claim 8 is provided.

10. An electronic device, characterized in that: include: A data processing device as claimed in any one of claims 1 to 6, or comprising a data processing chip as claimed in claim 8, or comprising a board as claimed in claim 9.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, which, when executed by a processor, executes the steps of the data processing method as claimed in claim 7.

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