A multi-input single-output power supply system and its operating method

Abstract

A multiple-input single-output (MIMO) power supply system and its operating method are disclosed. The MIMO power supply system has an output node that provides an output voltage and includes first and second integrated circuit converters. The first integrated circuit converter has a first pin, a second pin, and a first power unit. The first pin receives a first input voltage, the second pin provides the output voltage, and the first power unit is coupled between the first and second pins to provide power to the output node. The second integrated circuit converter has a first pin, a second pin, a third pin, and a second power unit. The first pin receives a second input voltage, the second pin provides the output voltage, the second power unit is coupled between the first and second pins of the second integrated circuit converter, and the third pin receives a phase shielding control signal to determine whether the second power unit stops providing power to the output node.

Description

Technical Field

[0001] This invention relates primarily to an electronic circuit, and more particularly, but not exclusively, to a multi-input single-output power supply system and its operating method. Background Technology

[0002] Peripheral Component Interconnect Express (PCIe) is an interface used to connect and power high-speed devices (such as graphics cards). A single PCIe slot can only provide a maximum of 75W of power to a high-speed device. When the graphics card's power requirement exceeds 75W, an additional auxiliary power supply is often needed. For example... Figure 1 As shown, the graphics card is powered by a 75W PCIe power supply 10A and a 325W auxiliary power supply 10B. Figure 1 This is a circuit diagram of the redundant power supply architecture 100. (Example) Figure 1 As shown, the redundant power architecture 100 includes a PCIe power supply 10A, an auxiliary power supply 10B, an OR processing circuit 11, and a multiphase switching converter 12. The multiphase switching converter 12 comprises N parallel-connected DC-DC switching converters that collectively drive the same load. The OR processing circuit 11 selects one of two available power supplies, 10A and 10B, to provide the input voltage Vin to the multiphase switching converter 12. Because only one power supply (10A or 10B) can be used at a time in the OR processing circuit 11 solution, the power limit of the redundant power architecture 100 is set and locked to the maximum wattage of the auxiliary power supply 10B, for example, 325W. This power limit not only restricts the performance of the load but also fails to flexibly match the current processing capability of a single graphics card.

[0003] Therefore, finding a better way to utilize the power from two or more power supplies to unlock their power limits and allow graphics card enthusiasts to make the most of every bit of performance resources in their purchased graphics card drivers has become a new challenge. Summary of the Invention

[0004] To address one or more problems in the prior art, the present invention aims to provide a multi-input single-output power supply system and its operating method, which has superior performance.

[0005] In one aspect of the invention, a multiple-input single-output (MIMO) power supply system is provided, the MIMO having an output node providing an output voltage, the power supply system comprising: a first integrated circuit converter having a first pin, a second pin, and a first power unit, wherein the first pin receives a first input voltage, the second pin outputs the output voltage, and the first power unit is coupled between the first pin and the second pin to provide power to the output node; and a second integrated circuit converter having a first pin, a second pin, a third pin, and a second power unit, wherein the first pin receives a second input voltage, the second pin outputs the output voltage, the second power unit is coupled between the first pin and the second pin of the second integrated circuit converter, and the third pin receives a phase shielding control signal to determine whether the second power unit stops providing power to the output node.

[0006] In another aspect of the invention, a multiple-input single-output (MIMO) power supply system is provided, the MIMO having multiple integrated circuit converters forming a daisy-chain architecture, the multiple integrated circuit converters having a common output node to provide an output voltage, the MIMO comprising: a first integrated circuit converter among the multiple integrated circuit converters, having a first pin, a second pin, and a first power unit, wherein the first pin receives a first input voltage, the second pin is coupled to the output node to provide an output voltage, and the first power unit is coupled between the first pin and the second pin to provide power to the output node; and a second integrated circuit converter among the multiple integrated circuit converters. The device comprises a first pin, a second pin, a second power unit, and a third pin, wherein the first pin receives a second input voltage, the second pin is coupled to an output node, the second power unit is coupled between the first and second pins of the second integrated circuit converter, and the third pin receives a phase shielding control signal to determine whether to stop the second power unit from providing power to the output node; and an auxiliary DC-DC converter having an input terminal and an output terminal, wherein the input terminal receives a first input voltage on the first pin of the first integrated circuit, and the output terminal of the auxiliary DC-DC converter provides a second input voltage to the first pin of the second integrated circuit when the connection between the first pin of the second integrated circuit and an external input power supply is removed.

[0007] In another aspect of the invention, a method of operating a multi-input single-output power supply system is provided, the power supply system having an output node that provides an output voltage, the method comprising: receiving a first input voltage at a first pin of a first integrated circuit converter; receiving a second input voltage from an external power source at a first pin of a second integrated circuit converter; connecting a second pin of the first integrated circuit converter to the output node; connecting a second pin of the second integrated circuit converter to another second pin of the second integrated circuit converter; configuring a first power unit of the first integrated circuit converter to provide power to the output node, wherein the first power unit is coupled between the first pin and the second pin of the first integrated circuit converter; using an auxiliary DC-DC converter to convert the first input voltage into a DC backup voltage; and when the connection between the first pin of the second integrated circuit converter and the external power source is disconnected, providing the DC backup voltage output from the auxiliary DC power source to the first pin of the second integrated circuit converter, and preventing the second power unit coupled between the first pin and the second pin of the second integrated circuit converter from providing power to the output node.

[0008] According to embodiments of the present invention, a multi-input single-output power supply system allows the utilization of all power provided by multiple input power sources to meet a wider range of power demands. Simultaneously, when the system needs to enter a low-power state, one or more slave phase converters in the multi-phase converter stop providing output power to the output, while maintaining the continuous normal operation of the logic circuits in each phase converter to facilitate the switching between low-power and normal-power states. Attached Figure Description

[0009] To better understand the present invention, it will be described in detail with reference to the following drawings:

[0010] Figure 1 This is a circuit diagram of the existing redundant power supply architecture 100;

[0011] Figure 2 This is a circuit diagram of a multi-input single-output power supply system 200 according to an embodiment of the present invention;

[0012] Figure 3 This is a circuit diagram of a multi-input single-output power supply system 300 according to another embodiment of the present invention;

[0013] Figure 4 This is a circuit diagram of a multi-input single-output power supply system 400 in a low-power state according to an embodiment of the present invention;

[0014] Figure 5 This is a circuit diagram of a main phase switching converter 401-1a in a multiphase converter according to an embodiment of the present invention.

[0015] Figure 6This is a circuit diagram of a slave phase switch converter 401-3b in a multiphase converter according to an embodiment of the present invention.

[0016] Figure 7 According to an embodiment of the present invention Figure 4 The waveform diagram of the startup process of the power supply system 400 is shown.

[0017] Figure 8 This is a circuit diagram of a multi-input single-output power supply system 500 according to another embodiment of the present invention;

[0018] Figure 9 This is a flowchart of a method 600 for operating a multi-input single-output power supply system according to an embodiment of the present invention. Detailed Implementation

[0019] The following will describe in detail specific embodiments of the isolated resonant converter and control method of the present invention. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to implement the invention. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the invention.

[0020] Throughout this specification, references to “an embodiment,” “an example,” or “an example” mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the invention. Therefore, the phrases “in an embodiment,” “in an embodiment,” “an example,” or “an example” appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. Moreover, those skilled in the art will understand that the accompanying drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It should be understood that when an element is referred to as “connected to” or “coupled to” another element, it can be a direct connection or coupling to the other element or there may be intermediate elements. Conversely, when an element is referred to as “directly connected to” or “directly coupled to” another element, there are no intermediate elements. The same reference numerals indicate the same elements. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.

[0021] Figure 2 This is a circuit diagram of a multi-input single-output power supply system 200 according to an embodiment of the present invention. Figure 2 In the illustrated embodiment, the power system 200 includes multiple integrated circuit converters coupled in parallel. For illustrative purposes, Figure 2 The power system 200 includes four integrated circuit converters 201-1 to 201-4 to form a four-phase switching converter. It is understood that the power system 200 may also include integrated circuit converters of any other number to form a multiphase switching converter with any other number of phases.

[0022] exist Figure 2 In the illustrated embodiment, the power system 200 includes multiple integrated control circuits 202 (i.e., 202-1 to 202-4) and multiple power units 204 coupled in parallel. The multiple control circuits 202 are configured in a daisy-chain architecture. Each of the multiple control circuits 202 provides a switching control signal PWM for its corresponding power unit 204.

[0023] In one embodiment, each of the plurality of integrated circuit converters 201 is a single integrated circuit, a single chip. Each of the plurality of integrated circuit converters 201 has multiple pins, including a pin VIN for receiving input voltage and a pin VOUT connected to a load 210. The load 210 for consuming power is connected to the VOU pin of the multiple input single output power system 200, and the plurality of VOUT pins are coupled together to form a single output node.

[0024] exist Figure 2 In the illustrated embodiment, two integrated circuit converters 201-1 and 201-2 are connected in parallel to form a first group of integrated circuit converters. The two VIN pins of the first group of integrated circuit converters are connected together to the first input power supply INPUT 1 to receive the first input voltage VINA. Two other integrated circuit converters 201-3 and 201-4 are connected in parallel to form a second group of integrated circuit converters. The VIN pins of the second group of integrated circuit converters are connected together to the second input power supply INPUT 2 to receive the second input voltage VINB. The VOUT pins of all integrated circuit converters 201-1 to 201-4 are connected together, providing the output voltage VO of multiple integrated circuit converters as a single output node. Figure 2 In the embodiment shown, the multiple-input single-output power supply system 200 converts the first input voltage VINA and the second input voltage VINB into an output voltage VO to supply the load 210.

[0025] Figure 2 The power system 200 shown allows the user to fully utilize the power from the first input power supply INPUT1 and the second input power supply INPUT2. This is for illustrative purposes only. Figure 2In the illustrated embodiment, power system 200 is a dual-input single-output (DIO) power system. It is understood that power system 200 can be any multi-input single-output (MIMO) power system. MIMO power system 200 can have more input power sources to unlock power limitations. Therefore, power system 200 has an enhanced ability to provide power. Power system 200 can be configured to meet any power demand, for example, even higher than the combined power of 75W and 325W.

[0026] exist Figure 2 In the illustrated embodiment, each of the plurality of power units 204 has the same circuit structure. In one embodiment, each power unit 204 includes a power switch (e.g., a high-side power switch HS) and a drive circuit (e.g., 203) that drives the power switch. The drive circuit controllably controls the power switch to turn on and off. The power switch has a first terminal coupled to the VIN pin and a second terminal coupled to the VOUT pin via an energy storage element. In one embodiment, each power unit may be a synchronous buck converter BUCK. The buck converter BUCK includes a high-side power switch HS, a low-side power switch LS, an inductor L, and an output capacitor C. When the power unit is enabled, the high-side power switch HS is connected to the input power supply of the VIN pin and connected to the load 210 of the VOUT pin via the inductor L.

[0027] exist Figure 2 In the illustrated embodiment, each integrated circuit converter (i.e., each of 201-1 to 204-4) further includes a CTRL pin for enabling or disabling the integrated circuit converter. In one embodiment, the power system 200 further includes an input decision circuit 21. The input decision circuit 21 has an output coupled to the CTRL pin of the integrated circuit converter. The input decision circuit 21 enables or disables the integrated circuit converter by sending an enable control signal to the CTRL pin of the integrated circuit converter.

[0028] In one embodiment, when the enable control signal on the CTRL pin of an integrated circuit converter is valid, the integrated circuit converter is enabled and supplies power from either the first input power supply INPUT 1 or the second input power supply INPUT 2 to the load 210. When the enable control signal on the CTRL pin of an integrated circuit converter is invalid, the integrated circuit converter is disabled and stops supplying power to the load 210.

[0029] exist Figure 2In the illustrated embodiment, the input decision circuit 21 generates an enable control signal based on the presence of two input power supplies. In one embodiment, the first input power supply INPUT 1 is always inserted and available, while the second input power supply INPUT 2 can be flexibly and selectively inserted or removed. The input decision circuit 21 detects the first input voltage VINA on the input pin VIN of the first group of integrated circuit converters (201-1 and 201-2) and the second input voltage VINB on the input pin VIN of the second group of integrated circuit converters (201-3 and 201-4), generates an enable control signal based on the detection result, and sends the enable control signal to the CTRL pin of each integrated circuit converter.

[0030] exist Figure 2 In the illustrated embodiment, multiple control circuits 202 (i.e., 202-1 to 202-4) are configured in a daisy-chain architecture. Each control circuit has a first terminal, a second terminal, and a third terminal. Accordingly, multiple pins of each integrated circuit converter (i.e., each of 201-1 to 204-4) further include a SET pin connected to the first terminal of the control circuit, a TAKE pin connected to the second terminal of the control circuit, and a PASS pin connected to the third terminal of the control circuit.

[0031] Due to the daisy-chain architecture, the multiple integrated circuit converters 201 in the power system 200 operate in a relay-like manner, achieved through a pass-take loop. The SET pin of each integrated circuit converter is coupled to the SET pins of the remaining integrated circuit converters, sharing a phase control signal. The TAKE pin of each integrated circuit converter is connected to the PASS pin of the preceding integrated circuit converter in the daisy-chain architecture to receive the phase input signal. The PASS pin of each integrated circuit converter is connected to the TAKE pin of the next integrated circuit converter in the daisy-chain architecture to provide the phase output signal. The phase control signal comprises multiple consecutive pulses to continuously trigger multiple power units 204, providing power to the load connected to the common output node. The control circuitry obtains timing information based on the phase input signal and the phase control signal.

[0032] Figure 3 This is a circuit diagram of a multi-input single-output power supply system 300 according to an embodiment of the present invention. Figure 3 In the illustrated embodiment, the power system 300 includes a multiphase switching converter 301 and an input determination circuit 31. The multiphase switching converter 301 is integrated into the same chip.

[0033] The multiphase switching converter 301 includes multiple integrated circuit converters configured in a daisy-chain architecture. Figure 3 The multiple integrated circuit converters 301-1 to 301-4 shown have the same Figure 2 The multiple integrated circuit converters 201-1 to 201-4 shown have the same internal circuit structure.

[0034] In one embodiment, the power system 300 is a multiple-input single-output power system. Figure 3 In the illustrated embodiment, the multiphase switching converter 301 is an integrated circuit with multiple pins. For example... Figure 3 As shown, pins VIN1 and VIN2 are connected together to receive the first input voltage VINA from the first input power supply INPUT 1, and pins VIN3 and VIN4 are connected together to receive the second input voltage VINB from the second input power supply INPUT 2. Pins VOUT1 through VOUT4 are all connected together to provide the combined output voltage VO on a single output node. Pins SET1 through SET4 are used to share the phase control signal in the daisy-chain architecture. Pins PASS1 through PASS3 are connected sequentially to pins TAKE2 through TAKE4, and pin PASS4 is connected to pin TAKE1 to follow the TAKE / PASS loop in the daisy-chain architecture. Pins CTRL1 through CTRL4 are connected together to the output of input decision circuit 31 to receive the enable control signal.

[0035] exist Figure 3 In the illustrated embodiment, the input judgment circuit 31 enables or disables integrated circuit converters 301-1 to 301-4 by sending enable control signals to the CTRL1 to CTRL4 pins of the multiphase switching converter 301. In one embodiment, when the enable control signal on the CTRL1 pin is valid, the corresponding integrated circuit converter 301-1 is enabled, providing power from the input power supply to the load. When the enable control signal on the CTRL1 pin is invalid, the corresponding integrated circuit converter 301-1 is disabled and cannot provide power to the load.

[0036] In one embodiment, when the input voltages of all input power supplies are normal, the input judgment circuit 31 generates a high-level enable control signal, which is valid. When the input voltage of any one of the multiple input power supplies is insufficient, the input judgment circuit generates a low-level enable control signal, which is invalid.

[0037] exist Figure 3 In the illustrated embodiment, power system 300 is a dual-input single-output power system. It is understood that power system 300 could also be a power system with more inputs, for example, having N input power sources INPUT 1 to INPUT N, wherein at least the first input voltage source INPUT 1 is always plugged in and available. The other input voltage sources, such as INPUT 2 to INPUT N, are flexibly and selectively pluggable / pluggable.

[0038] In some cases, when at least one input power source is not plugged in, the load of the power system operates at a low power level. Figure 4 This is a circuit diagram of a multi-input single-output power supply system 400 in a low-power state according to an embodiment of the present invention. Figure 4 Circuit architecture and Figure 2 The circuit structures shown are similar, except that the first input power supply INPUT 1 is plugged in and usable, while the second input power supply INPUT 2 is not plugged in, and the load of the power system 400 operates in a low-power state with reduced power loss. Therefore, the second input power supply INPUT 2 is indicated by a dashed box.

[0039] exist Figure 4 In the embodiment shown, the multiple input single output power supply system 400 includes multiple integrated circuit converters 401-1 to 401-4 connected in parallel and forming a daisy chain architecture, an input judgment circuit 41, an auxiliary DC converter 42, a polarity protection circuit 43, and a phase shielding controller 44.

[0040] In one embodiment, the operation of the integrated circuit converters (401-1 and 401-2) connected to the first input power supply INPUT 1 is similar to... Figure 2 The first set of integrated circuit converters shown are identical, maintaining a power supply state. The power switch switching is controlled by a control circuit to convert the first input voltage VINA into an output voltage VO at the output node, providing output voltage VO and output power to the load. The difference lies in that the power switch switching in the integrated circuit converters (401-3 and 401-4) connected to the unplugged second input power supply INPUT 2 is disabled. The power unit no longer provides output voltage and output power to the load, thus reducing power loss and causing the entire power system 400 to enter a low-power state. Simultaneously, the logic circuits of the disabled integrated circuit converters (401-3 and 401-4) still need to remain operational to maintain their control functions and signal transmission in the TAKE-PASS loop of the daisy-chain architecture. When one or more input power supplies other than the first input power supply INPUT 1 are disconnected from the power system 400, the multi-input single-output power system 400 continues to "operate." "Operation" here is defined as the situation where the output voltage VO is regulated in a controllable manner and the current from the input power supply is delivered to the load in a controllable manner. exist Figure 4 In the illustrated embodiment, integrated circuit converters (401-1 and 401-2) connected only to the first input power supply INPUT 1 deliver power from the input power supply to the load in a controllable manner.

[0041] In one embodiment, the input determination circuit 41 includes a first voltage divider circuit composed of resistors R1 and R2, a first comparator 410, a second voltage divider circuit composed of resistors R3 and R4, a second comparator 411, and an AND gate circuit 412. The first voltage divider circuit is coupled to a first input power supply INPUT 1, providing a first detection voltage representing the first input voltage VINA. The first comparator 410 compares the first detection voltage with a first enable threshold voltage. The second voltage divider circuit is coupled to a second input power supply INPUT 2, providing a second detection voltage representing the second input voltage VINB. The second comparator compares the second detection voltage with a second enable threshold. In one embodiment, the first enable threshold and the second enable threshold are equal. The AND gate circuit 412 generates a high-level enable signal only when the outputs of both the first and second comparators are high, making the enable control signal valid; otherwise, the enable control signal is invalid.

[0042] In one embodiment, the enable control signal is valid when the enable control signal on the CTRL pin is higher than 1.4V, and invalid when the enable signal voltage on the CTRL pin is lower than 1.2V.

[0043] exist Figure 4 In the illustrated embodiment, integrated circuit converters (401-1 and 401-2) are connected in parallel to form a first group of integrated circuit converters. The two VIN pins of the first group of integrated circuit converters are connected together to a first input power supply INPUT 1 to receive a first input voltage VINA. The VIN pins of two other integrated circuit converters (401-3 and 403-4) are connected together to form a second group of integrated circuit converters. The VIN pins of the second group of integrated circuit converters are connected together and coupled to the output of an auxiliary DC-DC converter 42 via a polarity protection circuit 43. Figure 4 As shown, the second input power supply INPUT2 is disconnected and is not connected to the VIN pin of the second integrated circuit converter. Figure 4In the illustrated embodiment, auxiliary DC-DC converter 42 provides a lower DC backup voltage, which is directly used for the VIN pins of the second set of integrated circuit converters (401-3 and 401-4). In one embodiment, auxiliary DC-DC converter 42 includes a buck converter. The VOUT pins of the integrated circuit converters (401-1, 401-2, 401-3, and 401-4) are connected together to provide the output voltage VO. In one embodiment, the second input power supply INPUT 2 is disconnected, the second set of integrated circuit converters is disconnected from the second input power supply INPUT 2, and the second set of integrated circuit converters operates in phase-masked mode, i.e., the logic circuits remain operational but the output voltage VO is not provided. In one embodiment, the first input voltage VINA from the first input power supply INPUT 1 is 12V. Auxiliary DC-DC converter 42 is coupled between the VIN pins of the first set of integrated circuit converters (401-1, 401-2) and the VIN pins of the second set of integrated circuit converters (401-3, 401-4) to convert the first input voltage VINA into a DC backup voltage (e.g., 5V). The 5V DC backup voltage is a very small current output used to power the logic circuits of the second integrated circuit converter when the second integrated circuit converter (401-3, 401-4) is disconnected from the second input power supply INPUT 2.

[0044] It should be noted that the "single output" of the MIMO single-output power supply system 400 refers to the output voltage VO that ultimately provides the total operating power to the load. The 5V backup voltage provided by the auxiliary DC-DC converter 42 is not an output of the MIMO single-output power supply system 400.

[0045] In one embodiment, the auxiliary DC-DC converter 42 can be seamlessly switched to power the second set of integrated circuit converters (401-3, 401-4) via a polarity protection circuit 43. The polarity protection circuit 43 is electrically coupled between the output of the auxiliary DC-DC converter 42 and the VIN pin of the second set of integrated circuit converters. In one embodiment, the polarity protection circuit 43 includes a diode D1. If the second input power supply INPUT 2 is normally powered, the second input voltage VINB on the VIN pin of the second integrated circuit converter is greater than the DC backup voltage provided by the auxiliary DC-DC converter 42, and no current flows through the polarity protection circuit 43. If the second input power supply INPUT 2 is disconnected, i.e., the second input voltage VINB on the VIN pin of the second set of integrated circuit converters is less than the DC backup voltage provided by the auxiliary DC-DC converter 42, the polarity protection circuit 43 provides a path, the diode D1 conducts, and the current return path is blocked.

[0046] exist Figure 4In the illustrated embodiment, each integrated circuit converter has multiple pins. These multiple pins include a phase shield pin PS. In one embodiment, multiple integrated circuit converters 401-1 to 401-4 are used to construct a multiphase switching converter. Integrated circuit converter 401-1 is configured as a master phase switching converter, and each of the remaining integrated circuit converters (401-2 to 401-4) is configured as a slave phase switching converter.

[0047] In one embodiment, to ensure the safe operation of the multiphase switching converter, the phase shielding mode of the main phase switching converter is disabled. That is, the main phase switching converter 401-1 will never enter phase shielding mode under any circumstances. Figure 4 In the embodiment shown, the PS pin of the primary phase converter 401-1 is connected to ground, while the PS pin of the secondary phase converter device 401-2 is floating.

[0048] In one embodiment, each of the integrated circuit converters 401-3 and 401-4 also has a PS pin, on which the signal is the phase shielding control signal VPS. In one embodiment, the phase shielding function of the phase-switching converter can be disabled or enabled via the PS pin. In another embodiment, the phase-switching converter is enabled when the signal on the PS pin is pulled high and disabled when the signal on the PS pin is pulled low.

[0049] exist Figure 4 In the illustrated embodiment, the power system 400 further includes a phase shielding controller 44. The phase shielding controller 44 is used to detect a power reduction trigger. In one embodiment, the phase shielding controller 44 includes information and / or signals indicating that a situation requiring reduced power consumption exists. In one embodiment, the power reduction trigger is associated with the removal of a connection to an external input power source.

[0050] exist Figure 4 In the illustrated embodiment, the phase shielding controller 44 is used to detect whether one or more input power supplies other than the first input power supply INPUT 1 (e.g., the second input power supply INPUT 2) are unavailable.

[0051] exist Figure 4In the illustrated embodiment, the phase shielding controller 44 includes a Zener diode 441 with a clamping voltage VZ and a third voltage divider circuit consisting of resistors RA and RB. The Zener diode 441 has an anode connected to the third voltage divider circuit 442 and a cathode connected to the VIN pin of the second set of integrated circuit converters (401-3 and 401-4). When the second input voltage VINB on the VIN pin of the second set of integrated circuit converters (401-3 and 401-4) is greater than the clamping voltage VZ (e.g., 8V), the Zener diode 441 conducts, and the third voltage divider circuit 442 generates a high-level phase shielding control signal at its output, which is provided to the PS pin. When the second input voltage VINB on the VIN pin of the second set of integrated circuit converters (401-3 and 401-4) is less than the clamping voltage VZ, the Zener diode 441 is blocked, and the phase shielding control signal is pulled low.

[0052] exist Figure 4 In the embodiment shown, when the second input power supply INPUT 2 is disconnected, the phase shielding control signal on the PS pin of the second integrated circuit converter (401-3 and 401-4) is high, the power of the second integrated circuit converter is blocked and removed, and it enters the phase shielding mode.

[0053] Figure 5 This is a circuit diagram of the main phase converter 401-a in a multiphase switching converter according to an embodiment of the present invention. Figure 5 As shown, the main phase switching converter 401-1a is a single integrated circuit chip, including a control circuit 402, a power unit 404, and multiple pins. The VIN pin receives the input voltage, the GND pin is coupled to ground, the VOUT pin is coupled to the load and outputs the output voltage to the load, the SET pin is used to share the phase control signal, the TAKE pin receives the phase input signal, the PASS pin provides the phase output signal, and the CTRL pin receives the enable control signal based on all input power conditions. Furthermore, the PS pin of the main phase converter device is masked.

[0054] exist Figure 5 In the illustrated embodiment, the main phase switching converter 401-1a includes a low-dropout regulator 405. The low-dropout regulator 405 receives a first input voltage VINA on the VIN pin to generate an operating voltage (e.g., 3.3V).

[0055] exist Figure 5In the illustrated embodiment, control circuit 402 provides a switching control signal PWM1 to power unit 404. Control circuit 402 includes a turn-on signal generator 408, a signal modulation circuit 409, an enable control circuit 406, and a switching control circuit 407. Turn-on signal generator 408 generates a turn-on control signal Set_ana. Signal modulation circuit 409 is coupled to turn-on signal generator 408 to receive the turn-on control signal Set_ana and generate a phase control signal based thereon. In one embodiment, the turn-on control signal Set_ana can be generated by comparing the output voltage VO of a multiphase switching converter with a reference signal. In another embodiment, the turn-on control signal Set_ana can also be a periodic clock signal generated by an oscillator.

[0056] The switching control circuit 407 is coupled to the signal modulation circuit 409 and the enable control circuit 406 to generate the switching control signal PWM1 of the power unit 404, and generate the phase output signal based on the phase control signal and the phase input signal.

[0057] In one embodiment, Figure 4 The enable control signal generated by the input judgment circuit 41 shown is received by the CTRL pin of the main phase converter device 401-1a, that is, by the enable control circuit 406. In one embodiment, Figure 5 The enable control circuit 406 shown has a fixed blanking time after both of the following conditions are met: 1) the low-dropout regulator can provide the operating voltage and the input power supply voltage VINA is higher than the undervoltage lockout threshold; 2) the enable control signal changes from low to high. During this blanking time, the high-level enable control signal on the CTRL pin will not turn on the power switch of power unit 404. At the end of the blanking time, if no fault is detected, the CTRL pin allows the power switch in power unit 404 to be switched on. Once the blanking time ends and the signal on the CTRL pin is pulled to a level higher than 1.4V, the drive circuit 403 drives the power switch (e.g., the high-side power switch HS) in power unit 404, and the output voltage VO on the output pin VOUT will then rise.

[0058] In one embodiment, the main phase converter device 401-1a further includes a communication unit interface 413 and a register circuit 414, which are used for information exchange and data, respectively.

[0059] Figure 6 This is a slave-phase switch converter device 401-3b in a multiphase switch converter according to an embodiment of the present invention. Figure 6In the illustrated embodiment, converter 401-3b is used as a slave phase converter in a multiphase switching converter. Converter 401-3b is a single integrated circuit chip, including control circuitry 402b, power unit 404b, low-dropout regulator circuitry 405b, communication unit interface 413, register circuitry 414, and multiple pins. The SET pin is used to share the phase control signal, the TAKE pin is used to receive the phase input signal, the PASS pin is used to provide the phase output signal, the VIN pin is used to receive the input voltage, the GND pin is coupled to reference ground, the VOUT pin is coupled to the load to provide the output voltage, the CTRL pin is used to enable or disable converter 401-3b, and the PS pin is used to determine whether to implement phase shielding based on an external phase shielding control signal. Figure 6 In the embodiment shown, the low-dropout regulator circuit 405b receives a second input voltage VINB on the VIN pin to generate the supply voltage.

[0060] exist Figure 6 In the illustrated embodiment, the control circuit 402b includes an enable control circuit 406b and a switch control circuit 407b. Figure 6 The enable control circuit 406b shown is... Figure 4 The operation of the enable control circuit 406 shown is basically similar, and will not be described again here.

[0061] exist Figure 6 In the illustrated embodiment, the switch control circuit 407b is coupled to the enable control circuit 406b, and generates the switch control signal PWM3 and the phase output signal based on the phase control signal, the phase input signal, and the external phase shielding control signal received by the pin PS.

[0062] When the input power supply is detected to be removed, the phase shielding control signal on the PS pin is pulled low, causing the phase converter 401-3b to enter phase shielding mode.

[0063] In phase-masked mode, the switching control signal PWM3 provided by control circuit 402b is maintained at a high impedance or low level to disable power unit 404b. Power switches HS and LS are both turned off to stop providing power to the load. Those skilled in the art will understand that other suitable methods can also be used to disable power unit 404b. Furthermore, when power unit 404b is disabled, the power switches in power unit 404b do not necessarily need to be turned off simultaneously. For synchronous buck converters, the high-side power switch HS3 is turned off first, and the low-side switch LS3 can be turned off only after the zero-crossing point of the inductor current is detected. During the period when power unit 404b is disabled, the phase output signal is set to be equal to the phase input signal.

[0064] In one embodiment, the control circuit 402b is coupled to a communication bus and can communicate with an external master controller via the communication bus. Based on the communication data, the master controller determines whether to perform phase shielding and generates a corresponding phase shielding command. The control circuit 402b receives the phase shielding command from the master controller via the communication bus and, based on the content of the phase shielding command (e.g., a desired low-power state), determines whether to enter phase shielding mode. If the phase shielding command determines to enter phase shielding mode, the corresponding power unit is disabled, and power supply to the load is stopped.

[0065] The communication buses mentioned above may include I2C, SPI, SCI, UART, and various other buses used by other companies. For example, when the I2C bus is used, the PMBUS or SMBUS protocol may be employed. In some other embodiments, phase masking commands may also be generated directly by the control circuitry of the main phase, without the need for the main controller.

[0066] In one embodiment, the phase shielding function can be controlled via the PMBUS bus. REG_PS is a register in register circuit 414, and the phase shielding control function can be implemented by writing data into REG_PS via the communication bus.

[0067] Figure 7 According to an embodiment of the present invention Figure 4 The waveform diagram shows the startup process of the power system 400. For hot-swappable applications, the VIN pins of multiple integrated circuit converters 401 experience voltage spikes or transients during hot-swapping. These voltage spikes and transients are caused by the resonance between the parasitic inductance on the input traces and the input capacitance on the VIN pin. When the multiple integrated circuit converters 401 and the input decision circuit 41 work together, the voltage on the CTRL pin is pulled low by the enable control circuit 406 or 406b, turning off the power switch for an insertion delay to stabilize the first input voltage VINA and the second input voltage VINB. The enable control circuit 406 or 406b drives the voltage on the CTRL pin high, enabling the power switch of the power unit to turn on after the insertion delay ends.

[0068] like Figure 7 As shown, the first input voltage VINA and the second input voltage VINB rise at a relatively fast rate. When the input power supply is first plugged in, the power switch of the power unit in the control circuit remains off. The power switch in the converter remains off until the output of the enable control circuit (406 or 406b) is set high. At time t1, both the output voltage of the low-dropout regulator and the input supply voltage are greater than the undervoltage lockout threshold. After a delay, at time t2, the output of the enable control circuit 406 goes high. The drive circuit 403 drives the power switch to turn on, and subsequently, the output voltage VO begins to rise.

[0069] At time t3, the second input power supply INPUT 2 is disconnected, and the second input voltage VINB on the VIN pin of the integrated circuit converter seamlessly switches from 12V to 5V. Because the voltage VCTRL on each CTRL pin is greater than 1.4V, the CTRL pin of each integrated circuit converter is enabled. When the phase shielding control signal goes from low to high, the phase shielding function is enabled. Therefore, the switching of the power switches of the second set of integrated circuit converters is disabled. At the same time, the logic control circuit in the disabled integrated converter still operates, maintaining the generation of control signals and the operation of the TAKE / PASS loop. The multi-input single-output power supply system 400, operating in low-power mode, still provides the output voltage VO to the load.

[0070] Figure 8 This is a circuit diagram of a multi-input single-output power supply system 500 according to another embodiment of the present invention. Figure 8 In the illustrated embodiment, the power system 500 includes a multiphase switching converter 501, an input judgment circuit 51, an auxiliary DC-DC converter 52 (e.g., a 12V to 5V converter), a polarity protection circuit 53, and a phase shielding controller 54. The multiphase switching converter 501 includes two power module devices 501A and 501B.

[0071] exist Figure 8 In the illustrated embodiment, the first power module device 501A includes a 4-phase switch converter, and the second power module device includes a 4-phase switch converter connected in parallel. For example... Figure 8 As shown, the first phase converter of the first power module device 501A is the main phase, and the TAKE1 pin of the first phase is connected to the power supply VCC via an external pull-up resistor Rc.

[0072] With no external resistor Rc connected to the other pins TAKE, each of the remaining phases in the first power module device 501A is configured as a slave phase, and each of the phases in the second power module device 501B is also a slave phase.

[0073] Figure 9 This is a flowchart of a method 600 for operating a multiple-input single-output (MIMO) power supply system according to an embodiment of the present invention. The MIMO power supply system has multiple integrated circuit converters arranged in a daisy-chain architecture, having a common output node that provides an output voltage to a load. The multiple integrated circuit converters include at least a first integrated circuit converter and a second integrated circuit converter.

[0074] The method 600 for operating the power system includes steps 621-628. A first integrated circuit converter device receives a first input voltage at its first pin (step 621). A second integrated circuit converter device receives a second input voltage from an external power source at its second pin (step 622). The second pin of the first integrated circuit converter device is connected to an output node to provide an output voltage (step 623). The second pin of the second integrated circuit converter device is connected to the second pin of the first integrated circuit converter device (step 624). A first power unit of the first integrated circuit converter device is configured to provide power to the output node, wherein the first power unit is coupled between the first and second pins of the first integrated circuit converter device (step 625). An auxiliary DC-DC converter is used to convert the first input voltage at the first pin of the first integrated circuit converter device into a DC backup voltage (step 626). It is detected whether the connection between the first pin of the second integrated circuit converter device and the external power source has been removed (step 627). Once the removal of the connection is detected, a DC backup voltage output from the auxiliary DC power source is provided to the first pin of the second integrated circuit converter device, preventing the second power unit coupled between the first and second pins of the second integrated circuit converter device from providing power to the output node (step 628).

[0075] Note that in the flowchart described above, the functions marked in the boxes can also be arranged differently. Figure 9 The sequence shown occurs. For example, two consecutively represented boxes can actually be executed in essentially parallel order, and they can sometimes be executed in reverse order, depending on the specific function involved.

[0076] In the specification, terms such as "first" and "second" may be used merely to distinguish one entity or action from another, and do not necessarily imply any relationship or order between these entities or actions. Numerical orders such as "first," "second," and "third" refer only to different individuals among a plurality and do not imply any order or sequence, unless specifically defined in the language of the claims. The order of the text in any claim does not imply that the processing steps must be performed in a provisional or logical order according to such order, unless specifically specified in the language of the claims. Without departing from the scope of the invention, these processing steps may be interchanged in any order, provided that such interchange does not contradict the language of the claims and does not result in logical absurdity.

[0077] The specific embodiments described above are merely illustrative of the invention and are not exhaustive, nor are they intended to limit the scope of the invention. Variations and modifications to the disclosed embodiments are possible, and other feasible alternative embodiments and equivalent variations of elements in the embodiments can be understood by those skilled in the art. Other variations and modifications to the embodiments disclosed in this invention do not depart from the spirit and scope of protection of this invention.

Claims

1. A multiple-input single-output power system having an output node providing an output voltage, the power system comprising: a first integrated circuit converter having a first pin, a second pin, and a first power cell, wherein the first pin receives a first input voltage, the second pin outputs the output voltage, and the first power cell is coupled between the first pin and the second pin to provide power to the output node; and a second integrated circuit converter having a first pin, a second pin, a third pin, and a second power cell, wherein the first pin receives a second input voltage, the second pin outputs the output voltage, the second power cell is coupled between the first pin and the second pin of the second integrated circuit converter, and the third pin receives a phase mask control signal to determine whether the second power cell stops providing power to the output node; and and the first integrated circuit converter further comprises a first control circuit to drive a first power switch in the first power cell; the second integrated circuit converter further comprises a second control circuit to drive a second power switch in the second power cell; and wherein the first control circuit and the second control circuit are connected in a daisy chain architecture.

2. The multiple-input single-output power system of claim 1, further comprising: a phase mask controller to provide the phase mask control signal to the third pin of the second integrated circuit converter based on the second input voltage on the first pin of the second integrated circuit converter.

3. The multiple-input single-output power system of claim 1, further comprising: an auxiliary DC converter having an input and an output, wherein the input is coupled to the first pin of the first integrated circuit converter to receive the first input voltage, and the auxiliary DC converter converts the first input voltage to provide a DC backup voltage at the output; and a polarity protection circuit to connect the output of the auxiliary DC converter to the first pin of the second integrated circuit converter to provide the DC backup voltage to the first pin of the second integrated circuit converter.

4. The multiple-input single-output power system of claim 1, further comprising: a third integrated circuit converter having a first pin, a second pin, a third power cell, a third control circuit, and a third pin, wherein the first pin receives the second input voltage on the first pin of the second integrated circuit converter, the second pin is coupled to the output node to provide the output voltage, the third power cell is coupled between the first pin and the second pin of the third integrated circuit converter, the third control circuit drives a third power switch of the third power cell, and the third pin receives the phase mask control signal to determine whether the third integrated circuit converter stops providing power to the output node, wherein the first control circuit, the second control circuit, and the third control circuit are connected in a daisy chain architecture.

5. The multiple-input single-output power system of claim 4, further comprising: ​ A fourth integrated circuit converter has a first pin, a second pin, a fourth power cell, and a fourth control circuit. The first pin receives a first input voltage from the first pin of the first integrated circuit converter. The second pin outputs the output voltage. The fourth power cell is coupled between the first pin and the second pin of the fourth integrated circuit converter. The fourth control circuit drives a fourth power switch of the fourth power cell. The first control circuit, the second control circuit, and the fourth control circuit are connected in a daisy chain architecture.

6. The multiple-input single-output power supply system of claim 1, wherein: The first integrated circuit converter also has a fourth pin that receives an enable control signal for enabling the first integrated circuit converter; and The second integrated circuit converter also has a fourth pin that is connected to the fourth pin of the first integrated circuit converter.

7. The multiple-input single-output power supply system of claim 6, further comprising: An input determination circuit has a first input, a second input, and an output. The first input receives the first input voltage from the first pin of the first integrated circuit converter. The second input receives the second input voltage from the first pin of the second integrated circuit converter. The input determination circuit provides the enable control signal to the fourth pin of the first integrated circuit converter at the output based on the first input voltage and the second input voltage.

8. The multiple-input single-output power supply system of claim 1, wherein the second integrated circuit converter communicates with a communication bus to receive the phase mask control signal.

9. The multiple-input single-output power supply system of claim 1, wherein the first integrated circuit converter and the second integrated circuit converter are modularly fabricated in the same module.

10. A multiple-input single-output power supply system has a plurality of integrated circuit converters that form a daisy chain architecture and have a common output node to provide an output voltage, the multiple-input single-output power supply system comprising: A first integrated circuit converter of the plurality of integrated circuit converters has a first pin, a second pin, and a first power cell. The first pin receives a first input voltage. The second pin is coupled to the output node to provide the output voltage. The first power cell is coupled between the first pin and the second pin to provide power to the output node. A second integrated circuit converter of the plurality of integrated circuit converters has a first pin, a second pin, a second power cell, and a third pin. The first pin receives a second input voltage. The second pin is coupled to the output node. The second power cell is coupled between the first pin and the second pin of the second integrated circuit converter. The third pin receives a phase mask control signal to determine whether to stop the second power cell from providing power to the output node. The phase mask control signal is provided based on at least the first input voltage of the first pin of the first integrated circuit converter and the second input voltage of the first pin of the second integrated circuit converter; and A fourth integrated circuit converter has a first pin, a second pin, a fourth power cell, and a fourth control circuit. The first pin receives a first input voltage from the first pin of the first integrated circuit converter. The second pin outputs the output voltage. The fourth power cell is coupled between the first pin and the second pin of the fourth integrated circuit converter. The fourth control circuit drives a fourth power switch of the fourth power cell. The first control circuit, the second control circuit, and the fourth control circuit are connected in a daisy chain architecture. An auxiliary DC converter having an input and an output, wherein the input receives a first input voltage on a first pin of a first integrated circuit, and wherein the output provides a second input voltage to a first pin of a second integrated circuit when a connection of the first pin of the second integrated circuit to an external input power source is removed.

11. The multiple-input single-output power system of claim 10, wherein: an input determination circuit provides an enable control signal to a fourth pin of each integrated circuit converter based at least on the first input voltage on the first pin of the first integrated circuit converter and the second input voltage on the second pin of the second integrated circuit converter.

12. The multiple-input single-output power system of claim 10, further comprising: a polarity protection circuit that connects the output of the auxiliary DC converter to the first pin of the second integrated circuit converter to provide the DC backup voltage to the first pin of the second integrated circuit converter when the connection of the first pin of the second integrated circuit converter to the external input power source is removed.

13. The multiple-input single-output power system of claim 10, wherein the plurality of integrated circuit converter modules are fabricated in the same module.

14. A method of operating a multiple-input single-output power system having an output node that provides an output voltage, the method comprising: receiving a first input voltage on a first pin of a first integrated circuit converter; receiving a second input voltage on a first pin of a second integrated circuit converter from an external power source; connecting a second pin of the first integrated circuit converter to the output node; connecting a second pin of the second integrated circuit converter to the second pin of the first integrated circuit converter; configuring a first power cell of the first integrated circuit converter to provide power to the output node, wherein the first power cell is coupled between the first pin and the second pin of the first integrated circuit converter; converting the first input voltage to a DC backup voltage using an auxiliary DC converter; and providing the DC backup voltage from the auxiliary DC converter output to the first pin of the second integrated circuit converter when the connection of the first pin of the second integrated circuit converter to the external power source is removed, and preventing a second power cell coupled between the first pin and the second pin of the second integrated circuit converter from providing power to the output node.

15. The method of claim 14, further comprising: receiving a phase mask control signal on a third pin of the second integrated circuit converter to determine whether to stop the second power cell from providing power to the output node.

16. The method of claim 15, further comprising: controlling the phase mask control signal to cause the second power cell to provide power to the output node when the second input voltage on the first pin of the second integrated circuit converter is not less than a first threshold voltage; and controlling the phase mask control signal to prevent the second power cell from providing power to the output node when the second input voltage is less than the first threshold voltage. ​ 17. The method of claim 15, wherein the second integrated circuit converter communicates with a communication bus to receive the phase mask control signal, and based on the phase mask control signal, determines whether to stop the second power cell from providing power to the output node.

18. The method of claim 14, further comprising: generating an enable control signal based on a first input voltage of the first pin of the first integrated circuit converter and a second input voltage of the first pin of the second integrated circuit converter; receiving the enable control signal at a fourth pin of the first integrated circuit converter to enable the first integrated circuit converter; and receiving the enable control signal at a fourth pin of the second integrated circuit converter to enable the second integrated circuit converter.

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