Method for manufacturing back-illuminated solid-state imaging device

Abstract

The manufacturing method of the back-illuminated solid-state imaging device of the present invention comprises: a first step of preparing a semiconductor layer of a first conductive type having a front surface and a back surface; a second step of forming a first concave-convex region on the surface of the semiconductor layer by selectively etching the surface of the semiconductor layer; a third step of forming a second concave-convex region on the surface of the semiconductor layer by smoothing the concave-convexity of the first concave-convex region; and a fourth step of forming an insulating layer along the second concave-convex region and forming a plurality of charge transfer electrodes on the insulating layer.

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a back-illuminated solid-state imaging device. Background Art

[0002] Back-illuminated solid-state imaging devices, such as BT (Back-illuminated Thinning) CCDs, are known, in which the semiconductor layer in the imaging section is thinned. In such back-illuminated solid-state imaging devices, light incident from the back of the semiconductor layer interferes with light reflected from the surface of the semiconductor layer (i.e., etalon interference occurs), potentially degrading light detection characteristics.

[0003] Patent Document 1 describes a method for manufacturing a back-illuminated solid-state imaging device that can suppress the occurrence of multiple interferences. The method includes selectively oxidizing a surface area of ​​a semiconductor layer using a mask, and removing the selectively oxidized area by etching to form projections and depressions on the surface of the semiconductor layer.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2010-232494 Summary of the Invention

[0007] Technical problem to be solved by the invention

[0008] The method described in Patent Document 1 is a method utilizing selective oxidation. Therefore, in this method, it is difficult to form projections and depressions on the surface of the semiconductor layer in such a manner that the distance between adjacent projections (or adjacent depressions) becomes smaller and the height of the projections (or the depth of the depressions) becomes larger.

[0009] An object of the present disclosure is to provide a method for manufacturing a backside-illuminated solid-state imaging device, which can easily and reliably manufacture the backside-illuminated solid-state imaging device in which the occurrence of multiple interference is suppressed.

[0010] Technical means for solving technical problems

[0011] One aspect of the present invention provides a method for manufacturing a back-illuminated solid-state imaging device, comprising: a first step of preparing a first conductive type semiconductor layer having a front surface and a back surface; a second step of forming a first concave-convex region on the surface of the semiconductor layer by selectively etching the surface of the semiconductor layer; a third step of forming a second concave-convex region on the surface of the semiconductor layer by smoothing the concave-convexity of the first concave-convex region; and a fourth step of forming an insulating layer along the second concave-convex region and forming a plurality of charge transfer electrodes on the insulating layer.

[0012] In this method for manufacturing a back-illuminated solid-state imaging device, a first concave-convex region is formed on the surface of the semiconductor layer by selectively etching the surface of the semiconductor layer. This allows for the easy and reliable formation of the first concave-convex region having a desired shape, with an eye on the shape of the second concave-convex region, which can suppress the occurrence of multiple interference. Furthermore, by smoothing the concavities and convexities of the first concave-convex region, the second concave-convex region is formed on the surface of the semiconductor layer. This prevents the electric field from concentrating at the tops of the convex portions and the bottoms of the concave portions of the second concave-convex region in the manufactured back-illuminated solid-state imaging device, allowing charge transfer to function effectively. Therefore, according to this method for manufacturing a back-illuminated solid-state imaging device, a back-illuminated solid-state imaging device that suppresses the occurrence of multiple interference can be easily and reliably manufactured.

[0013] In the method for manufacturing a back-illuminated solid-state imaging device according to one aspect of the present invention, in the fourth step, a semiconductor region of the second conductivity type may be formed in the semiconductor layer along the second concavo-convex region.

[0014] In the method for manufacturing a back-illuminated solid-state imaging device according to one aspect of the present invention, the unevenness of the first uneven region may be smoothed by thermal oxidation and etching in the third step.

[0015] In the method for manufacturing a back-illuminated solid-state imaging device according to one aspect of the present invention, the unevenness of the first uneven region may be smoothed by isotropic etching in the third step.

[0016] A method for manufacturing a backside-illuminated solid-state imaging device according to one aspect of the present invention may further include: a fifth step of mounting a support substrate on the plurality of charge transfer electrodes; a sixth step of thinning the semiconductor layer by polishing the back surface of the semiconductor layer while the support substrate is mounted; and a seventh step of forming an accumulation region in the semiconductor layer along the polished back surface of the semiconductor layer. In this manner, in the manufactured backside-illuminated solid-state imaging device, the generation of dark current caused by defects generated on the back surface of the semiconductor layer due to polishing can be suppressed.

[0017] Effects of the Invention

[0018] According to the present invention, a method for manufacturing a back-illuminated solid-state imaging device can be provided, which can easily and reliably manufacture a back-illuminated solid-state imaging device in which occurrence of multiple interference is suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a side view of a back-illuminated solid-state imaging device according to one embodiment.

[0020] Figure 2 yes Figure 1 A plan view of the imaging section of the back-illuminated solid-state imaging element shown.

[0021] Figure 3 It is along Figure 2 A cross-sectional view taken along line III-III is shown.

[0022] Figure 4 It is along Figure 2 A cross-sectional view taken along line IV-IV is shown.

[0023] Figure 5 It shows Figure 1 A cross-sectional view illustrating a method for manufacturing a back-illuminated solid-state imaging device.

[0024] Figure 6 It shows Figure 1 A cross-sectional view illustrating a method for manufacturing a back-illuminated solid-state imaging device.

[0025] Figure 7 It shows Figure 1 A cross-sectional view illustrating a method for manufacturing a back-illuminated solid-state imaging device.

[0026] Figure 8 It shows Figure 1 A cross-sectional view illustrating a method for manufacturing a back-illuminated solid-state imaging device.

[0027] Figure 9 It shows Figure 1 A cross-sectional view illustrating a method for manufacturing a back-illuminated solid-state imaging device. DETAILED DESCRIPTION

[0028] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and repeated descriptions are omitted.

[0029] [Structure of Back-Illuminated Solid-State Imaging Device]

[0030] like Figure 1As shown, a back-illuminated solid-state imaging device 1 includes a back-illuminated solid-state imaging element 2 and a supporting substrate 3. The back-illuminated solid-state imaging element 2 has a front surface 2a and a back surface 2b. As an example, the back-illuminated solid-state imaging element 2 is a BT-CCD that detects light L incident on the back surface 2b. The supporting substrate 3 is attached to the front surface 2a of the back-illuminated solid-state imaging element 2 with an adhesive. The supporting substrate 3 is, for example, a glass substrate or a single crystal silicon substrate. Hereinafter, the direction in which the front surface 2a and the back surface 2b face each other is referred to as the Z direction, a direction perpendicular to the Z direction is referred to as the X direction, and a direction perpendicular to the Z and X directions is referred to as the Y direction.

[0031] The back-illuminated solid-state imaging element 2 includes an imaging unit 10 and a horizontal shift register 20. The imaging unit 10 includes a plurality of CCD channels C (see FIG. 1 ) formed of a plurality of vertical shift registers. Figure 2 ). Multiple CCD channels C are arranged in the X direction, each extending in the Y direction. The horizontal shift register 20 is located on one side of the imaging unit 10 in the Y direction. When light L enters the imaging unit 10 from the back surface 2b, charge is generated in the imaging unit 10 due to photoelectric conversion. The charge generated in the imaging unit 10 is sequentially transferred from each CCD channel C along the Y direction to the horizontal shift register 20. The charge transferred to the horizontal shift register 20 is sequentially transferred by the horizontal shift register 20 along the X direction and output from the back surface incident solid-state imaging element 2 as an image signal.

[0032] like Figure 2 As shown in FIG. 1 , the imaging unit 10 includes a plurality of charge transfer electrodes 131 and a plurality of charge transfer electrodes 132. Each of the charge transfer electrodes 131 and 132 extends in the X direction so as to intersect with a plurality of CCD channels C. The plurality of charge transfer electrodes 131 and the plurality of charge transfer electrodes 132 are alternately arranged in the Y direction. In the imaging unit 10, when viewed from the Z direction, the area where each CCD channel C intersects with each of the charge transfer electrodes 131 and 32 (for example, in FIG. 1 ) is the area where each of the CCD channels C intersects with each of the charge transfer electrodes 131 and 32. Figure 2 The area surrounded by the thick dotted line in FIG. 1 constitutes a pixel P. That is, in the imaging unit 10 , a plurality of pixels P are arranged in a matrix along a surface perpendicular to the Z direction.

[0033] Reference Figure 3 and Figure 4 , the structure of the imaging unit 10 of the back-illuminated solid-state imaging element 2 will be described in detail. Figure 3 and Figure 4 In the Figure 2 The structure of a pixel P is shown in FIG. Figure 3 and Figure 4As shown, the back-illuminated solid-state imaging element 2 has, in the imaging portion 10, a semiconductor layer 11, an insulating layer 12, a plurality of charge transfer electrodes 13 (a general term for a plurality of charge transfer electrodes 131 and a plurality of charge transfer electrodes 132), a protective layer 14, and an anti-reflection layer 15.

[0034] The semiconductor layer 11 has a surface 11a and a back surface 11b. The surface 11a is concave and convex, while the back surface 11b is flat. The semiconductor layer 11 includes a p-type semiconductor region (a semiconductor region of the first conductivity type) 111, multiple n-type semiconductor regions (semiconductor regions of the second conductivity type) 112, multiple isolation regions 113, and an accumulation region 114. The semiconductor layer 11 is, for example, made of silicon.

[0035] The p-type semiconductor region 111 extends over the entire imaging unit 10. A plurality of n-type semiconductor regions 112 are located on the surface 11a side relative to the p-type semiconductor region 111 and are formed along the surface 11a which is a concave-convex surface. Each n-type semiconductor region 112 is provided for each CCD channel C (see Figure 2 ) extends in the Y direction. Each n-type semiconductor region 112 forms a PN junction with the p-type semiconductor region 111. That is, the imaging unit 10 is configured as a buried channel CCD.

[0036] Multiple isolation regions 113 are located on the surface 11a side relative to the p-type semiconductor region 111 and are formed along the uneven surface 11a. Each isolation region 113 extends in the Y direction between adjacent n-type semiconductor regions 112 in the X direction. Accumulation region 114 is located on the back surface 11b side relative to the p-type semiconductor region 111 and is formed along the flat back surface 11b. Each isolation region 113 and accumulation region 114 is, for example, composed of silicon having a higher p-type impurity concentration than the p-type semiconductor region 111.

[0037] The insulating layer 12 is formed on the surface 11a of the semiconductor layer 11 so as to cover the multiple n-type semiconductor regions 112 and the multiple isolation regions 113. The insulating layer 12 is, for example, a layer composed of silicon oxide. Multiple charge transfer electrodes 13 are formed on the insulating layer 12 (more specifically, on the surface of the insulating layer 12 opposite the semiconductor layer 11). As an example, the ends of the charge transfer electrodes 132 in the Y direction are curved so as to climb over the ends of the charge transfer electrodes 131 adjacent in the Y direction through the insulating layer 12. Each charge transfer electrode 13 is, for example, an electrode composed of polycrystalline silicon. Furthermore, in each n-type semiconductor region 112, the portion 112b other than the portion 112a facing the charge transfer electrode 131 has a lower n-type impurity concentration than the portion 112a.

[0038] The protective layer 14 is formed to cover the insulating layer 12 and the plurality of charge transfer electrodes 13. For example, the protective layer 14 is a layer made of BPSG (Boro-Phospho Silicate Glass). The support substrate 3 is attached to the protective layer 14 (more specifically, to the surface of the protective layer 14 opposite the semiconductor layer 11) via an adhesive 16. The antireflection layer 15 is formed on the back surface 11b of the semiconductor layer 11 to cover the accumulation region 114. For example, the antireflection layer 15 is a dielectric multilayer film.

[0039] [Method for manufacturing a back-illuminated solid-state imaging device]

[0040] First, if Figure 5 As shown in (a), a p-type semiconductor layer 110 having a surface 110a and a back surface 11b is prepared (first step). Then, a mask 50 made of, for example, silicon nitride is formed on the surface 110a of the semiconductor layer 110 by, for example, sputtering. Figure 5 As shown in (b), a plurality of regularly arranged openings 51 are formed in the mask 50 by patterning using a photoresist, for example, so that portions of the surface 110a of the semiconductor layer 110 corresponding to the openings 51 are exposed. Figure 5 As shown in (c), by selectively etching the surface 110a of the semiconductor layer 110 (i.e., by etching the portions of the surface 110a of the semiconductor layer 110 corresponding to the openings 51), a first concave-convex region 110A is formed on the surface 110a of the semiconductor layer 110 (second step). Figure 6 As shown in FIG. 5 ( a ), the mask 50 is removed from the surface 110 a of the semiconductor layer 110 by etching using, for example, high-temperature phosphoric acid.

[0041] In this embodiment, anisotropic etching (e.g., anisotropic etching using an alkaline etchant) is performed to form recessed portions having inner surfaces shaped according to the crystal orientation of the semiconductor layer 110 in the portions of the surface 110a of the semiconductor layer 110 corresponding to the respective openings 51. Specifically, the first concave-convex region 110A is composed of a plurality of recessed portions (regularly arranged recessed portions) formed in this manner. For example, in the first concave-convex region 110A, the distance between adjacent recessed portions (center-to-center distance) is approximately 800 nm, and the depth of each recessed portion is approximately 120 nm.

[0042] Then, if Figure 6As shown in (b), the unevenness of the first uneven region 110A is smoothed by thermal oxidation and etching, thereby forming the second uneven region 110B on the surface 110a of the semiconductor layer 110 (third process). More specifically, an oxidized region is formed along the first uneven region 110A by thermal oxidation, and the oxidized region is removed by etching (for example, wet etching by hydrofluoric acid, etc.), thereby smoothing the unevenness of the first uneven region 110A. In addition, smoothing the unevenness of the first uneven region 110A means smoothing the corners of at least one of the top of the convex portion and the bottom of the concave portion where the unevenness is formed (for example, rounding the corners like R chamfering). In the second uneven region 110B, for example, the slope of the tangent line at each point on the second uneven region 110B changes continuously. As an example, in the second uneven region 110B, the distance between adjacent concave portions (center-to-center distance) is about 800nm, and the depth of each concave portion is about 100nm.

[0043] Then, if Figure 6 As shown in (c), a mask 60, for example, made of an inorganic material, is formed on the surface 110a of the semiconductor layer 110 by patterning using, for example, a photoresist. In this state, a plurality of isolation regions 113 are formed in the semiconductor layer 110 by, for example, ion implantation or diffusion of p-type impurities, and an insulating layer 121 (a portion of the insulating layer 12) is formed in the semiconductor layer 110 by, for example, thermal oxidation. Furthermore, the formation of the plurality of isolation regions 113 by ion implantation or diffusion of p-type impurities can be performed after the formation of the insulating layer 121 by thermal oxidation.

[0044] Then, if Figure 7 As shown in (a), the mask 60 is removed from the surface 110a of the semiconductor layer 110, and the insulating layer 12 is formed along the second concave-convex region 110B by, for example, thermal oxidation (step 4). Next, a plurality of n-type semiconductor regions 112 are formed in the semiconductor layer 110 along the second concave-convex region 110B by, for example, ion implantation of n-type impurities. Figure 7 As shown in (b), a plurality of charge transfer electrodes 13 are formed on the insulating layer 12 , and a protective layer 14 is formed so as to cover the insulating layer 12 and the plurality of charge transfer electrodes 13 .

[0045] Then, if Figure 7 As shown in (c), the support substrate 3 is mounted on the protective layer 14 via the adhesive 16. That is, the support substrate 3 is mounted on the plurality of charge transfer electrodes 13 (fifth step). Figure 8 As shown in (a), with the support substrate 3 mounted, the back surface 110b of the semiconductor layer 110 is polished by, for example, chemical polishing, thereby thinning the semiconductor layer 110 (step 6). Figure 8As shown in (b), by, for example, ion implantation of p-type impurities, an accumulation region 114 is formed in the semiconductor layer 11 along the back surface 110b of the polished semiconductor layer 110 (i.e., the back surface 11b of the semiconductor layer 11) (the seventh step). Figure 8 As shown in FIG. 1 ( c ), the antireflection layer 15 is formed on the back surface 11 b of the semiconductor layer 11 so as to cover the accumulation region 114 .

[0046] [Function and Effect]

[0047] In the method for manufacturing a back-illuminated solid-state imaging device 1, the surface 110a of the semiconductor layer 110 is selectively etched to form a first concave-convex region 110A on the surface 110a of the semiconductor layer 110. This allows for easy and reliable formation of the first concave-convex region 110A having a desired shape, focusing on the shape of the second concave-convex region 110B that can suppress the occurrence of multiple interference. Furthermore, by smoothing the concavities and convexities of the first concave-convex region 110A, the second concave-convex region 110B is formed on the surface 110a of the semiconductor layer 110. This prevents electric field concentration at the tops of the convex portions and bottoms of the concave portions of the second concave-convex region 110B in the manufactured back-illuminated solid-state imaging device 1, enabling sufficient charge transfer. Therefore, according to the method for manufacturing a back-illuminated solid-state imaging device 1, a back-illuminated solid-state imaging device 1 that suppresses the occurrence of multiple interference can be easily and reliably manufactured.

[0048] Furthermore, in the method for manufacturing the back-illuminated solid-state imaging device 1, the n-type semiconductor region 112 is formed along the second concavo-convex region 110B in the semiconductor layer 110. This allows a buried channel CCD to be configured.

[0049] In the method for manufacturing the back-illuminated solid-state imaging device 1, the unevenness of the first uneven region 110A is smoothed by thermal oxidation and etching.

[0050] Furthermore, in the method for manufacturing the backside-illuminated solid-state imaging device 1, the support substrate 3 is mounted on the plurality of charge transfer electrodes 13. In this state, the back surface 110b of the semiconductor layer 110 is polished to thin the semiconductor layer 110. Accumulation regions 114 are then formed in the semiconductor layer 11 along the polished back surface 110b of the semiconductor layer 110 (i.e., the back surface 11b of the semiconductor layer 11). Thus, in the manufactured backside-illuminated solid-state imaging device 1, the occurrence of dark current caused by defects generated on the back surface 11b of the semiconductor layer 11 due to polishing can be suppressed.

[0051] [Modification]

[0052] The present invention is not limited to the above-mentioned embodiment. In the method for manufacturing the back-illuminated solid-state imaging device 1, it is also possible to Figure 9 As shown in (a), by isotropic etching (for example, isotropic etching by a chemical dry etchant), a concave portion having an inner surface that does not depend on the crystal orientation of the semiconductor layer 110 is formed in the portion corresponding to each opening 51 in the surface 110a of the semiconductor layer 110, thereby forming a first concave-convex region 110A on the surface 110a of the semiconductor layer 110. In this case, in the concave-convex of the first concave-convex region 110A, a corner is also formed at the top of the convex portion. Therefore, as shown in FIG. Figure 9 As shown in (b), after the mask 50 is removed from the surface 110a of the semiconductor layer 110, as shown in Figure 9 As shown in FIG. 5 ( c ), the second concavo-convex region 110B is formed on the surface 110 a of the semiconductor layer 110 by smoothing the concavo-convexity of the first concavo-convex region 110A.

[0053] The etching for forming the first concavo-convex region 110A on the surface 110a of the semiconductor layer 110 may be either anisotropic etching or isotropic etching, or may be either wet etching or dry etching. However, in the case of dry etching, chemical dry etching is preferably used to suppress surface defects.

[0054] Furthermore, in the method for manufacturing the back-illuminated solid-state imaging device 1, the unevenness of the first uneven region 110A can be smoothed by isotropic etching, thereby forming the second uneven region 110B on the surface 110a of the semiconductor layer 110. In this case, the unevenness of the first uneven region 110A can also be easily and reliably smoothed. Furthermore, the etching for forming the second uneven region 110B on the surface 110a of the semiconductor layer 110 (i.e., the etching for smoothing the unevenness of the first uneven region 110A) can be either wet etching or dry etching, but isotropic etching is required.

[0055] Furthermore, in the method for manufacturing the back-illuminated solid-state imaging device 1, the formation of the plurality of n-type semiconductor regions 112 may be omitted. That is, in the manufactured back-illuminated solid-state imaging device 1, the imaging unit 10 may be configured as a surface channel CCD.

[0056] In addition, the concavity and convexity in each of the first concave-convex region 110A and the second concave-convex region 110B may be composed of a plurality of dot-shaped concave portions, or a plurality of protrusion-shaped convex portions. In addition, the concavity and convexity in each of the first concave-convex region 110A and the second concave-convex region 110B may be composed of a plurality of groove-shaped concave portions, or a plurality of wall-shaped convex portions. In the case where the concavity and convexity are composed of a plurality of groove-shaped concave portions or a plurality of wall-shaped convex portions, each concave portion or each convex portion preferably extends in the direction in which the plurality of charge transfer electrodes 13 are arranged in order to facilitate the transfer of charge. In addition, the concavity and convexity in each of the first concave-convex region 110A and the second concave-convex region 110B may be formed in a regular pattern, or in an irregular pattern. In the case where the concavity and convexity are formed in an irregular pattern, it is sufficient to form a plurality of irregularly arranged openings 51 in the mask 50 used to form the first concave-convex region 110A.

[0057] In addition, when the supporting substrate 3 is, for example, a silicon substrate with wiring formed thereon, the back-illuminated solid-state imaging element 2 can also be bonded to the supporting substrate 3 (for example, direct bonding) in such a manner that the electrode pads of the back-illuminated solid-state imaging element 2 are electrically connected to the electrode pads of the supporting substrate 3.

[0058] Furthermore, the p-type and n-type conductivity types may be reversed from the above. That is, the first conductivity type may be the n-type and the second conductivity type may be the p-type.

[0059] [Explanation of Symbols]

[0060] 1…back-illuminated solid-state imaging device, 3…support substrate, 11, 110…semiconductor layer, 11a, 110a…surface, 11b, 110b…back surface, 12…insulating layer, 13…charge transfer electrode, 110A…first concave-convex region, 110B…second concave-convex region, 112…n-type semiconductor region (semiconductor region of the second conductivity type), 114…accumulation region.

Claims

1. A method for manufacturing a back-illuminated solid-state imaging device, wherein: have: In the first step, a semiconductor layer of the first conductivity type having a front surface and a back surface is prepared; A second step of forming a first concave-convex region on the surface of the semiconductor layer by selectively etching the surface of the semiconductor layer; a third step of forming a second concave-convex region on the surface of the semiconductor layer by smoothing the concave-convexity of the first concave-convex region; and In the fourth step, an insulating layer is formed along the second concavo-convex region, and a plurality of charge transfer electrodes are formed on the insulating layer.

2. The method for manufacturing a back-illuminated solid-state imaging device according to claim 1, wherein: In the fourth step, a second conductivity type semiconductor region is formed in the semiconductor layer along the second concavo-convex region.

3. The method for manufacturing a back-illuminated solid-state imaging device according to claim 1 or 2, wherein: In the third step, the unevenness of the first uneven region is smoothed by thermal oxidation and etching.

4. The method for manufacturing a back-illuminated solid-state imaging device according to claim 1 or 2, wherein: In the third step, the unevenness of the first uneven region is smoothed by isotropic etching.

5. The method for manufacturing a back-illuminated solid-state imaging device according to any one of claims 1 to 4, wherein: Also features: A fifth step is to install a support substrate on the plurality of charge transfer electrodes; A sixth step is to thin the semiconductor layer by grinding the back surface of the semiconductor layer while the support substrate is mounted. and In a seventh step, an accumulation region is formed in the semiconductor layer along the back surface of the polished semiconductor layer.

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