Circuit, Ambient Light Photoreceptor, Driving Control Method, Display Panel and Device

Abstract

The present invention discloses a circuit, an ambient light photoreceptor, a driving control method, a display panel and a device. The circuit includes: a first single-stage amplification module, including a first power supply terminal, a control terminal and a first node, for controlling the output current of the first node according to the voltage signal of the first power supply terminal and the voltage signal of the control terminal; a first load module, for shunting the output current with the current branch to be detected, so as to control the voltage of the first node according to the current obtained by the first load module; a voltage division detection module, for determining the current value of the current branch to be detected in the second state according to the voltage of the first node when the current branch to be detected is in the first state and the second state respectively, wherein, there is no current in the current branch to be detected in the first state, and there is current in the current branch to be detected in the second state. Through the circuit of the present invention, accurate detection of the photocurrent generated by the ambient light photoreceptor can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and particularly to a circuit, an ambient light photoreceptor, a driving control method, a display panel and a device. Background Art

[0002] In the related art, as users' demand for screen-to-body ratio is getting higher and higher, more and more functional devices need to be integrated into the screen. However, if the ambient light photoreceptor is integrated inside the screen, the influence of panel light emission on the ambient light photoreceptor needs to be considered.

[0003] Currently, in-plane ambient light photoreceptors are mostly formed on glass substrates, and glass-based ambient light devices have problems of low induction amount and high noise, and cannot be well applied to products. Summary of the Invention

[0004] The main object of the present invention is to provide a circuit, an ambient light photoreceptor, a driving control method, a display panel and a device, so as to amplify and reduce the noise of the photocurrent generated by the ambient light device, thereby facilitating accurate detection of the light intensity sensed by the ambient light device.

[0005] In a first aspect, the present invention provides a circuit, including: a first single-stage amplification module, including a first power supply terminal, a control terminal and a first node, configured to control the output current of the first node according to the voltage signal of the first power supply terminal and the voltage signal of the control terminal; a first load module, configured to shunt the output current with a current branch to be detected, so as to control the voltage of the first node according to the current obtained by the first load module; a voltage division detection module, configured to determine the current value of the current branch to be detected in the second state according to the voltage of the first node when the current branch to be detected is in the first state and the second state respectively, wherein there is no current in the current branch to be detected in the first state, and there is current in the current branch to be detected in the second state.

[0006] In one embodiment, the first single-stage amplification module includes: a first transistor, the gate of the first transistor is connected to the control terminal of the first single-stage amplification module, the source of the first transistor is connected to the first power supply terminal, and the drain of the first transistor is connected to the first node.

[0007] In one embodiment, the first load module includes: a second transistor, the gate and the drain of the second transistor are connected to the second power supply terminal, and the source of the second transistor is connected to the first node.

[0008] In one embodiment, the voltage division detection module includes: a voltage reset unit configured to reset the voltages of the second node, the third node, and the fifth node according to a reset pulse signal; a writing unit configured to set the voltage of the fifth node according to the voltage of the first node in a first state and write the voltage of the first node into the second node in a second state; a second single-stage amplification unit configured to control the current from the second node to the third node according to the voltage of the fifth node in the first state and the voltage of the second node in the second state; and a second load unit configured to control the current from the second node to the third node as the voltage of the third node.

[0009] In one embodiment, the voltage reset unit includes: a third transistor, where the gate of the third transistor is connected to the control terminal of the voltage reset unit, the drain of the third transistor is connected to the third power supply terminal, and the source of the third transistor is connected to the fourth node.

[0010] In one embodiment, the writing unit includes: a fourth transistor, a fifth transistor, and a sixth transistor. Among them, the gates of the fourth transistor, the fifth transistor, and the sixth transistor are all connected to the control terminal of the writing unit. The source of the fourth transistor is connected to the first node, the drain of the fourth transistor is connected to the second node, the source of the fifth transistor is connected to the fourth node, the drain of the fifth transistor is connected to the third node, the source of the sixth transistor is connected to the fourth node, and the drain of the sixth transistor is connected to the fifth node.

[0011] In one embodiment, the second single-stage amplification unit includes: a seventh transistor, where the gate of the seventh transistor is connected to the control terminal of the second single-stage amplification unit, the source of the seventh transistor is connected to the second node, and the drain of the seventh transistor is connected to the third node.

[0012] In one embodiment, the second load unit includes: an eighth transistor, where the gate and the drain of the eighth transistor are connected to the fourth power supply terminal, and the source of the eighth transistor is connected to the third node.

[0013] In one embodiment, the voltage division detection module further includes: an output control unit configured to control the connection and disconnection between the third node and the output terminal of the voltage division detection module.

[0014] In one embodiment, the output control unit includes: a ninth transistor, where the gate of the ninth transistor is connected to the control terminal of the output control unit, the drain of the ninth transistor is connected to the third node, and the source of the ninth transistor is connected to the output terminal of the voltage division detection module.

[0015] In a second aspect, the present invention provides an ambient light photoreceptor, including: a photoelectric acquisition module configured to generate a photocurrent according to ambient light; and the circuit as described above, where the photoelectric acquisition module serves as the current branch to be detected.

[0016] In one embodiment, the optoelectronic acquisition module includes: a photosensitive diode, wherein the positive electrode of the photosensitive diode is connected to the fifth power supply terminal, and the negative electrode of the photosensitive diode is connected to the first node.

[0017] In a third aspect, the present invention provides a display panel, including the ambient light photoreceptor as described above.

[0018] In a fourth aspect, the present invention provides a display device, including the display panel as described above.

[0019] In a fifth aspect, the present invention provides a driving control method, implemented based on the circuit as described above. The driving control method includes: in the first stage of each detection period, providing a first voltage signal to the control terminal of the first single-stage amplification module to make the current branch to be detected in a first state; in the second stage after the first stage of this detection period, providing a second voltage signal to the control terminal of the first single-stage amplification module to make the current branch to be detected in a second state.

[0020] In one embodiment, the method further includes: resetting the second node, the third node, and the fifth node according to the reset pulse signal; setting the voltage of the fifth node according to the voltage of the first node in the first stage of each detection period; writing the voltage of the first node into the second node in the second stage after the first stage of this detection period.

[0021] Through the circuit of the present invention, the current detection of the current branch to be detected can be converted into the detection of its voltage. The magnitude of the current in the current branch to be detected can be inferred by detecting the voltage change of the first node N1 when there is or is no current in the current branch to be detected, thereby eliminating the influence of the threshold voltage of the single-pole amplification component on the current detection result and making the current detection result more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings forming a part of this application are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0023] Figure 1 is the position of the ambient light photoreceptor in the screen in the related art;

[0024] Figure 2 is the circuit design topology diagram of the ambient light photoreceptor according to a specific embodiment of the present application;

[0025] Figure 3 is Figure 2 a schematic diagram showing the change of the voltage of the first node with the change of the voltage of the control terminal of the single-stage amplification module when the current branch to be detected in the circuit is in the first state and the second state;

[0026] Figure 4 Schematic diagram of the connection relationship between a photosensitive diode and a first node according to a specific embodiment of the present application;

[0027] Figure 5 For Figure 3 Drive control timing diagram of the ambient photoreceptor shown;

[0028] Figure 6 For Figure 3 Schematic diagram of the simulation result of the ambient photoreceptor shown. Specific embodiments

[0029] It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other. The present invention will be described in detail below with reference to the drawings and in conjunction with the embodiments.

[0030] As Figure 1 shown, in the related art, the ambient photoreceptor is located beside the camera in the screen.

[0031] The relationship between the magnitude of the photocurrent generated by the PN junction of the ambient photoreceptor under different illuminances and the PN junction voltage can be summarized as expression (1):

[0032] I = V·S·L·K·T·EXP(hλe) (1)

[0033] Wherein, V is the forward voltage of the PN junction, S is the area of the PN junction channel region, L is the depth of the photoelectron, K is a common coefficient, T is the Kelvin temperature, hλ is the photoelectron ability, and e is the charge of the majority carriers.

[0034] Therefore, it can be considered to determine the magnitude of the photocurrent generated by detecting the voltage of the ambient photoreceptor, so as to inversely deduce the light intensity received by the ambient photoreceptor.

[0035] Embodiment 1

[0036] This embodiment provides a circuit 1, as Figure 2 shown, the circuit 1 may include: a first single-stage amplification module 10, which includes a first power supply terminal V dd1 , a control terminal Input and a first node N1, and is used to according to the first power supply terminal V dd1The voltage signal of the control terminal Input controls the output current of the first node N1; the first load module 20 is used to shunt the output current with the current branch 2 to be detected, so as to control the voltage of the first node N1 according to the current obtained by the first load module 20; the voltage division detection module 30 is used to determine the current value of the current branch 2 to be detected in the second state according to the voltage of the first node N1 when the current branch 2 to be detected is in the first state and the second state respectively, wherein there is no current in the current branch 2 to be detected in the first state, and there is current in the current branch 2 to be detected in the second state.

[0037] As Figure 3 shown, when voltage signals V of different magnitudes are input to the control terminal Input of the single-stage amplification module 10 in , the voltage V of the first node N1 will also change accordingly.

[0038] Through the above circuit, the detection of the current of the current branch to be detected can be converted into the detection of its voltage, and the magnitude of the current in the current branch to be detected can be deduced by detecting the voltage change of the first node N1 when there is or is no current in the current branch to be detected, so as to eliminate the influence of the threshold voltage of the single-stage amplification component on the current detection result and make the current detection result more accurate.

[0039] In one example, the first single-stage amplification module 10 may include: a first transistor M1, the gate of the first transistor M1 is connected to the control terminal Input of the first single-stage amplification module, the source of the first transistor M1 is connected to the first power supply terminal V dd1 , and the drain of the first transistor M1 is connected to the first node N1.

[0040] Of course, the single-stage amplification module 10 may also adopt other more complex circuit designs. For example, the above control logic may be implemented by connecting multiple transistors.

[0041] In one example, the first load module 20 may include: a second transistor M2, the gate and drain of the second transistor M2 are connected to the second power supply terminal, and the source of the second transistor M2 is connected to the first node N1.

[0042] Of course, the first load module 20 may also be implemented by other devices. For example, a variable resistor may be used, as long as it can convert the current of the first node N1 into a voltage output.

[0043] In one example, the voltage division detection module 30 may include: a voltage reset unit 301 for resetting the voltages of the second node N2, the third node N3, and the fifth node N5 according to a reset pulse signal; a writing unit 302 for setting the voltage of the fifth node N5 according to the voltage of the first node N1 in a first state and writing the voltage of the first node N1 into the second node N2 in a second state; a second single-stage amplification unit 303 for controlling the current from the second node N2 to the third node N3 according to the voltage of the fifth node N5 in the first state and the voltage of the second node N2 in the second state; and a second load unit 304 for controlling the current from the second node N2 to the third node N3 to be the voltage of the third node N3.

[0044] In one example, the voltage reset unit 301 may include: a third transistor M3, the gate of the third transistor M3 is connected to the control terminal Reset of the voltage reset unit, the drain of the third transistor M3 is connected to the third power supply terminal Vinit, and the source of the third transistor M3 is connected to the fourth node N4.

[0045] In one example, the writing unit 302 may include: a fourth transistor M4, a fifth transistor M5, and a sixth transistor M6. The gates of the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are all connected to the control terminal of the writing unit. The source of the fourth transistor M4 is connected to the first node, the drain of the fourth transistor M4 is connected to the second node, the source of the fifth transistor M5 is connected to the fourth node, the drain of the fifth transistor M5 is connected to the third node, the source of the sixth transistor M6 is connected to the fourth node, and the drain of the sixth transistor M6 is connected to the fifth node.

[0046] In another example, only one of the fifth transistor M5 and the sixth transistor M6 may be retained, and those skilled in the art can set it according to needs.

[0047] In one example, the second single-stage amplification unit 303 may include: a seventh transistor M7, the gate of the seventh transistor M7 is connected to the control terminal of the second single-stage amplification unit, the source of the seventh transistor M7 is connected to the second node N2, and the drain of the seventh transistor M7 is connected to the third node N3.

[0048] In one example, the second load unit 304 may include: an eighth transistor M8, the gate and the drain of the eighth transistor M8 are connected to the fourth power supply terminal, and the source of the eighth transistor M8 is connected to the third node N3.

[0049] In one example, the voltage division detection module 30 may further include: an output control unit 305 for controlling the connection and disconnection between the third node N3 and the output terminal Out of the voltage division detection module 30.

[0050] In one example, the output control unit 305 may include: a ninth transistor M9, the gate of the ninth transistor M9 is connected to the control terminal of the output control unit, the drain of the ninth transistor M9 is connected to the third node N3, and the source of the ninth transistor M9 is connected to the output terminal Out of the voltage division detection module 30.

[0051] In one example, the voltage division detection module may further include: a compensation capacitor C, a first end of the compensation capacitor C is connected to the fifth power supply terminal V dd2 , and a second end of the compensation capacitor C is connected to the fifth node N5.

[0052] By using the above voltage division detection module, when outputting the voltage, the influence of the threshold voltages of the first single-stage amplification module 10 and the second single-stage amplification unit 303 on the output voltage can be eliminated, so as to accurately detect the current generated by the current branch to be detected.

[0053] In other examples, the voltage division detection module may also be implemented by other feasible circuit connection methods, as long as the current of the current branch to be detected can be accurately determined according to the voltage change of the first node N1, and as long as the above functions of the present disclosure can be implemented, they are all within the protection scope of the present disclosure.

[0054] When detecting the current, the threshold voltage of the large-size transistor will affect the accuracy of the current detection result. By using the circuit design of this embodiment, the threshold voltage of the large-size transistor can be compensated, which is beneficial to improving the accuracy of the current detection result in the current branch to be detected.

[0055] Embodiment 2

[0056] This embodiment provides a drive control method, which is implemented based on the circuit described above. The drive control method may include the following steps:

[0057] S100: In the first stage of each detection cycle, provide a first voltage signal to the control terminal of the first single-stage amplification module to make the current branch to be detected in the first state.

[0058] S200: In the second stage after the first stage of the detection cycle, provide a second voltage signal to the control terminal of the first single-stage amplification module to make the current branch to be detected in the second state.

[0059] Through the above method, the current in the current branch to be detected when it is in the second state can be determined according to the voltage change of the first node N1 when the current branch to be detected is in the first state and the second state.

[0060] In one example, when the voltage division detection module includes at least a voltage reset unit, a writing unit, a second single-pole amplification unit, and a second load unit, the method may further include: resetting the second node, the third node, and the fifth node according to a reset pulse signal; setting the voltage of the fifth node according to the voltage of the first node in a first stage of each detection period; and writing the voltage of the first node into the second node in a second stage after the first stage of the detection period.

[0061] Embodiment III

[0062] This embodiment provides an ambient light photoreceptor, as Figure 2 shown, the ambient light photoreceptor may include: a photoelectric acquisition module 2, which is configured to generate a photocurrent according to ambient light; and the circuit 1 as described above, wherein the photoelectric acquisition module 2 serves as a current branch to be detected.

[0063] In one example, the photoelectric acquisition module 2 may include: a photosensitive diode, wherein the positive electrode of the photosensitive diode is connected to a fifth power supply terminal, and the negative electrode of the photosensitive diode is connected to a first node N1. As Figure 4 shown, the positive electrode of the photosensitive diode may be grounded.

[0064] Embodiment IV

[0065] This embodiment provides a specific embodiment of a circuit. In this embodiment, the ambient light photoreceptor is regarded as a current source whose current changes with the voltages on both sides, that is, the ambient light photoreceptor is simplified to a voltage-controlled current source.

[0066] As Figure 2 shown, the entire circuit may be designed as a polysilicon substrate and a gate oxide layer thereon, wherein both M1 and M3 are large-size TFTs (Thin Film Transistors), and by controlling the range of the voltage V dd1 of the first power supply terminal and the voltage V in of the Input, M1 can be made to operate in the saturation region (V dd1 + V th1 > V in ).

[0067] The magnitude I ds1 of the current flowing through M1 satisfies the expression (2):

[0068] I ds1 = K M1 (V gs1 - V th1 ) 2 = K M1 (V in - V dd1 - V th1 )2 (2)

[0069] Among them, K M1 is only related to the size parameters of the M1 TFT. The size parameters of the M1 TFT are as follows: V ds1 = -20V, Ron1 = 34mV, gate Q1 = 13nC, V th1 = -8V, Width1 = 17.5um, length1 = 0.5um, λ1 = 0.0001.

[0070] The current flows through M2 (whose gate and drain are connected, equivalent to a large resistor), making the voltage of the first node N1 become a large voltage, thereby realizing the modulation of the voltage of the ambient photoreceptor.

[0071] The magnitude of the current flowing through M2, I ds2 satisfies the expression (3):

[0072] I ds2 = K M2 (V N1 + V th2 ) 2 (3)

[0073] Among them, K M2 is only related to the size parameters of the M2 TFT. The size parameters of the M2 TFT are as follows: V ds2 = -40V, Ron2 = 27mV, gate Q2 = 19nC, V th2 = -8V, Width2 = 17.5um, length2 = 0.5um, λ2 = 0.005.

[0074] As Figure 3 shown, in order to eliminate the dark-state background current of the ambient photoreceptor, the working area of the ambient photoreceptor is divided into a Base area and a collection area. The magnitude of V in can be adjusted so that when V in is a low voltage, the voltage at point N1 is a low voltage. At this time, there is no current in the ambient photoreceptor, and the voltage at point N1 at this time is set as the Base voltage.

[0075] Base stage: Without ambient light irradiation, the ambient photoreceptor does not work, and the variable current source current is 0. Thus, I ds2 = I ds1 , and the voltage relationship of the first node N1 satisfies the expression (4):

[0076]

[0077] Collection stage: With ambient light irradiation, the ambient photoreceptor starts to work, continuously adjusting V in, the variable current source current changes to I x , thus, I ds2 ’ = I ds1 ’ - I x , the current flowing through M2 is:

[0078] I ds2 ’ = K M1 (V in ’ - V dd1 ’ - V th1 ) 2 - I x = K M2 (V N1 ’ + V th2 ) 2 (5)

[0079] The voltage relationship of the first node N1 satisfies the expression (6):

[0080]

[0081] Thus, the detected current signal I x is converted into the detected voltage signals V N1 and V N1 ’, and the voltage signals V N1 and V N1 ’ are carrier voltages, that is, they contain V in , V in ’, V dd1 and / or V dd1 ’, and thus will not be submerged in the noise.

[0082] Figure 3 According to Figure 2 the simulation results of the circuit shown, it can be seen that in the Base region, according to the input voltage V in , the voltage at point N1 is 0. In the acquisition region, according to a voltage V in different from V in ’, the voltage at point N1 also changes with different amplitudes accordingly. In the actual implementation process, the photocurrent of the environmental photoreceptor in the Base region is also very small, about on the order of 10 -8 , while the current in the acquisition region is on the order of 10 -4 , and the difference between the two is very large. Therefore, the current in the Base region can be almost ignored relative to the current in the acquisition region.

[0083] Analyzing the expression (6), it can be seen that V N1 ’ in the acquisition region contains V th1 , and V th1 itself is affected by temperature and the charge distribution in the depletion layer. Therefore, self-compensation needs to be carried out in the circuit to eliminate Vth1 Effect on the acquired signal

[0084] As Figure 5 shown in the timing diagram, the drive control of the Figure 2 circuit includes the following three processes.

[0085] Process 1: Reset is set to low level, G1 and G2 are set to high level, M3, M5, M6, and M7 are turned on, and the voltages at points N2, N3, N4, and N5 are reset. For example, they can be reset to -7V (Vinit is -7V).

[0086] Process 2: Reset and G2 are set to high level, G1 is set to low level, and the voltage at point N1 charges the capacitor C until the charging voltage of the capacitor C is V N1 +V th7 .

[0087] Process 3: Reset is set to high level, G2 and G1 are set to low level, M6 is turned off, and the voltage at point N1 is the acquired voltage. At this time, the expression (7) of the current between point N2 and point N3 is as follows:

[0088] I ds7 =K M7 (V gs7 -V th7 ) 2 (7)

[0089] where V g7 =V N1 +V th7 , V s7 =V N1 ’.

[0090] Furthermore, the following expression (8) can be obtained:

[0091] I ds7 =K M7 (V out1 ) 2 (8)

[0092] where V out1 =V N1 ’-V N1 .

[0093] In Figure 2 , the function of M8 is that of a variable resistor, and thus the following expression (9) of the output voltage is obtained:

[0094]

[0095] In expression (9), the value of V th8 is relatively small, for V outThe influence is small and can be almost ignored. By means of expression (9), the influence of the threshold voltages of M1 and M7 on the detection result is eliminated, making the photocurrent of the photodiode deduced from V out more accurate.

[0096] As Figure 6 shown, it is the simulation result of the circuit of this embodiment.

[0097] In this embodiment, the size parameters of M7 and M1 TFTs are the same, and the size parameters of M8 and M2 TFTs are the same. The size parameters of M3 and M9 as P-type Switch TFTs are as follows: Vds = -20V, Ron = 4mΩ, gate Q = 70nC, Vth = -0.67V, Width = 3um, length = 7um, λ = 0.0192. The size parameters of M4 and M7 as N-type Switch TFTs are as follows: V ds = -20V, Ron = 12mΩ, gate Q = 18nC, Vth = 1V, Width = 3um, length = 7um, λ = 0.005.

[0098] In this embodiment, the voltage signal under no ambient light irradiation is subtracted before each collection of the photocurrent signal. Similar to a current mirror with an amplification function, the photocurrent signal collected at point N1 is primarily amplified and converted into a voltage signal, the signal at point N3 is secondarily amplified and converted into a current signal, and then converted into a voltage signal through M8 for output. The voltage signal is more convenient to collect and has small fluctuations.

[0099] Embodiment Five

[0100] This embodiment provides a display panel, including the ambient light photoreceptor as described above. The display panel can be the display panel of various mobile terminals, for example, the display panels of mobile phones, tablet computers, and laptop computers.

[0101] Embodiment Six

[0102] This embodiment provides a display device, including the display panel as described above. The display device is, for example, any product or component with a display function such as a display module, a display, a mobile phone, a tablet computer, a navigator, etc.

[0103] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. When the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0104] It should be noted that the terms "first", "second", etc. in the description, claims and drawings of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances.

[0105] It should be understood that the exemplary embodiments in this specification can be implemented in many different forms and should not be construed as being limited only to the embodiments set forth herein. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step for execution, and / or one step may be decomposed into multiple steps for execution. These embodiments are provided to make the disclosure of this application thorough and complete, and to fully convey the concept of these exemplary embodiments to those of ordinary skill in the art, and should not be construed as a limitation of the present invention.

[0106] Although the spirit and principles of the present invention have been described with reference to several specific embodiments, it should be understood that the present invention is not limited to the specific embodiments disclosed, and the division of each aspect does not mean that the features in these aspects cannot be combined for benefit. This division is only for the convenience of expression. The present invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A circuit, characterized in that, Comprising: A first single-stage amplification module, including a first power supply terminal, a control terminal, and a first node, for controlling the output current of the first node according to the voltage signal of the first power supply terminal and the voltage signal of the control terminal; A first load module, for shunting the output current with the current branch to be detected, so as to control the voltage of the first node according to the current divided by the first load module; A voltage division detection module, for determining the current value of the current branch to be detected in the second state according to the voltage of the first node when the current branch to be detected is in the first state and the second state respectively, wherein there is no current in the current branch to be detected in the first state, and there is current in the current branch to be detected in the second state; The first single-stage amplification module, the first load module, the voltage division detection module, and the current branch to be detected are connected at the first node.

2. The circuit according to claim 1, characterized in that, The first single-stage amplification module includes: a first transistor, the gate of the first transistor is connected to the control terminal of the first single-stage amplification module, the source of the first transistor is connected to the first power supply terminal, and the drain of the first transistor is connected to the first node.

3. The circuit according to claim 1, wherein The first load module includes: a second transistor, the gate and the drain of the second transistor are connected to a second power supply terminal, and the source of the second transistor is connected to the first node.

4. The circuit according to claim 1, wherein The voltage division detection module includes: A voltage reset unit, for resetting the voltages of the second node, the third node, and the fifth node according to a reset pulse signal; A writing unit, for setting the voltage of the fifth node according to the voltage of the first node in the first state, and writing the voltage of the first node into the second node in the second state; A second single-stage amplification unit, for controlling the current from the second node to the third node according to the voltage of the fifth node in the first state and the voltage of the second node in the second state; A second load unit, for controlling the current from the second node to the third node to be the voltage of the third node; Wherein, the writing unit includes: a fourth transistor, a fifth transistor, and a sixth transistor; the source of the fourth transistor is connected to the first node, the sources of the fifth transistor, the sixth transistor, and the voltage reset unit are connected, the second node is the node where the drain of the fourth transistor is connected to the second single-stage amplification unit, the third node is the node where the drain of the fifth transistor, the second single-stage amplification unit, and the second load unit are connected, and the fifth node is the connection node between the control terminal of the second single-stage amplification unit and the drain of the sixth transistor.

5. The circuit according to claim 4, wherein The voltage reset unit includes: a third transistor, the gate of the third transistor is connected to the control terminal of the voltage reset unit, the drain of the third transistor is connected to a third power supply terminal, and the source of the third transistor is connected to a fourth node.

6. The circuit according to claim 4, wherein Among them, The gates of the fourth transistor, the fifth transistor, and the sixth transistor are all connected to the control terminal of the writing unit. The drain of the fourth transistor is connected to the second node. The source of the fifth transistor is connected to the fourth node, and the drain of the fifth transistor is connected to the third node. The source of the sixth transistor is connected to the fourth node, and the drain of the sixth transistor is connected to the fifth node.

7. The circuit according to claim 4, characterized in that, The second single-stage amplification unit includes: a seventh transistor. The gate of the seventh transistor is connected to the control terminal of the second single-stage amplification unit. The source of the seventh transistor is connected to the second node, and the drain of the seventh transistor is connected to the third node.

8. The circuit according to claim 4, wherein The second load unit includes: an eighth transistor. The gate and the drain of the eighth transistor are connected to the fourth power supply terminal, and the source of the eighth transistor is connected to the third node.

9. The circuit according to claim 4, wherein The voltage division detection module further includes: An output control unit for controlling the on / off between the third node and the output terminal of the voltage division detection module.

10. The circuit according to claim 9, characterized in that, The output control unit includes: a ninth transistor. The gate of the ninth transistor is connected to the control terminal of the output control unit. The drain of the ninth transistor is connected to the third node, and the source of the ninth transistor is connected to the output terminal of the voltage division detection module.

11. An environmental photoreceptor, characterized in that, including: An optoelectronic acquisition module for generating a photocurrent according to the ambient light; The circuit according to any one of claims 1 to 10, wherein the optoelectronic acquisition module serves as the current branch to be detected.

12. The environmental photoreceptor according to claim 11, wherein, The optoelectronic acquisition module includes: a photosensitive diode, wherein the positive electrode of the photosensitive diode is connected to the fifth power supply terminal, and the negative electrode of the photosensitive diode is connected to the first node.

13. A display panel, characterized in that, including the ambient light photoreceptor according to claim 11 or 12.

14. A display device, characterized in that, including the display panel according to claim 13.

15. A drive control method, characterized in that, Based on the circuit according to any one of claims 1 to 10, the driving control method includes: In the first stage of each detection period, a first voltage signal is provided to the control terminal of the first single-stage amplification module to make the current branch to be detected in the first state; In the second stage after the first stage of the detection period, a second voltage signal is provided to the control terminal of the first single-stage amplification module to make the current branch to be detected in the second state.

16. The method according to claim 15, wherein The method further includes: Resetting the second node, the third node, and the fifth node according to a reset pulse signal; In the first stage of each detection period, setting the voltage of the fifth node according to the voltage of the first node; In the second stage after the first stage of the detection period, writing the voltage of the first node into the second node; The voltage division detection module includes: a voltage reset unit, a writing unit, and a second single-stage amplification unit; wherein, the writing unit includes: a fourth transistor, a fifth transistor, and a sixth transistor; the source of the fourth transistor is connected to the first node, the sources of the fifth transistor, the sixth transistor, and the voltage reset unit are connected, the second node is the node where the drain of the fourth transistor is connected to the second single-stage amplification unit, the third node is the node where the drain of the fifth transistor, the second single-stage amplification unit, and the second load unit are connected, and the fifth node is the connection node between the control end of the second single-stage amplification unit and the drain of the sixth transistor.

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