Switching converter, control circuit and control method thereof

Abstract

The present invention discloses a switching converter, a control circuit, and a control method thereof. The switching converter converts an input voltage signal into an output voltage signal by controlling a power switch. The control circuit includes a transient response circuit that generates a transient voltage signal representing transient information of the output voltage signal; a mode determination circuit that compares a first feedback voltage signal representing the output voltage signal with a first threshold voltage to generate a first comparison signal, compares the transient voltage signal with a second threshold voltage to generate a second comparison signal, and generates a mode signal based on the first and second comparison signals; an on-time adjustment circuit that generates an on-time signal for adjusting the on-time of the power switch based on the mode signal; and a switch control circuit that generates a switch control signal based on the on-time signal and a second feedback voltage signal representing the output voltage signal to control the power switch. The control circuit reduces output voltage overshoot during system transients.

Description

Technical Field

[0001] The present invention relates to an electronic circuit, and in particular to a switching converter and a control circuit and a control method thereof. Background Art

[0002] Most electronic products, such as laptops, desktop computers, and PDAs, require a direct current (DC) power supply to provide regulated power, such as supply voltage, to various functional modules. With the advancement of electronic technology, power supplies often require faster load transient response speeds. Switching converters using constant on-time (COT) control have advantages such as fast transient response speed and simple structure, and have been widely used in these fields. In COT switching converters, when a positive load transition occurs, the on-time of the power switch is typically increased to mitigate the sharp drop in output voltage. However, operating the switching converter in this extended on-time mode for extended periods of time can easily lead to new problems, such as large output voltage overshoot and even output voltage rebound.

[0003] Figure 1 This is the waveform diagram of the inductor current and output voltage of the switching converter under the existing COT control when the load current jumps positively. Figure 1 As shown in the figure, at time T0, the load current IO jumps forward at a relatively fast speed, causing the output voltage VO to decrease rapidly. In order to slow down the sharp drop of the output voltage VO, the control circuit increases the on-time of the power switch until the output voltage VO recovers to the preset output voltage value DVO at time T1. For simplicity, Figure 1 The inductor current IL shown represents the average current flowing through the inductor. Due to the influence of the output capacitor, the output voltage VO lags behind the inductor current IL in phase. When the output voltage VO returns to the preset output voltage value DVO, the inductor current IL is already much greater than the load current IO. The energy stored in the inductor is transferred to the output voltage VO, causing the output voltage VO to exceed the preset output voltage value DVO, resulting in a large overshoot. Summary of the Invention

[0004] In view of the problems existing in the prior art, the present invention proposes a control circuit and a control method for a switching converter to reduce or avoid output voltage overshoot caused by load current jump.

[0005] According to one embodiment of the present invention, a control circuit for a switching converter is disclosed, wherein the switching converter includes a power switch, and an input voltage signal is converted into an output voltage signal by controlling the power switch. The control circuit includes: a transient response circuit, which generates a transient voltage signal representing transient information of the output voltage signal; a mode judgment circuit, which receives the transient voltage signal and a first feedback voltage signal representing the output voltage signal, compares the first feedback voltage signal with a first threshold voltage to generate a first comparison signal, compares the transient voltage signal with a second threshold voltage to generate a second comparison signal, and generates a mode signal based on the first comparison signal and the second comparison signal; an on-time adjustment circuit, which receives the mode signal and generates an on-time signal for adjusting the on-time of the power switch based on the mode signal; and a switch control circuit, which receives the on-time signal and the second feedback voltage signal representing the output voltage signal, and generates a switch control signal based on the on-time signal and the second feedback voltage signal to control the power switch.

[0006] According to yet another embodiment of the present invention, a switching converter is disclosed, including a power switch and the control circuit as described above.

[0007] According to yet another embodiment of the present invention, a control method for a switching converter is disclosed, comprising: comparing a first feedback voltage signal representing an output voltage signal with a first threshold voltage to generate a first comparison signal; comparing a transient voltage signal representing transient information of the output voltage signal with a second threshold voltage to generate a second comparison signal; generating an on-time signal for adjusting the on-time of a power switch based on the first comparison signal and the second comparison signal; generating a set signal based on a reference voltage signal and a second feedback voltage signal representing the output voltage signal; and generating a switch control signal based on the set signal and the on-time signal to control the power switch.

[0008] According to an embodiment of the present invention, when the feedback voltage signal representing the output voltage signal decreases to a first threshold voltage, the on-time of the power switch is increased; when the transient voltage signal representing the transient information of the output voltage increases to a second threshold voltage, the on-time of the power switch is decreased, thereby reducing the excess energy stored in the inductor and effectively reducing or eliminating the output voltage overshoot caused by load changes. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to better understand the present invention, the present invention will be described in detail with reference to the following drawings:

[0010] Figure 1 It is a waveform diagram of the inductor current and output voltage of the switching converter under the existing COT control when the load current jumps positively;

[0011] Figure 2is a circuit block diagram of a switching converter 200 according to an embodiment of the present invention;

[0012] Figure 3 is a schematic diagram of the circuit structure of a switching converter 300 according to an embodiment of the present invention;

[0013] Figure 4 3 is a comparison of operating waveforms of a switching converter 300 according to an embodiment of the present invention and a switching converter in the prior art;

[0014] Figure 5 According to one embodiment of the present invention, Figure 3 Schematic diagram of the circuit structure of the mode signal generating unit 53 of the switching converter 300;

[0015] Figure 6 According to one embodiment of the present invention, Figure 3 A schematic diagram of the circuit structure of the transient response circuit 61 of the switching converter 300 is shown;

[0016] Figure 7 According to another embodiment of the present invention, Figure 3 FIG. 1 is a schematic diagram of a circuit structure of a transient response circuit 71 of a switching converter 300;

[0017] Figure 8 is a flow chart of a control method 800 for a switching converter according to one embodiment of the present invention. DETAILED DESCRIPTION

[0018] Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the present invention. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that these specific details are not necessarily required to practice the present invention. In other instances, well-known circuits, materials, or methods are not described in detail to avoid obscuring the present invention.

[0019] Throughout this specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one embodiment," "in an embodiment," "an example," or "an example" in various places throughout this specification do not necessarily all refer to the same embodiment or example. Furthermore, particular features, structures, or characteristics may be combined in any suitable combination and / or subcombination in one or more embodiments or examples. Furthermore, those skilled in the art will appreciate that the figures provided herein are for illustrative purposes only and are not necessarily drawn to scale. It should be understood that when an "element" is referred to as being "connected to" or "coupled to" another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements. Identical reference numerals indicate identical elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0020] Figure 2 FIG2 is a circuit block diagram of a switching converter 200 according to an embodiment of the present invention. The switching converter 200 includes a power stage circuit 21 and a control circuit 22. The power stage circuit 21 includes a power switch, which controls the on and off of the power switch to convert the input voltage signal V IN Converted into output voltage signal V OUT The load RL is coupled to the output voltage signal V OUT and reference ground.

[0021] The control circuit 22 includes a transient response circuit 221, a mode determination circuit 222, an on-time adjustment circuit 223, and a switch control circuit 224. The control circuit 22 generates a switch control signal CTRL to control the power switch. In one embodiment, the control circuit 22 can be integrated into a single chip.

[0022] exist Figure 2 In the embodiment shown, the transient response circuit 221 receives the output voltage signal V OUT The first feedback voltage signal V FB1 , and based on the first feedback voltage signal V FB1 Generates a signal representing the output voltage V OUT Transient voltage signal V of transient information tra In one embodiment, the transient response circuit 221 filters out the first feedback voltage signal V FB1 The DC component in the circuit provides a transient voltage signal V tra , to better reflect the output voltage signal V of the switching converter 200 OUT transient information.

[0023] The mode determination circuit 222 receives the transient voltage signal V tra and the first feedback voltage signal V FB1 , and based on the transient voltage signal V tra and the first feedback voltage signal V FB1 Generate a mode signal MODE. Specifically, the mode determination circuit 222 converts the first feedback voltage signal V FB1 With the first threshold voltage V th1 Comparison is performed to generate a first comparison signal, and the transient voltage signal V tra and the second threshold voltage V th2 Comparison is performed to generate a second comparison signal, and then a mode signal MODE is generated according to the first comparison signal and the second comparison signal. In one embodiment, when the first feedback voltage signal V FB1 Decreases to the first threshold voltage V th1 When the mode signal MODE switches from the first state to the second state; when the transient voltage signal V tra Increases to the second threshold voltage V th2 , the mode signal MODE switches from the second state to the first state.

[0024] The on-time adjustment circuit 223 receives the input voltage signal V IN , output voltage signal V OUT and mode signal MODE, and based on the input voltage signal V IN , output voltage signal V OUT and the mode signal MODE to generate the on-time signal TON. When the mode signal MODE is switched from the first state to the second state, the on-time signal TON is adjusted to control the on-time of the power switch to increase, thereby slowing down the undershoot of the output voltage signal VOUT; when the mode signal MODE is switched from the second state to the first state, the on-time signal TON is adjusted to control the on-time of the power switch to decrease, thereby reducing or avoiding the overshoot of the output voltage signal VOUT. In one embodiment, the time duration that the on-time signal TON is in an effective state (such as a logic low state) in one switching cycle is equal to the on-time of the power switch. In another embodiment, the on-time adjustment circuit 223 does not receive the input voltage signal V IN And the output voltage signal V OUT , only receives the mode signal MODE, and generates the on-time signal TON according to the mode signal MODE and the fixed signal inside the on-time adjustment circuit 223.

[0025] The switch control circuit 224 receives the on-time signal TON and the output voltage signal V OUT The second feedback voltage signal V FB2, and based on the on-time signal TON and the second feedback voltage signal V FB2 Generates a switch control signal CTRL to control the power switch. Specifically, the switch control circuit 224 generates a switch control signal CTRL according to the reference voltage signal V REF and the second voltage feedback signal V FB2 A set signal SET is generated, and then a switch control signal CTRL is generated according to the set signal SET and the on-time signal TON.

[0026] Figure 3 FIG. 1 is a schematic diagram of a circuit structure of a switching converter 300 according to an embodiment of the present invention. Figure 3 As shown, the power stage circuit of the switching converter 300 includes a high-side switch HS, a low-side switch LS, an inductor L, and an output capacitor CO. Specifically, the high-side switch HS has a first terminal, a second terminal, and a control terminal, wherein the first terminal receives an input voltage signal V IN The low-side switch LS has a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the second terminal of the high-side switch HS, and the second terminal is coupled to the reference ground. The inductor L has a first terminal and a second terminal, wherein the first terminal is coupled to the common terminal of the high-side switch HS and the low-side switch LS. The output capacitor CO has a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the inductor L, and the second terminal is coupled to the reference ground. Figure 3 In the illustrated embodiment, switching converter 300 is described using a buck converter as an example, wherein both the high-side switch HS and the low-side switch LS are power switches. In another embodiment, the low-side switch LS may be replaced by a diode. Those skilled in the art will appreciate that switching converter 300 may be configured as any suitable DC / DC or AC / DC converter topology, such as a synchronous or asynchronous buck, boost, forward, or flyback converter. The power switch of switching converter 300 may be any controllable semiconductor device, such as a BJT, JFET, MOSFET, or IGBT.

[0027] exist Figure 3 In the embodiment shown, the control circuit of the switching converter 300 includes a transient response circuit 31, a mode determination circuit 32, an on-time adjustment circuit 33, and a switch control circuit 34. The transient response circuit 31 includes a capacitor 311 and a resistor 312. The capacitor 311 has a first terminal and a second terminal, wherein the first terminal receives the first feedback voltage signal V FB1 The resistor 312 has a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the capacitor 311, and the second terminal is coupled to the reference ground. The transient response circuit 31 responds to the first feedback voltage signal V FB1 , a transient voltage signal V is generated at the common end of the capacitor 311 and the resistor 312 tra .

[0028] The mode judgment circuit 32 includes a first comparison circuit 321, a second comparison circuit 322 and a mode signal generating unit 323. The first comparison circuit 321 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a first threshold voltage V th1 , the second input terminal receives the first feedback voltage signal V FB1 The first comparison circuit 321 converts the first threshold voltage V th1 and the first feedback voltage signal V FB1 Compare and generate a first comparison signal CA1 at its output terminal according to the comparison result. FB1 Greater than the first threshold voltage V th1 When the first comparison signal CA1 has a first state (such as a low level state), when the first feedback voltage signal V FB1 Less than the first threshold voltage V th1 In one embodiment, the first comparison circuit 321 includes a first comparator CMP1 having a non-inverting input terminal, an inverting input terminal and an output terminal, wherein the non-inverting input terminal receives the first threshold voltage V th1 , the inverting input terminal receives the first feedback voltage signal V FB1 .

[0029] The second comparison circuit 322 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives the second threshold voltage V th2 , the second input terminal receives the transient voltage signal V tra The second comparison circuit 322 converts the transient voltage signal V tra and the second threshold voltage V th2 Compare and generate a second comparison signal CA2 at its output terminal according to the comparison result. tra Greater than the second threshold voltage V th2 When the second comparison signal CA2 has the first state, when the transient voltage signal V tra is less than the second threshold voltage V th2 , the second comparison signal CA2 has the second state.

[0030] In one embodiment, the second comparison circuit 322 includes a second comparator CMP2 having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein the non-inverting input terminal receives the second threshold voltage V th2 , the inverting input receives the transient voltage signal V tra, the first state of the second comparison signal CA2 is a low level state, and the second state of the second comparison signal CA2 is a high level state. In another embodiment, the second comparison circuit 322 includes a second comparator CMP2 having a non-inverting input terminal, an inverting input terminal and an output terminal, wherein the non-inverting input terminal receives the transient voltage signal V tra , the inverting input terminal receives the second threshold voltage V th2 , the first state of the second comparison signal CA2 is a high level state, and the second state of the second comparison signal CA2 is a low level state.

[0031] The mode signal generating unit 323 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is coupled to the output terminal of the first comparison circuit 321 to receive the first comparison signal CA1, and the second input terminal is coupled to the output terminal of the second comparison circuit 322 to receive the second comparison signal CA2. The mode signal generating unit 323 generates a mode signal MODE at the output terminal based on the first comparison signal CA1 and the second comparison signal CA2. When the first comparison signal CA1 switches from the first state to the second state, that is, the first feedback voltage signal V FB1 Decreases to the first threshold voltage V th1 When the mode signal MODE switches from the first state (such as the low level state) to the second state (such as the high level state), when the second comparison signal CA2 switches from the second state to the first state, that is, the transient voltage signal V tra Increases to the second threshold voltage V th2 , the mode signal MODE switches from the second state to the first state.

[0032] In one embodiment, the mode signal generating unit 323 includes an overshoot control unit 3231 and a first logic unit 3232. The overshoot control unit 3231 receives the second comparison signal CA2 and generates an overshoot control signal SE. When the second comparison signal CA2 switches from the second state to the first state, the overshoot control signal SE switches from an inactive state (e.g., a high level state) to an active state (e.g., a low level state) and maintains the active state for a holding time t hold Then it switches to the invalid state. That is, when the transient voltage signal V tra Increases to the second threshold voltage V th2 When the overshoot control unit 3231 switches the overshoot control signal SE from the invalid state to the valid state, the holding time t hold After that, the overshoot control signal SE is switched from the valid state to the invalid state. In one embodiment, the holding time t holdIt can be stored in a register and set via a communication bus such as I2C, SMBUS, and PMBUS. The first logic unit 3232 receives the first comparison signal CA1 and the overshoot control signal SE and performs a logic operation on the first comparison signal CA1 and the overshoot control signal SE to generate a mode signal MODE.

[0033] Although the above embodiment shows a possible circuit structure of the mode signal generating unit 323, it will be understood by those skilled in the art that this embodiment is for illustration only and is not intended to limit the present invention. Other suitable circuit structures that can achieve the same or similar functions also fall within the spirit and scope of the present invention.

[0034] The on-time adjustment circuit 33 receives the input voltage signal V IN , output voltage signal V OUT and mode signal MODE, and based on the input voltage signal V IN , output voltage signal V OUT The on-time signal TON is generated together with the mode signal MODE to adjust the on-time of the high-side switch HS. When the mode signal MODE switches from a first state to a second state, the on-time signal TON controls the on-time of the high-side switch HS to increase. When the mode signal MODE switches from the second state to the first state, the on-time signal TON controls the on-time of the high-side switch HS to decrease. In one embodiment, the on-time signal TON is used to control the high-side switch HS to maintain a constant on-time, that is, to determine the turn-off time of the high-side switch HS.

[0035] In one embodiment, the switch control circuit 34 includes a third comparison circuit 341 and a second logic unit 342. The third comparison circuit 341 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage signal V REF , the second input terminal receives the second feedback voltage signal V FB2 The third comparison circuit 341 converts the reference voltage signal V REF and the second feedback voltage signal V FB2 In one embodiment, the third comparison circuit 341 includes a third comparator CMP3 having a non-inverting input terminal, an inverting input terminal and an output terminal, wherein the non-inverting input terminal receives a reference voltage signal V REF , the inverting input terminal receives the second feedback voltage signal V FB2 .exist Figure 3 In the embodiment shown, the first feedback voltage signal V FB1 and the second feedback voltage signal V FB2 In other embodiments, the first feedback voltage signal VFB1 and the second feedback voltage signal V FB2 It can also be the same signal.

[0036] The second logic unit 342 receives the set signal SET and the on-time signal TON, and generates a switch control signal CTRL based on the set signal SET and the on-time signal TON to control the high-side switch HS and the low-side switch LS. When the system is running, if the set signal SET is at a high level, the second logic unit 342 provides a high-level switch control signal CTRL to turn on the high-side switch HS. After a constant on-time, such as when the on-time signal TON switches from a low level to a high level, the second logic unit 342 switches the switch control signal CTRL from a high level to a low level to turn off the high-side switch HS. After the minimum off-time t off Afterwards, if the set signal SET is at a high level, the second logic unit 342 switches the switch control signal CTRL from a low level to a high level again to turn on the high-side switch HS.

[0037] Figure 4 The following is a comparison of the operating waveforms of the switching converter 300 according to an embodiment of the present invention and the switching converter of the prior art. Figure 4 Detailed explanation Figure 3 The operating principle of the switching converter 300 is shown.

[0038] like Figure 4 As shown, when the load current jumps positively, the output voltage signal V OUT Decreases rapidly, the first feedback voltage signal V FB1 At time t1, the first feedback voltage signal V FB1 Decreases to the first threshold voltage V th1 , the first comparison signal CA1 switches from the first state to the second state, at this time the transient voltage signal V tra Greater than the second threshold voltage V th2 , the second comparison signal CA2 is in the first state, the overshoot control signal SE is in the invalid state, and after the logic operation, the mode signal MODE is switched from the first state to the second state, and the on-time adjustment circuit 33 adjusts the on-time signal TON to increase the on-time of the high-side switch HS (e.g., from t on1 Increase to t on2 ), thereby slowing down the sharp drop in output voltage. At time t2, the transient voltage signal V tra Increases to the second threshold voltage V th2 , the second comparison signal CA2 switches from the second state to the first state, and the overshoot control signal SE switches from the invalid state to the valid state. At this time, the first feedback voltage signal V FB1 Less than the first threshold voltage V th1, the first comparison signal CA1 is in the second state. After logic operation, the mode signal MODE is switched from the second state to the first state. The on-time adjustment circuit 33 adjusts the on-time signal TON to reduce the on-time of the high-side switch HS (e.g., from t on2 Reduced to t on3 ), thereby reducing the overshoot of the output voltage.

[0039] In the prior art, at time t1, the conduction time of the high-side switch HS increases until time t3, when the first feedback voltage signal V FB1 Increase to the third threshold V th3 When , the conduction time of the high-side switch HS is reduced. At this time, the energy stored in the inductor is much greater than the energy required by the load.

[0040] Compared with the prior art, the transient response circuit 31 of the switching converter 300 filters out the first feedback voltage signal V FB1 The DC component in the transient voltage signal V tra Better reflects the output voltage signal V of the switching converter 300 OUT The switching converter 300 can adjust the on-time signal TON in advance to reduce the on-time of the power switch in advance. That is, the on-time of the high-side switch HS is reduced at time t2, thereby reducing the excess energy stored in the inductor and effectively reducing the output voltage overshoot caused by the load current jump.

[0041] Figure 5 According to one embodiment of the present invention, Figure 3 FIG. 5 is a schematic diagram of the circuit structure of the mode signal generating unit 53 of the switching converter 300. Figure 5 As shown, the mode signal generating unit 53 includes an overshoot control unit 531 and a first logic unit 532. Figure 5 In the embodiment shown, the overshoot control unit 531 includes a pulse generating circuit 5311 and an inverter 5312. The pulse generating circuit 5311 has an input terminal and an output terminal, wherein the input terminal receives the second comparison signal CA2. tra Increases to the second threshold voltage V th2 , that is, when the second comparison signal CA2 switches from the second state to the first state, the pulse generating circuit 5311 generates a pulse signal SP at its output terminal, wherein the pulse width is t holdThe inverter 5312 has an input terminal and an output terminal, wherein the input terminal is coupled to the pulse generating circuit 5311 to receive the pulse signal SP. The inverter 5312 inverts the pulse signal SP and generates an overshoot control signal SE at its output terminal. The first logic unit 532 includes an AND gate circuit AND, having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal receives the first comparison signal CA1, and the second input terminal receives the overshoot control signal SE. The AND gate circuit AND performs an AND logic operation on the first comparison signal CA1 and the overshoot control signal SE to generate a mode signal MODE.

[0042] Figure 6 According to one embodiment of the present invention, Figure 3 FIG. 1 is a schematic diagram of the circuit structure of the transient response circuit 61 of the switching converter 300. Figure 6 In the embodiment shown, the transient response circuit 61 includes a resistor 611 having a first terminal and a second terminal, wherein the first terminal receives the first feedback voltage signal V FB1 Capacitor 612 is coupled between the second end of resistor 611 and the reference ground; operational amplifier 613 is connected across the resistor 611, receives the voltage across the resistor 611, and generates a transient voltage signal V tra .

[0043] Figure 7 According to another embodiment of the present invention, Figure 3 FIG. 1 is a schematic diagram of the circuit structure of the transient response circuit 71 of the switching converter 300. Figure 7 In the illustrated embodiment, the transient response circuit 71 includes transient response units 71-1 to 71-3, wherein each transient response unit 71-i (i=1, 2, 3) includes a switch 71-i1, a capacitor 71-i2, and a resistor 71-i3. The values of the capacitor 71-i2 and / or the resistor 71-i3 in each transient response unit 71-i are different to meet the needs of actual applications. The selection signal SEL is used to turn on one of the switches 71-i1 and turn off the remaining switches, so that the corresponding transient response unit 71-i receives the first feedback voltage signal V FB1 , and generates a transient voltage signal V tra In one embodiment, the selection signal SEL may be determined by parameters set by a user on a graphical user interface (GUI).

[0044] Figure 8 8 is a flow chart of a control method 800 for a switching converter according to an embodiment of the present invention. The switching converter includes a power switch, and the power switch is controlled to convert an input voltage signal into an output voltage signal. The control method 800 includes steps S81 to S85.

[0045] In step S81 , a first feedback voltage signal representing an output voltage signal is compared with a first threshold voltage to generate a first comparison signal.

[0046] In step S82 , the transient voltage signal representing the transient information of the output voltage signal is compared with a second threshold voltage to generate a second comparison signal.

[0047] In step S83, an on-time signal for adjusting the on-time of the power switch is generated based on the first comparison signal and the second comparison signal. Step S83 further includes steps S831 and S832. In step S831, when the first feedback voltage signal decreases to a first threshold voltage, the on-time signal is adjusted to increase the on-time of the power switch. In step S832, when the transient voltage signal increases to a second threshold voltage, the on-time signal is adjusted to decrease the on-time of the power switch.

[0048] In step S84 , a set signal is generated according to the reference voltage signal and the second feedback voltage signal representing the output voltage signal.

[0049] In step S85 , a switch control signal is generated according to the set signal and the on-time signal to control the power switch.

[0050] Note that in the flowcharts described above, the functions marked in the blocks may also occur in an order different from that shown in the figures. For example, two blocks shown in succession may actually be executed substantially in parallel, or they may sometimes be executed in the opposite order, depending on the specific functions involved.

[0051] In the specification and claims of this application, relative terms such as first and second, etc. may be used only to distinguish one entity or action from another entity or action, and do not necessarily or imply that there is such an order between these entities or actions. Numerical sequences such as first, second and third, etc. refer only to different individuals in a plurality and do not imply any order or sequence unless specifically defined by the claim language. The order of the text in any claim does not mean that the processing steps must be performed in this order or logical order unless specifically provided by the claim language. Without departing from the scope of the present invention, these processing steps can be interchanged in any order, as long as such interchange does not cause the claim language to be inconsistent and does not appear logically absurd.

[0052] The specific embodiments described above are intended to illustrate the present invention in an exemplary manner only. These embodiments are not exhaustive and are not intended to limit the scope of the present invention. Variations and modifications to the disclosed embodiments are possible, and other feasible alternative embodiments and equivalent variations of the elements in the embodiments will be apparent to those skilled in the art. Other variations and modifications to the disclosed embodiments do not exceed the spirit and scope of the present invention.

Claims

1. A control circuit for a switching converter, wherein the switching converter includes a power switch, and converts an input voltage signal into an output voltage signal by controlling the power switch, the control circuit comprising: a transient response circuit configured to generate a transient voltage signal representing transient information of the output voltage signal; an on-time adjustment circuit configured to generate an on-time signal for adjusting the on-time of the power switch, wherein when the first feedback voltage signal representing the output voltage signal decreases to a first threshold voltage, the on-time adjustment circuit is configured to increase the on-time of the power switch; and when the transient voltage signal increases to a second threshold voltage, the on-time adjustment circuit is configured to decrease the on-time of the power switch; as well as The switch control circuit is configured to generate a set signal according to a reference voltage signal and a second feedback voltage signal representing the output voltage signal, and is configured to generate a switch control signal based on the on-time signal and the set signal to control the power switch. 2 . The control circuit of claim 1 , wherein the transient response circuit is configured to filter out a DC component in the output voltage signal.

3. The control circuit according to claim 2, wherein the transient response circuit comprises: a capacitor having a first terminal and a second terminal, wherein the first terminal is configured to receive a first feedback voltage signal; as well as The resistor has a first end and a second end, wherein the first end is coupled to the second end of the capacitor and is configured to provide the transient voltage signal, and the second end is coupled to the reference ground.

4. The control circuit as claimed in claim 2 , wherein the transient response circuit comprises: a resistor having a first end and a second end, wherein the first end is configured to receive a first feedback voltage signal; a capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the resistor, and the second terminal is coupled to a reference ground; as well as The operational amplifier is connected across the resistor and is configured to receive the voltage across the resistor and generate the transient voltage signal.

5. The control circuit according to claim 1 , further comprising a mode determination circuit, wherein the mode determination circuit comprises: a first comparison circuit having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is configured to receive the first threshold voltage, the second input terminal is configured to receive the first feedback voltage signal, and the first comparison circuit is configured to generate a first comparison signal at the output terminal based on the first threshold voltage and the first feedback voltage signal; a second comparison circuit having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is configured to receive the second threshold voltage, the second input terminal is configured to receive the transient voltage signal, and the second comparison circuit is configured to generate a second comparison signal at the output terminal based on the second threshold voltage and the transient voltage signal; as well as The mode signal generating unit is configured to receive the first comparison signal and the second comparison signal, and generate a mode signal based on the first comparison signal and the second comparison signal.

6. The control circuit according to claim 5 , wherein the mode signal generating unit comprises: an overshoot control unit having an input terminal and an output terminal, wherein the input terminal is configured to receive the second comparison signal, and the overshoot control unit is configured to generate an overshoot control signal at the output terminal based on the second comparison signal; as well as The first logic unit is configured to receive the first comparison signal and the overshoot control signal, and generate the mode signal based on the first comparison signal and the overshoot control signal.

7. The control circuit according to claim 6, wherein the overshoot control unit comprises: a pulse generating circuit having an input terminal and an output terminal, wherein the input terminal receives the second comparison signal, and the pulse generating circuit is configured to generate a pulse signal at the output terminal based on the second comparison signal; as well as The inverter has an input end and an output end, wherein the input end is configured to receive a pulse signal, and the inverter is configured to invert the pulse signal and then generate the overshoot control signal at the output end.

8. The control circuit of claim 1 , wherein the switch control circuit comprises: a third comparison circuit having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is configured to receive the reference voltage signal, the second input terminal is configured to receive the second feedback voltage signal, and the third comparison circuit is configured to generate a set signal at the output terminal based on the reference voltage signal and the second feedback voltage signal; as well as The second logic unit is configured to receive the set signal and the on-time signal, and generate the switch control signal based on the set signal and the on-time signal.

9. A switching converter comprising: Power switch, the switching converter converts the input voltage signal into the output voltage signal by controlling the power switch; as well as The control circuit according to any one of claims 1 to 8.

10. A control method for a switching converter, wherein the switching converter includes a power switch, and converting an input voltage signal into an output voltage signal by controlling the power switch, the control method comprising: comparing a first feedback voltage signal representing the output voltage signal with a first threshold voltage, wherein when the first feedback voltage signal decreases to the first threshold voltage, increasing the on-time of the power switch; comparing a transient voltage signal representing transient information of the output voltage signal with a second threshold voltage, wherein when the transient voltage signal increases to the second threshold voltage, reducing the on-time of the power switch; generating a set signal according to a reference voltage signal and a second feedback voltage signal representing the output voltage signal; as well as A switch control signal is generated according to the set signal and an on-time signal representing the on-time of the power switch to control the power switch. The control method of claim 10 , wherein the first feedback voltage signal and the second feedback voltage signal are the same.

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