A residual charge release method
By dividing the etching process into time periods and shutting off the DC high-voltage power supply, while maintaining a consistent helium flow rate, the problem of difficult residual charge release on wafers with low dielectric constants was solved, enabling faster wafer desorption and increased equipment capacity.
Patent Information
- Application Number
- CN202210595644.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-27
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2042-05-27
AI Technical Summary
In the prior art, wafer materials with low dielectric constants have difficulty releasing residual charge after the process, making it difficult to desorb the wafer, which may lead to displacement or breakage. Furthermore, existing methods require auxiliary gases or complex processes, which cannot effectively shorten the process time.
During the etching process, the process time is divided into two stages. In the early stage, the DC high voltage power supply is kept on, and in the later stage, the power supply is turned off, while the helium flow rate is kept consistent. The process steps are used to assist in the release of residual charge, adapting to different materials and process conditions.
By shutting down the DC high-voltage power supply, the residual charge release process is simplified, the wafer desorption time is shortened, and the equipment capacity and wafer processing efficiency are improved.
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Figure CN115020311B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of wafer etching, and relates to a residual charge releasing method. BACKGROUND
[0002] The plasma etching machine is a machine that uses a radio frequency or microwave source to generate high-frequency electromagnetic waves to ionize the chemical gas passing into the reaction chamber to generate plasma. The plasma reacts with the wafer placed in the lower electrode system to remove the material on the surface of the wafer, forming a volatile product that is discharged by the vacuum system. During the entire plasma processing process, the wafer is fixed by the electrostatic chuck of the lower electrode system. Helium gas is filled between the wafer and the electrostatic chuck for heat conduction. Helium gas plays a role in judging whether the electrostatic chuck completely adsorbs or desorbs the wafer while conducting heat.
[0003] The electrostatic chuck (ESC) is divided into two types of bipolar and unipolar. Since it is difficult to release residual charges in the unipolar ESC, most devices use bipolar electrostatic chucks. The electrostatic chuck is composed of a direct current electrode layer, an insulating medium layer, a heating layer, a uniform heating layer, a cooling channel, etc. The direct current electrode layer is embedded in the insulating medium layer. The principle of electrostatic adsorption is as follows: when the direct current electrode is connected to a high-voltage direct current power supply, the surface of the dielectric will generate polarization charges. The surface charges of the dielectric will generate an electric field. This electric field will further generate polarization charges on the surface of the wafer placed on the chuck (which may also include some free charges, depending on the wafer and the film on the wafer surface, which is conductive or insulating). The charges distributed on the back of the wafer and the charges distributed on the surface of the chuck are opposite in polarity. According to Coulomb's law, opposite charges attract each other, so the wafer is attracted to the chuck.
[0004] In the application of the electrostatic chuck, the release of residual charges is a very important link. If the electrostatic release is not complete after the process is completed, the wafer will still be adsorbed on the surface of the chuck, which may cause displacement or even breakage during the lifting process of the pin, resulting in wafer failure and process interruption. In actual application, for some wafer materials, it is particularly difficult to release residual charges after successful adsorption for process completion. The degree of release of residual charges is proportional to the length of the process and the size of the applied direct current voltage, that is, the longer the process time and the higher the direct current voltage, the more difficult it is to release residual charges. At present, the methods to solve this problem include plasma-assisted release, applying a voltage of opposite polarity to the process to assist in releasing residual charges, or a combination of the two methods to assist in releasing residual charges. The above methods can achieve good results for wafer materials with relatively high dielectric coefficients, but for some materials with low dielectric coefficients, the results are not ideal, which may cause a long time for residual charge release and a long process time.
[0005] The invention with publication number CN105140115A proposes a method for improving spherical defects by optimizing the process conditions of the charge release step, the wafer is fixed by an electrostatic chucking plate; the etching process is performed on the wafer fixed by the electrostatic chucking plate; the charge release step process is performed to release the charge on the front and back of the etched wafer; wherein, in the charge release step process, a noble gas is introduced towards the front and / or back of the wafer as a carrier of residual charge on the front and / or back of the wafer; the wafer is lifted from the electrostatic chucking plate. The invention needs to use auxiliary gas to achieve.
[0006] The invention with publication number CN111564404A proposes a wafer desorption method and device, auxiliary gas is introduced into the reaction chamber until the auxiliary gas in the reaction chamber reaches the preset pressure; the electrostatic voltage of the adsorbed wafer is removed and returned to zero; a reverse voltage is provided to the electrostatic electrode, the reverse voltage is opposite in polarity to the electrostatic voltage, so that the auxiliary gas is ionized; after the duration of the reverse voltage provided to the electrostatic electrode reaches the preset duration, the reverse voltage provided to the electrostatic electrode is stopped, and the auxiliary gas is discharged from the reaction chamber to complete the desorption of the electrostatic chuck and the wafer. The invention shortens the time required for wafer desorption and improves the production efficiency of the wafer. Similarly, the invention also needs to use auxiliary gas to achieve.
[0007] The invention with publication number CN108493103A proposes a wafer processing method, the wafer to be processed is set on the chuck, and the wafer to be processed completes dry etching; helium is introduced into the back of the wafer to be processed, and argon is introduced into the front of the wafer to be processed; the wafer to be processed is lifted by a needle; wet etching process is carried out. In the wafer processing method provided by the invention, after the wafer to be processed completes dry etching, helium is introduced into the back of the wafer to be processed, which serves as a carrier for transferring static electricity and removes static electricity on the wafer to be processed while cooling the wafer, argon is introduced into the front of the wafer to be processed to remove static electricity on the surface of the wafer, and then the wafer to be processed is lifted by a needle, which can improve dynamic alignment offset, prevent the risk of excessive dynamic alignment offset causing chipping, effectively avoid spherical defects formed in wet etching, and improve product yield. The invention involves two kinds of gases, helium and argon, and the process is complex, and the wafer process time cannot be shortened. SUMMARY
[0008] The technical problem solved by the present application is to solve the problem of residual charge release difficulty of the wafer by providing a method of turning off the direct current high-voltage power supply during the process to solve the residual charge release difficulty.
[0009] Technical scheme
[0010] A residual charge release method, comprising the following steps:
[0011] S1, adsorbing the wafer on the substrate by using the direct current high-voltage power supply;
[0012] S2, dividing the total time of the entire etching process into two time periods, keeping the direct current high-voltage power supply in the on state in the first time period, and keeping the direct current high-voltage power supply in the off state in the second time period, t=t1+t2, t is the total time of the entire etching process, t1 is the duration of the first time period, and t2 is the duration of the second time period; in the second time period, the wafer is adsorbed by using the residual charge; wherein the helium flow rate He2 of the second time period is equal to the helium flow rate Hel of the first time period.
[0013] Further, the material of the wafer includes insulating material, semiconductor material and conductor material.
[0014] Further, the duration t2 of the second time period is obtained by the following steps:
[0015] S21, dividing the total time t of an etching process into two time periods, t1=t2 in the initial stage;
[0016] S22, measuring the helium flow rate of the first time period and the second time period, if the helium flow rates of the two time periods are not equal, then step S23 is entered, otherwise, step S24 is entered;
[0017] S23, the helium flow rate of the second time period is greater than that of the first time period, the first time period is increased by one step, and the second time period is shortened by one step; step S22 is entered;
[0018] S24, outputting t1 and t2.
[0019] Further, the residual charge release method comprises the following steps:
[0020] The DC high-voltage power supply closing time point corresponding to different etching materials and etching processes is tested and saved as one of the process parameters.
[0021] Further, the residual charge releasing method further comprises the following steps:
[0022] The total time of the whole etching process is divided into two time periods, the DC high-voltage power supply is kept in an open state in the first time period, and the voltage of the DC high-voltage power supply is gradually reduced until it is converted to a closed state in the second time period, t=t1+t2, t is the total time of the whole etching process, t1 is the duration of the first time period, and t2 is the duration of the second time period; in the second time period, the residual charge is adsorbed on the wafer; wherein the helium flow rate He2 of the second time period is equal to the helium flow rate He1 of the first time period.
[0023] Further, the voltage of the DC high-voltage power supply is gradually reduced until it is converted to a closed state in a slow reduction mode of the same polarity voltage.
[0024] Further, the voltage of the DC high-voltage power supply is gradually reduced until it is converted to a closed state in an alternating polarity switching mode.
[0025] The application also provides a coating method, which comprises: in the coating process, the residual charge on the coating substrate is released by using the residual charge releasing method as described above.
[0026] Advantages:
[0027] The residual charge releasing method provided by the application can release the residual charge on the wafer by closing the DC high-voltage power supply in the process and using the process steps to assist the release of the residual charge on the wafer, which can alleviate the problem of difficult release of the residual charge caused by long-time opening of the high-voltage to adsorb the wafer, and can greatly reduce the wafer desorption time after the process, thereby improving the equipment productivity. BRIEF DESCRIPTION OF DRAWINGS
[0028] Figure 1 It is a structural schematic diagram of an etching device.
[0029] Figure 2 It is a time duration test flowchart of two time periods.
[0030] Figure 3a It is a back helium flow diagram of closing HV at the end of the process.
[0031] Figure 3b It is a back helium flow diagram of closing or reducing HV in the process. DETAILED DESCRIPTION
[0032] The following examples can make the professional technical personnel more fully understand the present application, but do not limit the present application in any way.
[0033] Referring to Figure 1 , the transmission platform places the wafer on the lower electrode, turns on the HV power supply after the placement is completed to adsorb the wafer on the ESC surface and then fixes the wafer, helium is introduced into the ESC through the He UPC to perform heat conduction between the back surface of the wafer and the ESC surface, the process gas introduced into the chamber is ionized to generate plasma under the joint action of the Generator & Match, the plasma reacts with the surface of the wafer to realize the etching process, and the volatile product is extracted through the Vacuum system, and thus the etching process is completed.
[0034] The present application refers to a residual charge release method, comprising the following steps:
[0035] S1, adsorbing the wafer on the substrate by using a direct-current high-voltage power supply.
[0036] S2, dividing the total time of the entire etching process into two time periods, keeping the direct-current high-voltage power supply in an open state in the first time period and keeping the direct-current high-voltage power supply in a closed state in the second time period, t=t1+t2, t is the total time length of the entire etching process, t1 is the time length of the first time period, and t2 is the time length of the second time period; in the second time period, the wafer is adsorbed by using residual charges; wherein the helium flow rate He2 of the second time period is equal to the helium flow rate Hel of the first time period.
[0037] Since the flow rate of the back helium greatly affects the process result, the premise of turning off the direct-current power supply in the process is to ensure that the flow rate of the back helium is consistent during the entire process from the turning-off of the power supply to the end of the etching step, that is, the flow rate of the back helium is set as Hel during the opening time of the high-voltage power supply, the flow rate of the back helium is set as He2 during the closing time of the high-voltage power supply, and the relationship He1=He2 needs to be met. By using this method, the corresponding closing time points of the high direct-current high-voltage power supply are different for different etching time lengths, and experiments need to be performed according to specific processes. Assuming that the total time length of the entire etching process step is t (unit: s), the opening time of the high-voltage power supply is t1, and the closing time of the high-voltage power supply is t2, the relationship t=t1+t2 exists.
[0038] Assuming that the total etching time is t, t is divided into t1 and t2, and the relationship t=t1+t2 exists. The HV is kept open during the t1 time period, the HV is kept closed during the t2 time period, the wafer is adsorbed by using the residual charges after the HV is closed to complete the process in the remaining time. In order to ensure that the helium flow rate remains unchanged during the entire process (that is, Hel=He2), the specific time corresponding to t1 and t2 needs to be determined according to the specific process. Figure 2The flowchart is tested actually because the residual charge amount corresponding to different processes and different materials is different. First, the total etching process time is divided into two parts, i.e., the HV is opened for half of the time and the HV is closed for the other half of the time. If the helium flow rate increases during the HV-closed period, the HV-on time needs to be increased by xx seconds and the HV-off time needs to be shortened by xx seconds. Conversely, if the helium flow rate remains unchanged after the HV is closed, the HV-on time can be shortened by xx seconds and the HV-off time can be increased by xx seconds. After the test is completed, the actual test time is filled in the etching process step. In this way, the process time splitting test is completed.
[0039] By Figure 3a As can be seen from the comparison between 3a and 3b, by using the method of closing the HV during the process, the helium flow rate can quickly reach the pre-set desorption success determination value during the Dechuck process, that is, the wafer can be easily desorbed successfully. Generally, the Dechuck process is combined with the etching process, so the time of the Dechuck menu can be shortened to shorten the whole process time and greatly improve the equipment productivity.
[0040] Exemplarily, the aforementioned way of closing the direct-current high-voltage power supply not only means directly closing the power supply, but also means slowly reducing the power supply voltage to achieve the purpose of quickly releasing the residual charge after the process is completed.
[0041] Preferably, the aforementioned way of slowly reducing the voltage can be slowly reducing the voltage of the same polarity or switching the polarity to achieve the purpose. The precondition is that the helium flow rate cannot be changed during the process.
[0042] It should be understood that the residual charge release method implemented by the present application is not limited to insulating materials, but can also be used for semiconductor materials, conductor materials, etc. At the same time, the present application is not limited to be applied to etching machines, but can also be applied to film plating machines, etc.
Claims
1. A residual charge release method characterized by, The residual charge releasing method comprises the following steps: S1, adsorbing the wafer on the substrate by using a direct current high voltage power supply; S2, dividing the total time of the whole etching process into two time periods, keeping the direct current high voltage power supply in an open state in the first time period, and keeping the direct current high voltage power supply in a closed state or gradually reducing the voltage of the direct current high voltage power supply until it is switched to the closed state in the second time period, t=t1+t2, t is the total time of the whole etching process, t1 is the duration of the first time period, and t2 is the duration of the second time period; in the second time period, the wafer is adsorbed by using the residual charge; wherein the helium flow rate He2 of the second time period is equal to the helium flow rate He1 of the first time period; The method for obtaining the duration t2 of the second time period comprises the following steps: S21, dividing the total time t of one etching process into two time periods, t1=t2 in the initial stage; S22, measuring the helium flow rates of the first time period and the second time period, if the helium flow rates of the two time periods are not equal, then step S23 is entered, otherwise, step S24 is entered; S23, the helium flow rate of the second time period is greater than that of the first time period, the first time period is increased by one step, and the second time period is shortened by one step; step S22 is entered; S24, outputting t1 and t2.
2. The residual charge release method of claim 1, wherein, The material of the wafer comprises insulating material, semiconductor material and conductor material.
3. The residual charge release method of claim 1, wherein, The residual charge releasing method comprises the following steps: For different etching materials and etching processes, the corresponding direct current high voltage power supply closing time point is tested and obtained, which is saved as one of the process parameters.
4. The residual charge release method of claim 1, wherein, The voltage of the direct current high voltage power supply is gradually reduced in the same polarity until it is switched to the closed state.
5. The residual charge release method of claim 1, wherein, The voltage of the direct current high voltage power supply is gradually reduced in the alternating polarity until it is switched to the closed state.
6. A coating method, characterized by, The coating method comprises: in the coating process, the residual charge releasing method as claimed in any one of claims 1-5 is used to release the residual charge on the coating substrate.
Citation Information
Patent Citations
Method for improving spherical defect by optimizing charge releasing step process condition
CN105140115A
Wafer processing method
CN108493103A
Wafer desorption method and device
CN111564404A
Plasma treatment
JP1996176854A