Current compensation circuit, silicon-based ultra-thin flexible chip and current compensation method

Abstract

The application provides a current compensation circuit, a silicon-based ultrathin flexible chip and a current compensation method. The current compensation circuit comprises a first PMOS module and a second PMOS module. Through the structural design of the first PMOS module and the second PMOS module which are arranged in parallel, the channel current directions of which are perpendicular to each other, and the electrical parameter characteristics of which are the same, under the action of any single-axis bending stress, the working current change amount of the first PMOS module and the working current change amount of the second PMOS module are offset, so that the working current change amount of the PMOS device in the first PMOS module or the second PMOS module is offset, the working current after compensation and adjustment is output, and the PMOS device in the silicon-based ultrathin flexible chip always maintains stable electrical signal output. The device parameter drift and performance degradation problems caused by bending deformation stress can be effectively solved, and the performance stability of the silicon-based ultrathin flexible chip is obviously improved.

Description

Technical Field

[0001] This invention relates to the field of flexible electronics technology, and in particular to a current compensation circuit, a silicon-based ultrathin flexible chip, and a current compensation method. Background Technology

[0002] Flexible electronics have broad application prospects in emerging fields such as smart wearables, flexible displays, artificial intelligence, and the Internet of Things. Silicon-based ultrathin chips combine the high-density integration of traditional chips with the bendability and deformation of flexible chips, making them the best choice for building high-performance flexible electronic systems. However, when flexible electronic devices are subjected to a certain degree of deformation stress, the resulting strain effect can cause the device's electrical parameters to drift or degrade, thus affecting end applications.

[0003] The inventors discovered that reducing the thickness of conventional silicon-based chips to a certain extent can give them mechanical flexibility. Bending deformation stress causes significant changes in the operating current of ultra-thin flexible CMOS devices, and the trend and magnitude of these changes are directly related to the type, magnitude, and direction of the stress. The electrical parameters of a single CMOS device can change by more than 10%, leading to deviations in the expected response characteristics of ultra-thin flexible module circuits such as inverters, ring oscillators, and current mirrors composed of multiple CMOS devices.

[0004] Therefore, once the drift of the electrical parameters of an ultrathin flexible device exceeds the fault tolerance range of the integrated circuit design, the output signal of the integrated circuit module will deviate, seriously affecting the accuracy and performance stability of the flexible chip system. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a PMOS device operating current regulation and compensation technology solution suitable for silicon-based ultrathin flexible chips, so as to solve to a certain extent the problem of parameter drift and performance degradation caused by bending deformation stress in flexible chip systems based on PMOS devices.

[0006] To achieve the above and other related objectives, the technical solution provided by this invention is as follows.

[0007] A current compensation circuit for compensating and regulating the operating current of PMOS devices inside a silicon-based ultrathin flexible chip, comprising:

[0008] The first PMOS module has its input terminal connected to a first voltage and its control terminal connected to a second voltage.

[0009] The second PMOS module is connected in parallel with the first PMOS module, and its output terminal is connected together with the output terminal of the first PMOS module to serve as the output terminal of the current compensation circuit.

[0010] The first PMOS module and the second PMOS module are respectively disposed within the silicon-based ultrathin flexible chip. At least one of the first PMOS module and the second PMOS module includes the PMOS device to be compensated and adjusted. The channel current direction of the first PMOS module is perpendicular to the channel current direction of the second PMOS module, and the electrical parameter characteristics of the first PMOS module are the same as those of the second PMOS module. Under any uniaxial bending stress, the change in operating current of the first PMOS module and the change in operating current of the second PMOS module cancel each other out, thereby canceling out the change in operating current of the PMOS device. The compensated and adjusted operating current is output to the external terminal of the current compensation circuit.

[0011] Optionally, the first PMOS module includes M first PMOS transistors, and the second PMOS module includes N second PMOS transistors, where M and N are integers greater than or equal to 1.

[0012] Optionally, in the first PMOS module, when M equals 1, the source of the first PMOS transistor is connected to the first voltage, the gate of the first PMOS transistor is connected to the second voltage, the first PMOS transistor is disposed on the silicon-based ultrathin flexible chip, and the channel current direction of the first PMOS transistor is set along the first direction; in the first PMOS module, when M is greater than 1, M first PMOS transistors are arranged in parallel, the source of each first PMOS transistor is connected to the first voltage, the gate of each first PMOS transistor is connected to the second voltage, the drains of the M first PMOS transistors are connected together, the M first PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each first PMOS transistor is set along the first direction.

[0013] Optionally, in the second PMOS module, when N equals 1, the source of the second PMOS transistor is connected to the first voltage, the gate of the second PMOS transistor is connected to the second voltage, and the drain of the second PMOS transistor is connected together with the drains of M first PMOS transistors to output the operating current. The second PMOS transistor is disposed on the silicon-based ultrathin flexible chip, and the channel current direction of the second PMOS transistor is set along the second direction. In the second PMOS module, when N is greater than 1, N second PMOS transistors are arranged in parallel. The source of each second PMOS transistor is connected to the first voltage, the gate of each second PMOS transistor is connected to the second voltage, and the drains of N second PMOS transistors are connected together with the drains of M first PMOS transistors to output the operating current. The N second PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each second PMOS transistor is set along the second direction.

[0014] Optionally, within the extended plane of the silicon-based ultrathin flexible chip, the first direction is perpendicular to the second direction; the PMOS device to be compensated and adjusted is either the first PMOS transistor or the second PMOS transistor.

[0015] Optionally, under the uniaxial bending stress, the sum of the changes in the operating current of the M first PMOS transistors cancels out the sum of the changes in the operating current of the N second PMOS transistors.

[0016] A silicon-based ultrathin flexible chip includes a substrate, a functional integrated circuit, and a current compensation circuit as described above. The functional integrated circuit and the current compensation circuit are respectively disposed on the substrate. The current compensation circuit is connected to the functional integrated circuit. The functional integrated circuit includes a PMOS device to be compensated and adjusted. The current compensation circuit also includes the PMOS device. The current compensation circuit compensates and adjusts the operating current of the PMOS device.

[0017] Optionally, the functional integrated circuit includes i PMOS devices, and the silicon-based ultrathin flexible chip includes i current compensation circuits. The i current compensation circuits correspond one-to-one with the i PMOS devices to perform operating current compensation and adjustment, where i is an integer greater than or equal to 1.

[0018] Optionally, the functional integrated circuit includes i PMOS devices, the silicon-based ultrathin flexible chip includes j current compensation circuits, and at least one current compensation circuit simultaneously performs operating current compensation adjustment on two or more PMOS devices, wherein i and j are integers greater than or equal to 1 and i is greater than j.

[0019] A current compensation method for compensating and adjusting the operating current of PMOS devices inside a silicon-based ultrathin flexible chip includes:

[0020] A silicon-based ultrathin flexible chip is provided, wherein the PMOS device is internally included in the silicon-based ultrathin flexible chip;

[0021] A PMOS compensation structure is provided, wherein the PMOS compensation structure and the PMOS device are connected in parallel within the silicon-based ultrathin flexible chip, and the channel current direction of the PMOS compensation structure is perpendicular to the channel current direction of the PMOS device.

[0022] Under arbitrary uniaxial bending stress, the change in operating current of the PMOS device is offset and canceled by the change in operating current of the PMOS compensation structure, so that the PMOS device outputs a stable operating current.

[0023] The electrical parameters of the PMOS compensation structure are the same as those of the PMOS device.

[0024] As described above, the current compensation circuit, silicon-based ultrathin flexible chip, and current compensation method provided by the present invention have at least the following beneficial effects:

[0025] By using a structural design of "parallel-connected first and second PMOS modules with perpendicular channel current directions and identical electrical parameters", the changes in the operating current of the first and second PMOS modules are offset and canceled out under arbitrary uniaxial bending stress. This results in the cancellation of the changes in the operating current of the PMOS devices in either the first or second PMOS module. The compensated and regulated operating current is then output at the output of the current compensation circuit, ensuring that the PMOS devices in the silicon-based ultrathin flexible chip maintain a stable electrical signal output. This effectively solves the problem of device parameter drift and performance degradation caused by bending deformation stress, significantly improving the performance stability of the silicon-based ultrathin flexible chip. Attached Figure Description

[0026] Figure 1 The diagram shown is a structural block diagram of the current compensation circuit in this invention.

[0027] Figure 2 The diagram shown is a circuit diagram of a current compensation circuit in an optional embodiment of the present invention.

[0028] Figure 3 Displayed as Figure 2 A simulation diagram illustrating the compensation effect of a medium current compensation circuit.

[0029] Figure 4The diagram shown is a circuit diagram of a current compensation circuit in another optional embodiment of the present invention.

[0030] Figure 5 The diagram shown is a circuit diagram of the current compensation circuit in another optional embodiment of the present invention.

[0031] Figure 6 The diagram shown is a schematic representation of the structure of a silicon-based ultrathin flexible chip in an optional embodiment of the present invention.

[0032] Figure 7 The diagram shows a schematic of the structure of a silicon-based ultrathin flexible chip in another optional embodiment of the present invention. Detailed Implementation

[0033] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0034] Please see Figures 1 to 7 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show components relevant to the present invention and are not drawn according to the actual number, shape, and size of the components in implementation. In actual implementation, the form, quantity, and proportion of each component can be arbitrarily changed, and the component layout may be more complex. The structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation conditions of the present invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effects and objectives of the present invention, should still fall within the scope of the technical content disclosed in the present invention.

[0035] As mentioned in the background section, the inventors discovered that reducing the thickness of conventional silicon-based chips to below 50 μm can give them mechanical flexibility. Bending stress causes significant changes in the operating current of ultrathin flexible CMOS devices. The trend and magnitude of these changes are directly related to the type of stress (tensile / compressive stress, uniaxial / biaxial stress), the magnitude of the stress (radius of curvature R, strain ε), and the direction of the stress (relative to the channel current direction). For uniaxial bending stress, PMOS devices exhibit high sensitivity to stress direction, showing opposite changes in electrical parameters under stress parallel and perpendicular to the channel current direction, while NMOS devices only show significant changes in electrical parameters under stress parallel to the channel current direction. The change in electrical parameters of a single CMOS device can exceed 10%, causing ultrathin flexible unit circuits composed of multiple CMOS devices, such as inverters, ring oscillators, and current mirrors, to deviate from expected response characteristics. This results in output signal deviations, severely affecting the accuracy and performance stability of the ultrathin flexible chip system.

[0036] Based on this, the present invention proposes a working current compensation and regulation technology for PMOS devices in silicon-based ultrathin flexible chips: For the PMOS device to be compensated and regulated, a PMOS compensation structure based on a PMOS transistor is designed, which is connected in parallel with the PMOS device and whose channel current direction is perpendicular to the channel current direction of the PMOS device. Based on the principle that "under the same driving voltage, the changes in electrical parameters of the PMOS device under the same magnitude of uniaxial bending stress along the direction parallel to the channel current and perpendicular to the channel current are equal in magnitude and opposite in direction", under any uniaxial bending stress, the change in working current of the PMOS compensation structure is used to offset and cancel the change in working current of the PMOS device to be compensated and regulated, so that the PMOS device outputs a stable working current.

[0037] First, such as Figure 1 As shown, this invention provides a current compensation circuit for compensating and adjusting the operating current of PMOS devices inside a silicon-based ultrathin flexible chip, comprising:

[0038] The first PMOS module 1 has its input terminal connected to the first voltage Vdd and its control terminal connected to the second voltage Vs.

[0039] The second PMOS module 2 is connected in parallel with the first PMOS module 1, and its output terminal is connected together with the output terminal of the first PMOS module 1 to serve as the output terminal of the current compensation circuit.

[0040] The first PMOS module 1 and the second PMOS module 2 are respectively disposed in the silicon-based ultrathin flexible chip. At least one of the first PMOS module 1 and the second PMOS module 2 includes a PMOS device to be compensated and adjusted. The channel current direction of the first PMOS module 1 is perpendicular to the channel current direction of the second PMOS module 2, and the electrical parameter characteristics of the first PMOS module 1 are the same as those of the second PMOS module 2. Under any uniaxial bending stress, the change in the operating current of the first PMOS module 1 and the change in the operating current of the second PMOS module 2 cancel each other out, so that the change in the operating current of the PMOS device is also canceled out. The compensated and adjusted operating current is output to the external terminal of the current compensation circuit.

[0041] The first PMOS module 1 includes M first PMOS transistors, and the second PMOS module 2 includes N second PMOS transistors, where M and N are integers greater than or equal to 1.

[0042] In an optional embodiment of the present invention, such as Figure 2 As shown, in the first PMOS module 1, M equals 1, and the first PMOS module 1 includes only one first PMOS transistor, namely the first PMOS transistor P1. The source of the first PMOS transistor P1 is connected to the first voltage Vdd, and the gate of the first PMOS transistor P1 is connected to the second voltage Vs. The first PMOS transistor P1 is disposed on the silicon-based ultra-thin flexible chip, and the channel current direction of the first PMOS transistor P1 is set along the first direction (Y-axis direction). In the second PMOS module 2, N equals 1, and the second PMOS module 2 includes only one second PMOS transistor, namely the second PMOS transistor P2. The source of the second PMOS transistor P2 is connected to the first voltage Vdd, and the gate of the second PMOS transistor P2 is connected to the second voltage Vs. The second PMOS transistor P2 is disposed on the silicon-based ultra-thin flexible chip, and the channel current direction of the second PMOS transistor P2 is set along the second direction (X-axis direction).

[0043] In the extended plane (i.e., the XY plane) of the silicon-based ultrathin flexible chip, the first direction is perpendicular to the second direction.

[0044] In detail, such as Figure 2 As shown, the first PMOS module 1 includes only the first PMOS transistor P1, and the second PMOS module 2 includes only the second PMOS transistor P2. The drain of the second PMOS transistor P2 is connected to the drain of the first PMOS transistor P1 and serves as the output terminal of the current compensation circuit, outputting the operating current I to the outside. outThe electrical parameters of the first PMOS module 1 are the same as those of the second PMOS module 2, meaning the electrical parameters of the first PMOS transistor P1 are the same as those of the second PMOS transistor P2. Both have the same operating current, I0, under the same driving voltage. Furthermore, under uniaxial bending stress in any direction, the change in operating current of the first PMOS transistor P1 is ΔI. P1 The change in operating current ΔI of the second PMOS transistor P2 P2 They always remain the same in magnitude but opposite in sign; therefore, under any uniaxial bending deformation stress condition, ΔI P1 and ΔI P2 Both currents can cancel each other out, ensuring that the entire current compensation circuit outputs a stable operating current I. out =2I0, and based on this, simulation experiments were conducted to obtain the following results: Figure 3 The diagram showing the compensation effect is as follows: Figure 3 As shown, the relative change ΔIdsat of the saturated drain current (i.e., operating current) of the first PMOS transistor P1 and the second PMOS transistor P2 is approximately linearly related to the bending curvature (1 / R) or the corresponding variable ε. Before compensation, the current change of the first PMOS transistor P1 and the current change of the second PMOS transistor P2 are the same in magnitude but opposite in sign. After compensation, the sum of the current changes of the two is zero.

[0045] It should be noted that the PMOS device to be compensated and adjusted is either the first PMOS transistor P1 or the second PMOS transistor P2. That is, the PMOS device to be compensated and adjusted can be only the first PMOS transistor P1, or only the second PMOS transistor P2, or it can include both the first PMOS transistor P1 and the second PMOS transistor P2. The PMOS device to be compensated and adjusted constitutes the functional integrated circuit within the silicon-based ultrathin flexible chip.

[0046] It should also be noted that when the PMOS device to be compensated and regulated includes both the first PMOS transistor P1 and the second PMOS transistor P2, under certain special conditions, the first PMOS module and the second PMOS module can be part of the functional integrated circuit within the silicon-based ultrathin flexible chip. For example, the first PMOS module may include only one first PMOS transistor, and the second PMOS module may include only one second PMOS transistor. The first PMOS transistor and the second PMOS transistor are connected in parallel, their channel current directions are perpendicular to each other, and their electrical parameters are the same. Furthermore, the first PMOS transistor and the second PMOS transistor are part of the functional integrated circuit within the silicon-based ultrathin flexible chip. In this case, current self-compensation regulation can be achieved through the internal circuit of the functional integrated circuit, which includes the current compensation circuit.

[0047] In an optional embodiment of the present invention, such as Figure 4 As shown, in the first PMOS module 1, M is greater than 1. The first PMOS module 1 includes two or more first PMOS transistors, namely first PMOS transistor P11, first PMOS transistor P12, ..., first PMOS transistor P1M. The M first PMOS transistors (i.e., first PMOS transistors P11, P12, ..., and P1M) are connected in parallel. The source of each first PMOS transistor is connected to a first voltage Vdd, and the gate of each first PMOS transistor is connected to a second voltage Vs. The drains of the M first PMOS transistors are connected together. The PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each first PMOS transistor is set along the first direction (Y-axis direction); in the second PMOS module 2, N equals 1, the second PMOS module 2 includes only one second PMOS transistor, namely the second PMOS transistor P2, the source of the second PMOS transistor P2 is connected to the first voltage Vdd, the gate of the second PMOS transistor P2 is connected to the second voltage Vs, the second PMOS transistor P2 is disposed on the silicon-based ultrathin flexible chip, and the channel current direction of the second PMOS transistor P2 is set along the second direction (X-axis direction).

[0048] In detail, such as Figure 4 As shown, the first PMOS module 1 includes M first PMOS transistors connected in parallel, and the second PMOS module 2 includes only a second PMOS transistor P2. The drain of the second PMOS transistor P2 is connected together with the drains of the M first PMOS transistors to serve as the output terminal of the current compensation circuit, outputting an operating current I. out The electrical parameters of the first PMOS module 1 are the same as those of the second PMOS module 2. Under uniaxial bending stress in any direction, the sum of the changes in the operating current ΔI of the M first PMOS transistors (i.e., first PMOS transistor P11, first PMOS transistor P12, ... and first PMOS transistor P1M) is... P1 The change in operating current ΔI of the second PMOS transistor P2 P2 They always remain the same in magnitude but opposite in sign; therefore, under any uniaxial bending deformation stress condition, ΔI P1 and ΔI P2 They can cancel each other out. Assuming the operating current of the second PMOS transistor is I0 when there is no deformation, and under the same conditions, the relative changes in the operating current of each first PMOS transistor and the second PMOS transistor's P2 in the first PMOS module 1 are equal in magnitude and opposite in sign, then the sum of the operating currents in the entire first PMOS module 1 is also I0. Therefore, the entire current compensation circuit outputs a stable operating current I. out =2I0.

[0049] In an optional embodiment of the present invention, such as Figure 5 As shown, in the first PMOS module 1, M is greater than 1. The first PMOS module 1 includes two or more first PMOS transistors, namely first PMOS transistor P11, first PMOS transistor P12, ..., first PMOS transistor P1M. The M first PMOS transistors (i.e., first PMOS transistors P11, P12, ..., and P1M) are connected in parallel. The source of each first PMOS transistor is connected to a first voltage Vdd, and the gate of each first PMOS transistor is connected to a second voltage Vs. The drains of the M first PMOS transistors are connected together. The M first PMOS transistors are respectively disposed on a silicon-based ultrathin flexible chip, and the channel current direction of each first PMOS transistor is set along the first direction (Y-axis direction). In the second PMOS module 2, N is greater than 1. The second PMOS module 2 includes two or more second PMOS transistors, namely second PMOS transistor P21, second PMOS transistor P22, ..., second PMOS transistor P2N. The N second PMOS transistors (i.e., second PMOS transistor P21, second PMOS transistor P22, ... and second PMOS transistor P2N) are connected in parallel. The source of each second PMOS transistor is connected to the first voltage Vdd, the gate of each second PMOS transistor is connected to the second voltage Vs, and the drains of the N second PMOS transistors are connected together. The N second PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each second PMOS transistor is set along the second direction (X-axis direction).

[0050] In detail, such as Figure 5 As shown, the first PMOS module 1 includes M first PMOS transistors connected in parallel, and the second PMOS module 2 includes N second PMOS transistors connected in parallel. The drains of the N second PMOS transistors are connected together with the drains of the M first PMOS transistors to serve as the output terminal of the current compensation circuit, outputting an operating current I. out The electrical parameters of the first PMOS module 1 are the same as those of the second PMOS module 2. Under uniaxial bending stress in any direction, the sum of the changes in the operating current ΔI of the M first PMOS transistors (i.e., first PMOS transistor P11, first PMOS transistor P12, ... and first PMOS transistor P1M) is... P1 The sum of the changes in the operating current of the N second PMOS transistors (i.e., second PMOS transistor P21, second PMOS transistor P22, ... and second PMOS transistor P2N) ΔI P2 They always remain the same in magnitude but opposite in sign; therefore, under any uniaxial bending deformation stress condition, ΔI P1 and ΔI P2All currents can cancel each other out. Assuming there is no deformation, the sum of the operating currents of the N second PMOS transistors is I0, and under the same conditions, the relative changes in the operating currents of each first PMOS transistor in the first PMOS module 1 and each second PMOS transistor in the second PMOS module 2 are equal in magnitude and opposite in sign. Then, the sum of the operating currents of the M first PMOS transistors is also I0. Therefore, the entire current compensation circuit outputs a stable operating current I. out =2I0.

[0051] Similarly, in Figure 4 or Figure 5 In this design, the PMOS device to be compensated and adjusted is either a first PMOS transistor or a second PMOS transistor. Specifically, the PMOS device to be compensated and adjusted can be one or more first PMOS transistors, or one or more second PMOS transistors. Alternatively, the PMOS device to be compensated and adjusted can simultaneously include both first and second PMOS transistors. These PMOS devices constitute the functional integrated circuit within the silicon-based ultrathin flexible chip. It should be noted that the first and second PMOS modules can be distributed in a staggered and mixed manner; they do not necessarily have to be arranged in a specific order. Figure 5 The concentrated distribution shown means that the first PMOS transistor with the channel current direction along the first direction and the second PMOS transistor with the channel current direction along the second direction can be arranged alternately. If viewed along the positive direction of the second direction, the channel current direction of the PMOS transistor is, in sequence, perpendicular to the second direction, parallel to the second direction, perpendicular to the second direction, ... and perpendicular to the second direction, which is not limited here.

[0052] It should be noted that in this invention, the first PMOS module 1 can be equivalent to a PMOS transistor, and the second PMOS module 2 can also be equivalent to a PMOS transistor; "the electrical parameter characteristics of the first PMOS module 1 and the electrical parameter characteristics of the second PMOS module 2 are the same" means that the electrical parameter characteristics of the equivalent PMOS transistors corresponding to the two are the same. When the channel current direction is the same, the operating current of the equivalent PMOS transistors corresponding to the two is equal under the same driving voltage, and the change in operating current under the same uniaxial bending stress is equal. This makes the equivalent PMOS transistor corresponding to the first PMOS module 1 with the channel current direction set along the first direction and the equivalent PMOS transistor corresponding to the second PMOS module 2 with the channel current direction set along the second direction have the same operating current under the same driving voltage, and the change in operating current under the same uniaxial bending stress is equal in magnitude but opposite in direction.

[0053] Secondly, based on the aforementioned current compensation circuit, this invention also provides a silicon-based ultrathin flexible chip, such as... Figures 6-7As shown, it includes a substrate 10, a functional integrated circuit 20, and a current compensation circuit 30. The functional integrated circuit 20 and the current compensation circuit 30 are respectively disposed on the substrate 10. The current compensation circuit 30 is connected to the functional integrated circuit 20. The functional integrated circuit 20 includes a PMOS device to be compensated and adjusted. The current compensation circuit 30 also includes a PMOS device to be compensated and adjusted. The current compensation circuit 30 compensates and adjusts the operating current of the PMOS device to be compensated and adjusted.

[0054] In detail, in an optional embodiment of the invention, such as Figure 6 As shown, the functional integrated circuit 20 includes two PMOS devices to be compensated and regulated (i.e., PMOS transistors P01 and PMOS transistors P02) and two current compensation circuits 30. The two current compensation circuits 30 correspond one-to-one with the two PMOS devices to be compensated and regulated to perform operating current compensation and regulation, and output a stable operating current I. out1 and I out2 Understandably, besides Figure 6 The two PMOS devices to be compensated and adjusted shown are included in the functional integrated circuit 20. It may also include i PMOS devices to be compensated and adjusted. Correspondingly, the silicon-based ultrathin flexible chip includes i current compensation circuits 30. The i current compensation circuits 30 correspond one-to-one with the i PMOS devices to be compensated and adjusted to perform working current compensation and adjustment. i is an integer greater than or equal to 1.

[0055] In detail, in an optional embodiment of the invention, such as Figure 7 As shown, the functional integrated circuit 20 includes two PMOS devices to be compensated and regulated (i.e., PMOS transistors P03 and P04) and a current compensation circuit 30. The current compensation circuit 30 simultaneously compensates and regulates the operating current of the two PMOS devices to be compensated and regulated, and outputs a stable operating current I. out3 Understandably, besides Figure 7 The two PMOS devices to be compensated and regulated shown are included in the functional integrated circuit 20. It may also include i PMOS devices to be compensated and regulated. Correspondingly, the silicon-based ultrathin flexible chip includes j current compensation circuits 30. At least one current compensation circuit 30 simultaneously performs operating current compensation and regulation on two or more PMOS devices, where i is an integer greater than or equal to 1.

[0056] Finally, based on the design concept of the above-mentioned current compensation circuit, this invention also provides a current compensation method for compensating and adjusting the operating current of the PMOS device inside a silicon-based ultrathin flexible chip, which includes the following steps:

[0057] S1. Provides a silicon-based ultrathin flexible chip, which includes a PMOS device inside;

[0058] S2. Provide a PMOS compensation structure, and set the PMOS compensation structure and the PMOS device in parallel in the silicon-based ultrathin flexible chip, and the channel current direction of the PMOS compensation structure is perpendicular to the channel current direction of the PMOS device.

[0059] S3. Under arbitrary uniaxial bending stress, the change in the working current of the PMOS device is offset by the change in the working current of the PMOS compensation structure, so that the PMOS device outputs a stable working current.

[0060] The electrical parameters of the PMOS compensation structure are the same as those of the PMOS device.

[0061] In the above method, the principle that "under the same driving voltage, the changes in electrical parameters of a PMOS device under uniaxial bending stress of the same magnitude and opposite direction are equal" is utilized. Under any uniaxial bending stress, the change in the working current of the PMOS device is offset by the change in the working current of the PMOS compensation structure, so that the PMOS device outputs a stable working current. This ensures that the PMOS device in the silicon-based ultrathin flexible chip always maintains a stable electrical signal output, which can effectively solve the problem of device parameter drift and performance degradation caused by bending deformation stress, and significantly improve the performance stability of the silicon-based ultrathin flexible chip.

[0062] It should be noted that the terms PMOS device and PMOS transistor appear in this invention. Strictly speaking, the two are equivalent. In this invention, in order to emphasize that the PMOS device is a PMOS transistor to be compensated and adjusted, a distinction has been made in the literal sense.

[0063] Meanwhile, the above embodiments only illustrate a technical solution for compensating and adjusting the operating current of a PMOS device based on the principle that "under the same driving voltage, the changes in electrical parameters of a PMOS device under uniaxial bending stress of the same magnitude and opposite direction are equal in magnitude and opposite in direction." It is understood that the compensation and adjustment based on the operating current of the PMOS device can also compensate and adjust the voltage based on the operating current (such as current-to-voltage conversion, used as the input signal of the operational amplifier), and can also compensate and adjust other more complex electrical parameters based on the operating current, which will not be elaborated here.

[0064] In summary, the current compensation circuit, silicon-based ultrathin flexible chip, and current compensation method provided by this invention utilize the principle that "under the same driving voltage, the changes in electrical parameters of PMOS devices under uniaxial bending stress of the same magnitude and opposite direction are equal in magnitude and opposite in direction." Through the structural design of "parallel-connected first PMOS modules and second PMOS modules with mutually perpendicular channel current directions and identical electrical parameter characteristics," under any uniaxial bending stress, the changes in the operating current of the first PMOS module and the second PMOS module are offset and canceled out. This results in the cancellation of the changes in the operating current of the PMOS devices in either the first or second PMOS modules, leading to the output of a compensated and regulated operating current. Consequently, the PMOS devices in the silicon-based ultrathin flexible chip maintain a stable electrical signal output, effectively solving the problem of device parameter drift and performance degradation caused by bending deformation stress, and significantly improving the performance stability of the silicon-based ultrathin flexible chip.

[0065] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A current compensation circuit, characterized in that, Compensation and adjustment of the operating current of PMOS devices inside silicon-based ultrathin flexible chips, including: The first PMOS module has its input terminal connected to a first voltage and its control terminal connected to a second voltage. The second PMOS module is connected in parallel with the first PMOS module, and its output terminal is connected together with the output terminal of the first PMOS module to serve as the output terminal of the current compensation circuit. The first PMOS module and the second PMOS module are respectively disposed within the silicon-based ultrathin flexible chip. At least one of the first PMOS module and the second PMOS module includes the PMOS device to be compensated and adjusted. The channel current direction of the first PMOS module is perpendicular to the channel current direction of the second PMOS module, and the electrical parameter characteristics of the first PMOS module are the same as those of the second PMOS module. Under any uniaxial bending stress, the change in operating current of the first PMOS module and the change in operating current of the second PMOS module cancel each other out, thereby canceling out the change in operating current of the PMOS device. The compensated and adjusted operating current is output to the external terminal of the current compensation circuit.

2. The current compensation circuit according to claim 1, characterized in that, The first PMOS module includes M first PMOS transistors, and the second PMOS module includes N second PMOS transistors, where M and N are integers greater than or equal to 1.

3. The current compensation circuit according to claim 2, characterized in that, In the first PMOS module, when M equals 1, the source of the first PMOS transistor is connected to the first voltage, the gate of the first PMOS transistor is connected to the second voltage, the first PMOS transistor is disposed on the silicon-based ultrathin flexible chip, and the channel current direction of the first PMOS transistor is set along the first direction; in the first PMOS module, when M is greater than 1, M first PMOS transistors are arranged in parallel, the source of each first PMOS transistor is connected to the first voltage, the gate of each first PMOS transistor is connected to the second voltage, the drains of the M first PMOS transistors are connected together, the M first PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each first PMOS transistor is set along the first direction, wherein the source of the first PMOS transistor is the input terminal of the first PMOS module, the gate of the first PMOS transistor is the control terminal of the first PMOS module, and the drain of the first PMOS transistor is the output terminal of the first PMOS module.

4. The current compensation circuit according to claim 3, characterized in that, In the second PMOS module, when N equals 1, the source of the second PMOS transistor is connected to the first voltage, the gate of the second PMOS transistor is connected to the second voltage, and the drain of the second PMOS transistor is connected together with the drains of M first PMOS transistors to output the operating current. The second PMOS transistor is disposed on the silicon-based ultrathin flexible chip, and the channel current direction of the second PMOS transistor is set along the second direction. In the second PMOS module, when N is greater than 1, N second PMOS transistors are arranged in parallel. The source of each second PMOS transistor is connected to the first voltage, the gate of each second PMOS transistor is connected to the second voltage, and the drain of each N second PMOS transistor is connected together with the drains of M first PMOS transistors to output the operating current. The N second PMOS transistors are respectively disposed on the silicon-based ultrathin flexible chip, and the channel current direction of each second PMOS transistor is set along the second direction. The source of the second PMOS transistor is the input terminal of the second PMOS module, the gate of the second PMOS transistor is the control terminal of the second PMOS module, and the drain of the second PMOS transistor is the output terminal of the second PMOS module.

5. The current compensation circuit according to claim 4, characterized in that, Within the extended plane of the silicon-based ultrathin flexible chip, the first direction is perpendicular to the second direction; the PMOS device to be compensated and adjusted is either the first PMOS transistor or the second PMOS transistor.

6. The current compensation circuit according to claim 5, characterized in that, Under the uniaxial bending stress, the sum of the changes in the operating current of the M first PMOS transistors cancels out the sum of the changes in the operating current of the N second PMOS transistors.

7. A silicon-based ultrathin flexible chip, characterized in that, The invention includes a substrate, a functional integrated circuit, and a current compensation circuit as described in any one of claims 1-6. The functional integrated circuit and the current compensation circuit are respectively disposed on the substrate. The current compensation circuit is connected to the functional integrated circuit. The functional integrated circuit includes a PMOS device to be compensated and adjusted. The current compensation circuit also includes the PMOS device. The current compensation circuit compensates and adjusts the operating current of the PMOS device.

8. The silicon-based ultrathin flexible chip according to claim 7, characterized in that, The functional integrated circuit includes i PMOS devices, and the silicon-based ultrathin flexible chip includes i current compensation circuits. The i current compensation circuits correspond one-to-one with the i PMOS devices to perform operating current compensation and adjustment, where i is an integer greater than or equal to 1.

9. The silicon-based ultrathin flexible chip according to claim 7, characterized in that, The functional integrated circuit includes i PMOS devices, and the silicon-based ultrathin flexible chip includes j current compensation circuits. At least one of the current compensation circuits simultaneously performs operating current compensation adjustment on two or more PMOS devices, where i and j are integers greater than or equal to 1 and i is greater than j.

10. A current compensation method for compensating and adjusting the operating current of a PMOS device inside a silicon-based ultrathin flexible chip, characterized in that... include: A silicon-based ultrathin flexible chip is provided, wherein the PMOS device is internally included in the silicon-based ultrathin flexible chip; A PMOS compensation structure is provided, wherein the PMOS compensation structure and the PMOS device are connected in parallel within the silicon-based ultrathin flexible chip, and the channel current direction of the PMOS compensation structure is perpendicular to the channel current direction of the PMOS device. Under arbitrary uniaxial bending stress, the change in the operating current of the PMOS device is offset and canceled by the change in the operating current of the PMOS compensation structure, so that the PMOS device outputs a stable operating current. The electrical parameters of the PMOS compensation structure are the same as those of the PMOS device.

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