CAM table processing method and device

By dividing the tag data into multiple tag sub-data and performing AND operations in the RAM block, the problems of excessive RAM depth and resource waste are solved, and more efficient data query and system frequency improvement are achieved.

CN115048375BActive Publication Date: 2025-09-23CHONGQING AOPUTAI COMM TECH CO LTD
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Patent Information

Application Number
CN202210614666.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-31
Publication Date
2025-09-23
Estimated Expiration
2042-05-31

AI Technical Summary

Technical Problem

In the prior art, when using FPGA RAM blocks to implement CAM functions, the RAM depth is too large, affecting the system operating frequency and resource utilization. In addition, when registers and comparators in the FPGA implement CAM functions, logic resources are seriously wasted, resulting in low cost-performance.

Method used

The tag data is divided into multiple tag sub-data, the bit width of each tag sub-data is used as the address bit width of the RAM, and the corresponding storage data is stored in the RAM block. The port data is obtained by performing AND operation on the tag sub-data, reducing the RAM depth and resource utilization.

Benefits of technology

Through data bit division and operation optimization, the RAM depth and resource utilization are reduced, the data query efficiency and system operating frequency are improved, and the resource utilization and flexibility are improved.

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Abstract

The present application provides a CAM table processing method and device, including obtaining tag data to be processed and port data corresponding to the tag data to be processed; performing data bit division on the tag data to be processed to obtain multiple tag sub-data; and setting corresponding storage data for each tag sub-data; wherein the result of an AND operation of the storage data corresponding to all tag sub-data is the port data; for each tag sub-data, generating a read and write address according to the tag sub-data to obtain multiple read and write addresses; and writing the storage data corresponding to the tag sub-data into the data area corresponding to the read and write address in the RAM block. By setting in this way, the depth of the RAM block can be reduced, the resource utilization rate can be reduced, and the system operating frequency can be increased.
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Description

Technical Field

[0001] The present application relates to communication technology, and in particular to a method and device for processing a CAM table. Background Art

[0002] In data communication technology, data needs to be controlled and forwarded. Data forwarding and control can be achieved by using a Content Addressable Memory (CAM) chip through table lookup.

[0003] Field Programmable Gate Arrays (FPGAs), as programmable logic devices, can process various data signals. Therefore, CAM functions can also be implemented using FPGAs. The principle behind using a CAM chip to implement CAM functions is to compare tag data with all data items in the CAM chip, determine whether there is data in the CAM chip that matches the tag data, and then obtain the address of the matching data in the CAM chip. Since FPGA RAM blocks are memories that use addresses to query data, implementing CAM using FPGA RAM requires generating a RAM address based on the tag data, then using this generated RAM address to query the data stored in the RAM block and obtain a port based on the stored data.

[0004] However, when the RAM address is generated according to the tag data, the depth of the RAM will become very large, affecting the system operating frequency and resource utilization. Summary of the Invention

[0005] The present application provides a CAM table processing method and device, aiming to improve resource utilization, increase system operating frequency, and increase design flexibility.

[0006] An embodiment of the present application provides a method for processing a CAM table. The method is applied to a forwarding device. The forwarding device includes a processing chip. The processing chip includes multiple RAM blocks. The method includes:

[0007] Obtaining the tag data to be processed and the port data corresponding to the tag data to be processed;

[0008] Divide the tag data to be processed into data bits to obtain multiple tag sub-data; and set corresponding storage data for each tag sub-data; wherein the result of the AND operation of the storage data corresponding to all the tag sub-data is the port data;

[0009] For each tag sub-data, a read / write address is generated according to the tag sub-data to obtain multiple read / write addresses; and the storage data corresponding to the tag sub-data is written into the data area corresponding to the read / write address in the RAM block.

[0010] In one embodiment, the method further comprises:

[0011] Obtain the port data corresponding to the tag data to be processed;

[0012] Performing data bit division on the port data to obtain multiple intermediate data;

[0013] Valid data is selected from the plurality of intermediate data as the remapped port data, and corrected data of the remapped port data is generated.

[0014] In one embodiment, the method further comprises:

[0015] Obtaining a forwarding service request and an identifier of a RAM block to be queried, wherein the forwarding service request includes label data;

[0016] Divide the tag data into multiple query subtags, use each query subtag to query in the RAM block to be queried, and obtain the storage data corresponding to each query subtag;

[0017] An AND operation is performed on the stored data corresponding to each query subtag to obtain an operation result; and when the operation result is valid, a port is obtained according to the operation result.

[0018] In one embodiment, each RAM block is provided with multiple data partitions, each data partition storing a partitioned CAM table; the tag data is divided into multiple query sub-tags, and each query sub-tag is used to perform a query in the RAM block to be queried to obtain the stored data corresponding to each query sub-tag, specifically including:

[0019] Obtaining an identifier of a data partition to be queried in the RAM block to be queried;

[0020] Use each query sub-tag to query the data partition to obtain the partition storage data corresponding to each query sub-tag.

[0021] In one embodiment, performing an AND operation on the stored data corresponding to each query subtag to obtain an operation result; and when the operation result is valid, obtaining a port according to the operation result specifically includes:

[0022] Perform an AND operation on the partition storage data corresponding to each query sub-tag to obtain a partition operation result; and when the operation result is valid, obtain a port according to the operation result.

[0023] In one embodiment, the method further comprises:

[0024] When the partition operation result is invalid, it is determined whether all data partitions in the RAM block to be queried have been queried;

[0025] If not, update the identifier of the data partition to be queried in the RAM block to be queried; use each query sub-tag to query in the data partition to be queried to obtain data stored in multiple partitions;

[0026] Perform an AND operation on multiple stored data to obtain an operation result; and obtain a port when the operation result indicates that it is valid.

[0027] In one embodiment, the method further comprises:

[0028] If all data partitions in the RAM block to be queried have been queried, update the identifier of the RAM block to be queried, and obtain the identifier of the data partition to be queried in the RAM block to be queried;

[0029] Use each query subtag to query within the data partition to obtain data stored in multiple partitions;

[0030] Perform an AND operation on multiple stored data to obtain an operation result; and obtain a port when the operation result indicates that it is valid.

[0031] Another embodiment of the present application provides a forwarding device, including: a processing chip;

[0032] The processing chip is provided with a plurality of RAM blocks for storing CAM tables; the processing chip stores computer execution instructions;

[0033] The processing chip executes the computer execution instructions to implement the methods involved in the above embodiments.

[0034] Another embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the methods involved in the above embodiments.

[0035] Yet another embodiment of the present application provides a computer program product, including a computer program, which implements the methods involved in the above embodiments when executed by a processor.

[0036] The present application provides a CAM table processing method and device, which performs data bit division on tag data to be processed to obtain multiple tag sub-data; and sets corresponding storage data for each tag sub-data; generates a read / write address based on the tag sub-data, writes the storage data corresponding to the tag sub-data into the data area corresponding to the read / write address in a RAM block, divides the tag data to obtain multiple tag sub-data, uses the bit width of each tag sub-data as the address bit width of the RAM, and reduces the bit width of the tag sub-data compared to the tag data, thereby further reducing the depth of the RAM. Furthermore, the result of an AND operation of the storage data corresponding to all tag sub-data in the tag data to be processed is set as port data. When querying port data using the tag data, the port data can be obtained by querying all tag sub-data corresponding to the tag data and then performing an AND operation on the storage data obtained by the query, thereby ensuring the port query function is implemented while reducing the depth of the RAM. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0038] Figure 1 It is a structural diagram of a forwarding device;

[0039] Figure 2 It is a structural diagram of another forwarding device;

[0040] Figure 3A A schematic diagram of a CAM table storage principle in a RAM block provided in one embodiment of the present application;

[0041] Figure 3B A schematic diagram of another CAM table storage principle in a RAM block provided in another embodiment of the present application;

[0042] Figure 3C for Figure 3B A schematic diagram of the storage principle of each data partition in the storage principle shown;

[0043] Figure 3D A schematic diagram of the storage principle of multiple RAM blocks in an FPGA provided by another embodiment;

[0044] Figure 4 A data processing method for a CAM table provided in one embodiment of the present application;

[0045] Figure 5 A data processing method for a CAM table provided in another embodiment of the present application;

[0046] Figure 6 A data processing method for a CAM table provided in another embodiment of the present application;

[0047] Figure 7 A data processing method for a CAM table is provided in yet another embodiment of the present application.

[0048] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0049] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0050] In data communication technology, data needs to be controlled and forwarded. Data forwarding and control can be achieved by using a Content Addressable Memory (CAM) chip through table lookup.

[0051] Field Programmable Gate Array (FPGA) is a programmable logic device that can process various data signals. Figure 1 As shown, a FPGA-based solution for implementing CAM functionality in a small or medium-sized forwarding device 100 is provided. The forwarding device 100 includes an FPGA and an external CAM chip 101. CAM chip 101 stores a CAM table. Upon receiving a forwarding service request, the FPGA in the forwarding device 100 extracts the label data in the request, queries the CAM table, and forwards the data to the corresponding path based on the result returned by the CAM table. However, this approach consumes additional hardware resources, increasing the overall cost of the device. Furthermore, the device only utilizes a small portion of the capacity of CAM chip 101, resulting in low utilization of CAM chip 101 and a low overall cost-effectiveness.

[0052] Considering the cost-effectiveness of the entire device, when the required CAM capacity is not large but the FPGA resources are sufficient to perform the CAM function, the FPGA can be used to implement the CAM function. This involves utilizing the FPGA's internal registers and comparators to implement the CAM function. However, this solution is logically complex and consumes a large amount of logic resources, resulting in a waste of FPGA logic resources, a low cost-effectiveness, and limited application flexibility when implementing the CAM function.

[0053] To further solve the problem that small and medium-sized devices use registers and comparators in FPGA to implement CAM functions, resulting in logic resource waste and inflexible application, a solution using RAM blocks in FPGA to implement CAM functions is proposed.

[0054] The principle behind using CAM chip 101 to implement CAM functionality is to compare tag data with all data items in CAM chip 101, determine whether there is data in CAM chip 101 that matches the tag data, and then obtain the address of the matching data in CAM chip 101. Because FPGA RAM blocks are memories that use addresses to query data, implementing CAM using FPGA RAM requires generating a RAM address based on the tag data, using the generated RAM address to query the RAM block for stored data, and then obtaining a port based on the stored data.

[0055] The following is a calculation of the RAM resources required to implement the CAM function. Define the number of ports in the CAM table as Road_num and the port width as Road_m. num =2 Road_m , the bit width of the label data is Lable_n. Then the RAM resources are:

[0056] RAM data width = 2 Road_m

[0057] RAM address width = Lable_n

[0058] RAM depth = 2 Lable_n

[0059] For example, if the port width Road_m is 12 bits and the label data width Lable_n is 20 bits, the RAM depth is 2 20 .

[0060] Therefore, if the bit width of the tag data is directly used as the RAM address bit width, the depth of the RAM will be very large, affecting the data query rate in the RAM block and further affecting the data forwarding efficiency.

[0061] To solve the above technical problems, the present application provides a CAM table processing method and device, aiming to improve data query efficiency and increase system operating frequency. The technical concept of the present application is: split the tag data into multiple tag sub-data, and use the bit width of each tag sub-data as the address bit width of the RAM. Compared with the tag data, the reduced bit width of the tag sub-data can further reduce the RAM depth, reduce RAM resource utilization, and improve data query efficiency.

[0062] It should be noted here that when the processing chip is FPGA, the internal Distributed RAM or external DDR can be used to replace the Block RAM in this application, and similar chips such as EPLD can also adopt the processing method of this application.

[0063] like Figure 2 As shown, the present application provides a forwarding device 100. The forwarding device 100 includes a processing chip, which includes multiple RAM blocks. The processing chip is an FPGA, and the multiple RAM blocks are used to implement CAM functions.

[0064] The original CAM table is used to represent the mapping relationship between label data and port data. The bit width of each label data is Lable_n, and the bit width of the port data is 2 Road_m .

[0065] When storing the above mapping relationship in the RAM block, the label data is divided into N parts, each of which is defined as a label sub-data Label_sub. The bit width of the label sub-data Label_sub is defined as m bits, where m = Label_n / N. Storage data is set for each label sub-data Label_sub, and the result of an AND operation on the storage data corresponding to the multiple label sub-data divided from a single label data is equal to the port data.

[0066] For example, a tag data is 00101_00011_00010_00001, with a bit width of 20 bits. The port data is 4096 bits, with the second bit set to 1 and all other bits set to 0. This tag data is divided into four parts, resulting in four tag sub-data: 00101, 00011, 00010, and 00001. Four storage data are set for each tag data, each containing 4096 bits. The corresponding storage data for each of the four tag sub-data are ANDed together to obtain the result, which is also 4096 bits, with the second bit set to 1 and all other bits set to 0. This means the result is equal to the port data.

[0067] After the label data is divided, the RAM resources are:

[0068]

[0069] That is, the RAM resource size is The RAM resource size before splitting is That is, the RAM resources before the split are much larger than the RAM resources after the split.

[0070] In the above technical solution, by segmenting the tag data, the bit width of the tag sub-data obtained by segmentation is reduced, thereby reducing the resource usage of RAM. And when the original CAM table is used to query the tag data using the port data, the entire original CAM table needs to be polled once and then matched with the port data. Without the solution of segmenting the tag data, the depth is 2 Lable_n , the efficiency of querying the CAM table is too low. After the label data is segmented, the depth is reduced to It can greatly reduce the query time of the original CAM table and improve efficiency.

[0071] To reduce resource usage, the port data is divided into Road_N sections. The original CAM table, with a port data width of Road_num, is divided into Road_N first-level CAM tables with port data widths of Road_sub_num, where Road_sub_num = Road_num / Road_N. In each first-level CAM table, the label data width is Lable_n, and the port data width is Road_sub_num. Correction data is also required for each first-level CAM table.

[0072] It should be noted here that when the calculated Road_sub_num is a non-integer, Road_sub_num can be rounded up.

[0073] As shown in Table 1, the bit width of the tag data stored in the original CAM table is 20 bits, and the bit width of the port data is 4096 bits.

[0074] Table 1 Original CAM table

[0075] Tag data (20 bits) Port data (4096 bits) port Label data 0 The 0th bit is 1, and the rest are 0 0 Label data 1 The first bit is 1, the rest are 0 1 Label data 2 The second bit is 1, the rest are 0 2 …… …… Tag data 4095 The 4095th bit is 1, and the rest are 0 4095

[0076] For example, each port data in the original CAM table in Table 1 is segmented to obtain 16 first-level CAM tables. The port data bit width in each first-level CAM table is 256 bits. The specific segmentation method is:

[0077] The port data corresponding to tag data 0 is divided into 16 256-bit port data. Only the first 256-bit port data has valid bits, that is, bit 0 is 1, and the remaining 255 bits are 0. The remaining 15th 256-bit port data has no valid bits. Therefore, tag data 0 can be mapped and associated with the first 256-bit port data. The remapped port data is the same as the original port data, and there is no need to set correction data for each remapped port data.

[0078] According to the above segmentation principle, after the port data corresponding to the tag data 2 to 255 are segmented, the first 256 bits of the port data all have valid bits. The tag data 2 to 255 can be mapped and associated with the first 256 bits of the port data without setting correction data.

[0079] The port data corresponding to the tag data 256 is divided into 16 256-bit port data. Only the second 256-bit port data has valid bits, and the remaining 15th 256-bit port data has no valid bits. Therefore, the tag data 0 can be mapped and associated with the second 256-bit port data, and the remapped port data differs from the original port data by 256. The correction data for the remapped port data is set to 256.

[0080] According to the above segmentation principle, after the port data corresponding to the tag data 257 to 511 are segmented, the second 256-bit port data all have valid bits. The tag data 257 to 511 can be mapped and associated with the second 256-bit port data, and the correction data is set to 256.

[0081] Similarly, the port numbers for label data 0 to label data 4095 are remapped and divided into 16 first-level CAM tables according to the correction data set for the remapping. The first first-level CAM table shows the mapping relationship between label data 0 to 255 and port data, with the correction data set to 0. The second first-level CAM table shows the mapping relationship between label data 256 to 511 and port data, with the correction data set to 256. Similarly, the 16th first-level CAM table shows the mapping relationship between label data 3840 to 4095 and port data, with the correction data set to 3840.

[0082] After the original CAM labels are segmented, label data segmentation is performed for each first-level CAM table according to the label data segmentation principle.

[0083] The following is a calculation of the RAM block resource size used by each first-level CAM table. The bit width of the tag data in each first-level CAM table is Lable_n, and the bit width of the port data corresponding to the tag data is Road_sub_num. The RAM resources required by each first-level CAM table are:

[0084]

[0085] For each first-level CAM table, the first-level CAM table can be split again. The splitting principle is the same as the first splitting principle, which will not be repeated here.

[0086] The following takes one of the first-level CAM tables obtained by splitting the original CAM table in Table 1 as an example to describe the RAM resource size required by each first-level CAM table.

[0087] like Figure 3A As shown in the figure, the bit width of the first-level CAM table port data is 256 bits, the bit width of the label data is 20 bits, recorded as Lable[19:0], and the 20 bits are divided into 4 parts, each with a bit width of 5 bits, recorded as Lable[4:0], Lable[9:5], Lable[14:10] and Lable[19:15].

[0088] The five data bits in Lable[4:0] can be combined to create 32 data items, corresponding to 32 addresses in the RAM block, denoted as Addr0 to Addr31. Similarly, Lable[9:5], Lable[14:10], and Lable[19:15] can each correspond to 32 addresses in the RAM block, denoted as Addr32 to Addr63, Addr64 to Addr95, and Addr96 to Addr127, respectively. The RAM block is 128 bits deep, and each address stores a single piece of data, with a bit width of 256 bits. Therefore, the RAM resources required for the first-level CAM table are 256 × 128 bits.

[0089] like Figure 3B As shown, taking the first first-level CAM table as an example, the first-level CAM is split again into four second-level CAM tables, labeled T1 to T4, so that the port data corresponding to each tag data has a bit width of 64 bits. The second-level CAM tables obtained by splitting the same first-level CAM table twice are stored in the same RAM block. Each second-level CAM table is stored using the above tag data segmentation method. Figure 3C Only the storage principle of the first second-level CAM table is shown, which is used to store ports Road0 to Road63, and the second second-level CAM table is used to store ports Road64 to Road127. The depth of the RAM block is 128×4, and the RAM resources required by each first-level CAM table are 64×128×4 bits.

[0090] The size of a Block RAM of a certain type of FPGA is 36K. Therefore, each first-level CAM table requires 1 Block RAM. 16 first-level CAM tables require 16 Block RAMs. Figure 3D As shown, the first Block RAM is used to store port Road0 to port Road255, and the second Block RAM is used to store port Road256 to port Road511.

[0091] like Figure 4 As shown, an embodiment of the present application provides a method for processing a CAM table. The method is applied to a forwarding device 100. The forwarding device 100 includes a processing chip. The processing chip has multiple RAM blocks. The method is executed by the processing chip. The method specifically includes the following steps:

[0092] S101: Acquire tag data to be processed and port data corresponding to the tag data to be processed.

[0093] In order to realize data forwarding, the forwarding device 100 needs to first store the label data and the port data corresponding to the label data. When the forwarding device 100 receives a forwarding service request, it extracts the label data in the forwarding service request and uses the label data to query and obtain the corresponding port data.

[0094] The port data corresponding to the tag data to be processed may be the port data, or may be the port data obtained by remapping the port data after data bit division.

[0095] In one embodiment, when the port data corresponding to the tag data to be processed is the port data remapped after data bit splitting, the port data before remapping is first obtained, the data bit splitting is performed on the port data before remapping to obtain a plurality of intermediate data, valid data is selected from the plurality of intermediate data as the port data, a remapping relationship is established between the tag data to be processed and the port data, and correction data for the port data is generated. The correction data is used to correct the remapped port data so that the corrected remapped port data is consistent with the port data before remapping.

[0096] For example, the port data before remapping has a bit width of 4096 bits. The first bit of the port data before remapping is 1, and the remaining 4095 bits are all 0. The 4096 bits of port data before remapping are divided into 16 data parts, each with a bit width of 256 bits. The first bit of the first data part is 1, and the remaining 255 bits are 0. Each bit of the remaining 15 data parts is 0. If the first data part contains valid data, the first data part is selected as the port data. If the first data part has the same representation as the port data before remapping, both representing decimal 2, the corrected data is 0.

[0097] S102 , dividing the tag data to be processed into data bits to obtain a plurality of tag sub-data; and setting corresponding storage data for each tag sub-data, and the result of an AND operation of the storage data corresponding to all the tag sub-data is the port data.

[0098] The tag data to be processed is divided into data bits to ensure that the data in each tag sub-data is the same, and the data is divided according to the order of the data bits.

[0099] For example, the bit width of the data label to be processed is 20 bits, 00101_00011_00010_00001, which is divided into four label sub-data, namely 00101, 00011, 00010 and 00001.

[0100] After obtaining each tag sub-data, corresponding storage data is set for each tag sub-data to ensure that the AND operation result of the storage data corresponding to all tag sub-data obtained by dividing the same tag data is the port data.

[0101] S103 , for each tag sub-data, generate a read / write address according to the tag sub-data to obtain multiple read / write addresses; and write storage data corresponding to the tag sub-data into a data area corresponding to the read / write address in the RAM block.

[0102] Each tag sub-data is assigned a unique read / write address. Multiple read / write addresses can be obtained for the same tag data. Each read / write address corresponds to the tag sub-data one-to-one. The storage data corresponding to the tag sub-data is written into the data area corresponding to the read / write address in the RAM block.

[0103] For example: the above four label sub-data are allocated address bits Addr5, Addr3, Addr2 and Addr1, and the storage data corresponding to 00001 is written in the data area corresponding to Addr1, the storage data corresponding to 00010 is written in the data area corresponding to Addr2, the storage data corresponding to 00011 is written in the data area corresponding to Addr3, and the storage data corresponding to 00101 is written in the data area corresponding to Addr5.

[0104] In the above technical solution, the data bits of the tag data to be processed are divided to obtain multiple tag sub-data; and corresponding storage data is set for each tag sub-data; a read / write address is generated according to the tag sub-data, and the storage data corresponding to the tag sub-data is written into the data area corresponding to the read / write address in the RAM block, and the tag data is divided to obtain multiple tag sub-data, and the bit width of each tag sub-data is used as the address bit width of the RAM. Compared with the tag data, the bit width of the tag sub-data is reduced, which can further reduce the depth of the RAM.

[0105] An embodiment of the present application further provides a method for processing a CAM table, the method comprising the following steps:

[0106] S201: Obtain a forwarding service request and an identifier of a RAM block to be queried.

[0107] The forwarding service request includes label data, which serves as identity information of the forwarding service request. The original CAM table is divided into multiple CAM tables and stored in multiple RAM blocks. The identifier of the RAM block to be queried is selected from the multiple RAM blocks storing the CAM tables.

[0108] For example, the identifiers of the RAM blocks to be queried are selected in order of their identifier sizes. The first RAM block is used as the RAM block for the first query, the second RAM block is used as the RAM block for the second query, and so on, until the Nth RAM block is queried.

[0109] S202 : Divide the tag data into a plurality of query subtags, use each query subtag to perform a query in the RAM block to be queried, and obtain the storage data corresponding to each query subtag.

[0110] Among them, the tag data is divided according to the scheme described in the above embodiment to obtain multiple query sub-tags, and the read and write addresses of the RAM block are generated according to each query sub-tag. The read and write addresses generated by each query sub-tag are used to query in the RAM block to be queried to obtain the storage data corresponding to each query sub-tag.

[0111] For example, the tag data is divided into four query subtags, and four read and write addresses are generated according to the four query subtags. The four read and write addresses are used in sequence to read the data stored in the RAM block to obtain the storage data corresponding to the four query subtags.

[0112] S203 , performing an AND operation on the stored data corresponding to each query subtag to obtain an operation result; and if the operation result is valid, obtaining a port according to the operation result.

[0113] A valid operation result means that only one data bit in the operation result is 1, and the other data bits are 0. An invalid operation result means that multiple data bits in the operation result are 1, or all data bits are 0.

[0114] When the operation result is valid, the correction data of the CAM table stored in the RAM block is obtained, and the operation result and the correction data of the CAM table are added together to obtain the port.

[0115] For example, the RAM block is queried in four cycles based on the contents of four query subtags. The query results of each cycle are recorded as result1, result2, result3, and result4, respectively. The query results of each cycle are then ANDed with the query interface of the previous cycle. The final query result is result = result1 & result2 & result3 & result4.

[0116] In the above technical solution, the result of the AND operation of the stored data corresponding to all the tag sub-data in the tag data to be processed is set as the port data. When the tag data is used to query the port data, the storage data obtained by the query can be queried by using all the tag sub-data corresponding to the tag data, and then the AND operation is performed on the stored data, and the port data is obtained after correction using the correction data, so as to ensure the realization of the port query function while reducing the depth of RAM.

[0117] like Figure 5 As shown, an embodiment of the present application provides a CAM table processing method. The method divides each port data in the original CAM table into multiple first-level CAM tables after segmentation and remapping, and divides the original CAM table into multiple first-level CAM tables according to the correction data set by the remapping. That is, the port data with the same correction data and the tag data corresponding to the port data are stored in the same first-level CAM table, and the correction data is used as the correction data of the first-level CAM table. The first-level CAM table is then divided again according to the same principle to obtain multiple second-level CAM tables. Each RAM block includes multiple data partitions, and each data partition stores a segmented CAM table, for example, storing a first-level CAM table or a second-level CAM table. The method includes the following steps:

[0118] S301: Obtain an identifier of a data partition to be queried in a RAM block to be queried.

[0119] In this step, multiple data partitions are set in the RAM block to be queried, each data partition is used to store a segmented CAM table, the corrected data of each segmented CAM table is used as the corrected data of the data partition, and the identifier of the data partition to be queried is obtained in the order of the size of the data partition identifier.

[0120] For example, each RAM block is used to store a first-level CAM table. The port data in the first-level CAM table has a bit width of 256 bits. The first-level CAM table is further divided into four second-level CAM tables, which are labeled as the first second-level CAM table T1, the second second-level CAM table T2, the third second-level CAM table T3, and the fourth second-level CAM table T4. The port data in each second-level CAM table has a bit width of 64 bits.

[0121] The first second-level CAM table T1 is stored in the first data partition, the second second-level CAM table T2 is stored in the second data partition, the third second-level CAM table T3 is stored in the third data partition, and the fourth second-level CAM table T1 is stored in the fourth data partition.

[0122] Taking the RAM block storing the first first-level CAM table as an example, after the second partition, the port corresponding to the port data stored in the first second-level CAM table T1 has the smallest value. Therefore, the first data partition storing the first second-level CAM table T1 is used as the starting access data partition in the RAM block to be queried, and the corresponding corrected data is 0. The corrected data of the second data partition is 64, the corrected data of the third data partition is 128, and the corrected data of the third data partition is 192.

[0123] It should be noted that it takes 4 cycles to complete a data partition query, and the total query time required to complete a data query in a RAM block is 4×4 clock cycles. Therefore, the interval between two forwarding service requests must be greater than or equal to 16 cycles. The query cycle threshold time can be modified according to the actual application. For example, Figure 3B The second CAM table is modified to use two RAMs to store 4, so that the depth of the RAM block becomes 256. If two CAM blocks are queried at the same time, the query time can be reduced by half.

[0124] S302: Use each query subtag to query in the data partition to be queried, and obtain the partition storage data corresponding to each query subtag.

[0125] In this step, for each query subtag, the query subtag is used to generate the read / write address in the RAM block to be queried. The read / write address is then used to query the data partition to be queried. If the stored data can be queried, it is directly output. If the stored data cannot be queried, a prompt message indicating that no query results were found is output.

[0126] S303: Perform an AND operation on the partition storage data corresponding to each query sub-tag to obtain a partition operation result; and if the operation result is valid, obtain a port according to the operation result.

[0127] In this step, an AND operation is performed on the partitioned storage data corresponding to each query subtag to obtain a partition operation result. If the partition operation result is valid, the CAM table correction data stored in the data partition to be queried in the RAM block to be queried is obtained, and the operation result and the CAM table correction data are added to obtain a port.

[0128] S304: When the partition operation result is invalid, determine whether all data partitions in the RAM block to be queried have been queried. If so, proceed to S305; otherwise, proceed to S306.

[0129] For example: determine whether all T1 to T4 blocks in the RAM blocks to be queried have been queried. If so, proceed to step S305; otherwise, proceed to step S306.

[0130] S305 . If all data partitions in the RAM block to be queried have been queried, update the identifier of the RAM block to be queried, obtain the identifier of the data partition to be queried in the RAM block to be queried, and return to S301 .

[0131] In this step, if all the data partitions in the RAM block to be queried have been queried, it indicates that the query of the module has been completed, the identifier of the next RAM block to be accessed is updated, and the process jumps to S201 to obtain the data partition to be accessed.

[0132] S306 : Update the identifier of the data partition to be queried in the RAM block to be queried, and return to S302 .

[0133] In this step, the data partition in the RAM block to be queried is not completely queried, indicating that there are remaining data partitions in the RAM block that have not been queried. The identifier of the data partition to be accessed in the module is updated, and the process jumps to 302 to continue the query.

[0134] In the above technical solution, when the original CAM table is too large or the first-level CAM table is still relatively large and cannot be adapted to the RAM block, the CAM table is divided and multiple data partitions are set in the RAM block. Each data partition stores the divided CAM table, which can adapt to the resource size of the RAM block. By traversing each data partition in the RAM block and performing calculations on the query results, the calculation results are corrected using the correction data of each data partition when the calculation results are valid to obtain the port data. Through such settings, the CAM table can adapt to the size of the RAM block while ensuring the validity of data reading.

[0135] like Figure 6 As shown, an embodiment of the present application provides a method for processing a CAM table, the method comprising the following steps:

[0136] S401: Receive a CPU access request.

[0137] The CPU access request includes the port to be queried.

[0138] S402 , monitor whether there is an internal circuit access request to the CAM table, if so, proceed to S407 , otherwise proceed to S403 .

[0139] S403: Use the port to query the RAM block.

[0140] Among them, the RAM block storing the port is determined according to the port, and the correction data of the RAM block is obtained, and the port data is obtained by subtracting the correction data from the port. For each RAM block, the storage data corresponding to each tag sub-data is traversed,

[0141] S404: Determine whether there is a matching item. If so, proceed to S406; otherwise, proceed to S405.

[0142] S405: Write the port into the RAM block.

[0143] When there is no matching entry, it means that the port does not exist in the CAM table, and the port is written into the RAM block. The implementation of writing the port into the RAM block has been described in the above embodiment and will not be repeated here.

[0144] S406: Output label data.

[0145] S407: Use the tag data to query the RAM block.

[0146] The implementation of using tag data to query the RAM block has been described in the above embodiment and will not be repeated here.

[0147] S408, output port.

[0148] In the above technical solution, when no service accesses the CAM table, the CPU can initialize the CAM table, that is, configure the port of the service. When a service accesses, the CPU queries the CAM table based on the service tag information and returns the port corresponding to the tag, thereby completing the CAM table's function of forwarding and controlling the service.

[0149] like Figure 7 As shown, an embodiment of the present application also provides a method for processing a CAM table, which further includes the following steps:

[0150] S501. Determine whether the result can be found in the first RAM block. If so, proceed to S50(n+2). If not, proceed to S502.

[0151] The use of tag data to query a port in a RAM block has been described in detail in the above embodiment and will not be repeated here.

[0152] S502: Determine whether the result can be found in the second RAM block. If so, proceed to S50(n+2). If not, proceed to S503.

[0153]

[0154] S50n, determine whether the result can be queried in the S50nth RAM block, if so, go to S50(n+2), if not, go to S50(n+1).

[0155] S50(n+1): output the table lookup result that does not contain a matching item.

[0156] S50(n+2): Output the table lookup result of the matching item.

[0157] In the above technical solution, a table lookup is performed on each RAM block in sequence to obtain a table lookup result, which reduces the CPU usage.

[0158] In one embodiment, table lookup can be performed on n RAM blocks at the same time, which can improve the query efficiency.

[0159] An embodiment of the present application further provides a computer-readable storage medium, in which computer instructions are stored. When a processor executes the computer instructions, each step of the method in the above embodiment is implemented.

[0160] An embodiment of the present application further provides a computer program product, including computer instructions, which, when executed by a processor, implement the various steps of the method in the above embodiment.

[0161] Those skilled in the art will readily appreciate other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present invention that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0162] It should be understood that the present application is not limited to the exact structure described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A method for processing a CAM table, characterized in that: The method is applied to a forwarding device, the forwarding device including a processing chip, wherein the processing chip is provided with a plurality of RAM blocks, and the method includes: Acquire port data corresponding to the tag data to be processed; perform data bit division on the port data to obtain a plurality of intermediate data; select valid data from the plurality of intermediate data as the remapped port data, and generate corrected data for the remapped port data; wherein the tag data to be processed is data in the CAM table; Performing data bit division on the tag data to be processed to obtain a plurality of tag sub-data; and setting corresponding storage data for each tag sub-data; wherein the result of an AND operation of the storage data corresponding to all the tag sub-data is the port data; For each tag sub-data, a read / write address is generated according to the tag sub-data to obtain a plurality of read / write addresses; and storage data corresponding to the tag sub-data is written into a data area corresponding to the read / write address in a RAM block.

2. The CAM table processing method according to claim 1, characterized in that: The method further comprises: Obtaining a forwarding service request and an identifier of a RAM block to be queried, wherein the forwarding service request includes label data; Dividing the tag data into a plurality of query subtags, and using each query subtag to perform a query in the RAM block to be queried to obtain the storage data corresponding to each query subtag; An AND operation is performed on the stored data corresponding to each query subtag to obtain an operation result; and when the operation result is valid, a port is obtained according to the operation result.

3. The processing method according to claim 2, characterized in that Each RAM block is provided with a plurality of data partitions, each data partition storing a partitioned CAM table; the tag data is divided into a plurality of query sub-tags, and each query sub-tag is used to perform a query in the RAM block to be queried to obtain the stored data corresponding to each query sub-tag, specifically comprising: Obtaining an identifier of a data partition to be queried in the RAM block to be queried; Each query sub-tag is used to perform a query in the data partition to be queried, and the partition storage data corresponding to each query sub-tag is obtained.

4. The processing method according to claim 3, characterized in that Perform an AND operation on the stored data corresponding to each query sub-tag to obtain the operation result; When the operation result is valid, obtaining the port according to the operation result specifically includes: Perform AND operation on the partition storage data corresponding to each query sub-tag to obtain the partition operation result; When the operation result is valid, a port is obtained according to the operation result.

5. The processing method according to claim 4, characterized in that: The method further comprises: When the partition operation result is invalid, determining whether all data partitions in the RAM block to be queried have been queried; If not, updating the identifier of the data partition to be queried in the RAM block to be queried; performing a query using each query subtag in the data partition to be queried to obtain data stored in multiple partitions; Perform an AND operation on multiple stored data to obtain an operation result; and obtain a port when the operation result indicates that it is valid.

6. The processing method according to claim 5, characterized in that: The method further comprises: If all data partitions in the RAM block to be queried have been queried, updating the identifier of the RAM block to be queried, and obtaining the identifier of the data partition to be queried in the RAM block to be queried; Using each query subtag to query the data partition to be queried, to obtain multiple partitions storing data; Perform an AND operation on multiple stored data to obtain an operation result; and obtain a port when the operation result indicates that it is valid.

7. A forwarding device, characterized in that: include: Processing chip; The processing chip is provided with a plurality of RAM blocks for storing CAM tables; the processing chip stores computer execution instructions; The processing chip executes the computer-executable instructions to implement the method according to any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions, which are used to implement the method according to any one of claims 1 to 6 when executed by a processor.

9. A computer program product, characterized in that The method comprises a computer program, which implements the method according to any one of claims 1 to 6 when the computer program is executed by a processor.

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