Display panel and display device

By integrating photosensitive devices and storage capacitors in the display panel, the film layer structure is simplified, the problem of increasing complexity of separate settings of photosensitive devices is solved, and the ultra-thinization of the display panel is achieved.

CN115101563BActive Publication Date: 2025-01-14BOE TECHNOLOGY GROUP CO LTD
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Patent Information

Application Number
CN202210738545.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-24
Publication Date
2025-01-14
Estimated Expiration
2042-06-24

AI Technical Summary

Technical Problem

When the existing display panels realize fingerprint recognition function, the separate settings of the photosensitive device increase the complexity of the film layer, hindering the ultra-thin development of the display panel.

Method used

The photosensitive device and the storage capacitor are simultaneously integrated into the display substrate, and connected to the photosensitive device through a switching circuit, the functional integration of the photosensitive device is realized and the film layer structure is simplified.

Benefits of technology

It realizes ultra-thinization of the display panel, while ensuring the normal operation of the fingerprint recognition function.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a display panel and a display device, which relate to the field of display technology. The display panel includes: a substrate and a display substrate, the display substrate is formed with a storage capacitor; the display substrate includes a driving layer and a light-emitting layer, the driving layer is located between the substrate and the light-emitting layer, the driving layer includes a pixel circuit and a switch circuit distributed at intervals, and the light-emitting layer includes a light-emitting device and a photosensitive device distributed at intervals; the pixel circuit is connected to the light-emitting device, the first end of the photosensitive device is respectively connected to the first end of the switch circuit and the first end of the storage capacitor, the second end of the photosensitive device and the second end of the storage capacitor are both used to load a constant voltage signal, the second end of the switch circuit is used to connect to the signal acquisition circuit, and the control end of the switch circuit is used to load a control signal. In the embodiment of the present disclosure, by integrating the photosensitive device and the storage capacitor in the display substrate at the same time, the film layer structure can be simplified, and the ultra-thin display panel can be achieved.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of science and technology, display devices are widely used in people's daily life. In order to make the appearance of display devices more beautiful and fashionable, the display panels included in the display devices are becoming more and more ultra-thin. At present, most display panels include photosensitive devices to realize functions such as fingerprint recognition, and the photosensitive devices are usually arranged on a side close to the cover plate and are arranged separately on a layer, which increases the complexity of the film layer included in the display panel and is not conducive to the ultra-thin development of the display panel.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0004] The purpose of the present disclosure is to provide a display panel and a display device, which can simplify the film structure of the display panel and realize ultra-thin display panel under the premise of realizing fingerprint recognition function.

[0005] According to one aspect of the present disclosure, there is provided a display panel, comprising:

[0006] substrate;

[0007] A display substrate, located on one side of the substrate and formed with a storage capacitor;

[0008] The display substrate comprises a driving layer and a light-emitting layer, wherein the driving layer is located between the substrate and the light-emitting layer, the driving layer comprises pixel circuits and switch circuits distributed at intervals, and the light-emitting layer comprises light-emitting devices and photosensitive devices distributed at intervals;

[0009] The pixel circuit is connected to the light-emitting device, the first end of the photosensitive device is respectively connected to the first end of the switching circuit and the first end of the storage capacitor, the second end of the photosensitive device and the second end of the storage capacitor are both used to load a constant voltage signal, the second end of the switching circuit is used to connect to the signal acquisition circuit, and the control end of the switching circuit is used to load a control signal.

[0010] According to any one of the display panels described in the present disclosure, the light-emitting layer comprises a first electrode plate and a second electrode plate sequentially distributed in a direction away from the substrate;

[0011] The orthographic projections of the first electrode plate and the second electrode plate on the substrate have an overlapping area, the first electrode plate and the second electrode plate constitute a first storage capacitor, the first electrode plate is connected to the first end of the switch circuit, and the second electrode plate is used to load the constant voltage signal.

[0012] According to any one of the display panels described in the present disclosure, the upper surface of the first electrode plate is a curved structure.

[0013] According to any one of the display panels described in the present disclosure, a surface of the driving layer facing away from the substrate has a protrusion, and an orthographic projection of the first electrode plate on the substrate and an orthographic projection of the protrusion on the substrate have an overlapping area.

[0014] According to any one of the display panels described in the present disclosure, the driving layer includes a third electrode plate;

[0015] The orthographic projections of the third electrode plate and the first electrode plate on the substrate have an overlapping area, the third electrode plate and the first electrode plate constitute a second storage capacitor, and the third electrode plate is connected to the second electrode plate.

[0016] According to any one of the display panels described in the present disclosure, the driving layer includes a fourth electrode plate;

[0017] The fourth electrode plate is located on a side of the third electrode plate close to the substrate, and the orthographic projections of the fourth electrode plate and the third electrode plate on the substrate have an overlapping area. The fourth electrode plate and the third electrode plate constitute a third storage capacitor, and the third electrode plate is connected to the first end of the switch circuit.

[0018] According to any one of the display panels described in the present disclosure, the driving layer comprises a first electrode plate and a second electrode plate sequentially distributed in a direction away from the substrate;

[0019] The orthographic projections of the first electrode plate and the second electrode plate on the substrate have an overlapping area, the first electrode plate and the second electrode plate constitute a first storage capacitor, the first electrode plate is connected to the first end of the switch circuit, and the second electrode plate is used to load the constant voltage signal.

[0020] According to any one of the display panels described in the present disclosure, the photosensitive device comprises a first conductive electrode, a photoelectric conversion unit and a second conductive electrode which are sequentially distributed in a direction away from the substrate;

[0021] The first conductive electrode is connected to a first end of the switch circuit, and the second conductive electrode is used to load the constant voltage signal.

[0022] According to any of the display panels described in the present disclosure, the switching circuit includes a switching transistor, a first electrode of the switching transistor is connected to the first end of the photosensitive device, a second electrode of the switching transistor is used to connect to a signal acquisition circuit, and a gate of the switching transistor is used to load a control signal.

[0023] According to another aspect of the present disclosure, a display device is provided, comprising the display panel described in the above aspect.

[0024] The embodiments of the present disclosure include at least the following technical effects:

[0025] In the embodiments of the present disclosure, by integrating the photosensitive device and the storage capacitor into the display substrate at the same time, the film layer structure can be simplified and the display panel can be made ultra-thin.

[0026] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0028] Figure 1 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0029] Figure 2 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0030] Figure 3 A schematic diagram of the structure of a touch signal acquisition circuit provided in an embodiment of the present disclosure.

[0031] Figure 4 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0032] Figure 5 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0033] Figure 6 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0034] Figure 7 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0035] Figure 8 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0036] Fig. 9 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0037] Fig.10 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure.

[0038] Fig.11 A schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0039] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0040] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as according to the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned upside down, the component described as "upper" will become the component "lower". When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0041] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusive meaning and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used merely as labels and are not intended to limit the quantity of their objects.

[0042] A transistor is an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. The channel region refers to the region where current mainly flows.

[0043] The first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged.

[0044] The present disclosure provides a display panel. Figure 1 or Figure 2 As shown, the display panel includes: a substrate BP and a display substrate, the display substrate includes a driving layer DR and a light-emitting layer EE; the driving layer DR and the light-emitting layer EE are located on one side of the substrate BP, and the driving layer DR is located between the substrate BP and the light-emitting layer EE. The driving layer DR includes a plurality of pixel circuits, and the light-emitting layer EE includes a plurality of light-emitting devices; the plurality of pixel circuits correspond to the plurality of light-emitting devices one by one, and a pixel circuit is connected to a corresponding light-emitting device. In this way, the corresponding light-emitting device can be controlled to emit light under the drive of the pixel circuit to realize the display of the picture on the display panel.

[0045] Among them, the material of the substrate BP can be an inorganic material or an organic material. For example, in some embodiments, the material of the substrate BP can be a glass material such as so-lime glass, quartz glass, sapphire glass, or can be a metal material such as stainless steel, aluminum, nickel, etc. In other embodiments, the material of the substrate BP can be polymethyl methacrylate (PMMA), polyvinyl alcohol (PVA), polyvinyl phenol (PVP), polyether sulfone (PES), polyimide, polyamide, polyacetal, polycarbonate (PC), polyethylene terephthalate (PET), polyethylene naphthalate (PEN) or a combination thereof.

[0046] Optionally, the substrate BP may be a composite of multiple layers of materials in addition to a single layer of material. For example, in some embodiments, the substrate BP includes a base film layer, a pressure-sensitive adhesive layer, a first polyimide layer, and a second polyimide layer stacked in sequence.

[0047] In the embodiment of the present disclosure, a pixel circuit may include a plurality of transistors and pixel capacitors.

[0048] Among them, the transistor can be a thin film transistor, and the thin film transistor can be selected from a top-gate thin film transistor, a bottom-gate thin film transistor or a double-gate thin film transistor; the pixel capacitor can be a bipolar plate capacitor or a tripolar plate capacitor. The material of the active layer of the thin film transistor can be an amorphous silicon semiconductor material, a low-temperature polycrystalline silicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material or other types of semiconductor materials; the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor.

[0049] It is understandable that, among the multiple transistors included in a pixel circuit, the types of any two transistors may be the same or different. Exemplarily, in some embodiments, some transistors in a pixel circuit may be N-type transistors and some transistors may be P-type transistors. Again exemplarily, in other embodiments, the material of the active layer of some transistors in a pixel circuit may be a low-temperature polysilicon semiconductor material, and the material of the active layer of some transistors may be a metal oxide semiconductor material.

[0050] In the embodiments of the present disclosure, Figure 1 or Figure 2 As shown, the driving layer DR includes an insulating buffer layer BUF, a transistor layer, an interlayer dielectric layer ILD, a source-drain metal layer SD, and a planar layer PLN sequentially distributed in a direction away from the substrate BP, and the transistor layer includes a semiconductor layer ACT, a gate insulating layer GI, and a gate metal layer Ga stacked between the insulating buffer layer BUF and the interlayer dielectric layer ILD. The positional relationship of each film layer included in the transistor layer can be determined according to the film layer structure of the thin film transistor.

[0051] The materials of the insulating buffer layer BUF, the gate insulating layer GI and the interlayer dielectric layer ILD may be inorganic insulating materials such as silicon oxide and silicon nitride. The insulating buffer layer BUF may be a single inorganic material layer or multiple stacked inorganic material layers.

[0052] The source-drain metal layer SD can be used to form metal wiring such as power lines, data lines, connection lines, constant voltage signal lines, signal acquisition lines, etc., and can also be used to form an electrode plate of a pixel capacitor. The driving layer DR can include one source-drain metal layer SD, or two or three source-drain metal layers SD. Exemplarily, the driving layer DR includes a first source-drain metal layer SD1 and a second source-drain metal layer SD2.

[0053] Among them, the flat layer PLN is provided with multiple vias, and the multiple pixel circuits, the multiple vias, and the multiple light-emitting devices correspond one to one, and the first electrode of a light-emitting device is connected to the corresponding pixel circuit through the corresponding via.

[0054] In some embodiments, the transistor layer includes a semiconductor layer ACT, a gate insulating layer GI, and a gate metal layer Ga sequentially stacked in a direction away from the substrate BP, and the thin film transistor formed in this way is a top-gate thin film transistor. In other embodiments, the transistor layer includes a gate metal layer Ga, a gate insulating layer GI, and a semiconductor layer ACT sequentially stacked in a direction away from the substrate BP, and the thin film transistor formed in this way is a bottom-gate thin film transistor.

[0055] Among them, the semiconductor layer ACT can be used to form the active part of each transistor included in the pixel circuit, and each active part includes a channel region and two connecting parts (i.e., a source and a drain) located on both sides of the channel region. The channel region can maintain semiconductor properties, and the semiconductor materials corresponding to the two connecting parts are partially or completely conductive. The material of the semiconductor layer ACT can be an amorphous silicon semiconductor material, a low-temperature polycrystalline silicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material or other types of semiconductor materials. The transistor layer may include one semiconductor layer ACT, or may include two semiconductor layers ACT. Exemplarily, the transistor layer includes one semiconductor layer ACT, and is a metal oxide semiconductor layer ACT.

[0056] The gate metal layer Ga can be used to form gate metal layer Ga wiring such as control signal lines and scan lines, and can also be used to form another electrode plate of the pixel capacitor. The transistor layer may include one gate metal layer Ga, or two or three gate metal layers Ga. For example, Figure 1 As shown, the transistor layer includes a first gate metal layer Ga1 and a second gate metal layer Ga2. In this case, the transistor included in the pixel circuit may be a dual-gate thin film transistor.

[0057] In combination with the structure of the semiconductor layer ACT and the structure of the gate metal layer Ga, when the transistor layer includes multiple gate metal layers Ga and / or multiple semiconductor layers ACT, the gate insulating layer GI in the transistor layer can be adaptively increased or decreased. Figure 1As shown, the transistor layer includes a first gate metal layer Ga1, a first gate insulating layer GI1, a metal oxide semiconductor layer ACT, a second gate insulating layer GI2, and a second gate metal layer Ga2 which are sequentially stacked on a substrate BP.

[0058] Optionally, the driving layer DR further includes a passivation layer disposed between the source-drain metal layer SD and the planar layer PLN, so as to protect the source-drain metal layer SD through the provision of the passivation layer. Optionally, the driving layer DR further includes a shielding layer disposed between the insulating buffer layer BUF and the substrate BP, and the shielding layer may overlap with at least part of the channel region of the transistor to shield the light irradiated to the transistor, so as to stabilize the electrical characteristics of the transistor.

[0059] In the embodiments of the present disclosure, the light-emitting device may be an organic light-emitting diode, a micro light-emitting diode, a quantum dot-organic light-emitting diode, a quantum dot light-emitting diode or other types of light-emitting devices.

[0060] For example, in some embodiments, the light emitting device is an organic light emitting diode, and the display panel is an OLED display panel. As follows, taking the light emitting device as an organic light emitting diode as an example, a feasible structure of the light emitting device is exemplarily introduced.

[0061] like Figure 1 or Figure 2 As shown, the light emitting layer EE includes a first electrode layer AN, a pixel definition layer PDL, a functional layer EL and a second electrode layer COM which are sequentially stacked in a direction away from the substrate BP.

[0062] The first electrode layer AN includes multiple first electrodes, the pixel definition layer PDL has first pixel openings corresponding to the multiple first electrodes one by one, and the first electrode includes an exposed area exposed at the corresponding first pixel opening; the functional layer EL includes multiple light-emitting units corresponding to the multiple first pixel openings one by one, and a light-emitting unit is located in the corresponding first pixel opening; the second electrode layer COM is a whole layer setting, and the second electrodes of the multiple light-emitting devices share the second electrode layer COM.

[0063] The exposed area of ​​the first electrode forms the light-emitting area of ​​the corresponding light-emitting device, and the first electrode is connected to the corresponding pixel circuit through the via hole of the flat layer PLN. A light-emitting unit may include an organic electroluminescent material layer, and may also include one or more of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer and an electron injection layer.

[0064] In some embodiments, Figure 1 or Figure 2As shown, the display panel may further include a thin film encapsulation layer TFT. The thin film encapsulation layer TFT is disposed on the side of the light-emitting layer EE away from the substrate BP, and may include an inorganic encapsulation layer and an organic encapsulation layer alternately stacked. The inorganic encapsulation layer can effectively block external moisture and oxygen, and prevent water and oxygen from invading the organic light-emitting functional layer EL and causing material degradation. The organic encapsulation layer is located between two adjacent inorganic encapsulation layers to achieve planarization and reduce the stress between the inorganic encapsulation layers.

[0065] The display panel has a display area and a peripheral area located outside the display area, the edge of the inorganic encapsulation layer can be located in the peripheral area, and the edge of the organic encapsulation layer can be located between the edge of the display area and the edge of the inorganic encapsulation layer. Exemplarily, the thin film encapsulation layer TFT includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked on the side of the light-emitting layer EE away from the substrate BP.

[0066] In some embodiments, the display panel may further include a touch function layer, which is disposed on a side of the thin film encapsulation layer TFT away from the substrate BP, for implementing a touch operation of the display panel.

[0067] In some embodiments, Figure 1 or Figure 2 As shown, the display panel also includes a light guide layer BM, which is arranged on the side of the touch function layer away from the substrate BP. The light guide layer BM includes first light channels BM1 corresponding to multiple light emitting devices one by one, so that the light emitted by each light emitting device can pass through the corresponding first light channel BM1.

[0068] In the related art, in order to realize fingerprint recognition, touch and other functions of the display panel, a photosensitive device OPD is usually arranged on the side of the light-emitting layer EE away from the substrate BP. This makes the film structure of the display panel complicated and increases the thickness of the display panel, making it difficult to achieve ultra-thin display panel.

[0069] In the embodiment of the present disclosure, if Figure 1 or Figure 2 As shown, the display substrate is formed with a storage capacitor C, and the display substrate includes a driving layer DR including a switch circuit DR1, and the display substrate includes a light-emitting layer EE including a photosensitive device OPD. In this way, by integrating the photosensitive device OPD and the storage capacitor C in the display substrate at the same time, the film layer structure can be simplified to achieve ultra-thin display panel.

[0070] The switch circuit DR1 is spaced apart from the pixel circuit, and the photosensitive device OPD is spaced apart from the light-emitting device. The display area of ​​the display panel may have one photosensitive device OPD and one switch circuit DR1 corresponding thereto; of course, the display area of ​​the display panel may also have multiple photosensitive devices OPD and multiple switch circuits DR1 corresponding one to one to the multiple photosensitive devices OPD.

[0071] For the case of including multiple photosensitive devices OPD, one photosensitive device OPD can be set in the area corresponding to a group of light-emitting devices (red light-emitting devices, green light-emitting devices, blue light-emitting devices), or multiple photosensitive devices OPD can be set in the area corresponding to a group of light-emitting devices (red light-emitting devices, green light-emitting devices, blue light-emitting devices), as long as it does not affect the light emission of the light-emitting devices, and the embodiments of the present disclosure are not limited to this.

[0072] Among them, Figure 1 or Figure 2 As shown, the light guiding layer BM also includes a second optical channel BM2 corresponding to the photosensitive device OPD, so that the light emitted by the light-emitting device can be detected by the photosensitive device OPD along the second optical channel BM2 after being blocked and reflected by the blocking object, that is, the photosensitive device OPD can detect the reflected light through the second optical channel BM2.

[0073] like Figure 1 ,or Figure 2 ,as well as Figure 3 As shown, the first end of the photosensitive device OPD is respectively connected to the first end of the switch circuit DR1 and the first end of the storage capacitor C, the second end of the photosensitive device OPD and the second end of the storage capacitor C are both used to load a constant voltage signal, the second end of the switch circuit DR1 is used to connect to the signal acquisition circuit, and the control end of the switch circuit DR1 is used to load a control signal.

[0074] Among them, the switch circuit DR1 is used to switch between on and off according to the loaded control signal. The switch circuit DR1 is first controlled to be on based on the first control signal. At this time, the photosensitive device OPD, the storage capacitor C, the switch circuit DR1, and the signal acquisition circuit are in the on state, thereby resetting the photosensitive device OPD and the storage capacitor C; then the switch circuit DR1 is controlled to be off based on the second control signal. At this time, the photosensitive device OPD, the storage capacitor C and the switch circuit DR1 are all in the off state. At this time, the photosensitive device OPD can detect the reflected light after the obstruction reflection, and generate electron-hole pairs to store electricity in the storage capacitor C to realize the function of photoelectric conversion; then the switch circuit DR1 is controlled to be on based on the third control signal. At this time, the photosensitive device OPD, the storage capacitor C, the switch circuit DR1, and the signal acquisition circuit are in the on state, thereby realizing the collection of the electricity stored in the storage capacitor C through the signal acquisition circuit, and performing fingerprint recognition based on the collected electricity.

[0075] In some embodiments, Figure 1 or Figure 2 As shown, the photosensitive device OPD includes a first conductive electrode OPD1, a photoelectric conversion unit OPD2 and a second conductive electrode OPD3 distributed in sequence along a direction away from the substrate BP. The first conductive electrode OPD1 is connected to the first end of the switch circuit DR1, and the second conductive electrode OPD3 is used to load a constant voltage signal.

[0076] Among them, the first conductive electrode OPD1 can be made in the same layer as the first electrode, and the second conductive electrode OPD3 can be made in the same layer as the second electrode. Combined with the structure of the light-emitting layer EE described above, the first electrode layer AN includes the first electrode and the first conductive electrode OPD1, and the second electrode of the light-emitting device and the second conductive electrode OPD3 of the photosensitive device OPD all share the second electrode layer COM. In this way, combined with the second conductive electrode OPD3 of the photosensitive device OPD, the constant voltage signal loaded on the second conductive electrode OPD3 (second end) of the photosensitive device OPD is a VSS voltage signal.

[0077] As for the photoelectric conversion unit OPD2, the photoelectric conversion unit OPD2 can be a PIN photoelectric conversion unit or an OPD organic photoelectric conversion unit. When the photoelectric conversion unit OPD2 is an OPD organic photoelectric conversion unit, since the organic photoelectric conversion material included in the photoelectric conversion unit OPD2 is different from the electroluminescent material included in the light-emitting unit, the photoelectric conversion unit OPD2 and the light-emitting unit can be made separately on the same layer; if the photoelectric conversion unit OPD2 includes one or more of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer and an electron injection layer, the photoelectric conversion unit OPD2 and the light-emitting unit can share one or more of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer and an electron injection layer.

[0078] In some embodiments, Figure 3 As shown, the switch circuit DR1 includes a switch transistor TS, a first electrode of the switch transistor TS is connected to a first end of the photosensitive device OPD, a second electrode of the switch transistor TS is used to connect to a signal acquisition circuit, and a gate of the switch transistor TS is used to load a control signal.

[0079] Combined with the above explanation of the driving layer DR, for example, Figure 1As shown, the driving layer DR includes a first gate metal layer Ga1, a first gate insulating layer GI1, a semiconductor layer ACT, a second gate insulating layer GI2, a second gate metal layer Ga2, an interlayer dielectric layer ILD, a source-drain metal layer SD, and a flat layer PLN, which are stacked in sequence along a direction away from the substrate BP. The semiconductor layer ACT includes an active part of the switching transistor TS, and the active part has a channel region and connecting parts located on both sides of the channel region. The first gate metal layer Ga1 includes a first control signal line, and the second gate metal layer Ga2 includes a second control signal line. Both the first control signal line and the second control signal line have overlapping areas with the channel region of the switching transistor TS in the thickness direction of the substrate BP; the source-drain metal layer SD includes a signal acquisition line, a first connecting line, and a second connecting line. The two ends of the first connecting line are respectively connected to a connecting part of the switching transistor TS and the signal acquisition line, and the two ends of the second connecting line are respectively connected to another connecting part of the switching transistor TS and a first end of the photosensitive device OPD.

[0080] In the embodiment of the present disclosure, the storage capacitor C can be formed in the light-emitting layer EE or in the driving layer DR. Of course, one electrode plate can be formed in the light-emitting layer EE and the other electrode plate can be formed in the driving layer DR. The number of storage capacitors C can be one or more, such as including a first storage capacitor C1, a second storage capacitor C2, etc.

[0081] In some embodiments, Figure 4 or Figure 5 As shown, the light-emitting layer EE includes a first plate Cs1 and a second plate Cs2 distributed in sequence along a direction away from the substrate BP; the orthographic projections of the first plate Cs1 and the second plate Cs2 on the substrate BP have an overlapping area, the first plate Cs1 and the second plate Cs2 constitute a first storage capacitor C1, the first plate Cs1 is connected to the first end of the switch circuit DR1, and the second plate Cs2 is used to load a constant voltage signal.

[0082] In combination with the structure of the photosensitive device OPD described above, for example, the first electrode plate Cs1 can be made in the same layer as the first conductive electrode OPD1 of the photosensitive device OPD, and the second electrode plate Cs2 can be made in the same layer as the second conductive electrode OPD3 of the photosensitive device OPD. In combination with the structure of the light-emitting layer EE described above, the first electrode layer AN includes the first electrode, the first conductive electrode OPD1 and the first electrode plate Cs1, and the second electrode of the light-emitting device, the second conductive electrode OPD3 of the photosensitive device OPD, and the second electrode plate Cs2 of the first storage capacitor C1 all share the second electrode layer COM. In this way, in combination with the second conductive electrode OPD3 of the photosensitive device OPD and the second electrode plate Cs2 of the first storage capacitor C1, the constant voltage signal loaded on the second conductive electrode OPD3 (the second end of the photosensitive device OPD) and the second electrode plate Cs2 (the second end of the first storage capacitor C1) is the VSS voltage signal.

[0083] Among them, the first plate Cs1 of the first storage capacitor C1 can be integrated with the first conductive electrode OPD1 of the photosensitive device OPD, and of course can also be arranged at intervals. As long as the first plate Cs1 of the storage capacitor C and the first conductive electrode OPD1 of the photosensitive device OPD are simultaneously connected to the first end of the switching circuit DR1, the embodiment of the present disclosure does not limit this.

[0084] In other embodiments, Figure 6 or Figure 7 As shown, the driving layer DR includes a first plate Cs1 and a second plate Cs2 distributed in sequence along a direction away from the substrate BP; the orthographic projections of the first plate Cs1 and the second plate Cs2 on the substrate BP have an overlapping area, the first plate Cs1 and the second plate Cs2 constitute a first storage capacitor C1, the first plate Cs1 is connected to the first end of the switch circuit DR1, and the second plate Cs2 is used to load a constant voltage signal.

[0085] The second electrode plate Cs2 of the first storage capacitor C1 is connected to the constant voltage signal line of the source-drain metal layer SD, or is connected to the second electrode layer COM of the light-emitting layer EE.

[0086] In combination with the structure of the driving layer DR described above, for example, the driving layer DR includes a semiconductor layer ACT, a gate metal layer Ga and a source-drain metal layer SD, the first electrode Cs1 is formed on the gate metal layer Ga, and the second electrode Cs2 is formed on the source-drain metal layer SD. Of course, it can also be as follows Figure 6 As shown, the first electrode plate Cs1 is formed on the source-drain metal layer SD, and the second electrode plate Cs2 is formed on the gate metal layer Ga, which is not limited in the embodiment of the present disclosure.

[0087] In the disclosed embodiment, when the switch circuit DR1 is in the off state to store electricity through the storage capacitor C, the larger the capacitance of the storage capacitor C, the larger the amount of electricity that the storage capacitor C can store. The larger the amount of electricity stored, the larger the signal-to-noise ratio, thereby improving the detection accuracy.

[0088] In this way, in order to increase the storage capacity of the storage capacitor C, on the one hand, the structure of the first electrode plate Cs1 and the second electrode plate Cs2 included in the first storage capacitor C1 can be adjusted; on the other hand, the number of storage capacitors C can be adjusted, that is, the display substrate also forms a second storage capacitor C2, a third storage capacitor C3, etc., and multiple storage capacitors C are connected in parallel.

[0089] Next, a detailed explanation is given by taking the case where the first plate Cs1 and the second plate Cs2 of the first storage capacitor C1 are both formed in the light-emitting layer EE as an example. For the case where the first plate Cs1 and the second plate Cs2 of the first storage capacitor C1 are both formed in the driving layer DR, reference can be made to the case where the first plate Cs1 and the second plate Cs2 are both formed in the light-emitting layer EE.

[0090] In some embodiments, Figure 4 As shown, the upper surface of the first electrode plate Cs1 (the surface facing the second electrode plate Cs2) is a curved surface structure. For example, the upper surface of the first electrode plate Cs1 is a wave-like structure, a spherical structure, and an arc-like structure. Of course, in addition to the curved surface structure, the upper surface of the first electrode plate Cs1 can also be other structures, such as a tooth surface structure.

[0091] In this way, by adjusting the structure of the upper surface of the first electrode plate Cs1, the area of ​​the first electrode plate Cs1 is increased. Combined with the capacitance calculation formula, it can be known that the capacitance of the capacitor is proportional to the electrode area of ​​the capacitor. Therefore, when the area of ​​the first electrode plate Cs1 increases, the capacitance of the storage capacitor C increases.

[0092] The adjustment of the overall structure of the first electrode plate Cs1 can be achieved by adjusting the surface of the driving layer DR away from the substrate BP, thereby achieving the adjustment of the surface of the first electrode plate Cs1 facing the second electrode plate Cs2. In combination with the structure of the driving layer DR described above, for example, the surface of the flat layer PLN away from the substrate BP can be set to a wavy structure, so that the first electrode plate Cs1 formed on the flat layer PLN has a wavy structure, and then the surface of the first electrode plate Cs1 facing the second electrode plate Cs2 has a wavy structure.

[0093] In other embodiments, Figure 5 As shown, the surface of the driving layer DR facing away from the substrate BP has a protrusion DR2, and the orthographic projection of the first electrode plate Cs1 on the substrate BP and the orthographic projection of the protrusion DR2 on the substrate BP have an overlapping area.

[0094] In this way, by providing the protrusion DR2 structure on the surface of the driving layer DR, the distance between the first electrode plate Cs1 and the second electrode plate Cs2 is shortened. According to the calculation formula of capacitance, the capacitance of the capacitor is inversely proportional to the distance between the electrodes. Therefore, when the first electrode plate Cs1 and the second electrode plate Cs2 are shortened, the capacitance of the storage capacitor C is increased. In addition, the surface area of ​​the first electrode plate Cs1 can be increased by providing the protrusion DR2. Therefore, in combination with the above, when the area of ​​the first electrode plate Cs1 is increased, the capacitance of the storage capacitor C is increased.

[0095] In combination with the structure of the driving layer DR described above, the protrusion DR2 on the driving layer DR may be a protrusion DR2 formed on the surface of the flat layer PLN substrate BP. The protrusion DR2 on the driving layer DR may be a block protrusion, a plurality of columnar protrusions, or a plurality of strip protrusions extending along the first direction and distributed along the second direction, which is not limited in the embodiment of the present disclosure. The first direction and the second direction may be two intersecting directions, for example, the first direction is a row direction and the second direction is a column direction.

[0096] In some other embodiments, Figure 8 or Fig. 9 As shown, the driving layer DR includes a third plate Cs3, and the orthographic projections of the third plate Cs3 and the first plate Cs1 on the substrate BP have an overlapping area, the third plate Cs3 and the first plate Cs1 constitute a second storage capacitor C2, and the third plate Cs3 is connected to the second plate Cs2. In this way, by increasing the number of storage capacitors C, that is, adding a second storage capacitor C2 connected in parallel with the first storage capacitor C1, the storable capacitance is increased, thereby achieving an increase in the signal-to-noise ratio.

[0097] The third electrode plate Cs3 can be formed on any metal layer included in the driving layer DR. Figure 8 As shown, the driving layer DR includes a semiconductor layer ACT, a gate insulating layer GI, a gate metal layer Ga, an interlayer dielectric layer ILD, and a source-drain metal layer SD, and the third electrode Cs3 can be disposed in any layer of the gate metal layer Ga, the semiconductor layer ACT, and the source-drain metal layer SD. For example, Figure 8 As shown, the third electrode plate Cs3 is provided with a source-drain metal layer SD.

[0098] Furthermore, if Fig.10 or Fig.11 As shown, the driving layer DR includes a fourth plate Cs4, which is located on a side of the third plate Cs3 close to the substrate BP, and the orthographic projections of the fourth plate Cs4 and the third plate Cs3 on the substrate BP overlap, and the fourth plate Cs4 and the third plate Cs3 constitute a third storage capacitor C3, and the third plate Cs3 is connected to the first end of the switch circuit DR1. In this way, by further increasing the number of storage capacitors C, that is, adding a second storage capacitor C2 and a third storage capacitor C3 in parallel with the first storage capacitor C1, the storable capacitance is increased, and the signal-to-noise ratio is increased.

[0099] The fourth electrode plate Cs4 can be formed on any metal layer included in the driving layer DR, and the metal layer where the fourth electrode plate Cs4 is located is located on the side of the metal layer where the third electrode plate Cs3 is located close to the substrate BP, and of course, it can also be located on the side of the metal layer where the third electrode plate Cs3 is located away from the substrate BP. Combined with the structure of the driving layer DR described above, as Fig.10 As shown, the driving layer DR includes a semiconductor layer ACT, a gate insulating layer GI, a gate metal layer Ga, an interlayer dielectric layer ILD, and a source-drain metal layer SD, the third electrode Cs3 is arranged on any one of the gate metal layer Ga, the semiconductor layer ACT, and the source-drain metal layer SD, and the fourth electrode Cs4 is arranged on any one of the remaining two layers of the semiconductor layer ACT, the gate metal layer Ga, and the source-drain metal layer SD. For example, Fig.10 As shown, the third electrode plate Cs3 is provided on the source-drain metal layer SD, and the fourth electrode plate Cs4 is provided on the gate metal layer Ga.

[0100] The present disclosure provides a method for manufacturing a display panel, which is used to manufacture the display panel described in the above embodiment. The method includes the following steps S1210-S1220.

[0101] Step S1210: providing a substrate.

[0102] Step S1220, a display substrate is manufactured on one side of the substrate, wherein the display substrate is formed with a storage capacitor, the display substrate includes a driving layer and a light-emitting layer, the driving layer is located between the substrate and the light-emitting layer, the driving layer includes a switching circuit and multiple pixel circuits, and the light-emitting layer includes a photosensitive device and multiple light-emitting devices.

[0103] Multiple pixel circuits correspond one-to-one to multiple light-emitting devices, and a pixel circuit is connected to the corresponding light-emitting device, the first end of the switching circuit is connected to the first end of the photosensitive device, the second end of the switching circuit is used to connect to the signal acquisition circuit, the second end of the photosensitive device and the first end of the storage capacitor are used to load a constant voltage signal, and the second end of the storage capacitor is connected to the first end of the switching circuit.

[0104] In the embodiments of the present disclosure, by integrating the photosensitive device and the storage capacitor into the display substrate at the same time, the film layer structure can be simplified and the display panel can be made ultra-thin.

[0105] The specific implementation process of manufacturing the display substrate in the above step S1220 can refer to the specific structure of the display substrate described in the above embodiment and the manufacturing process in the related technology, and the real-time method of the present disclosure does not limit this.

[0106] It should be noted that, although the steps of the method for manufacturing a display panel in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc.

[0107] The embodiment of the present disclosure provides a display device, including the display panel described in the above embodiment. In combination with the display panel described in the above embodiment, the display panel can be made ultra-thin while ensuring the fingerprint recognition function, thereby achieving an ultra-thin display device.

[0108] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A display panel, characterized in that: include: substrate; A display substrate, located on one side of the substrate and formed with a storage capacitor; The display substrate comprises a driving layer and a light-emitting layer, wherein the driving layer is located between the substrate and the light-emitting layer, the driving layer comprises pixel circuits and switch circuits distributed at intervals, and the light-emitting layer comprises light-emitting devices and photosensitive devices distributed at intervals; The pixel circuit is connected to the light-emitting device, the first end of the photosensitive device is respectively connected to the first end of the switch circuit and the first end of the storage capacitor, the second end of the photosensitive device and the second end of the storage capacitor are both used to load a constant voltage signal, the second end of the switch circuit is used to connect to the signal acquisition circuit, and the control end of the switch circuit is used to load a control signal; The light-emitting device includes a first electrode, a light-emitting unit, and a second electrode stacked in sequence along a direction away from the substrate; the photosensitive device includes a first conductive electrode, a photoelectric conversion unit, and a second conductive electrode distributed in sequence along a direction away from the substrate; the first electrode is made in the same layer as the first conductive electrode, the second electrode is made in the same layer as the second conductive electrode, and they are a whole-layer structure; the first conductive electrode is connected to the first end of the switching circuit, and the second conductive electrode is used to load the constant voltage signal.

2. The display panel according to claim 1, wherein: The light-emitting layer includes a first electrode plate and a second electrode plate sequentially distributed in a direction away from the substrate; The orthographic projections of the first electrode plate and the second electrode plate on the substrate have an overlapping area, the first electrode plate and the second electrode plate constitute a first storage capacitor, the first electrode plate is connected to the first end of the switch circuit, and the second electrode plate is used to load the constant voltage signal.

3. The display panel according to claim 2, wherein: The upper surface of the first electrode plate is a curved structure.

4. The display panel according to claim 2, wherein: The driving layer has a protrusion on a surface facing away from the substrate, and an orthographic projection of the first electrode plate on the substrate and an orthographic projection of the protrusion on the substrate have an overlapping area.

5. The display panel according to any one of claims 2 to 4, characterized in that: The driving layer includes a third electrode plate; The orthographic projections of the third electrode plate and the first electrode plate on the substrate have an overlapping area, the third electrode plate and the first electrode plate constitute a second storage capacitor, and the third electrode plate is connected to the second electrode plate.

6. The display panel according to claim 5, wherein: The driving layer includes a fourth electrode plate; The fourth electrode plate is located on a side of the third electrode plate close to the substrate, and the orthographic projections of the fourth electrode plate and the third electrode plate on the substrate have an overlapping area. The fourth electrode plate and the third electrode plate constitute a third storage capacitor, and the third electrode plate is connected to the first end of the switch circuit.

7. The display panel according to claim 1, wherein: The driving layer includes a first electrode plate and a second electrode plate sequentially distributed in a direction away from the substrate; The orthographic projections of the first electrode plate and the second electrode plate on the substrate have an overlapping area, the first electrode plate and the second electrode plate constitute a first storage capacitor, the first electrode plate is connected to the first end of the switch circuit, and the second electrode plate is used to load the constant voltage signal.

8. The display panel according to any one of claims 1 to 4, 6 to 7, characterized in that: The switching circuit includes a switching transistor, a first electrode of the switching transistor is connected to the first end of the photosensitive device, a second electrode of the switching transistor is used to connect to a signal acquisition circuit, and a gate of the switching transistor is used to load a control signal.

9. A display device, characterized in that: The display panel comprises any one of claims 1 to 8.

Citation Information

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