Power semiconductor device with a backside integrated temperature sensor and method for manufacturing the same

Abstract

The present invention relates to a power semiconductor device with a back-integrated temperature sensor and a manufacturing method thereof. According to the technical solution provided by the present invention, the power semiconductor device with a back-integrated temperature sensor includes a power semiconductor device body, the power semiconductor device body includes a substrate, a front structure prepared on the front surface of the substrate, and a back structure prepared on the back surface of the substrate. The front structure includes an active region, the back structure includes a back electrode, and a temperature sensor for monitoring the operating temperature of the power semiconductor device body is also prepared on the back surface of the substrate. Among them, the temperature sensor corresponds exactly to the active region in the front structure, and the temperature sensor is independent of the back electrode. The present invention can effectively obtain the temperature during the operation of the power device and improve the accuracy and reliability of temperature monitoring.

Description

Technical Field

[0001] The present invention relates to a power semiconductor device and a manufacturing method thereof, in particular to a power semiconductor device with a back-integrated temperature sensor and a manufacturing method thereof. Background Art

[0002] Power semiconductor devices generally include devices such as IGBT (Insulated Gate Bipolar Transistor) devices and MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) devices. Among them, an IGBT device is a voltage-driven power semiconductor device composed of a BJT (bipolar transistor) and a MOSFET, combining the advantages of fast switching speed of a power MOSFET device and low on-state voltage of a bipolar structure. Taking the IGBT device as an example, the specific situation in power devices will be specifically described below.

[0003] For an IGBT device, it includes a front structure and a back structure. The front structure generally includes an active region and a termination region, and two electrodes, namely the gate (G pole) and the emitter (E pole), are obtained through the front structure; the collector (C pole) is generally prepared through the back structure. As a core component in the field of power electronics, IGBT devices have been widely used in fields such as electric vehicles, rail transit, and new energy in recent years. However, the reliability requirements for IGBT devices are extremely high, and it is necessary to monitor the temperature of IGBT devices in real time to avoid the failure of IGBT devices due to overheating.

[0004] Currently, there are generally two ways to monitor the temperature of IGBT devices in real time: The first is to package the IGBT device with a negative temperature coefficient thermistor (NTC). The distance between the IGBT device and the NTC is relatively close, and the temperature of the IGBT device can be conducted to the NTC through the packaged frame or DBC board, and the temperature of the IGBT device is obtained by detecting the resistance value of the NTC; the second is to integrate a temperature sensor on the front of the IGBT device. For the methods of monitoring the temperature of IGBT devices, since the first method monitors the temperature through heat conduction, and there is still a certain distance between the NTC and the IGBT device, and the heat conduction efficiency of the packaged frame or DBC (copper-clad ceramic board) board is not 100%, therefore, the reaction speed and accuracy of temperature monitoring are not as good as the second method.

[0005] When in single - tube packaging and module packaging, there are generally three ways of electrical connection between the gate, emitter on the front of the IGBT device and the packaging pins or packaging terminals: namely wire bonding (wire bonding), soldering, and crimping. Among them, wire bonding is more commonly used. The collector on the back of the IGBT device is generally electrically connected to the packaging frame or DBC by soldering. In the most common packaging method of front - side wire bonding and back - side soldering for IGBT devices, what generally contacts the front of the IGBT device is plastic encapsulant or silicone gel, and its thermal conductivity is much lower than that of the packaging frame or DBC (Direct Bonding Copper) connected to the back of the chip by soldering. Therefore, when the IGBT works, the heat conduction is mainly from the back of the chip to the packaging frame or DBC, and then to the external radiator; and this way of monitoring the working temperature of the IGBT device by thermal conduction also has problems of reaction speed and accuracy.

[0006] In summary, how to further effectively monitor the working temperature of power devices is a technical problem that urgently needs to be solved. Summary of the Invention

[0007] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a power semiconductor device with a back - integrated temperature sensor and a preparation method thereof, which can effectively obtain the temperature when the power device works and improve the accuracy and reliability of temperature monitoring.

[0008] According to the technical solution provided by the present invention, the power semiconductor device with a back - integrated temperature sensor includes a power semiconductor device body. The power semiconductor device body includes a substrate, a front - side structure prepared on the front of the substrate, and a back - side structure prepared on the back of the substrate. The front - side structure includes an active region, and the back - side structure includes a back - side electrode.

[0009] A temperature sensor for monitoring the working temperature of the power semiconductor device body is also prepared on the back of the substrate. Among them, the temperature sensor corresponds exactly to the active region in the front - side structure, and the temperature sensor is independent of the back - side electrode.

[0010] The temperature sensor includes a back - side temperature - sensing trench arranged on the back of the substrate, a back - side trench insulating oxide layer covering the inner wall of the back - side temperature - sensing trench, and a temperature - sensing unit prepared in the back - side temperature - sensing trench. The temperature - sensing unit is insulated and isolated from the substrate through the back - side trench insulating oxide layer.

[0011] The temperature - sensing unit includes a first temperature - sensing conductive polysilicon block, a second temperature - sensing conductive polysilicon block, and a temperature - sensing electrode unit for leading out the first temperature - sensing conductive polysilicon block and the second temperature - sensing conductive polysilicon block. Among them,

[0012] The first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing are distributed at the bottom of the back temperature sensing trench, and the conductivity type of the first conductive polysilicon block for temperature sensing is different from that of the second conductive polysilicon block for temperature sensing. The adjacent ends of the first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing are in contact.

[0013] A back doping region is provided on the back surface of the substrate. The conductivity type of the back doping region is the same as that of the substrate, and the doping concentration of the back doping region is greater than that of the substrate.

[0014] The back doping region extends in the substrate along the back surface towards the front surface of the substrate. The back temperature sensing trench is provided in the back doping region, and the depth of the back temperature sensing trench is less than the depth of the back doping region in the substrate.

[0015] A back isolation oxide layer is further provided in the back temperature sensing trench. The back isolation oxide layer covers the first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing, and the temperature sensing electrode unit is adaptively connected to the back isolation oxide layer.

[0016] The temperature sensing electrode unit includes a first temperature sensing electrode for leading out the first conductive polysilicon block for temperature sensing and a second temperature sensing electrode for leading out the second conductive polysilicon block for temperature sensing. Among them, the first temperature sensing electrode is in ohmic contact with the first conductive polysilicon block for temperature sensing, and the second temperature sensing electrode is in ohmic contact with the second conductive polysilicon block for temperature sensing.

[0017] The temperature sensing electrode unit is buried in the back temperature sensing trench through the back isolation oxide layer, or the first temperature sensing electrode and the second temperature sensing electrode are distributed on the surface of the back isolation oxide layer corresponding to the back surface of the substrate, and the first temperature sensing electrode and the second temperature sensing electrode are located outside the back surface of the substrate.

[0018] The back electrode includes a back metal layer that covers the back surface of the substrate.

[0019] The back electrode includes a back metal layer that covers the back surface of the substrate.

[0020] A temperature sensing electrode unit layout adapted to the back metal layer and the temperature sensing electrode unit is configured on the back surface of the substrate. The temperature sensing electrode unit layout includes a first temperature sensing electrode layout and a second temperature sensing electrode layout. The first temperature sensing electrode layout includes a first electrode lead and a first electrode lead pad, and the second temperature sensing electrode layout includes a second electrode lead and a second electrode lead pad. Among them,

[0021] One end of the first electrode lead is electrically connected to the first temperature-sensing electrode, and a first electrode lead pad is provided at the other end of the first electrode lead. One end of the second electrode lead is electrically connected to the second temperature-sensing electrode, and a second electrode lead pad is provided at the other end of the second electrode lead;

[0022] The first electrode lead and the second electrode lead are parallel to each other. The first electrode lead pad and the second electrode lead pad are located on the same side of the back temperature-sensing trench, or the first electrode lead pad and the second electrode lead pad are respectively located on both sides of the back temperature-sensing trench.

[0023] The cells in the active region are planar or trench type; the back structure is used to make the power semiconductor device body an IGBT type device or a MOSFET type device.

[0024] A method for manufacturing a back-integrated temperature sensor power semiconductor device for manufacturing a power semiconductor device, the manufacturing method comprising:

[0025] Providing a substrate and preparing a required front structure on the front of the substrate, wherein the prepared front structure at least includes an active region;

[0026] After preparing the front structure on the front of the substrate, a back structure and a temperature sensor are prepared on the back of the substrate. The back electrode structure includes a back electrode. The temperature sensor corresponds to the active region in the front structure on the back of the substrate, and the temperature sensor and the back electrode are independent of each other.

[0027] When preparing the temperature sensor, the following steps are included:

[0028] Step 1: Prepare a required back temperature-sensing trench on the back of the substrate, and provide a back trench insulating oxide layer on the inner wall of the back temperature-sensing trench, wherein the back trench insulating oxide layer covers the inner wall of the back temperature-sensing trench;

[0029] Step 2: Prepare a temperature-sensing unit in the above-mentioned back temperature-sensing trench, wherein the temperature-sensing unit includes a first conductive polysilicon block for temperature sensing and a second conductive polysilicon block for temperature sensing;

[0030] The first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing are distributed at the bottom of the back temperature-sensing trench. The conductive type of the first conductive polysilicon block for temperature sensing is different from that of the second conductive polysilicon block for temperature sensing, and the corresponding adjacent ends of the first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing are in contact;

[0031] Step 3: Prepare a temperature-sensing electrode unit for leading out the first conductive polysilicon block for temperature sensing and the second conductive polysilicon block for temperature sensing.

[0032] Before preparing the back temperature sensing trench, a back doping region is provided on the back surface of the substrate. The conductivity type of the back doping region is the same as that of the substrate, and the doping concentration of the back doping region is greater than that of the substrate.

[0033] The back doping region extends along the back surface of the substrate in the direction pointing to the front surface of the substrate. The back temperature sensing trench is provided in the back doping region, and the depth of the back temperature sensing trench is less than the depth of the back doping region in the substrate.

[0034] It further includes a back isolation oxide layer provided in the back temperature sensing trench. The back isolation oxide layer covers the temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block, and the temperature sensing electrode unit is adaptively connected to the back isolation oxide layer.

[0035] The temperature sensing electrode unit includes a temperature sensing first electrode for leading out the temperature sensing first conductive polysilicon block and a temperature sensing second electrode for leading out the temperature sensing second conductive polysilicon block. Among them, the temperature sensing first electrode is in ohmic contact with the temperature sensing first conductive polysilicon block, and the temperature sensing second electrode is in ohmic contact with the temperature sensing second conductive polysilicon block.

[0036] The temperature sensing electrode unit is buried in the back temperature sensing trench through the back isolation oxide layer, or the temperature sensing first electrode and the temperature sensing second electrode are distributed on the surface of the back isolation oxide layer corresponding to the back surface of the substrate, and the temperature sensing first electrode and the temperature sensing second electrode are located outside the back surface of the substrate.

[0037] Advantages of the present invention: A temperature sensor is provided on the back surface of the substrate. The temperature sensor corresponds exactly to the active region in the front structure, and the temperature sensor is independent of the back electrode. Thus, when forming a power device single transistor or module, the temperature sensor on the back surface of the substrate can be directly welded to the DBC board or the packaging frame. By using the direct connection between the temperature sensor and the DBC board or the packaging frame, the temperature during the operation of the power device can be effectively obtained, and the accuracy and reliability of temperature monitoring are improved. Description of the Drawings

[0038] Figures 1 to 7 It is a cross-sectional view of the specific process steps of an embodiment for preparing the temperature sensing electrode unit of the present invention, where

[0039] Figure 1 It is a cross-sectional view after preparing the active region on the front surface of the substrate of the present invention.

[0040] Figure 2 It is a cross-sectional view of preparing the back temperature sensing trench on the back surface of the substrate of the present invention.

[0041] Figure 3Cross-sectional view after preparing the temperature sensing substrate according to the present invention.

[0042] Figure 4 Cross-sectional view after preparing the first conductive polysilicon block and the second conductive polysilicon block for temperature sensing according to the present invention.

[0043] Figure 5 Cross-sectional view after preparing the first insulating isolation oxide layer according to the present invention.

[0044] Figure 6 Cross-sectional view after preparing the back metal base layer according to the present invention.

[0045] Figure 7 Cross-sectional view after preparing the collector metal layer, the first temperature sensing metal body, and the second temperature sensing metal body according to the present invention.

[0046] Figures 8 to 11 Cross-sectional view of the specific process steps of another embodiment for preparing the temperature sensing electrode unit according to the present invention, wherein,

[0047] Figure 8 Cross-sectional view after preparing the second insulating isolation oxide layer according to the present invention.

[0048] Figure 9 Cross-sectional view after preparing the back metal base layer according to the present invention.

[0049] Figure 10 Cross-sectional view after preparing the collector metal layer, the third temperature sensing metal body, and the fourth temperature sensing metal body according to the present invention.

[0050] Figure 11 Cross-sectional view after preparing the third insulating isolation oxide layer according to the present invention.

[0051] Figure 12 For Figure 7 Schematic diagram of a back layout corresponding to the embodiment.

[0052] Figure 13 For Figure 7 Schematic diagram of another back layout corresponding to the embodiment.

[0053] Figure 14 For Figure 12 Schematic diagram of the welding cooperation between the back layout in and the DBC board.

[0054] Figure 15 For Figure 13 Schematic diagram of the welding cooperation between the back layout in and the DBC board.

[0055] Figure 16 For Figure 11 Schematic diagram of a back layout corresponding to the embodiment.

[0056] Figure 17 For Figure 11 The embodiment corresponds to another schematic diagram of the back layout.

[0057] Figure 18 For Figure 16 The schematic diagram of the welding fit between the back layout and the DBC board in [it].

[0058] Figure 19 For Figure 17 The schematic diagram of the welding fit between the back layout and the DBC board in [it].

[0059] Explanation of reference numerals: 1. Substrate; 2. Back doping region; 3. Back temperature sensing trench; 4. Back trench insulating oxide layer; 5. First conductive polysilicon block for temperature sensing; 5a. Conductive polysilicon matrix for temperature sensing; 6. Second conductive polysilicon block for temperature sensing; 7. P+ collector region; 8. First insulating isolation oxide layer; 8a. Second insulating isolation oxide layer; 9. Hole in the first insulating isolation oxide layer; 9a. Hole in the second insulating isolation oxide layer; 10. Back metal base layer; 10a. Second back metal layer; 11. First metal body for temperature sensing; 11a. Third metal body for temperature sensing; 11-1. First electrode lead; 11-2. First electrode lead pad; 11-2r. First DBC welding region of the electrode; 12. Second metal body for temperature sensing; 12a. Fourth metal body for temperature sensing; 12-1. Second electrode lead; 12-2. Second electrode lead pad; 12-2r. Second DBC welding region of the electrode; 13. First metal layer of the collector; 13a. Second metal layer of the collector; 13-1r. DBC welding region of the collector; 14. Third insulating isolation oxide layer; 21. P-type base region; 22. Gate conductive polysilicon; 23. Cell trench insulating oxide layer; 24. N+ emitter region; 25. Insulating dielectric layer and 26. Emitter metal. Detailed implementation manners

[0060] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0061] In order to effectively obtain the temperature of the power device during operation and improve the accuracy and reliability of temperature monitoring, the power semiconductor device of the present invention specifically includes: a power semiconductor device body, the power semiconductor device body includes a substrate 1, a front structure prepared on the front of the substrate 1, and a back structure prepared on the back of the substrate 1, the front structure includes an active region, and the back structure includes a back electrode.

[0062] A temperature sensor for monitoring the operating temperature of the power semiconductor device body is also prepared on the back of the substrate 1. Among them, the temperature sensor corresponds exactly to the active region in the front structure, and the temperature sensor is independent of the back electrode.

[0063] Specifically, the power semiconductor device body can be in the form of existing commonly used power semiconductor devices, and the specific situation of the power semiconductor device body can be selected according to needs to meet the actual application requirements. Generally, for the power semiconductor device body, it at least includes a substrate 1, and the substrate 1 can be of existing commonly used types, such as a silicon substrate, a silicon carbide substrate, etc. The type of the substrate 1 can also be determined according to the actual application requirements. To form the power semiconductor device body, generally, a front structure is prepared on the front surface of the substrate 1, and at the same time, a back structure is prepared on the back surface of the substrate 1. The front surface of the substrate 1 corresponds exactly to the back surface of the substrate, and the situations of the front surface and the back surface of the substrate 1 correspond to each other to meet the requirements for preparing the required front structure and back structure.

[0064] During specific implementation, the front structure at least includes an active region located in the central area of the front surface of the substrate 1. Of course, the front structure generally also includes a terminal structure. The specific functions of the active region and the cooperation between the active region and the terminal structure are the same as those of the existing front structure. Generally, the active region includes a number of cells distributed in parallel. The cells in the active region are planar or trench type. During specific implementation, the planar or trench type cells can be selected according to the actual application requirements. Those skilled in the art know that for IGBT type devices or MOSFET devices, the same front structure can be adopted, that is, the back structures of IGBT type devices and MOSFET devices are different. Therefore, the back structure is used to make the power semiconductor device body an IGBT type device or a MOSFET type device; the specific principles and methods of using the back structure to form an IGBT type device or a MOSFET type device are the same as those of the existing ones. The specific situations of the cells in the active region and the back structure will be illustrated by examples below.

[0065] As can be seen from the description of the background technology, in order to effectively monitor the temperature of the power semiconductor device body during operation, a temperature sensor is currently provided on the front surface of the substrate 1; however, when the power semiconductor device body is formed into a single transistor or module package, generally, the back surface of the substrate 1 is welded and connected corresponding to the DBC board or the package frame, and the front surface of the substrate 1 generally corresponds to the plastic encapsulant or the silicone gel. This packaging correspondence relationship causes the existing temperature sensor set on the front surface of the substrate 1 to be unable to effectively monitor or collect the temperature of the power semiconductor device body during operation.

[0066] In an embodiment of the present invention, a temperature sensor is fabricated on the back surface of a substrate 1, and the temperature sensor needs to be exactly corresponding to the active region on the front surface of the substrate 1. The exact correspondence specifically means that the temperature sensor is on the back surface of the substrate 1 and located in the central region of the back surface. When projected along the direction from the back surface of the substrate 1 to the front surface of the substrate 1, the projection area of the temperature sensor on the front surface of the substrate 1 is located within the active region. The back structure at least includes a back electrode. The temperature sensor and the back electrode are independent of each other. The independence means that the temperature sensor and the back electrode do not contact each other, and the operations between the temperature sensor and the back electrode are independent of each other and do not affect each other, so that both the working state of the power semiconductor device body can be satisfied and the temperature monitoring or acquisition of the power semiconductor device body can be satisfied.

[0067] After the temperature sensor is disposed on the back surface of the substrate, when welding and connecting with a DBC board or a packaging frame, the temperature sensor can be directly welded and connected to the DBC board or the packaging frame. According to the temperature measurement principle of the power semiconductor device body, at this time, the monitoring or acquisition of the working temperature of the power semiconductor device body can be effectively improved, and the accuracy of temperature monitoring or acquisition can be improved. Since the temperature sensor and the back electrode are independent of each other, the packaging connection between DBC boards is not affected, that is, it is compatible with the existing packaging connection.

[0068] Further, the temperature sensor includes a back temperature sensing trench 3 disposed on the back surface of the substrate 1, a back trench insulating oxide layer 4 covering the inner wall of the back temperature sensing trench 3, and a temperature sensing unit fabricated in the back temperature sensing trench 3. The temperature sensing unit is insulated and isolated from the substrate 1 through the back trench insulating oxide layer 4;

[0069] The temperature sensing unit includes a temperature sensing first conductive polysilicon block 5, a temperature sensing second conductive polysilicon block 6, and a temperature sensing electrode unit for leading out the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6. Among them,

[0070] The temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are distributed on the bottom of the back temperature sensing trench 3, and the conductivity type of the temperature sensing first conductive polysilicon block 5 is different from that of the temperature sensing second conductive polysilicon block 6. The corresponding adjacent ends of the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are in contact.

[0071] In an embodiment of the present invention, the temperature sensor is fabricated on the back surface of the substrate 1 by semiconductor processes. Figure 7 and Figure 11As shown, the temperature sensor includes a back temperature sensing trench 3. Inside the substrate 1, the back temperature sensing trench 3 extends from the back surface of the substrate 1 towards the front surface direction of the substrate 1. The notch of the back temperature sensing trench 3 corresponds to the back surface of the substrate 1, and the depth of the temperature sensor 3 inside the substrate 1 is less than the thickness of the substrate 1.

[0072] A back trench insulating oxide layer 4 is provided in the back temperature sensing trench 3. The back trench insulating oxide layer 4 can be a silicon dioxide layer, and the back trench insulating oxide layer 4 can be prepared in the back temperature sensing trench 3 through forms such as thermal oxidation. The back trench insulating oxide layer 4 covers the inner wall of the back temperature sensing trench 3. The inner wall of the back temperature sensing trench 3 specifically includes the side wall and the bottom wall of the back temperature sensing trench 3. A temperature sensing unit is provided in the back temperature sensing trench 3. Herein, the temperature sensing unit is for realizing the monitoring or acquisition of the temperature of the power semiconductor device body. Here, monitoring, acquiring, or detecting the temperature of the power semiconductor device body all mean being able to obtain the temperature of the power semiconductor device body. The above or the following corresponding expressions all represent the same meaning.

[0073] Specifically, the temperature sensor unit includes a temperature sensing first conductive polysilicon block 5 and a temperature sensing second conductive polysilicon block 6, that is, both the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are made of polysilicon. The temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are both located at the bottom of the back temperature sensing trench 3, and the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 cover the bottom of the back temperature sensing trench 3.

[0074] The conduction type of the temperature sensing first conductive polysilicon block 5 is different from that of the temperature sensing second conductive polysilicon block 6. That is, the conduction type of the temperature sensing first conductive polysilicon block 5 is N-type or P-type, and the conduction type of the temperature sensing second conductive polysilicon block 6 is P-type or N-type. The corresponding adjacent ends of the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are in contact, so that a PN junction can be formed by using the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6. That is, the temperature of the power semiconductor device body can be detected by using the PN junction method. The principle and method of detecting the temperature of the power semiconductor device body by using the PN junction method are the same as those in the prior art.

[0075] In order to output the detected temperature, the temperature sensor includes a temperature sensing electrode unit. Through the temperature sensing electrode unit, the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 can be respectively led out, so that the detected temperature can be output. During specific implementation, the temperature sensor and the back electrode are independent of each other, specifically referring to that the temperature sensing electrode unit and the temperature sensing unit are not in contact with the back electrode and are mutually isolated.

[0076] Furthermore, a back doping region 2 is provided on the back surface of the substrate. The conduction type of the back doping region 2 is the same as that of the substrate 1, and the doping concentration of the back doping region 2 is greater than that of the substrate 1.

[0077] The back doping region 2 extends along the back surface of the substrate 1 in the direction pointing to the front surface of the substrate 1. A back temperature sensing trench 3 is provided in the back doping region 2, and the depth of the back temperature sensing trench 3 is less than the depth of the back doping region 2 in the substrate 1.

[0078] In the embodiment of the present invention, the back doping region 2 can be prepared by ion implantation or the like on the back surface of the substrate 1. The back doping region 2 is generally larger than the back temperature sensing trench 3, that is, the back temperature sensing trench 3 is provided in the back doping region 2. Of course, in specific implementation, the back doping region 2 can traverse the back surface of the substrate 1. At this time, the field stop layer required for the IGBT device can be formed by using the back doping region 2. The conduction type of the back doping region 2 is the same as that of the substrate 1. For example, when the substrate 1 is of N conduction type, the conduction type of the back doping region 2 is also N type. Generally, the back doping region 2 vertically extends from the back surface of the substrate 1 in the direction pointing to the front surface of the substrate 1, and the depth of the back temperature sensing trench 3 is less than the depth of the back doping region 2 in the substrate 1, that is, the bottom of the back temperature sensing trench 3 is located in the back doping region 2.

[0079] Furthermore, a back isolation oxide layer is provided in the back temperature sensing trench 3. The back isolation oxide layer covers the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6, and the temperature sensing electrode unit is adaptively connected to the back isolation oxide layer.

[0080] The temperature sensing electrode unit includes a temperature sensing first electrode for leading out the temperature sensing first conductive polysilicon block 5 and a temperature sensing second electrode for leading out the temperature sensing second conductive polysilicon block 6. Among them, the temperature sensing first electrode is in ohmic contact with the temperature sensing first conductive polysilicon block 5, and the temperature sensing second electrode is in ohmic contact with the temperature sensing second conductive polysilicon block 6.

[0081] The temperature sensing electrode unit is buried in the back temperature sensing trench 3 through the back isolation oxide layer, or the temperature sensing first electrode and the temperature sensing second electrode are distributed on the surface of the back isolation oxide layer corresponding to the back surface of the substrate 1, and the temperature sensing first electrode and the temperature sensing second electrode are located outside the back surface of the substrate.

[0082] In order to separately lead out the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6, the temperature-sensing electrode unit includes a first temperature-sensing electrode and a second temperature-sensing electrode. Among them, the first temperature-sensing electrode is in ohmic contact with the first temperature-sensing conductive polysilicon block 5, and the second temperature-sensing electrode is in ohmic contact with the second temperature-sensing conductive polysilicon block 6.

[0083] In order to effectively lead out the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6 separately, a back isolation oxide layer is provided in the back temperature-sensing trench 3, and the temperature-sensing electrode unit is buried in the back temperature-sensing trench 3 through the back isolation oxide layer. Alternatively, the first temperature-sensing electrode and the second temperature-sensing electrode are distributed on the surface corresponding to the back of the back isolation oxide layer and the substrate 1, and the first temperature-sensing electrode and the second temperature-sensing electrode are located outside the back of the substrate.

[0084] The corresponding cooperation relationship between the first temperature-sensing electrode, the second temperature-sensing electrode and the back isolation oxide layer will be specifically described below.

[0085] As Figure 7 shown, it is a schematic diagram of a specific implementation case. Specifically, an insulating isolation first oxide layer 8 is provided in the back temperature-sensing trench 3. Among them, the insulating isolation first oxide layer 8 covers the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6. The insulating isolation first oxide layer 8 cooperates with the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6 to fill the back temperature-sensing trench 3. At this time, the above-mentioned back isolation oxide layer is formed by using the insulating isolation first oxide layer 8.

[0086] In order to cooperate with the insulating isolation first oxide layer 8, the first temperature-sensing metal body 11 is used to form the first temperature-sensing electrode, and at the same time, the second temperature-sensing metal body 12 is used to form the second temperature-sensing electrode. The first temperature-sensing metal body 11 passes through the insulating isolation first oxide layer 8 and is in ohmic contact with the first temperature-sensing conductive polysilicon block 5, and the second temperature-sensing metal body 12 passes through the insulating isolation first oxide layer 8 and is in ohmic contact with the second temperature-sensing conductive polysilicon block 6.

[0087] The first temperature-sensing metal body 11 and the second temperature-sensing metal body 12 also include parts covering the insulating isolation first oxide layer 8, specifically covering the surface corresponding to the back of the insulating isolation first oxide layer 8 and the substrate 1, and the first temperature-sensing metal body 11 and the second temperature-sensing metal body 12 covering the surface of the insulating isolation first oxide layer 8 are located outside the back of the substrate 1.

[0088] In specific implementation, when the first temperature-sensing metal body 11 and the second temperature-sensing metal body 12 are located outside the back surface of the substrate 1, the temperature-sensing metal body 11 and the second temperature-sensing metal body 12 are on the same surface as the back metal layer of the back electrode. At this time, since the temperature-sensing metal body 11 and the second temperature-sensing metal body 12 are on the same surface as the back metal layer of the back electrode, when welding to the DBC board or the packaging frame, it is necessary to ensure the welding precision and space. In this case, the heat dissipation capacity of the power semiconductor device body is limited.

[0089] As Figure 11 shown, it is a schematic diagram of another specific implementation case, that is, the temperature-sensing electrode unit is buried in the back temperature-sensing groove 3 through the back isolation oxide layer. Specifically, after preparing the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6 in the back temperature-sensing groove 3, an insulating isolation second oxide layer 8a is arranged in the back temperature-sensing groove 3. The insulating isolation second oxide layer 8a covers the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6. At this time, the height of the insulating isolation second oxide layer 8a on the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6 is less than the depth of the back temperature-sensing groove 3.

[0090] The first temperature-sensing electrode is formed through the third temperature-sensing metal body 11a, and the second temperature-sensing electrode is formed through the fourth temperature-sensing metal body 12a. The third temperature-sensing metal body 11a is in ohmic contact with the first temperature-sensing conductive polysilicon block 5, and the fourth temperature-sensing metal body 12a is in ohmic contact with the second temperature-sensing conductive polysilicon block 6. After forming the ohmic contact, an insulating isolation third oxide layer 14 is arranged in the back temperature-sensing groove 3, and the back temperature-sensing groove 3 is filled with the insulating isolation third oxide layer 14. The insulating isolation third oxide layer 14 covers the third temperature-sensing metal body 11a and the fourth temperature-sensing metal body 12a, that is, the first temperature-sensing electrode and the second temperature-sensing electrode are buried in the back temperature-sensing groove 3 by using the insulating isolation second oxide layer 8a and the insulating isolation third oxide layer 14. At this time, the back isolation oxide layer is formed by the insulating isolation second oxide layer 8a and the insulating isolation third oxide layer 14.

[0091] Since the first temperature-sensing electrode and the second temperature-sensing electrode are buried in the back temperature-sensing groove 3, when welding to the DBC board or the packaging frame, the area of contact between the first temperature-sensing electrode, the second temperature-sensing electrode and the DBC board or the packaging frame can be reduced, the convenience of welding the power semiconductor device body to the DBC board or the packaging frame can be improved, and better heat dissipation for the power semiconductor device body can be formed.

[0092] In specific implementation, the back electrode includes a back metal layer covering the back of the substrate. The matching relationship between the back metal layer and the substrate 1 is related to the type of the power semiconductor device body. For example, when the power semiconductor device is an IGBT type device, the back metal layer can be used to form a collector. When the power semiconductor device is a MOSFET device, the back metal layer is used to form a drain electrode.

[0093] As Figure 7 shown, taking the power semiconductor device as an IGBT device as an example, the specific situation of the back structure is illustrated. It can be seen from the above description that a back doping region 2 of the same conduction type is provided on the back of the substrate 1. After the back doping region 2 is formed, a P+ collector region 7 is provided on the back of the substrate 1. The P+ collector region 7 vertically extends along the back of the substrate 1 in the direction pointing to the front of the substrate 1. The depth of the P+ collector region 7 is less than the thickness of the back doping region 2. When the power semiconductor device is an IGBT device, a first collector metal layer 13 is provided on the back of the substrate 1, that is, the back metal layer is the first collector metal layer 13. The first collector metal layer 13 is in ohmic contact with the P+ collector region 7, that is, the first collector metal layer 13 is used to form the collector of the IGBT type device. In specific implementation, the first collector metal layer 13, the first temperature sensing metal body 11, and the second temperature sensing metal body 12 are in the same process step layer, that is, they are prepared through the same process step.

[0094] As Figure 11 shown, for another implementation situation, compared with the implementation situation in Figure 7 , the difference is that the back metal layer is a second collector metal layer 13a. The second collector metal layer 13a is in ohmic contact with the P+ collector region 7. In specific implementation, the second collector metal layer 13a, the third temperature sensing metal body 11a, and the fourth temperature sensing metal body 12a are in the same process step layer, that is, they are prepared through the same process step.

[0095] As Figures 1 to 11 shown, a schematic diagram of a single cell in the active region is also shown. Among them, the cell is of a trench type. Specifically, the cell includes a cell trench. The cell trench vertically extends from the front of the substrate 1 in the direction pointing to the back of the substrate 1. The depth of the cell trench is less than the thickness of the substrate 1. The bottom of the cell trench is separated from the above-mentioned back doping region 2 by the substrate 1.

[0096] A P-type base region 21 is disposed in the active region of the substrate 1. The P-type base region 21 traverses the active region of the substrate 1. The cell trench penetrates the P-type base region 21, and the bottom of the cell trench is located below the P-type base region 21. N+ emitter regions 24 are disposed on both sides of the cell trench. The N+ emitter regions 24 are located in the P-type base region 21 and the outer sidewalls of the N+ emitter regions 24 corresponding to the cell trench are in contact. A cell trench insulating oxide layer 23 is disposed in the cell trench. The cell trench insulating oxide layer 23 covers the sidewalls and the bottom wall of the cell trench. Gate conductive polysilicon 22 is filled in the cell trench where the cell trench insulating oxide layer 23 is disposed. The gate conductive polysilicon 22 is insulated from the sidewalls and the bottom wall of the cell trench through the cell trench insulating oxide layer 23.

[0097] The opening of the cell trench is covered by an insulating dielectric layer 25. The gate conductive polysilicon 22 is isolated from the emitter metal 26 above the front surface of the substrate 1 through the insulating dielectric layer 25. The emitter metal 26 makes an ohmic contact with the N+ emitter 24 and the P-type base region 21. The emitter of the IGBT device can be formed by using the emitter metal 26. Of course, in specific implementation, the cells in the active region can also adopt other forms, which can be specifically selected according to needs to meet the actual application requirements, and will not be listed here.

[0098] Specifically, after the temperature sensor is disposed on the back surface of the substrate 1, a temperature sensing electrode unit layout adapted to the back surface metal layer and the temperature sensing electrode unit is configured on the back surface of the substrate 1. The temperature sensing electrode unit layout includes a temperature sensing first electrode layout and a temperature sensing second electrode layout. The temperature sensing first electrode layout includes a first electrode lead 11-1 and a first electrode lead pad 11-2. The temperature sensing second electrode layout includes a second electrode lead 12-1 and a second electrode lead pad 12-2. Among them,

[0099] One end of the first electrode lead 11-1 is electrically connected to the temperature sensing first electrode, and the other end of the first electrode lead 11-1 is provided with the first electrode lead pad 11-2. One end of the second electrode lead 12-1 is electrically connected to the temperature sensing second electrode, and the other end of the second electrode lead 12-1 is provided with the second electrode lead pad 12-2;

[0100] The first electrode lead 11-1 and the second electrode lead 12-1 are parallel to each other. The first electrode lead pad 11-2 and the second electrode lead pad 12-2 are located on the same side of the back surface temperature sensing trench 3, or the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are respectively located on both sides of the back surface temperature sensing trench 3.

[0101] As Figure 12 and Figure 13 shown, it is the temperature sensing electrode unit layout in the implementation case of Figure 7 wherein,Figure 12 In it, the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are located on the same side of the back temperature sensing groove 3; Figure 13 In it, the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are respectively located on both sides of the back temperature sensing groove 3.

[0102] In addition, Figure 12 In it, the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are located on the same side of the back temperature sensing groove 3. The first collector metal layer 13 on the back of the substrate 1 is in a block shape, and the first collector metal layer 13 does not contact the first temperature sensing electrode layout, the second temperature sensing electrode layout, and the temperature sensing electrode unit. Figure 13 In it, when the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are respectively located on both sides of the back temperature sensing groove 3, the back metal layer on the back of the substrate 1 includes two first collector metal layers 13, and the two first collector metal layers 13 are distributed on both sides of the back temperature sensing groove 3. Specifically, taking the welding connection with the DBC board as an example, the two first collector metal layers 13 can be connected into one body through the DBC board, that is, the two first collector metal layers 13 can maintain electrical connection through the DBC board.

[0103] For Figure 12 the layout in Figure 14 a schematic diagram of the connection with the DBC board is shown. Among them, the DBC board at least includes a collector DBC welding area 13-1r, an electrode first DBC welding area 11-2r, and an electrode second DBC welding area 12-2r. Among them, the first collector metal layer 13 is welded to the collector DBC welding area 13-1r, the first electrode lead pad 11-2 is welded to the electrode first DBC welding area 11-2r, and the second electrode lead pad 12-2 is welded to the electrode second DBC welding area 12-2r. Specifically, after corresponding welding connection with the DBC board, the IGBT device can be assembled on the DBC board.

[0104] For Figure 13 the layout in Figure 15A schematic diagram of the connection with the DBC board is shown, where the DBC board includes at least two collector DBC welding areas 13-1r, a first electrode DBC welding area 11-2r, and a second electrode DBC welding area 12-2r. Among them, two collector first metal layers 13 of the back metal layer are respectively welded to the two collector DBC welding areas 13-1r correspondingly, the first electrode lead pad 11-2 is welded to the first electrode DBC welding area 11-2r, and the second electrode lead pad 12-2 is welded to the second electrode DBC welding area 12-2r. After the two collector first metal layers 13 are welded to the two collector DBC welding areas 13-1r correspondingly, electrical connection between the two collector first metal layers 13 can be achieved.

[0105] As Figure 16 and Figure 17 shown, it is the layout of the temperature sensing electrode unit in the implementation case of Figure 11 . According to the description of Figure 11 , the first temperature sensing electrode and the second temperature sensing electrode are buried in the back temperature sensing trench 3. At this time, the first electrode lead 11-1 and the second electrode lead 12-1 will also be buried in the back isolation oxide layer, and the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are in the exposed state. Figure 16 The implementation case in Figure 12 is similar, that is, the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are located on the same side of the back temperature sensing trench 3. Of course, during specific implementation, the shape of the back temperature sensing trench 3 needs to be adapted to the layout of the temperature sensing electrode unit. Specifically, reference can be made to the dotted line part in Figure 16 , Figure 17 , that is, the shaded part corresponds to the shape of the back temperature sensor trench 3.

[0106] Figure 17 In Figure 16 , the first electrode lead pad 11-2 and the second electrode lead pad 12-2 are respectively located on both sides of the back temperature sensing trench 3. However, since the first electrode lead 11-1 and the second electrode lead 12-1 will also be buried in the back isolation oxide layer, at this time, the back metal layer on the back of the substrate 1 is similar to that in

[0107] Figure 18 , that is, it includes a collector first metal layer 13.

[0107] Figure 18 is the schematic diagram of the connection between the layout in Figure 16 and the DBC board. Figure 19 is the schematic diagram of the connection between the layout in Figure 17 and the DBC board. Figure 18 , Figure 19 For the specific connection situation of the DBC board in the layout in Figure 14 and Figure 15The corresponding description is subject to the effective connection between the layout distribution and the DBC board, which will not be elaborated here.

[0108] For the above-mentioned power semiconductor device, it can be prepared through the following process steps. Specifically, for the preparation method of a power semiconductor device with an integrated temperature sensor on the back, the preparation method includes:

[0109] Provide a substrate 1, and prepare the required front structure on the front of the substrate 1. Among them, the prepared front structure at least includes an active region;

[0110] After preparing the front structure on the front of the substrate 1, prepare the back structure and the temperature sensor on the back of the substrate 1. Among them, the back electrode structure includes a back electrode. The temperature sensor is directly corresponding to the active region in the front structure on the back of the substrate 1, and the temperature sensor is independent of the back electrode.

[0111] During specific implementation, during specific preparation, generally, the front structure is first prepared on the front of the substrate 1, and then the back structure and the temperature sensor are prepared on the back of the substrate 1 to avoid the influence of high-temperature processes such as preparing the front structure on the back structure and the temperature sensor. For the specific situation of the front structure and the active region in the front structure, reference can be made to the above description, and the specific preparation is subject to the ability to prepare the required front structure.

[0112] The following specifically describes the process steps for preparing the temperature sensor. Of course, when preparing the temperature sensor, generally, the required back structure can also be prepared simultaneously. Specifically, when preparing the temperature sensor, the following steps are included:

[0113] Step 1: Prepare the required back temperature sensing trench 3 on the back of the substrate 1, and set a back trench insulating oxide layer 4 on the inner wall of the back temperature sensing trench 3, where the back trench insulating oxide layer 4 covers the inner wall of the back temperature sensing trench 3;

[0114] As Figure 1 shown, it is a cross-sectional view after preparing the required front structure on the front of the substrate 1, Figure 1 For the specific situation of the cells in the active region, reference can be made to the above description. The specific preparation process can correspond to the specific form of the cells, and the specific process is subject to the ability to prepare the required front structure.

[0115] As Figure 2As shown, before preparing the back temperature sensing trench 3, a back doping region 2 is provided on the back of the substrate 1. The conductivity type of the back doping region 2 is the same as that of the substrate 1, and the doping concentration of the back doping region 2 is greater than that of the substrate 1. The back doping region 2 can be prepared by ion implantation on the back of the substrate 1. The specific process method and conditions for preparing the back doping region 2 can be selected according to needs, so as to be able to prepare the required back doping region 2.

[0116] After preparing the back doping region 2, the back of the substrate 1 is etched with trenches to obtain the back temperature sensing trench 3. The back temperature sensing trench 3 is arranged in the back doping region 2, and the depth of the back temperature sensing trench 3 is less than the depth of the back doping region 2 in the substrate 1. From the above description, it can be seen that the back temperature sensing trench 3 is on the back of the substrate 1 and needs to correspond exactly to the active region on the front of the substrate 1.

[0117] After preparing the back temperature sensing trench 3, a back trench insulating oxide layer 4 can be prepared by thermal oxidation or deposition process. The back trench insulating oxide layer 4 covers the inner sidewall and the bottom wall of the back temperature sensing trench 3.

[0118] Step 2: Prepare a temperature sensing unit in the above-mentioned back temperature sensing trench 3. Among them, the temperature sensing unit includes a temperature sensing first conductive polysilicon block 5 and a temperature sensing second conductive polysilicon block 6.

[0119] The temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are distributed on the bottom of the back temperature sensing trench 3. The conductivity type of the temperature sensing first conductive polysilicon block 5 is different from that of the temperature sensing second conductive polysilicon block 6, and the corresponding adjacent ends of the temperature sensing first conductive polysilicon block 5 and the temperature sensing second conductive polysilicon block 6 are in contact.

[0120] The following specifically describes the process of preparing the temperature sensing unit. As Figure 3 shown, a temperature sensing conductive polysilicon matrix 5a is arranged in the back temperature sensing trench 3. The conductivity type of the temperature sensing conductive polysilicon matrix 5a is N-type or P-type. When the conductivity type of the substrate 1 is N-type and the power semiconductor device is an IGBT-type device, the conductivity type of the temperature sensing conductive polysilicon matrix 5a is selected as N-type, and the temperature sensing conductive polysilicon matrix 5a covers the bottom of the back temperature sensing trench 3.

[0121] As Figure 4As described above, P-type impurity ions are implanted into the back surface of the substrate 1. Of course, during implantation, it is necessary to shield the temperature-sensing conductive polysilicon matrix 5a so that after implantation, a temperature-sensing first conductive polysilicon block 5 and a temperature-sensing second conductive polysilicon block 6 can be simultaneously prepared in the back surface temperature-sensing trench 3. At the same time, a P+ collector region 7 is prepared on the back surface of the substrate 1, and the depth of the P+ collector region 7 in the substrate 1 is less than the depth of the back surface temperature-sensing trench 3. The specific ion implantation method and process conditions can be selected according to needs, so as to be able to prepare the required temperature-sensing first conductive polysilicon block 5, temperature-sensing second conductive polysilicon block 6, and P+ collector region 7.

[0122] Step 3: Prepare a temperature-sensing electrode unit for leading out the temperature-sensing first conductive polysilicon block 5 and the temperature-sensing second conductive polysilicon block 6.

[0123] As can be seen from the above description, the form of leading out the temperature-sensing first conductive polysilicon block 5 and the temperature-sensing second conductive polysilicon block 6 by the temperature-sensing electrode unit can be different. Among them, Figures 5 to 7 is a specific implementation process step for preparing the temperature-sensing electrode unit, Figures 8 to 11 is another specific implementation process step for preparing the temperature-sensing electrode unit. The specific process conditions will be explained below.

[0124] For Figures 5 to 7 in the specific implementation process step of Figure 5 in which, an insulating isolation first oxide layer 8 is prepared in the back surface temperature-sensing trench 3. The insulating isolation first oxide layer 8 fills the back surface temperature-sensing trench 3, and the back surface insulating isolation first oxide layer 8 covers the temperature-sensing first conductive polysilicon block 5 and the temperature-sensing second conductive polysilicon block 6. After the insulating isolation first oxide layer 8 is prepared, the insulating isolation first oxide layer 8 is etched to obtain two insulating isolation first oxide layer holes 9 that penetrate the insulating isolation first oxide layer 8. The two insulating isolation first oxide layer holes 9 respectively correspond exactly to the temperature-sensing first conductive polysilicon block 5 and the temperature-sensing second conductive polysilicon block 6. Specifically, the insulating isolation first oxide layer 8 can be etched by commonly used technical means in the technical field to obtain the two insulating isolation first oxide layer holes 9, and the specific process method and conditions can be selected according to needs.

[0125] A metal layer is deposited on the back surface of the above-mentioned substrate 1 to obtain a back surface first metal base layer 10. The back surface first metal base layer 10 covers the back surface of the substrate 1 and the insulating isolation first oxide layer 8, and can fill the insulating isolation first oxide layer holes 9. Through the back surface first metal base layer 10 filled in the insulating isolation first oxide layer holes 9, ohmic contact with the temperature-sensing first conductive polysilicon block 5 and the temperature-sensing second conductive polysilicon block 6 is achieved, such as Figure 6As shown. The first metal base layer 10 on the back of the substrate 1 is in ohmic contact with the P+ collector region 7.

[0126] The first metal base layer 10 on the back is selectively masked and etched to simultaneously fabricate the first temperature-sensing metal body 11, the second temperature-sensing metal body 12, and the first collector metal layer 13, as Figure 7 shown. That is, the first temperature-sensing electrode can be formed using the first temperature-sensing metal body 11, the second temperature-sensing electrode can be formed using the second temperature-sensing metal body 12, and the back electrode is formed using the first collector metal layer 13. For specific details, reference can be made to the above description and will not be elaborated here.

[0127] For Figures 8 to 11 in the specific implementation process steps, specifically, the process of fabricating the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6 can refer to the above description. Figure 8 In it, after fabricating the first temperature-sensing conductive polysilicon block 5 and the second temperature-sensing conductive polysilicon block 6, an insulating isolation second oxide layer 8a is fabricated in the back temperature-sensing trench 3. The thickness of the insulating isolation second oxide layer 8a is much smaller than that of the insulating isolation first oxide layer 8. After fabricating the insulating isolation second oxide layer 8a, the insulating isolation second oxide layer 8a is etched to obtain an insulating isolation second oxide layer hole 9a that penetrates the insulating isolation second oxide layer 8a. For the specific details of fabricating the insulating isolation second oxide layer 8a and the insulating isolation second oxide layer 9a, reference can be made to the above description and will not be elaborated here.

[0128] Figure 9 In it, a metal layer is deposited on the back of the above substrate 1 to obtain a second metal base layer 10a on the back. For the specific details of the second metal layer 10a on the back, reference can be made to the specific details description of the first metal layer 10 on the back. Different from the first metal layer 10 on the back, the part of the second metal layer 10a on the back that covers the insulating isolation second oxide layer 8a is located in the back temperature-sensing trench 3 and also covers the side wall of the back temperature-sensing trench 3.

[0129] Figure 10 In it, the second metal base layer 10a on the back is selectively masked and etched to simultaneously fabricate the third temperature-sensing metal body 11a, the fourth temperature-sensing metal body 12a, and the second collector metal layer 13a. Among them, the first temperature-sensing electrode is formed using the third temperature-sensing metal body 11a, the second temperature-sensing electrode is formed using the fourth temperature-sensing metal body 12a, and the back electrode is formed using the second collector metal layer 13a. Of course, when etching the second metal base layer 10a on the back, the second metal base layer 10a covering the side wall of the back temperature-sensing trench 3 needs to be removed.

[0130] Figure 11 In

[0130] , an insulating and isolating third oxide layer 14 is provided in the back surface temperature sensing groove 3. The insulating and isolating third oxide layer 14 fills the back surface temperature sensing groove 3. The insulating and isolating oxide layer 13 buries the temperature sensing third metal body 11a and the temperature sensing fourth metal body 12a in the back surface temperature sensing groove 3. The back surface temperature sensing groove 3 is filled with the insulating and isolating third oxide layer 14. Among them, a back surface insulating oxide layer is formed by the insulating and isolating second oxide layer 8a and the insulating and isolating third oxide layer 14.

[0131] The above are two specific implementation processes for specifically preparing the temperature sensor. Of course, during specific implementation, other preparation processes can also be adopted, which can be specifically selected according to needs, so as to be able to prepare the required back surface structure and temperature sensor.

Claims

1. A power semiconductor device with a temperature sensor integrated on the back, comprising a power semiconductor device body, the power semiconductor device body includes a substrate, a front structure prepared on the front of the substrate, and a back structure prepared on the back of the substrate, the front structure includes an active region, the back structure includes a back electrode, and it is characterized in that: A temperature sensor for monitoring the operating temperature of the power semiconductor device body is also prepared on the back of the substrate, wherein the temperature sensor corresponds exactly to the active region in the front structure, and the temperature sensor is independent of the back electrode; The temperature sensor includes a back temperature sensing trench arranged on the back of the substrate, a back trench insulating oxide layer covering the inner wall of the back temperature sensing trench, and a temperature sensing unit prepared in the back temperature sensing trench, and the temperature sensing unit is insulated and isolated from the substrate through the back trench insulating oxide layer; The temperature sensing unit includes a temperature sensing first conductive polysilicon block, a temperature sensing second conductive polysilicon block, and a temperature sensing electrode unit for leading out the temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block, wherein, The temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block are distributed on the bottom of the back temperature sensing trench, and the conduction type of the temperature sensing first conductive polysilicon block is different from that of the temperature sensing second conductive polysilicon block, and the corresponding adjacent ends of the temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block are in contact.

2. The power semiconductor device with a backside integrated temperature sensor according to claim 1, wherein: A back doping region is arranged on the back of the substrate, the conduction type of the back doping region is the same as that of the substrate, and the doping concentration of the back doping region is greater than that of the substrate; The back doping region extends in the substrate along the back direction pointing to the front of the substrate, the back temperature sensing trench is arranged in the back doping region, and the depth of the back temperature sensing trench is less than the depth of the back doping region in the substrate.

3. The power semiconductor device with a backside integrated temperature sensor according to claim 1, characterized in that: It also includes a back isolation oxide layer arranged in the back temperature sensing trench, the back isolation oxide layer covers the temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block, and the temperature sensing electrode unit is adaptively connected to the back isolation oxide layer; The temperature sensing electrode unit includes a temperature sensing first electrode for leading out the temperature sensing first conductive polysilicon block and a temperature sensing second electrode for leading out the temperature sensing second conductive polysilicon block, wherein the temperature sensing first electrode is in ohmic contact with the temperature sensing first conductive polysilicon block, and the temperature sensing second electrode is in ohmic contact with the temperature sensing second conductive polysilicon block; The temperature sensing electrode unit is buried in the back temperature sensing trench through the back isolation oxide layer, or the temperature sensing first electrode and the temperature sensing second electrode are distributed on the surface of the back isolation oxide layer corresponding to the back of the substrate, and the temperature sensing first electrode and the temperature sensing second electrode are located outside the back of the substrate.

4. The power semiconductor device with a backside integrated temperature sensor according to claim 3, characterized in that: The back electrode includes a back metal layer, and the back metal layer covers the back of the substrate; On the back surface of the substrate, a layout of a temperature sensing electrode unit adapted to the back metal layer and the temperature sensing electrode unit is arranged. The layout of the temperature sensing electrode unit includes a first temperature sensing electrode layout and a second temperature sensing electrode layout. The first temperature sensing electrode layout includes a first electrode lead and a first electrode lead pad. The second temperature sensing electrode layout includes a second electrode lead and a second electrode lead pad. Among them, One end of the first electrode lead is electrically connected to the first temperature sensing electrode, and the other end of the first electrode lead is provided with a first electrode lead pad. One end of the second electrode lead is electrically connected to the second temperature sensing electrode, and the other end of the second electrode lead is provided with a second electrode lead pad; The first electrode lead and the second electrode lead are parallel to each other. The first electrode lead pad and the second electrode lead pad are located on the same side of the back temperature sensing trench, or the first electrode lead pad and the second electrode lead pad are respectively located on both sides of the back temperature sensing trench.

5. The power semiconductor device with a backside integrated temperature sensor according to any one of claims 1 to 4, characterized in that: The cells in the active region are planar or trench type; the back structure is used to make the power semiconductor device body an IGBT type device or a MOSFET type device.

6. A method for preparing a power semiconductor device with a backside integrated temperature sensor, characterized in that, For preparing the power semiconductor device according to claim 1, the preparation method includes: Providing a substrate and preparing the required front structure on the front surface of the substrate. Among them, the prepared front structure at least includes an active region; After preparing the front structure on the front surface of the substrate, preparing the back structure and the temperature sensor on the back surface of the substrate. Among them, the back electrode structure includes a back electrode. The temperature sensor corresponds to the active region in the front structure on the back surface of the substrate, and the temperature sensor is independent of the back electrode; When preparing the temperature sensor, the following steps are included: Step 1: Prepare the required back temperature sensing trench on the back surface of the substrate, and set a back trench insulating oxide layer on the inner wall of the back temperature sensing trench. Among them, the back trench insulating oxide layer covers the inner wall of the back temperature sensing trench; Step 2: Prepare a temperature sensing unit in the above-mentioned back temperature sensing trench. Among them, the temperature sensing unit includes a first temperature sensing conductive polysilicon block and a second temperature sensing conductive polysilicon block; The first temperature sensing conductive polysilicon block and the second temperature sensing conductive polysilicon block are distributed at the bottom of the back temperature sensing trench. The conduction type of the first temperature sensing conductive polysilicon block is different from that of the second temperature sensing conductive polysilicon block, and the corresponding adjacent ends of the first temperature sensing conductive polysilicon block and the second temperature sensing conductive polysilicon block are in contact; Step 3: Prepare a temperature sensing electrode unit for leading out the first temperature sensing conductive polysilicon block and the second temperature sensing conductive polysilicon block.

7. The method for manufacturing a backside integrated temperature sensor power semiconductor device according to claim 6, wherein, in Before preparing the back temperature sensing trench, a back doping region is arranged on the back surface of the substrate. The conduction type of the back doping region is the same as that of the substrate, and the doping concentration of the back doping region is greater than that of the substrate; The back doping region extends along the back surface of the substrate in the direction pointing to the front surface of the substrate. The back temperature sensing trench is arranged in the back doping region, and the depth of the back temperature sensing trench is less than the depth of the back doping region in the substrate.

8. The method for preparing a backside integrated temperature sensor power semiconductor device according to claim 6 or 7, characterized in that, It further includes a back isolation oxide layer disposed in the back temperature sensing trench, the back isolation oxide layer covering the temperature sensing first conductive polysilicon block and the temperature sensing second conductive polysilicon block, and the temperature sensing electrode unit being adaptively connected to the back isolation oxide layer; The temperature sensing electrode unit includes a temperature sensing first electrode for leading out the temperature sensing first conductive polysilicon block and a temperature sensing second electrode for leading out the temperature sensing second conductive polysilicon block. Among them, the temperature sensing first electrode is in ohmic contact with the temperature sensing first conductive polysilicon block, and the temperature sensing second electrode is in ohmic contact with the temperature sensing second conductive polysilicon block; The temperature sensing electrode unit is buried in the back temperature sensing trench through the back isolation oxide layer, or the temperature sensing first electrode and the temperature sensing second electrode are distributed on the surfaces corresponding to the back isolation oxide layer and the back of the substrate, and the temperature sensing first electrode and the temperature sensing second electrode are located outside the back of the substrate.

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