Medium-long wave signal processing device and processing system

Abstract

This application discloses a medium- and long-wave signal processing device and system. The medium- and long-wave signal processing device includes a power amplifier module and a filter module. The power amplifier module includes a conditioning and comparison unit, an isolation and drive unit, a power amplification unit, and a mode adjustment unit. The power amplification unit includes at least two sets of power amplification circuits connected in parallel. Each set of power amplification circuits includes a full-bridge circuit, a DC blocking capacitor, and a high-frequency transformer connected in series. The medium- and long-wave signal processing device is not only small in size but also has low power loss, thereby improving amplification efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal processing, in particular to a medium-long wave signal processing device and system. BACKGROUND

[0002] Due to the low frequency and long wavelength of the medium-long wave signal, in order to ensure the communication performance of the equipment, the power amplifier and the filter use large-size electronic components. In addition, due to the difficulty of integration in this frequency band, most of the similar products at home and abroad currently use separate devices and analog circuits to achieve the function, so that the equipment not only has a large size, but also has a large power loss and low amplification efficiency.

[0003] Therefore, it is an urgent problem for those skilled in the art to provide a medium-long wave signal processing device with small size and low power loss. SUMMARY

[0004] The embodiments of the present application disclose a medium-long wave signal processing device and system, which has small size and low power loss, and can improve the amplification efficiency.

[0005] In a first aspect, the present application provides a medium-long wave signal processing device, comprising: a power amplifier module and a filter module, the power amplifier module comprising a conditioning comparison unit, an isolation driving unit, a power amplification unit and a mode adjustment unit, the power amplification unit comprising at least two groups of power amplification circuits connected in parallel, each group of power amplification circuits comprising a full-bridge circuit, a blocking capacitor and a high-frequency transformer connected in series, wherein the conditioning comparison unit is configured to convert an excitation signal into a square wave signal of the same frequency; the isolation driving unit is configured to convert the driving signal of the high-side field effect tube and the low-side field effect tube of the full-bridge circuit and set the dead time according to the square wave signal; the power amplification unit is configured to drive the four field effect tubes of the full-bridge circuit to generate a bipolar square wave signal according to the driving signal, the bipolar square wave signal is passed through the blocking capacitor for AC conversion, and then is boosted by the high-frequency transformer, and the target voltage square wave signal is obtained after the power superposition topology of at least two groups of power amplification circuits; the mode adjustment unit is configured to perform signal transmission mode conversion and impedance conversion on the target voltage square wave signal to obtain a target voltage adjustment signal; and the filter module is configured to filter out high-order harmonics in the target voltage adjustment signal to obtain a target voltage sine signal.

[0006] In a possible implementation, the conditioning comparison unit comprises a high-frequency isolation transformer, a same-phase amplification circuit and a voltage comparator connected in sequence, wherein the high-frequency isolation transformer is configured to be isolated from a front-stage excitation signal source and transmit the excitation signal; the same-phase amplification circuit is configured to amplify the excitation signal, so that the amplitude of the amplified excitation signal reaches an input threshold of the voltage comparator; and the voltage comparator is configured to convert the amplified excitation signal into a square wave signal of the same frequency.

[0007] In a possible implementation, the isolation driving unit comprises at least eight dead-time setting circuits and eight isolation driving circuits, one of the dead-time setting circuits, one of the isolation driving circuits and one of the field effect tubes in the full-bridge circuit are connected in sequence.

[0008] In a possible implementation, the dead-time setting circuit comprises an AND gate chip, a NOT gate chip and two RC resistance-capacitance circuits, wherein the AND gate chip and the NOT gate chip are configured to input the square wave signal respectively to obtain a first complementary signal and a second complementary signal with a phase difference of 180 degrees; and the two RC circuits are electrically connected to the first complementary signal and the second complementary signal respectively, and the frequency response characteristic of the RC circuit is changed by adjusting the resistance value of the variable resistor in the RC circuit, so as to adjust the dead-time.

[0009] In a possible implementation, the isolation driving circuit comprises an isolation driving chip and a buffer circuit, wherein the isolation driving chip is configured to input the square wave signal and output a driving signal to four field effect tubes in the full-bridge circuit; and the buffer circuit is configured to form a negative voltage signal and buffer a spike caused by turn-on crosstalk of two field effect tubes in the full-bridge circuit.

[0010] In a possible implementation, the mode adjustment unit comprises a balun transformer.

[0011] In a possible implementation, the filter module comprises an LC low-pass filter.

[0012] In a possible implementation, the field effect tube in the full-bridge circuit is a gallium nitride field effect tube GaNMOSFET.

[0013] In a possible implementation, the device further includes a current detection unit configured to detect output current of the power amplification unit, and the current detection unit includes a threshold setting circuit, a comparator, a D flip-flop and an overcurrent protection circuit, wherein the threshold setting circuit is configured to set a voltage threshold for judging whether the output current of the power amplification unit is overcurrent, the comparator is configured to output a high level when the amplitude of the current signal of the power amplification unit coupled and attenuated at the in-phase terminal reaches the preset voltage threshold, the D flip-flop is configured to change the level state of the output when the high level of the output of the comparator is detected, and the overcurrent protection circuit is configured to cut off the corresponding output circuit after the level state of the output of the D flip-flop is changed, so as to realize hardware protection.

[0014] In a second aspect, the application provides a medium-long wave signal processing system, including the medium-long wave signal processing device provided in the first aspect.

[0015] The medium-long wave signal processing device provided in the application has small volume and low power loss, and can improve amplification efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0017] Figure 1 A structural schematic diagram of a medium-long wave signal processing device provided in an embodiment of the application;

[0018] Figure 2 A structural schematic diagram of a power amplification unit provided in an embodiment of the application;

[0019] Figure 3 A structural schematic diagram of an LC low-pass filter provided in an embodiment of the application;

[0020] Figure 4 A structural schematic diagram of a conditioning comparison unit provided in an embodiment of the application;

[0021] Figure 5 A circuit schematic diagram of a conditioning comparison unit provided in an embodiment of the application;

[0022] Figure 6 A structural schematic diagram of an isolation driving unit provided in an embodiment of the application;

[0023] Figure 7A circuit schematic diagram of a dead zone setting circuit provided for an embodiment of the present application is shown in FIG. 1.

[0024] Figure 8 A circuit schematic diagram of an isolation driving circuit provided for an embodiment of the present application is shown in FIG. 2.

[0025] Figure 9 A structural schematic diagram of a current detection unit provided for an embodiment of the present application is shown in FIG. 3.

[0026] Figure 10 A circuit schematic diagram of a current detection unit provided for an embodiment of the present application is shown in FIG. 4.

[0027] Figure 11 A structural schematic diagram of a middle-long wave signal processing system provided for an embodiment of the present application is shown in FIG. 5.

[0028] Figure 12 A connection schematic diagram of a core controller provided for an embodiment of the present application is shown in FIG. 6.

[0029] Figure 13 A structural schematic diagram of a relay provided for an embodiment of the present application is shown in FIG. 7.

[0030] Figure 14 A structural schematic diagram of an antenna switching circuit provided for an embodiment of the present application is shown in FIG. 8. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0032] It should be noted that the terms “include” and “have” and any variations thereof in the embodiments of the present application and the drawings are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to the process, method, product or device.

[0033] In the related art, in order to ensure the communication performance of the device, the power amplifier and the filter use electronic components of large size due to the low frequency and long wavelength of the middle-long wave signal. In addition, due to the difficulty of integration in this frequency band, most of the similar products at home and abroad currently use separate devices and analog circuits to achieve the function, so that the device not only has a large size, but also has a large power loss and a low amplification efficiency.

[0034] Based on the above problems, the embodiment of the present application provides a medium-long wave signal processing device, which is small in size and low in power loss, and can improve the amplification efficiency.

[0035] Figure 1 A structural schematic diagram of a medium-long wave signal processing device provided by the embodiment of the present application is shown in the figure, which can include a power amplifier module 11 and a filter module 12. Figure 1 The power amplifier module 11 includes a conditioning comparison unit 111, an isolation driving unit 112, a power amplification unit 113, and a mode adjustment unit 114. The power amplification unit 113 includes at least two groups of power amplification circuits connected in parallel, and each group of the power amplification circuits includes a full-bridge circuit, a blocking capacitor, and a high-frequency transformer connected in series.

[0036] The conditioning comparison unit 111 is configured to convert an excitation signal into a square wave signal of the same frequency. The isolation driving unit 112 is configured to convert a driving signal of high-side and low-side field effect tubes of the full-bridge circuit and set a dead time according to the square wave signal. The power amplification unit 113 is configured to drive four field effect tubes of the full-bridge circuit to generate a bipolar square wave signal according to the driving signal, pass the bipolar square wave signal through the blocking capacitor for AC passing, and then pass the bipolar square wave signal through the high-frequency transformer for voltage boosting. After the power of at least two groups of the power amplification circuits is superimposed, a target voltage square wave signal is obtained. The mode adjustment unit 114 is configured to perform signal transmission mode conversion and impedance conversion on the target voltage square wave signal to obtain a target voltage adjustment signal. The filter module 12 is configured to filter out high-order harmonics in the target voltage adjustment signal to obtain a target voltage sine signal.

[0037] It should be noted that the input signal of the power amplifier module 11 is an excitation signal, i.e., a sine signal. The excitation signal is converted into a square wave signal of the same frequency by the conditioning comparison unit 111. The square wave signal enters the isolation driving unit 112 to realize driving signal conversion and dead time setting of high-side and low-side MOSFET field effect tubes of the full-bridge, i.e., the square wave signal input driving isolation unit 112 is converted into a 4-way signal capable of driving the full-bridge, which drives the full-bridge MOSFET Q1, Q2, Q3, and Q4 to generate a bipolar square wave signal. The bipolar square wave signal is first passed through the blocking capacitor and then output through the high-frequency transformer. After the output power of multiple groups of power amplification circuits of the power amplification unit 113 is superimposed, a high-voltage square wave signal is obtained. Then, the high-voltage square wave signal is subjected to transmission mode and impedance conversion by the mode adjustment unit 114, and then enters the filter module 12 to filter out high-order harmonics to obtain a sine signal of a target amplitude.

[0038] The full-bridge circuit inputs not only a voltage for power supply, such as DC-250V, but also an excitation signal, such as 1VPEP , i.e. the working power amplifier signal, wherein 250V is the voltage supplied to the power amplifier tube, i.e. the MOSFET tube, for the purpose of amplifying the radio frequency signal, and the amplification of the radio frequency signal is determined by adjusting the voltage supplied to the power amplifier tube. For example, a radio frequency signal of 10dBm needs to be amplified to 50dBm, and a voltage of 110V needs to be supplied to the power amplifier tube; and for amplifying the radio frequency signal from 10dBm to 70dBm, a voltage of 250V needs to be supplied to the power amplifier tube. The amplification factor of the radio frequency signal is determined by adjusting the voltage supplied to the power amplifier tube, i.e. the MOSFET field effect tube in the full-bridge circuit. The amplified power signal is generated by the full-bridge, and is formed by chopping the 250V DC power signal by the MOSFET tube.

[0039] Figure 2 A structural schematic diagram of a power amplification unit provided in the embodiment of the present application is shown in FIG. 1, which can include n groups of power amplification circuits connected in parallel, n≥2, each group of the power amplification circuits including a full-bridge circuit, a DC blocking capacitor and a high-frequency transformer connected in series, and the output power of the n groups of power amplification circuits is superimposed in a topology, i.e. the multiple signals are synchronized and combined into one signal by the high-frequency transformer, and then output, and then connected to a mode adjustment unit and a filter module. Figure 2

[0040] In some embodiments, the mode adjustment unit includes a balun transformer.

[0041] It should be noted that in the power amplifier module, the output signal of the high-frequency transformer is in a differential transmission mode, which needs to be converted into a single-ended transmission mode to be input to the filter module, i.e. the harmonic filter. Therefore, a balun transformer is connected in series between the output of the high-frequency transformer and the input of the filter module. The balun transformer can be used for converting the transmission mode of the signal, i.e. converting the balanced transmission, i.e. the differential transmission, into the unbalanced transmission, i.e. the coaxial transmission. In this embodiment, a 1:1 transmission type balun with a sub-line is used for the design and selection of the balun transformer, which can obtain a better isolation effect.

[0042] In some embodiments, the filter module includes an LC low-pass filter.

[0043] It should be noted that the output voltage of the full-bridge circuit is a square wave, which contains a large number of harmonic components. A reasonable output low-pass filter is set to realize the sinusoidalization of the output voltage waveform and reduce the THD (total harmonic distortion) value. The addition of a suitable LC filter circuit can make the output a sine wave. The LC filter in this embodiment should meet the requirements of small size, good frequency blocking characteristics and small power consumption. According to the bandwidth f w of the power amplification unit, the cut-off frequency of the low-pass filter should meet: ​At the same time, the design of the inductor should meet the requirements of working frequency, working current and working voltage; the capacitor can select the thin film capacitor with good frequency characteristics and meet the working voltage requirements; in addition, the reasonable design of the PCB can effectively reduce the harmonic current and improve the electromagnetic compatibility.

[0044] Since the filter is a frequency selection circuit, it only allows certain frequency components of the input signal to pass through, while preventing other frequency components from reaching the output. A low-pass filter allows lower frequency components of the input signal to pass through while blocking higher frequency components. In order to simplify the design of the filter, the impedance and frequency of the filter can be normalized, and then the normalized values of frequency and impedance are obtained through engineering calculation, and then the parameter values of the components are calculated by designing a comprehensive calibration formula. According to the requirements of the present embodiment, the filter has good response in the passband of 200KHz-400KHz, and a multi-stage LC low-pass filter can be designed. When designing the filter, the specific parameters such as passband cutoff frequency, stopband cutoff frequency, maximum attenuation allowed in passband, minimum attenuation allowed in stopband, etc. need to be determined according to the index requirements. Therefore, if the technical requirements of the filter are given by the approximation error of the maximum passband and stopband, then the part near the low frequency end of the passband and above the stopband cutoff frequency will exceed the technical index. A more effective approach is to evenly distribute the approximation error in the passband and stopband, which can reduce the required filter order.

[0045] Figure 3 A structure diagram of an LC low-pass filter provided by the present embodiment is shown in Figure 3 The filter includes capacitors C22, C23, C24, C25 and C26, inductors L1, L2, L3, L4 and L5, and resistor R36. The low-pass filter in the present embodiment is composed of two multi-stage Chebyshev type I low-pass filters of 200KHz-240KHz and 240KHz-400KHz. By optimizing the main parameters and dividing the filter frequency band, the filtering effect of harmonic components is effectively improved, and the design index is met.

[0046] In some embodiments, the field effect tube in the full-bridge circuit adopts a gallium nitride field effect tube GaN MOSFET. In order to reduce waveform distortion, it is necessary to minimize the dead time, so a high-speed GaN MOSFET is used to form a full-bridge circuit to realize power amplification. Since the threshold voltage of GaN MOSFET is low, generally 0.9V-1.2V, a specially designed driving circuit is needed, and the driving circuit can also be realized by a driving chip.

[0047] In some embodiments, the conditioning comparison unit can adopt a scheme of combining a high-frequency isolation transformer, a same-phase amplification circuit and a voltage comparator to generate a square wave signal capable of driving the full-bridge circuit to realize power amplification.

[0048] Figure 4 A structure diagram of a conditioning comparison unit provided in an embodiment of the present application is shown in FIG. 1. Figure 4 As shown in the figure, the conditioning comparison unit comprises a high-frequency isolation transformer, a same-phase amplification circuit and a voltage comparator which are electrically connected in sequence.

[0049] The high-frequency isolation transformer is used to isolate from a front-stage excitation signal source, and the transformer turns ratio is 1:1, only playing a role of isolating and transmitting signals. The same-phase amplification circuit is used to amplify the excitation signal, so that the amplitude of the amplified excitation signal reaches the input threshold of the voltage comparator. The voltage comparator is used to convert the amplified excitation signal into a square wave signal of the same frequency, for example, converting the excitation signal into a square wave signal of an amplitude of 5V, the same frequency and a duty cycle of 50%, so that the excitation signal meets the conditions of inputting into an isolation driving unit.

[0050] For example, the conditioning comparison unit can convert an input radio frequency signal of a frequency range of 200kHz-400kHz and a voltage range of 0.5V PEP <4V into a square wave signal of the same frequency and a duty cycle of 50%, which can be used to drive a full-bridge circuit to realize power amplification.

[0051] Further, Figure 5 A circuit diagram of a conditioning comparison unit provided in an embodiment of the present application is shown in FIG. 2. Figure 5As shown, the conditioning comparison unit includes a high-frequency isolation transformer U1, a same-phase amplification circuit U2 and a voltage comparator U3, the first input end and the second input end of the radio frequency signal are connected to the 6th pin and the 4th pin of the high-frequency isolation transformer U1 respectively, the 3rd pin of the high-frequency isolation transformer U1 is connected to the ground and one end of the capacitor C1 respectively, the other end of the capacitor C1 is connected to the 3rd pin of the same-phase amplification circuit U2, the 1st pin of the high-frequency isolation transformer U1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to one end of the resistor R2 and one end of the resistor R3 respectively, the other end of R3 is connected to the 3rd pin of the same-phase amplification circuit U2, the other end of the resistor R2 is connected to one end of the resistor R7 and one end of the capacitor R8 respectively, the other end of R7 is connected to the 6th pin of the same-phase amplification circuit U2, the 2nd pin of the same-phase amplification circuit U2 is connected to one end of the resistor R4 and one end of the resistor R5 respectively, the other end of the resistor R4 is connected to the ground, the other end of the resistor R5 is connected to the 6th pin of the same-phase amplification circuit U2 and one end of the resistor R6 respectively, the other end of the resistor R6 is connected to the ground, the 7th pin of the same-phase amplification circuit U2 is connected to the input voltage +5V and one end of the capacitor C2 respectively, the other end of the capacitor C2 is connected to the ground, the 4th pin of the same-phase amplification circuit U2 is connected to the input voltage -5V and one end of the capacitor C3 respectively, the other end of the capacitor C3 is connected to the ground, the other end of the resistor R8 is connected to the 3rd pin of the voltage comparator U3 and one end of the resistor R9 respectively, the other end of the resistor R9 is connected to the input voltage Vo, the capacitor C4, the resistor R11 and the resistor R10 are connected in parallel, one end of which is connected to the ground, the other end of which is connected to one end of the resistor R12 and the 4th pin of the voltage comparator U3 respectively, the other end of the resistor R12 is connected to the input voltage +5V, the 5th pin of the voltage comparator U3 is connected to the input voltage +5V and one end of the capacitor C5 respectively, the other end of the capacitor C5 is connected to the ground, the 2nd pin of the voltage comparator U3 is connected to the ground, the 1st pin of the voltage comparator U3 is connected to one end of the resistor R13 and the output signal end respectively, the other end of the resistor R13 is connected to the ground.

[0052] In some embodiments, the isolation driving unit includes a dead zone setting circuit and an isolation driving circuit, the number of the dead zone setting circuit and the number of the isolation driving circuit are the same as the number of the MOSFET of the full-bridge circuit.

[0053] Figure 6 A structure schematic diagram of an isolation driving unit provided by the embodiment of the present application is shown in the figure, Figure 6 For a full-bridge circuit, the isolation driving unit includes four dead zone setting circuits and four isolation driving circuits, a dead zone setting circuit, an isolation driving circuit and a field effect transistor in the full-bridge circuit are sequentially connected.

[0054] It should be noted that the square wave signal entering the dead zone setting circuit is divided into two groups of complementary signals, each group of signals is divided into two paths, a total of four signals, which are input into four isolation drive circuits. Each full-bridge circuit corresponds to four isolation drive circuits, and each isolation drive circuit controls one MOSFET tube, that is, one full-bridge circuit corresponds to four dead zone setting circuits and four isolation drive circuits. A dead zone setting circuit, an isolation drive circuit and a MOSFET of the full-bridge circuit are connected in sequence, and the middle of the four MOSFETs is the output end of the full-bridge circuit. The output end is connected to the isolation capacitor.

[0055] For example, each full-bridge circuit in the power amplifier module corresponds to four isolation drive circuits, which control four MOSFET tubes respectively. When the power amplifier unit includes three full-bridge circuits, the isolation drive unit includes twelve dead zone setting circuits and twelve isolation drive circuits, and the conditioning comparison unit only includes one. The radio frequency signal enters the conditioning comparison unit to divide the signal into three parts, which are input into the dead zone setting circuit of each full-bridge, and then divided into four parts into four isolation drive circuits. Among them, the power signal is generated in the full-bridge, for example, by chopping the 250V DC power signal through the MOSFET tube.

[0056] Among them, in order to obtain higher switching frequency and smaller dead zone time to reduce waveform distortion, the full-bridge circuit is realized by GaN MOSFET gallium nitride field effect tube. The heat sink of the field effect tube adopts specially designed aluminum alloy fins.

[0057] Further, the dead zone setting circuit can include an AND gate chip, a NOT gate chip and two RC resistance and capacitance circuits. Among them, the AND gate chip and the NOT gate chip are used to input the square wave signal respectively to obtain first and second complementary signals with a phase difference of 180 degrees; the two RC circuits are electrically connected to the first and second complementary signals respectively, and by adjusting the resistance value of the variable resistor in the RC circuit, the frequency response characteristic of the RC circuit is changed to adjust the dead zone time.

[0058] Figure 7 A circuit schematic diagram of a dead zone setting circuit provided by an embodiment of the present application is shown in Figure 7As shown, the dead zone setting circuit includes an AND gate chip U4 and a NOT gate chip U5. The input square wave signal is divided into two paths. One path is connected to the first pin and the second pin of the AND gate chip U4, and the other path is connected to the second pin of the NOT gate chip U5. The third pin of the AND gate chip U4 is grounded, the fourth pin of the AND gate chip U4 is connected to the first end of the first RC circuit, the fifth pin of the AND gate chip U4 is connected to the input voltage 5V and one end of the capacitor C6, respectively, and the other end of the capacitor C6 is grounded. The other end of the first RC circuit is connected to one end of the capacitor C8 and the second pin of the output port P4, respectively, and the other end of the capacitor C8 is grounded. The first pin of the output port P4 is grounded. The first RC circuit includes a parallel connection of a zener diode D1, a series connection of resistors R14 and R15, a series connection of resistors R16 and R17, and a variable resistor R18. The third pin of the NOT gate chip U5 is grounded, the fifth pin of the NOT gate chip U5 is connected to the input voltage 5V and one end of the capacitor C7, respectively, and the other end of the capacitor C7 is grounded. The fourth pin of the NOT gate chip U5 is connected to the first end of the second RC circuit, the second end of the second RC circuit is connected to one end of the capacitor C9 and the second pin of the output port P3, respectively, and the other end of the capacitor C9 is grounded. The first pin of the output port P3 is grounded. The second RC circuit includes a parallel connection of a zener diode D2, a series connection of resistors R19 and R20, a series connection of resistors R21 and R22, and a variable resistor R23.

[0059] The dead zone setting circuit can also be used to generate complementary square waves. The chip U4 is an AND gate, and the chip U5 is a NOT gate. The square wave signals are input into the AND gate and the NOT gate, respectively, to obtain two complementary square waves with a phase difference of 180°. The circuit after the logic gate is used to adjust the dead zone time, and is realized by using an RC circuit. By adjusting the resistance value of the variable resistor, the frequency response characteristic of the RC circuit can be changed to obtain different phase delay effects.

[0060] Further, the isolation driving circuit includes an isolation driving chip and a buffer circuit. The isolation driving chip is configured to input the square wave signal and output a driving signal to a field effect transistor of the full-bridge circuit. The buffer circuit is configured to form a negative voltage signal and buffer a spike caused by conduction cross-talk of two field effect transistors in the full-bridge circuit.

[0061] Figure 8 A circuit schematic diagram of an isolation driving circuit provided by the embodiment is shown in FIG. 2. Figure 8As shown, the isolation drive circuit includes an isolation drive chip U6, the feet 1, 4, 5, 8 and 11 of the isolation drive chip U6 are grounded, the foot 6 of the isolation drive chip U6 is connected to the ground after the parallel connection of the capacitor C12 and the resistor R25, the foot 2 of the isolation drive chip U6 inputs the signal output by the dead zone setting circuit, the foot 7 of the isolation drive chip U6 is connected to one end of the resistor R24 and one end of the capacitor C11, the other end of the resistor R24 is connected to the input voltage 5V and one end of the capacitor C10, the other end of the capacitor C10 is connected to the ground and the other end of the capacitor C11, the foot 9 of the isolation drive chip U6 is connected to one end of the resistor R27, the other end of the resistor R27 is connected to one end of the resistor R30, the gate of the field effect tube Q1, one end of the resistor R29 and one end of the capacitor C15, the feet 10 and 13 of the isolation drive chip U6 are connected to the input voltage 9V, the input voltage 9V is also connected to one end of the capacitor C13, the cathode of the rectifier diode D3, one end of the resistor R28 and the other end of the resistor R29, the other end of the resistor R28 and the anode of the rectifier diode D3 are both connected to the other end of the capacitor C15, the other end of the capacitor C13 is grounded, the foot 12 of the isolation drive chip U6 is connected to one end of the resistor R26, the other end of the resistor R26 is connected to the other end of the resistor R30 and one end of the capacitor C14, the other end of the capacitor C14 is grounded, and the other end of the resistor R30 is also connected to the source level of the field effect tube Q1.

[0062] For example, the isolation drive circuit can convert a 200k-400k square wave signal into a driving signal that can drive a gallium nitride mos tube. The left side of the isolation drive chip inputs a square wave signal, and the right side of the OUTG pin outputs a driving signal to the gate of the mos tube. Since the threshold voltage of the gallium nitride mos tube is very low, about 0.9V-1.2V, a negative voltage signal can be formed by a specific resistor and capacitor to buffer the spikes caused by the cross talk of the upper and lower tubes and reduce the risk of mis-conduction of the mos tubes on the same side.

[0063] In some embodiments, when the output signal current of the power amplifier module is too large, there is a risk of instantaneous burnout of the power amplifier module, and the reaction time of the software protection detection and shutdown output cannot meet the instantaneous protection. Therefore, a hardware automatic overcurrent protection circuit combined with a D flip-flop is designed, which has the advantages of fast response, stable state and low design cost.

[0064] Figure 9 A structure diagram of a current detection unit provided by an embodiment of the present application is shown in the figure. Figure 9 The current detection unit shown in the figure is used for output current detection of the power amplification unit; the current detection unit is connected to the circuit of the output current of the power amplification unit; the current detection unit comprises a threshold setting circuit, a comparator, a D flip-flop and an overcurrent protection circuit.

[0065] The threshold setting circuit is used to set a voltage threshold for determining whether the output current of the power amplifier unit is overcurrent. The comparator outputs a high level when the amplitude of the current signal of the power amplifier unit after coupling attenuation at the non-inverting input reaches the preset voltage threshold. The D flip-flop changes the output level state when the comparator outputs a high level. The overcurrent protection circuit cuts off the corresponding output circuit after the level state of the D flip-flop output changes, thus achieving hardware protection. The hardware protection process includes receiving a current detection signal, performing threshold judgment, trigger control, logic processing, and finally controlling the output.

[0066] Figure 10 This is a circuit diagram of a current detection unit provided in an embodiment of this application, as shown below. Figure 10As shown, the current detection unit includes a comparator U7, a D flip-flop U8, a NOT gate U9, a first AND gate U10, and a second AND gate U11. Pin 4 of comparator U7 is connected to one end of the third RC circuit and one end of resistor R34. The other end of resistor R34 is connected to the input voltage +5V. The other end of the third RC circuit is grounded. The third RC circuit includes resistors R31, R32, and R33 connected in parallel, and capacitor C16. Pin 3 of comparator U7 is connected to one end of resistor R35. The other end of resistor R35 is connected to the input voltage... The signal is connected to one end of resistor R36, the other end of resistor R36 is grounded, pin 2 of comparator U7 is grounded, pin 5 of comparator U7 is connected to the input voltage +5V and one end of capacitor C17, the other end of capacitor C17 is grounded, pin 1 of comparator U7 is connected to pin 1 of D flip-flop U8, pin 2 of D flip-flop U8 is grounded, pin 3 of D flip-flop U8 is connected to the input voltage +5V, pin 6 of D flip-flop U8 is connected to the -CLR clock signal, and pin 5 of D flip-flop U8 is connected to the input voltage +5V and capacitor C18. At one end, the other end of capacitor C18 is grounded. Pin 4 of D flip-flop U8 is connected to pin 2 of NOT gate U9. Pin 3 of NOT gate U9 is grounded. Pin 4 of NOT gate U9 is connected to signal-1. Pin 5 of NOT gate U9 is connected to the input voltage +5V and one end of capacitor C19. The other end of capacitor C19 is grounded. Pin 1 of first AND gate U10 is connected to signal-1. Pin 2 of signal-1 is connected to signalSignal. Pin 3 of first AND gate U10 is grounded. Pin 4 of first AND gate U10 is connected to... Connect the signal Signal-2. Pin 5 of the first AND gate U10 is connected to one end of capacitor C20 and the input voltage +5V, and the other end of capacitor C20 is grounded. Pin 1 of the second AND gate U11 is connected to the Cont signal. Pin 2 of the second AND gate U11 is connected to the Signal-2 signal. Pin 3 of the second AND gate U11 is grounded. Pin 4 of the second AND gate U11 is connected to the Signal-3 signal. Pin 5 of the second AND gate U11 is connected to one end of capacitor C21 and the input voltage +5V, and the other end of capacitor C21 is grounded.

[0067] It should be noted that the threshold value is determined by the threshold setting circuit in the upper left corner, and the threshold voltage is calculated using the following formula: Where V D It is 5V, by Figure 10The threshold voltage is calculated to be 4V based on the component values. The input at the non-inverting input is the coupled and attenuated power current signal. When the signal amplitude at the non-inverting input reaches the preset threshold voltage, the comparator outputs a high level. This high level can be considered a rising edge signal, causing the D flip-flop to change state, Q = D. At this time, the D flip-flop outputs a high level, entering the NOT gate. The NOT gate outputs a low level, entering port B of AND gate 1, cutting off the output of AND gate 1, thus realizing hardware protection. The initial state of the D flip-flop is controlled by the microcontroller. When the power amplifier module is powered on and initialized, the microcontroller sends a reset signal to the D flip-flop, causing the D flip-flop output to be low, opening the signal path. The microcontroller can also detect whether hardware protection has occurred. If it detects that the output of the D flip-flop is high, it can determine that hardware protection has been triggered.

[0068] The medium- and long-wave signal processing device provided in this embodiment adopts a structure technology of full-bridge + DC blocking capacitor + high-frequency transformer boost + balun transformer + multi-stage LC filter in the power amplifier unit. This not only reduces the size of the power amplifier module, but also greatly reduces power loss, resulting in less heat generation and higher amplification efficiency of the power amplifier.

[0069] This application also provides a medium- and long-wave signal processing system, including the medium- and long-wave signal processing device in the above embodiments.

[0070] Figure 11 This application provides a schematic diagram of the structure of a medium- and long-wavelength signal processing system, as shown in the embodiments. Figure 11 As shown, the system consists of a service module, a power amplifier module, a filtering module, and a power supply module. The service module primarily monitors the operation of the power amplifier module, generates modulated radio frequency signals (i.e., excitation signals), and processes the received signals. The power amplifier module primarily converts the radio frequency signals into switching signals of the same frequency and amplifies them. The filtering module primarily filters out harmonic components from the switching signals and transmits the signals through the antenna. The power supply module primarily provides DC voltage to the service module, power amplifier module, and filtering module. The following example illustrates a medium- and long-wave signal processing system.

[0071] For example, if the output voltage is u(t) and the output current is i(t), then the instantaneous power p(t) is:

[0072] p(t) = u(t)i(t); Let Since the load is R = 50Ω, i.e., a resistive load, then: Peak power is: p = 2UI, active power P can be expressed as: According to the specifications, if the active power is 5000W, then: the amplitude of the output voltage u(t) is... The voltage is 710V, and the amplitude of the output current is [value missing]. The current rating is 15A. Based on the task requirements and the above calculations, the power amplification requirements are: voltage gain: adjustable; output voltage: ≥710V; output current: ≥15A; active power: 5000W; bandwidth: 200kHz~400kHz. When the input voltage is +250V, the power requirements are met. A full-bridge + DC blocking capacitor + high-frequency transformer + balun transformer + multi-stage LC filter structure can be adopted. The power supply module provides DC 24V and DC 250V to the service module, power amplifier module, and filter module. The system has advantages such as a large gain adjustment range, output isolation, and simple circuitry. Based on the flat design concept, it adopts a structure with three full-bridge circuits connected in parallel at the input and a high-frequency transformer connected in series at the output, achieving a higher power output.

[0073] The power supply module's DC-DC power supply adopts a fully isolated design, including internal and external power supply isolation (inside and outside the chassis), strong and weak current isolation, and analog and digital power supply isolation, to ensure system stability and reliability. The power amplifier module's conditioning and comparator units, power amplification units, etc., achieve power and input signal isolation through isolation transformers, isolated DC-DC chips, linear LDOs, or high-speed optocouplers.

[0074] In some embodiments, the medium- and long-wave signal processing system may further include a core controller, i.e., a monitoring unit. The core controller can receive control commands from the host computer, such as start / stop control, through a communication interface. The core controller can locally display status information such as power and temperature, and can also transmit this information to the host computer. The core controller can perform handshake communication with the host computer through I / O according to a defined protocol to transmit relevant status information.

[0075] Figure 12 This application provides a connection diagram of a core controller according to an embodiment of the present application, as shown below. Figure 12 As shown, the core controller can connect to fuse detection signals, temperature detection signals, power detection signals, status display signals, communication interfaces, handshake I / O signals with the host computer, power management, and other status detection information.

[0076] For example, the core controller's functionality may include:

[0077] (1) Power amplifier module output power detection

[0078] A high-power dual-directional coupler based on lumped parameter design is used to detect the actual output power of the power amplifier module. This coupler can be used to collect both forward and reverse power, has good coupling, low coupling output distortion, and accurate detection data.

[0079] For example, the AD637 RMS detector can be used for output power detection. The AD637 is a complete, high-precision, single-chip RMS DC-DC converter capable of calculating the true RMS value of any complex waveform. It offers unprecedented performance for integrated circuit RMS DC-DC converters, with accuracy, bandwidth, and dynamic range comparable to discrete and modular designs. The AD637 provides crest factor compensation, allowing signal measurements with a crest factor of up to 10 and additional error of less than 1%. Its wide bandwidth allows measurement of input signals with an RMS of 200mV and frequencies up to 600kHz, as well as input signals with an RMS of 1V and frequencies up to 8MHz.

[0080] (2) Power amplifier temperature / fuse status detection

[0081] Power amplifier temperature needs to be monitored in real time, especially for heat-generating components such as MOSFETs. Overheating can degrade device performance or even damage it. This embodiment monitors the power amplifier module temperature using a temperature sensor, such as a DS18B20, installed near the heatsink. Fuse status is detected by sensing the voltage difference across the fuse.

[0082] (3) Power amplifier overcurrent hardware protection

[0083] When the output signal current of the power amplifier is too high, there is a risk of instantaneous burnout of the power amplifier. The response time of software protection detection and output shutdown is typically insufficient for instantaneous protection. Therefore, a hardware automatic overcurrent protection circuit incorporating a D flip-flop was designed, referencing... Figure 10 The corresponding embodiments are described, which have the advantages of fast response, stable state, and low design cost.

[0084] (4) Power Amplifier Software Interface

[0085] The physical layer can use an RS422 serial port with a data format of 1 start bit, 8 data bits, 1 stop bit, no parity, 19200 baud rate, and TTL 3.3V level. The interface chip can be the Shanghai Yinglian UM3491EESE chip, with data bytes formatted from least significant bit to most significant bit. The interface protocols for data frame format, amplifier status query format, amplifier status response format, amplifier power query format, amplifier power response format, tuning mode setting format, and tuning mode response format can be agreed upon or customized by the user.

[0086] (5) The system is equipped with a protection circuit.

[0087] The protection circuit includes input overvoltage / undervoltage / open circuit protection, input overcurrent / short circuit protection; output overvoltage protection, output overcurrent / short circuit protection, output open circuit protection; bridge circuit spike voltage protection; system over-temperature protection, etc. Bridge circuit spike voltage is caused by rapid current change rate and lead parasitic inductance, which is mitigated through RCD buffer circuits and reasonable PCB loop design. System heat-generating components, especially MOSFET switching devices, can cause over-temperature due to switching losses; this is mitigated through good heat dissipation design, and over-temperature alarms and protection are implemented through temperature detection. Input and output current short circuits are prevented by using fuses. Overvoltage and undervoltage protection for input and output are implemented using software protection measures. The software protection uses sensors to monitor input and output voltages in real time; when an abnormality is detected, the power amplifier output is interrupted and information is reported.

[0088] (6) The system is also equipped with a relay module.

[0089] The relay module in this system is mainly divided into two parts: a filter switching circuit and an antenna switching circuit. This module can switch between the filter and the antenna through a host computer interface according to the user's real-time needs.

[0090] 1) Filter switching circuit

[0091] Figure 13 A schematic diagram of a relay structure is provided for an embodiment of this application, such as... Figure 13 As shown, the filter switching relay consists of an input relay and an output relay. To ensure that there is always a filter connected to the circuit, both relays are controlled by the same control signal, thus achieving simultaneous switching of the relays.

[0092] The filter switching modes are shown in Table 1 below.

[0093] Filter type Control signal Filter 1 0 Filter 2 1

[0094] Table 1 Filter Switching Mode Table

[0095] When the control signal is low, the relay is normally closed and NC-COM is turned on, at which time filter 1 is connected; when the control signal is high, the relay is normally open and NO-COM is turned on, at which time filter 2 is connected.

[0096] 2) Antenna switching circuit.

[0097] Figure 14 This is a schematic diagram of an antenna switching circuit structure provided in an embodiment of this application, as shown below. Figure 14 As shown, the antenna switching circuit consists of three relays, which are controlled by three different control signals, enabling the switching between broadband antenna, emergency antenna, and receiving antenna.

[0098] The antenna switching modes are shown in Table 2 below:

[0099] Antenna type Control signal 1 Control signal 2 Control signal 3 Broadband antenna 1 0 X Emergency antenna 1 1 X Receiving antenna X X 1

[0100] Table 2 Antenna Switching Modes

[0101] In summary, the medium- and long-wave signal processing system adopts comprehensive and complete monitoring and protection technologies. Most of the circuits are implemented using digital circuits, and most of the monitoring information is transmitted through digital signals. Compared with the existing domestic technologies that generally use analog circuits, it has higher stability and is less susceptible to crosstalk between signals.

[0102] Furthermore, by researching and applying technologies such as digital temperature sampling and reporting, signal monitoring and reporting, overcurrent, overvoltage, and overheat protection, open circuit and short circuit protection, power, current, voltage, and fuse status display, and external control automatic adjustment of output power, the system has more complete and comprehensive monitoring and protection functions.

[0103] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A device for processing a medium-long wave signal, characterized by comprising: The power amplifier module and the filter module, the power amplifier module includes a conditioning comparison unit, an isolation driving unit, a power amplifier unit and a mode adjustment unit, the power amplifier unit includes at least two groups of power amplifier circuits connected in parallel, each group of the power amplifier circuit includes a full-bridge circuit, a blocking capacitor and a high-frequency transformer connected in series, wherein, The conditioning comparison unit is used for converting an excitation signal into a square wave signal of the same frequency. The isolation driving unit is used for converting a driving signal of a high-side field effect tube and a low-side field effect tube of the full-bridge circuit and setting a dead time according to the square wave signal. The power amplifier unit is used for driving the four field effect tubes of the full-bridge circuit to generate a bipolar square wave signal according to the driving signal, passing the square wave signal through the blocking capacitor for AC passing, and then passing the square wave signal through the high-frequency transformer for voltage boosting, so as to obtain a target voltage square wave signal after power superposition topology of at least two groups of the power amplifier circuit. The mode adjustment unit is used for signal transmission mode conversion and impedance conversion on the target voltage square wave signal to obtain a target voltage adjustment signal. The filter module is used for filtering high-order harmonics in the target voltage adjustment signal to obtain a target voltage sine signal. The conditioning comparison unit includes a high-frequency isolation transformer, a same-phase amplification circuit and a voltage comparator connected in sequence, wherein, The high-frequency isolation transformer is used for isolation from a front-stage excitation signal source and transmission of the excitation signal. The same-phase amplification circuit is used for amplifying the excitation signal, so that the amplitude of the amplified excitation signal reaches an input threshold of the voltage comparator. The voltage comparator is used for converting the amplified excitation signal into a square wave signal of the same frequency. The isolation driving unit includes at least eight dead time setting circuits and eight isolation driving circuits, one field effect tube in the full-bridge circuit, one dead time setting circuit and one isolation driving circuit are connected in sequence.

2. The apparatus of claim 1, wherein, The dead time setting circuit includes an AND gate chip, a NOT gate chip and two RC resistance-capacitance circuits, wherein, 3. The apparatus of claim 2, wherein, The AND gate chip and the NOT gate chip are used for inputting the square wave signal respectively to obtain a first complementary signal and a second complementary signal with a phase difference of 180 degrees. The two RC resistance-capacitance circuits are electrically connected to the first complementary signal and the second complementary signal respectively, and the frequency response characteristic of the RC resistance-capacitance circuit is changed by adjusting the resistance value of the variable resistor in the RC resistance-capacitance circuit to adjust the dead time. The isolation driving circuit includes an isolation driving chip and a buffer circuit, wherein, 4. The apparatus of claim 2, wherein, The isolation driving chip is used for inputting the square wave signal and outputting a driving signal to the four field effect tubes of the full-bridge circuit. The buffer circuit is used for forming a negative voltage signal and buffering a spike caused by two field effect tubes in the full-bridge circuit. The mode adjustment unit includes a balun transformer.

5. The apparatus of claim 1, wherein, The filter module includes an LC low-pass filter.

6. The apparatus of claim 1, wherein, The field effect tube in the full-bridge circuit adopts a gallium nitride field effect tube (GaN MOSFET).

7. The apparatus of claim 1, wherein, Further includes:

8. The apparatus of claim 1, wherein, ​ A current detection unit for detecting output current of the power amplification unit; The current detection unit comprises a threshold setting circuit, a comparator, a D flip-flop and an overcurrent protection circuit, wherein The threshold setting circuit is configured to set a voltage threshold for judging whether the output current of the power amplification unit is overcurrent; The comparator is configured to output a high level when the amplitude of the current signal of the power amplification unit after coupling attenuation at the in-phase terminal reaches a preset voltage threshold; The D flip-flop is configured to change the level state of the output when the high level of the output of the comparator is detected; The overcurrent protection circuit is configured to cut off the corresponding output circuit after the level state of the output of the D flip-flop is changed, thereby realizing hardware protection.

9. A system for processing mid-long wave signals, characterized by The medium-long wave signal processing device according to any one of claims 1-8.

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