Breakdown Current Detection and Protection Circuit

Abstract

The breakdown protection circuit includes a current sensor that provides a sensor signal, and the current sensor is connected to the comparator (230) input via at least one load resistor (120). The switch protection circuit (250) includes a protection input connected to the output of the comparator and a plurality of outputs. Each output is connected to a corresponding switch (270) in a plurality of stacked switches. The switch protection circuit is configured to drive each of the plurality of stacked switches to open in response to a positive output signal (240) from the comparator.

Description

Technical Field

[0001] The present disclosure generally relates to overcurrent protection systems, and more particularly to an overcurrent protection system for protecting against breakdown conditions.

[0002] Statement Regarding Federally Sponsored Research or Development

[0003] Sponsored Research and Development

[0004] This invention was made with government support under NASA contract number NNC16CA21C. The government has certain rights in the invention. Background Art

[0005] Space fairing vehicles and satellites are exposed to radiation events that exceed those naturally present within the Earth's atmosphere. When such an event occurs, the event can disrupt certain types of electronic devices on a spacefaring vehicle. One type of electronic device that is subject to such disruption is a transistor, such as a MOSFET. Alternatively, other types of transistors may conduct incorrectly either directly via the radiation event or due to other circuit failures induced by the event.

[0006] When stacked transistors conduct simultaneously, an unwanted circuit connection is created, and the unwanted circuit connection can lead to a breakdown event. The breakdown event causes a high-current overstress condition, which can damage or destroy circuit components and / or any device or conductor that thus receives the high-current overstress during the breakdown event. Summary of the Invention

[0007] In one exemplary embodiment, a breakdown protection circuit includes: a current sensor that provides a sensor signal and is connected to a comparator input via at least one load resistor; a switch protection circuit that includes a protection input connected to the comparator output and a plurality of outputs, each output connected to a corresponding switch in a plurality of stacked switches, and wherein the switch protection circuit is configured to drive each switch in the plurality of stacked switches to open in response to a positive output signal from the comparator.

[0008] In another example of the above breakdown protection circuit, the switch protection circuit includes a transformer.

[0009] In another example of any of the above breakdown protection circuits, the current sensor is connected to the comparator input via a load resistor and an inductor.

[0010] In another example of any of the above breakdown protection circuits, the load resistor and the inductor are in series.

[0011] In another example of any of the above breakdown protection circuits, the connection between the comparator input and the current sensor omits an inductor.

[0012] In another example of any of the above breakdown protection circuits, the switch protection circuit includes an isolation transformer.

[0013] In another example of any of the above breakdown protection circuits, the isolation transformer includes an input winding connected to the comparator output and a plurality of output windings, each output winding corresponding to one of the plurality of stacked switches.

[0014] In another example of any of the above breakdown protection circuits, each of the plurality of stacked switches is a semiconductor switch.

[0015] In another example of any of the above breakdown protection circuits, the comparator further includes a reference voltage input, and wherein the comparator is configured to output a signal in response to the voltage at the comparator input exceeding the voltage at the reference input.

[0016] In another example of any of the above breakdown protection circuits, the comparator includes an internal reference voltage, and wherein the comparator is configured to output a signal in response to the comparator input exceeding the internal reference voltage.

[0017] In another example of any of the above breakdown protection circuits, the plurality of stacked switches are spacecraft power converter switches.

[0018] An exemplary method for protecting a set of stacked switches includes detecting a current using a current sensor, converting the current sensor to a voltage using a load resistor, and in response to the voltage exceeding a reference voltage, driving each switch in the set of stacked switches to open.

[0019] In another example of the above method for protecting a set of stacked switches, converting the current sensor to a voltage using a load resistor includes using a load resistor and an inductor.

[0020] In another example of any of the above methods for protecting a set of stacked switches, converting the current sensor to a voltage includes causing the current sensor output to pass through an inductor and a load resistor, thereby generating a voltage at the comparator input, and comparing the voltage with a reference voltage.

[0021] Another example of any of the above methods for protecting a set of stacked switches further includes generating a comparator output in response to the voltage exceeding the reference voltage, and providing the comparator output to the input winding of an isolation transformer.

[0022] Another example of any of the above methods for protecting a set of stacked switches further includes connecting a plurality of output windings of an isolation transformer to corresponding switches such that each output winding drives the corresponding switch to open in response to the comparator output being received by the input winding.

[0023] Another example of any of the above methods for protecting a set of stacked switches further includes resuming standard operation of the set of stacked switches after the voltage falls below a reference voltage.

[0024] Another example of any of the above methods for protecting a set of stacked switches further includes delaying the resumption of standard operation of the set of stacked switches after the voltage has fallen below a reference voltage for a predetermined delay period.

[0025] These and other features of the invention may be best understood from the following specification and drawings, which are briefly described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 An exemplary satellite including a plurality of on-board electronic components is illustrated.

[0027] Figure 2 An overcurrent detection circuit according to one example is schematically illustrated and is configured to provide protection against overshoot conditions.

[0028] Figure 3 Schematically illustrates for implementing Figure 2 A detailed example circuit of an overcurrent detection circuit.

[0029] Figure 4 Illustrates a method for operating an overcurrent slope detection circuit for Figure 2 and Figure 3 DETAILED DESCRIPTION

[0030] Figure 1 Schematically illustrates satellite 10, which includes a power source 20 that provides power to a high-power load 30 via a power distribution circuit 40. By way of example, high-power load 30 may include an electric propulsion unit. In alternative examples, any other high-power load 30 may be protected from overcurrent breakdown in the same manner as described herein.

[0031] The inclusion of electric propulsion and other high-power loads on a spacecraft creates a need to incorporate a high-power source 20 within the spacecraft 10. At typical power levels for such devices, power circuit topologies that are immune to breakdown events and / or otherwise resistant to breakdown events are impractical for handling the power regulation and distribution of the necessary systems 30. Instead, converters including full-bridge circuit topologies and other similar switching networks are used to regulate and distribute power.

[0032] Full-bridge topologies and other switch-based topologies including stacked switches are subject to breakdown vulnerability due to the stacked nature of the switches. As used herein, a pair of stacked switches are vertically stacked (as illustrated in a circuit diagram) switches placed directly across the input bus. In standard operation, the topology functions because at any given time, only one stacked switch within a given stack will be closed. In a space application, or in any other situation where a radiation event may occur, it is possible that during the duration of a radiation event or during the recovery of a drive circuit affected by a radiation event, two switches within a single stack will close simultaneously.

[0033] When two switches within a single stack close simultaneously, a direct short circuit is created across the input power bus, and the current through the switches rapidly rises. The rapid rise in current can damage the switches in less than a few hundred nanoseconds. Due to the speed of the current rise and the short time period before the stacked switches are damaged, the power distribution circuit 40 includes a protection circuit that detects high primary current and differentiates the high primary current from other currents by detecting a high di / dt (change in current with respect to time) in the current signal and responding before permanent damage is incurred.

[0034] Once a high di / dt is detected, the protection circuit provides an override to the control inputs of the switches within the stacked switches. The override drives the voltage at the control input of each switch down, thereby opening all the switches within the stack as quickly as possible. Once all the switches have been opened, the control circuit maintains the switches open for a predetermined delay, after which normal operation resumes. The predetermined delay can be any duration that is long enough for the expected radiation event to dissipate and for the circuit to fully recover, and short enough to minimize interference with the operation of the load 30.

[0035] Continue to refer to Figure 1 , Figure 2Schematically illustrates an exemplary detection circuit 100 for detecting and responding to overcurrent due to a breakdown condition attributed to simultaneous closure of stacked transistors 170. A current sensor provides a signal to input 110 of detection circuit 100. Current passes through inductor 122 and resistor 120, generating a detection voltage across inductor 122 and resistor 120. The voltage difference is applied to comparator 130 via a pair of inputs 132, 133. Comparator 130 compares the voltages at inputs 132, 133 with the voltage at reference input 134 and determines when the voltages from current sensor 110 (at inputs 132, 133) and load resistor 120 exceed the reference voltage. In an alternative example, the reference voltage may be stored inside comparator 130, and the constant reference voltage input 134 may be omitted.

[0036] In some examples, an optional inductor 122 in series with resistor 120 may be included in cases where faster detection is needed or where a detection means is needed to make a clearer distinction between breakdown events and other allowable high - current events. Inductor 122 increases the detection speed by further driving up the voltage at input 132 in response to an increase in di / dt, while resistor 120 increases the voltage in response to an increase in current i. In some examples, including inductor 122 can reduce the response time of the comparator by approximately 85 nanoseconds, bringing the total response time of circuit 100 below 200 nanoseconds. In one specific example, the total response time of circuit 100 from start to shutdown is approximately 160 nanoseconds, where the post - detection response time is approximately 100 nanoseconds.

[0037] When the voltage at input 132 exceeds the threshold set by the reference voltage, comparator 130 outputs a high signal from output pin 136. The high signal 140 is provided to switch protection transformer 150 at protection input 152. Switch protection transformer 150 is connected to the control signal 160 of each of a plurality of stacked switches 170 and is configured to respond to the high input on protection input 152 by driving the control input 160 to a low value and forcing switches 170 to open, thereby preventing current from flowing through switches 170.

[0038] Continuing to refer Figure 2 , Figure 3 more specifically schematically illustrates Figure 2 an example configuration of Figure 2, the initial detection of the breakdown current is performed by a comparator 230 that receives the input voltage generated by a load resistor 220 and an inductor 222. When an increase in voltage is detected, the comparator 230 outputs a signal 240 to a transformer 250. In response to receiving the signal 240 at the transformer 250, the transformer electrically isolates a switch 270 and causes current to be driven to the control input of the switch 270, thereby turning off (opening) the switch 270.

[0039] Reference Figure 2 and Figure 3 For both examples of

[0040] Continuing reference Figures 1-3 , Figure 4 illustrates a method 300 for operating Figures 1-3 a system. Initially, in a "Detect Current Spike" step 310, a current spike is detected by comparing a voltage input against a reference voltage using a comparator. When the detected voltage exceeds the reference voltage, the comparator outputs an override signal in an "Output Override" step 320. In a "Drive Transistor Off" step 330, the override signal overrides the control input signal and forces the switches 170, 270 in the stack to open.

[0041] Once driven off, the transistor remains off for a delay period in a "Delay" step 340. As long as the breakdown event is occurring, the load resistors 120, 220 maintain the voltage at the comparator input 132. In such an example, the delay is maintained for exactly that length plus the propagation time. In an alternative example, the comparator can include a delay latch that latches the output for a period of time other than when the comparator 130 stops detecting an input voltage that exceeds the reference voltage. In such an example, the additional delay provided by the latch allows for circuit recovery, system reset, and / or any other necessary operations to occur before resuming standard operation in a "Resume Standard Operation" step 350.

[0042] The incorporation of the breakdown protection circuit described herein allows the response time of the protection circuit to be reduced to less than 100 nanoseconds after detection. The further incorporation of inductors 122, 222 reduces the pre-detection time from 145 nanoseconds to 80 nanoseconds. The reduced response time helps prevent switch burnout.

[0043] Although in Figure 2 and Figure 3An exemplary circuit is illustrated as including two stacked transistors, but it should be appreciated that the above breakdown detection and response can be applied to any number of stacked switches and is not limited to the implementation of the two-transistor example.

[0044] In addition, although described within the specific context of spacecraft and satellites, it should be appreciated that breakdown protection operates in any situation where a breakdown event may occur - including in ground-based applications that are subject to radiation events.

[0045] Further, it should be understood that any of the above concepts can be used alone or in combination with any or all of the other above concepts. Although embodiments of the invention have been disclosed, those of ordinary skill in the art will recognize that certain modifications will fall within the scope of the invention. For this reason, the following claims should be studied to determine the true scope and content of the invention.

Claims

1. A breakdown protection circuit, comprising: a plurality of stacked switches; a current sensor configured to detect a current flowing through the plurality of stacked switches and output a sensor signal based on the detected current; a detection circuit configured to receive the sensor signal from the current sensor, the detection circuit including a comparator, a load resistor, and an inductor, wherein the inductor is connected in series with the load resistor, and wherein a first end of the inductor is configured to be connected to the current sensor, and a second end of the inductor is connected to a first end of the load resistor such that the sensor signal from the current sensor flows through both the load resistor and the inductor, wherein the comparator includes a first input connected to the current sensor and the first end of the inductor and a second input connected to a second end of the load resistor, and wherein the comparator outputs a positive output signal in response to a voltage difference between the load resistor and the inductor exceeding a reference voltage; a switch protection circuit including a protection input connected to the comparator output and a plurality of outputs, each of the plurality of outputs being connected to a corresponding switch of the plurality of stacked switches; and wherein the switch protection circuit is configured to drive each switch of the plurality of stacked switches to open in response to the positive output signal from the comparator, wherein the inductor increases the detection speed by driving the voltage at the first input upward in response to an increase in the current flowing through the plurality of stacked switches over time.

2. The breakdown protection circuit according to claim 1, wherein the switch protection circuit includes a transformer.

3. The breakdown protection circuit according to claim 1, wherein the switch protection circuit includes an isolation transformer.

4. The breakdown protection circuit according to claim 3, wherein the isolation transformer includes an input winding connected to the comparator output and a plurality of output windings, each of the output windings corresponding to one of the plurality of stacked switches.

5. The breakdown protection circuit according to claim 1, wherein each switch of the plurality of stacked switches is a semiconductor switch.

6. The breakdown protection circuit according to claim 1, wherein the plurality of stacked switches are spacecraft power converter switches.

7. A method for protecting a set of stacked switches by using the breakdown protection circuit according to any one of claims 1 to 6, comprising: detecting a current flowing through a set of stacked switches by using a current sensor; receiving, by using a detection circuit, a signal output from the current sensor; causing the signal from the current sensor to flow through a load resistor and an inductor connected in series with the load resistor; receiving, at a first input of a comparator of the detection circuit, a signal output from the current sensor, and receiving, at a second input of the comparator, a signal from the load resistor; outputting an output signal from the comparator in response to a voltage difference between the load resistor and the inductor exceeding a reference voltage; and driving each switch of the set of stacked switches to open in response to the output signal of the comparator.

8. The method according to claim 7, further comprising providing an output signal from the comparator to an input winding of an isolation transformer.

9. The method according to claim 8, further comprising connecting a plurality of output windings of the isolation transformer to corresponding switches such that each output winding drives the corresponding switch to open in response to the input winding receiving the output signal from the comparator.

10. The method according to claim 7, further comprising resuming standard operation of the set of stacked switches after a voltage difference between the load resistor and the inductor falls below a reference voltage.

11. The method according to claim 10, further comprising delaying resumption of standard operation of the set of stacked switches after the voltage difference between the load resistor and the inductor has fallen below the reference voltage for a predetermined delay period.

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