Semiconductor device with electrical components built into a circuit board

Abstract

A semiconductor device (10) includes a substrate body (12) having a first surface (12a) and a second surface (12b), an electrical component (21, 22) disposed in the substrate body, a first internal conductor pattern (64) disposed in a first circuit layer (L2) between the first surface and the electrical component, and at least one heat absorbing member (90) disposed inside the substrate body and thermally connected with the first internal conductor pattern.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a semiconductor device having an electrical component built in a circuit board. BACKGROUND

[0002] Patent Document 1 discloses a semiconductor device. The semiconductor device includes a substrate body, an electrical component provided in the substrate body, and a conductor pattern on an upper surface of the substrate body. The conductor pattern is thermally connected to the electrical component through a plurality of vias. According to this configuration, heat generated in the electrical component is transferred to the conductor pattern through the plurality of vias, and radiated from the conductor pattern to the outside of the substrate body.

[0003] PRIOR ART DOCUMENTS

[0004] [Patent Document]

[0005] Patent Document 1: JP 2001-85804-A SUMMARY

[0006] In the above structure, the larger the area of the conductor pattern, the higher the heat radiation effect of the conductor pattern. However, if the area of the conductor pattern is increased, a large portion of the surface of the substrate body is mainly occupied by the conductor pattern. In this case, it is difficult to provide other necessary configurations on the remaining surface of the substrate body, and it can be necessary to increase the size of the substrate body. In conceivable structures, it is necessary to increase the size of the semiconductor device to avoid temperature rise of the electrical component, and it is necessary to allow temperature rise of the electrical component to avoid increase in the size of the semiconductor device.

[0007] In view of the above, the present disclosure provides a technique for a semiconductor device having an electrical component built in a circuit board, which can avoid increase in the size of the semiconductor device while suppressing temperature rise of the electrical component.

[0008] The semiconductor device according to the present disclosure includes a substrate body having a first surface and a second surface, an electrical component provided in the substrate body, a first internal conductor pattern provided in a first circuit layer between the first surface and the electrical component, and at least one heat absorbing member provided inside the substrate body and thermally connected to the first internal conductor pattern.

[0009] According to the above configuration, heat generated by the electrical component is transferred to the heat absorbing member in the substrate body through the first internal conductor pattern in the substrate body. As a result, a large portion of the heat generated in the electrical component is diffused in the substrate body, and temperature rise of the electrical component is suppressed. Furthermore, since the first internal conductor pattern and the heat absorbing member are provided in the substrate body, other necessary configurations can be freely arranged on the first surface and the second surface of the substrate body. As a result, increase in the size of the semiconductor device can be avoided.BRIEF DESCRIPTION OF DRAWINGS BRIEF DESCRIPTION OF DRAWINGS

[0010] The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 is a plan view showing a semiconductor device of a first embodiment;

[0012] Figure 2 is a circuit diagram showing a circuit structure of the semiconductor device of the first embodiment;

[0013] Figure 3 is a cross-sectional view taken along line III-III in Figure 1 and, for the sake of clarity, cross-sectional lines of the substrate body are omitted, and further, some overlapping configurations are shown by intentionally changing their positions;

[0014] Figures 4A to 4D is a view showing a modification of a disposition pattern of the second conductor pattern with respect to the surface electrical component;

[0015] Figure 5 is a cross-sectional view showing a configuration of a semiconductor device of a second embodiment;

[0016] Figure 6 is a cross-sectional view showing a configuration of a semiconductor device of a third embodiment;

[0017] Figure 7 is a cross-sectional view showing a configuration of a semiconductor device of a fourth embodiment;

[0018] Figure 8 is a cross-sectional view showing a configuration of a semiconductor device of a fifth embodiment; and

[0019] Figure 9 is a cross-sectional view showing a configuration of a semiconductor device of a sixth embodiment. DETAILED DESCRIPTION

[0020] In one embodiment of the present disclosure, the semiconductor device can further include a first surface conductor pattern 62 disposed in the circuit layer L1 on the first surface and thermally connected with the first internal conductor pattern 62. According to this configuration, heat generated on the first surface of the substrate body is also transferred to the heat absorbing member through the first surface conductor pattern and the first internal conductor pattern. As a result, temperature rise of a heat source located on the first surface, such as an electrical component disposed on the first surface of the substrate body, can be suppressed.

[0021] In the above embodiment, the semiconductor device can further include a surface electrical component 52 provided in the circuit layer on the first surface and controlling the operation of the electrical component. In this case, the first surface conductor pattern can be located close to the surface electrical component. According to this configuration, not only the temperature rise of the electrical component in the substrate main body but also the temperature rise of the surface electrical component controlling the operation of the electrical component can be suppressed.

[0022] In one embodiment of the present disclosure, the at least one heat absorbing member can include a plurality of heat absorbing components. According to this configuration, the plurality of heat absorbing components can absorb and diffuse more heat, and the temperature rise of the electrical component can be further suppressed.

[0023] In one embodiment of the present disclosure, the semiconductor device can further include a second internal conductor layer 74 provided in the circuit layer L5 between the second surface and the electrical component. In this case, the at least one heat absorbing member can be thermally connected to the second internal conductor pattern.

[0024] According to this configuration, the heat generated in the electrical component is further transferred to the heat absorbing member through the second internal conductor pattern. By arranging the electrical component between the first internal conductor pattern and the second internal conductor pattern, the heat generated by the electrical component can be effectively diffused from both sides of the electrical component.

[0025] In one embodiment of the present disclosure, the semiconductor device can further include a second surface conductor pattern 69 arranged in the second circuit layer L6 on the second surface and thermally connected to the second internal conductor pattern. According to this configuration, the heat generated by the electrical component can be transferred to the second surface conductor pattern through the second internal conductor pattern and radiated to the outside from the second surface conductor pattern. Therefore, the temperature rise of the electrical component can be further suppressed.

[0026] In one embodiment of the present disclosure, the at least one heat absorbing member can be made of metal or graphite. Here, the heat absorbing member can not be limited to metal or graphite, and can be a material or structure having higher thermal conductivity than the substrate main body.

[0027] In one embodiment of the present disclosure, the at least one heat absorbing member can have a fluid 91, such as a heat pipe or a heat spreader, enclosed therein. According to this configuration, the heat transfer efficiency in the heat absorbing member is improved, and thus the heat absorbing performance of the heat absorbing member can be effectively enhanced.

[0028] In one embodiment of this disclosure, the semiconductor device may further include a heat transfer via 79 extending from the first internal conductor pattern to the at least one heat-absorbing member. In this case, the material constituting the heat transfer via may have a higher thermal conductivity than the material constituting the substrate body. With this configuration, heat transfer from the first internal conductor pattern to the heat-absorbing member can be effectively enhanced even when the first internal conductor pattern and the heat-absorbing member are located in different layers.

[0029] In one embodiment of this disclosure, the semiconductor device may further include a ground line 63 disposed on a first or second surface of the substrate body. In this case, the first internal conductor pattern may be electrically connected to the ground line in the substrate body. According to this configuration, the potential of the first internal conductor pattern is stable, such that the first internal conductor pattern facing the electrical components also serves as a shielding layer to shield electromagnetic noise radiated from the electrical components.

[0030] In the above embodiments, the material constituting the heat transfer via can be the same as the material constituting the first internal conductor pattern. This configuration simplifies the manufacturing process of the semiconductor device.

[0031] (Example 1)

[0032] The semiconductor device 10 of the first embodiment will be described with reference to the accompanying drawings. The semiconductor device 10 of this embodiment is used, for example, in a power control unit of an electric vehicle and can form part of a power conversion circuit for power conversion between a power source and a drive motor. In this embodiment, "electric vehicle" broadly refers to a vehicle having a motor for driving wheels, and includes, for example, electric vehicles charged by external power, hybrid electric vehicles having an engine in addition to a motor, fuel cell vehicles having a fuel cell as a power source, etc. However, the application of the semiconductor device 10 according to this embodiment is not limited to electric vehicles and can be applied to various electrical devices.

[0033] like Figures 1 to 3 As shown, the semiconductor device 10 includes a substrate body 12, two semiconductor elements 21 and 22, and two heat sinks 31 and 32. The substrate body 12 has a plate-like or sheet-like shape. The substrate body 12 has an upper surface 12a and a lower surface 12b. The lower surface 12b is disposed on the side opposite to the upper surface 12a. The substrate body 12 is made of an insulator such as epoxy resin. The substrate body 12 includes an upper layer 14, an intermediate layer 16, and a lower layer 18 in order from the upper surface 12a to the lower surface 12b. The upper layer 14 is the layer that includes the upper surface 12a of the substrate body 12. The lower layer 18 is the layer that includes the lower surface 12b of the substrate body 12. The intermediate layer 16 is the layer disposed between the upper layer 14 and the lower layer 18.

[0034] The X direction and the Y direction in the drawing are directions parallel to the upper surface 12a and the lower surface 12b of the substrate main body 12, and are directions perpendicular to each other. The Z direction is a direction perpendicular to the upper surface 12a and the lower surface 12b of the substrate main body 12, and is a direction perpendicular to each of the X direction and the Y direction. That is, the above-mentioned upper layer 14, the intermediate layer 16, and the lower layer 18 are stacked in the Z direction.

[0035] The semiconductor elements 21 and 22 and the heat sinks 31 and 32 are electrical components that form part of a circuit in the semiconductor device 10. The two semiconductor elements 21 and 22 are arranged together with the two heat sinks 31 and 32 in the intermediate layer 16 of the substrate main body 12. Each of the semiconductor elements 21 and 22 is a power semiconductor element, particularly a switching element. The switching element can be, for example, an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET).

[0036] The semiconductor elements 21 to 22 have upper surface electrodes 21a to 22a and lower surface electrodes 21b to 22b, respectively, and conduct electricity or block the conduction of electricity between the corresponding upper surface electrodes 21a to 22a and the corresponding lower surface electrodes 21b to 22b, respectively.

[0037] For example, the two semiconductor elements 21 and 22 include a first semiconductor element 21 and a second semiconductor element 22. The first semiconductor element 21 and the second semiconductor element 22 are electrically connected in series within the substrate main body 12. As described above, the two semiconductor elements 21 and 22 are switching elements, such as IGBTs or MOSFETs. The semiconductor device 10 of the present embodiment can form part of, for example, an inverter circuit or a DC-DC converter circuit. The number of semiconductor elements 21 and 22 can not be limited to two. Furthermore, the semiconductor device 10 can include at least one electrical component other than the semiconductor elements 21 and 22 and the heat sinks 31 and 32 or include at least one electrical component in addition to the semiconductor elements 21 and 22 and the heat sinks 31 and 32.

[0038] The two heat spreaders 31 and 32 each have a plate-like shape and are arranged in parallel with the substrate body 12. Each of the heat spreaders 31, 32 is made of a conductor such as copper or other metal. For example, the two heat spreaders 31 and 32 are arranged in the X direction. The two heat spreaders 31 and 32 include a first heat spreader 31 and a second heat spreader 32. The first semiconductor element 21 is arranged on the first heat spreader 31, and the lower surface electrode 21b of the first semiconductor element 21 is electrically connected to the first heat spreader 31. The first semiconductor element 21 and the first heat spreader 31 are integrally bonded to each other and can be interpreted as one electrical component. Similarly, the second semiconductor element 22 is arranged on the second heat spreader 32, and the lower surface electrodes 21b and 22b of the second semiconductor element 22 are electrically connected to the second heat spreader 32. The second semiconductor element 22 and the second heat spreader 32 are integrally bonded to each other and can be interpreted as one electrical component.

[0039] The semiconductor device 10 includes a plurality of terminals 40, 42, 44. These terminals 40, 42, and 44 are external connection terminals for connection to an external circuit. The plurality of terminals 40, 42, 44 is made of a conductor such as copper or other metal. For example, the plurality of terminals 40, 42, and 44 includes a P terminal 40, an N terminal 42, and an O terminal 44. The plurality of terminals 40, 42, and 44 is arranged on the lower surface 12b of the substrate body 12. Here, a part or all of the plurality of terminals 40, 42, and 44 can be arranged on the upper surface 12a of the substrate body 12. As a result, when the first semiconductor element 21 is turned on, the P terminal 40 and the O terminal 44 are electrically connected to each other. On the other hand, when the second semiconductor element 22 is turned on, the N terminal 42 and the O terminal 44 are electrically connected to each other.

[0040] The P terminal 40 is electrically connected to the first heat spreader 31 within the substrate body 12 and is electrically connected to the lower surface electrode 21b of the first semiconductor element 21 through the first heat spreader 31. The N terminal 42 is electrically connected to the upper surface electrode 22a of the second semiconductor element 22 within the substrate body 12. The O terminal 44 is electrically connected to the upper surface electrode 21a of the first semiconductor element 21 and the second heat spreader 32 within the substrate body 12. That is, the O terminal 44 is electrically connected to each of the upper surface electrode 21a of the first semiconductor element 21 and the lower surface electrode 22b of the second semiconductor element 22.

[0041] The substrate body 12 has a plurality of circuit layers L1-L6 to form a multilayer substrate structure. The plurality of circuit layers L1-L6 includes a first circuit layer L1, a second circuit layer L2, a third circuit layer L3, a fourth circuit layer L4, a fifth circuit layer L5, and a sixth circuit layer L6. The first circuit layer L1 is arranged on the upper surface 12a of the substrate body 12. The second circuit layer L2 is arranged in the upper layer 14 of the substrate body 12. The third circuit layer L3 is arranged at a boundary between the upper layer 14 and the intermediate layer 16 of the substrate body 12. The fourth circuit layer L4 is arranged at a boundary between the intermediate layer 16 and the lower layer 18 of the substrate body 12. The fifth circuit layer L5 is arranged in the lower layer 18 of the substrate body 12. The sixth circuit layer L6 is arranged on the lower surface 12b of the substrate body 12.

[0042] The first circuit layer L1 has a plurality of conductor patterns 61, 62, 63. Each of the conductor patterns 61, 62, 63 is made of a conductor such as copper or other metal. The plurality of conductor patterns 61, 62, 63 includes a second conductor pattern 62 and a third conductor pattern 63. A first conductor pattern 61 constitutes a control circuit 50 that controls two semiconductor elements 21 and 22. Accordingly, a plurality of surface electric components 52 is mounted on the first conductor pattern 61. The plurality of surface electric components 52 includes, for example, a gate drive circuit that controls switching of the semiconductor elements 21 and 22.

[0043] The first conductor pattern 61 referred to herein is a general term for one or more conductor patterns required to form the control circuit 50. That is, the first conductor pattern 61 can be a single conductor pattern or a combination of a plurality of conductor patterns. The same applies to the second conductor pattern 62 to the ninth conductor pattern 69 described below. Each of the second conductor pattern 62 to the ninth conductor pattern 69 is a general term for one or more conductor patterns having a common function, and can be a single conductor pattern or a combination of a plurality of conductor patterns.

[0044] The second conductor pattern 62 is disposed close to the surface electric components 52. As a result, heat generated by the surface electric components 52 is designed to be transferred to the second conductor pattern 62. Here, the second conductor pattern 62 is electrically insulated from the first conductor pattern 61 on the upper surface 12a of the substrate body 12 and the surface electric components 52. The third conductor pattern 63 is part of the control circuit 50 and serves as a ground line connected to a ground potential.

[0045] Figures 4A to 4D Some specific examples regarding the disposition of the second conductor pattern 62 are shown. As Figures 4A to 4DThe number of the second conductor patterns 62 and the positional relationship with the surface electrical components 52 can not be particularly limited as shown. The second conductor patterns 62 can be a single region or a combination of a plurality of regions. In addition, the second conductor patterns 62 can be located between two adjacent surface electrical components 52, or can be provided so as to surround one or more surface electrical components 52.

[0046] The second circuit layer L2 has a plurality of conductor patterns 64, 65, 66. Each of the conductor patterns 64, 65, 66 is made of a conductor such as copper or other metal. The plurality of conductor patterns 64, 65, 66 includes a fourth conductor pattern 64, a fifth conductor pattern 65, and a sixth conductor pattern 66. Here, the plurality of conductor patterns 64, 65, 66 is actually provided on the same plane, but is shown as being displaced with respect to each other in the drawing for the sake of illustration. Figure 3 In the drawing, the fourth conductor pattern 64 is intentionally displaced with respect to the fifth conductor pattern 65 and the sixth conductor pattern 66 for the sake of illustration.

[0047] The fourth conductor pattern 64 extends over a large portion of the second circuit layer L2, and is provided so as to face the plurality of semiconductor elements 21 and 22. As a result, heat generated in the semiconductor elements 21 and 22 is diffused to a wide range of the substrate body 12 through the fourth conductor pattern 64. The fourth conductor pattern 64 also functions as a shield layer that shields electromagnetic noise radiated from the semiconductor elements 21 and 22. The fourth conductor pattern 64 is connected to the second conductor pattern 62 of the first circuit layer Ll by one or more first vias 71. In addition, the fourth conductor pattern 64 is also connected to the third conductor pattern 63 of the first circuit layer Ll by one or more second vias 72. The first vias 71 and the second vias 72 are made of a conductor such as copper or other metal. As a result, the fourth conductor pattern 64 is electrically and thermally connected to the second conductor pattern 62 and the third conductor pattern 63 of the first circuit layer Ll.

[0048] As described above, the second conductor pattern 62 of the first circuit layer Ll is provided close to the surface electrical components 52. Therefore, heat generated by the surface electrical components 52 is transferred from the second conductor pattern 62 of the first circuit layer Ll to the fourth conductor pattern 64 through the first vias 71. As a result, heat generated by the surface electrical components 52 is also diffused to a wide range of the substrate body 12 through the fourth conductor pattern 64. In addition, the fourth conductor pattern 64 is electrically connected to the third conductor pattern 63 of the first circuit layer Ll, i.e., the ground line, thereby improving the function of the fourth conductor pattern 64 as a shield layer.

[0049] The fifth conductor pattern 65 is connected to the O terminal 44 through a third via hole 73. Further, the fifth conductor pattern 65 is connected to the upper surface electrode 21a of the first semiconductor element 21 and the second heat sink 32 through two fourth via holes 74. The third via hole 73 and the fourth via hole 74 are made of a conductor such as copper or other metal. As a result, the two semiconductor elements 21 and 22 are electrically connected in series through the fifth conductor pattern 65, and are electrically connected to the O terminal 44 through the fifth conductor pattern 65.

[0050] The sixth conductor pattern 66 is connected to the upper surface electrode 22a of the second semiconductor element 22 through a fifth via hole 75. Further, the sixth conductor pattern 66 is connected to the N terminal 42 through a sixth via hole 76. The fifth via hole 75 and the sixth via hole 76 are made of a conductor such as copper or other metal. As a result, the upper surface electrode 22a of the second semiconductor element 22 is electrically connected to the N terminal 42 through the sixth conductor pattern 66.

[0051] The semiconductor elements 21 and 22 and the heat sinks 31 and 32 are arranged in the third circuit layer L3 and the fourth circuit layer L4. The thickness of the heat sinks 31 and 32 is equal to the distance from the third circuit layer L3 to the fourth circuit layer L4. The semiconductor elements 21 and 22 provided on the heat sinks 31 and 32 are provided in the third circuit layer L3.

[0052] The fifth circuit layer L5 has a plurality of conductor patterns 67, 68. Each of the conductor patterns 67, 68 is made of a conductor such as copper or other metal. The plurality of conductor patterns 67 and 68 includes a seventh conductor pattern 67 and an eighth conductor pattern 68. Here, the plurality of conductor patterns 67, 68 are actually provided on the same plane, but are Figure 3 In the figure, the seventh conductor pattern 67 is intentionally shifted with respect to the eighth conductor pattern 68 for the sake of clarity of illustration.

[0053] The seventh conductor pattern 67 extends over a large portion of the fifth circuit layer L5, and is provided to face the plurality of semiconductor elements 21 and 22. As a result, the heat generated in the semiconductor elements 21 and 22 is diffused to a wide range of the substrate main body 12 through the seventh conductor pattern 67. The seventh conductor pattern 67 also functions as a shield layer that shields electromagnetic noise radiated from the semiconductor elements 21 and 22. Although not shown, the seventh conductor pattern 67 can be electrically connected to the third conductor pattern 63 of the first circuit layer Ll, i.e., a ground line, thereby improving the function of the shield layer of the seventh conductor pattern 67.

[0054] The eighth conductor pattern 68 is connected to the first heat sink 31 through the seventh via 77. In addition, the eighth conductor pattern 68 is connected to the P terminal 40 through the eighth via 78. The seventh via 77 and the eighth via 78 are made of a conductor such as copper or other metal. As a result, the lower surface electrode 21b of the first semiconductor element 21 is electrically connected to the P terminal 40 through the first heat sink 31 and the eighth conductor pattern 68.

[0055] The sixth circuit layer L6 has a ninth conductor pattern 69. The ninth conductor pattern 69 extends over a large portion of the sixth circuit layer L6 and faces the seventh conductor pattern 67 of the fifth circuit layer L5. As a result, the heat generated in the semiconductor elements 21 and 22 is first transferred to the seventh conductor pattern 67 of the fifth circuit layer L5 and then to the ninth conductor pattern 69 of the sixth circuit layer L6. As a result, the heat generated by the semiconductor elements 21 and 22 is widely diffused in the substrate main body 12 and radiated from the ninth conductor pattern 69 to the outside of the substrate main body 12.

[0056] The semiconductor device 10 also includes a heat absorbing member 90. The heat absorbing member 90 is located within the substrate main body 12. The heat absorbing member 90 can be made of a material having excellent thermal conductivity and can be made of, for example, copper or other metal or graphite. The heat absorbing member 90 is located in the intermediate layer 16 of the substrate main body 12, similarly to the semiconductor elements 21 and 22 and the heat sinks 31 and 32. Here, the heat absorbing member 90 can be located within the substrate main body 12 and its specific location can not be particularly limited. For example, the heat absorbing member 90 in the present embodiment is located between the first semiconductor element 21 and the second semiconductor element 22.

[0057] The heat absorbing member 90 is connected to the fourth conductor pattern 64 through one or more ninth vias 79. The one or more ninth vias 79, the seventh via 77, and the eighth via 78 are made of a conductor such as copper or other metal. As a result, the heat absorbing member 90 is electrically and thermally connected to the fourth conductor pattern 64 through the one or more ninth vias 79. The material constituting the ninth via 79 can not be particularly limited and can have higher thermal conductivity than the material constituting the substrate main body 12. For example, the material constituting the ninth via 79 can be the same as the material constituting the fourth conductor pattern 64. The heat absorbing member 90 has a relatively large volume and can absorb a relatively large amount of heat, for example, similarly to the heat sinks 31 and 32.

[0058] As described above, the semiconductor device 10 of the present embodiment includes the substrate main body 12, the semiconductor elements 21 and 22 arranged in the substrate main body 12, the fourth conductor pattern 64 arranged in the second circuit layer L2 between the upper surface 12a of the substrate main body 12 and the semiconductor elements 21 and 22, and at least one heat absorbing member 90 arranged in the substrate main body 12 and thermally connected to the fourth conductor pattern 64. According to this configuration, the heat generated in the semiconductor elements 21 and 22 is transferred to the heat absorbing member 90 in the substrate main body 12 through the fourth conductor pattern 64 in the substrate main body 12. As a result, most of the heat generated by the semiconductor elements 21 and 22 can be diffused in the substrate main body 12, and the temperature rise of the semiconductor elements 21 and 22 can be suppressed. Furthermore, since the fourth conductor pattern 64 and the heat absorbing member 90 are provided in the substrate main body 12, other necessary configurations such as the control circuit 50 can be freely arranged on the upper surface 12a and the lower surface 12b of the substrate main body 12. As a result, an increase in the size of the semiconductor device 10 can be avoided.

[0059] The semiconductor device 10 according to the first embodiment is an example of the technology disclosed in the present specification, and the content of the present technology is not particularly limited. The substrate main body 12 in this embodiment is an example of the substrate in the present technology. The upper surface 12a and the lower surface 12b of the substrate main body 12 in this embodiment are examples of the first surface and the second surface of the substrate main body in the present technology, respectively. In this embodiment, the combination of the first semiconductor element 21 and the first heat sink 31 and the combination of the second semiconductor element 22 and the second heat sink 32 are examples of the electrical component in the present disclosure. The fourth conductor pattern 64 in this embodiment is an example of the first internal conductor pattern in the present technology. The heat absorbing member 90 in this embodiment is an example of the heat absorbing unit in the present disclosure. The ninth via 79 in this embodiment is an example of the thermal conductor via in the present disclosure. The second conductor pattern 62 in this embodiment is an example of the first surface conductor pattern in the present disclosure. The ninth via 79 in this embodiment is an example of the thermal conductor via in the present disclosure. The third conductor pattern 63 in this embodiment is an example of the ground line in the present disclosure.

[0060] (Embodiment 2)

[0061] A semiconductor device 110 of a second embodiment will be described with reference to Figure 5 The semiconductor device 110 of the present embodiment includes a plurality of heat absorbing members 90, and is different from the semiconductor device 10 of the first embodiment in this respect. In the following, mainly the differences from the first embodiment will be described, and the same reference numerals will be given to the configurations common to the first embodiment, and the description thereof will be omitted.

[0062] The semiconductor device 110 of this embodiment includes a plurality of heat-absorbing members 90, 92, 94 within the substrate body 12. Each of the heat-absorbing members 90, 92, 94 can be made of a material having excellent thermal conductivity, and can be made of, for example, copper or other metal or graphite. The plurality of heat-absorbing members 90, 92, 94 are located in the intermediate layer 16 of the substrate body 12. Each of the heat-absorbing members 90, 92, 94 is connected to the fourth conductor pattern 64 by one or more ninth vias 79.

[0063] The plurality of heat-absorbing members 90, 92, 94 includes a first heat-absorbing member 90, a second heat-absorbing member 92, and a third heat-absorbing member 94. The first heat-absorbing member 90 is located between the first semiconductor element 21 and the second semiconductor element 22. The second heat-absorbing member 92 is located on the side opposite the first heat-absorbing member 90, with the first semiconductor element 21 interposed therebetween. The third heat-absorbing member 94 is located on the side opposite the first heat-absorbing member 90, with the second semiconductor element 22 interposed therebetween.

[0064] As described above, the semiconductor device 110 of this embodiment includes a plurality of heat-absorbing members 90, 92, 94. According to this configuration, the plurality of heat-absorbing members 90, 92, 94 can absorb and diffuse more heat, and can further suppress temperature rise of the semiconductor elements 21, 22.

[0065] (Embodiment 3)

[0066] Reference will be made to Figure 6 A semiconductor device 210 of a third embodiment will be described. In the semiconductor device 210 of this embodiment, the heat-absorbing member 90 is connected to the seventh conductor pattern 67 of the fifth circuit layer L5 by one or more tenth vias 80, in which respect the semiconductor device 210 of this embodiment differs from the semiconductor device 10 of the first embodiment. Hereinafter, differences from the first embodiment will be mainly described, and the same reference numerals will be given to configurations common to the first embodiment, and description thereof will be omitted.

[0067] The one or more tenth vias 80 are made of a conductor such as copper or other metal. As a result, the heat-absorbing member 90 is electrically and thermally connected to the seventh conductor pattern 67 by the one or more tenth vias 80. The material constituting the tenth via 80 can not be particularly limited, and can have higher thermal conductivity than the material constituting the substrate body 12. For example, the material constituting the tenth via 80 can be the same as the material constituting the seventh conductor pattern 67.

[0068] As described above, in the semiconductor device 110 of this embodiment, the heat absorbing member 90 is also thermally connected to the seventh conductor pattern 67. According to this configuration, heat generated in the semiconductor elements 21 and 22 is diffused and transferred to the heat absorbing member 90 through the seventh conductor pattern 67. By disposing the semiconductor elements 21 and 22 between the fourth conductor pattern 64 and the seventh conductor pattern 67, heat generated from the semiconductor elements 21 and 22 is effectively diffused from both sides of the semiconductor elements 21 and 22. The seventh conductor pattern 67 in this embodiment is an example of the second internal conductor pattern in the present disclosure.

[0069] (Embodiment 4)

[0070] The semiconductor device 310 of a fourth embodiment will be described with reference to Figure 7 The semiconductor device 310 of a fourth embodiment will be described with reference to

[0071] (Embodiment 5)

[0072] The semiconductor device 410 of a fifth embodiment will be described with reference to Figure 8 The semiconductor device 410 of a fifth embodiment will be described with reference to

[0073] The one or more eleventh vias 81 are made of a conductor such as copper or other metal. As a result, the seventh conductor pattern 67 of the fifth circuit layer L5 is electrically and thermally connected to the ninth conductor pattern 69 of the sixth circuit layer L6 through the one or more eleventh vias 81. The material constituting the eleventh via 81 can not be particularly limited and can have a higher thermal conductivity than the material constituting the substrate main body 12. For example, the material constituting the eleventh via 81 can be the same as the material constituting the ninth conductor pattern 69. Although not particularly limited, the one or more eleventh vias 81 are provided along with the one or more tenth vias 80 along the shortest path from the heat absorbing member 90 to the lower surface 12b of the substrate main body 12.

[0074] As described above, in the semiconductor device 110 of the present embodiment, the ninth conductor pattern 69 on the lower surface 12b of the substrate main body 12 is thermally connected to the seventh conductor pattern 67 through the eleventh via 81. According to this configuration, the heat generated in the semiconductor elements 21 and 22 is transmitted to the ninth conductor pattern 69 on the lower surface 12b of the substrate main body 12 through the seventh conductor pattern located inside the substrate main body 12, and thus, the heat can be radiated to the outside from the ninth conductor pattern 69. The ninth conductor pattern 69 in this embodiment is an example of the second surface conductor pattern in the present disclosure.

[0075] (Embodiment 6)

[0076] A semiconductor device 510 of a sixth embodiment will be described with reference to Figure 9 A semiconductor device 510 of a sixth embodiment will be described with reference to

[0077] Further, the heat absorbing member 90 can have a fluid 91 enclosed therein, for example, like a heat pipe or a heat sink. According to this configuration, the heat transfer efficiency in the heat absorbing member 90 is improved, and thus, the heat absorbing performance of the heat absorbing member 90 can be effectively enhanced. The heat absorbing member 90 having the fluid 91 enclosed therein can be used in any of the embodiments described in the present disclosure.

[0078] While the present disclosure has been described with reference to the embodiments thereof, it is to be understood that the present disclosure is not limited to the embodiments and constructions. The present disclosure is well intended to cover various modifications and equivalent arrangements. In addition, while various combinations and configurations are present, other combinations and configurations including more, less or only a single element are also within the spirit and scope of the present disclosure.

Claims

1. A semiconductor device, comprising: A substrate body having a first surface and a second surface; Electrical components are disposed in the substrate body; A first internal conductor pattern is disposed in a first circuit layer located between the first surface and the electrical component; and At least one heat-absorbing member is disposed inside the substrate body and thermally connected to the first internal conductor pattern. The at least one heat-absorbing member is thermally connected to the electrical component and electrically insulated from the electrical component. The first internal conductor pattern is electrically and thermally connected to the at least one heat-absorbing member via one or more vias, and the first internal conductor pattern extends over a large portion of the first circuit layer and is positioned to face the electrical component.

2. The semiconductor device according to claim 1, further comprising: A first surface conductor pattern is disposed in a first circuit layer located on the first surface and is thermally connected to the first internal conductor pattern.

3. The semiconductor device according to claim 2, further comprising: A surface electrical component, disposed in the first circuit layer on the first surface, and controlling the operation of the electrical component.

4. The semiconductor device according to claim 1, wherein: The at least one heat-absorbing component includes multiple heat-absorbing parts.

5. The semiconductor device according to claim 1, further comprising: A second internal conductor pattern is disposed in a second circuit layer located between the second surface and the electrical component, wherein: The at least one heat-absorbing component is further thermally connected to the second internal conductor pattern.

6. The semiconductor device according to claim 5, further comprising: A second surface conductor pattern is disposed in a third circuit layer located on the second surface and is thermally connected to the second internal conductor pattern.

7. The semiconductor device according to claim 1, wherein: The at least one heat-absorbing component is made of metal or graphite.

8. The semiconductor device according to claim 1, wherein: The fluid is enclosed in at least one heat-absorbing component.

9. The semiconductor device according to claim 1, further comprising: A heat conductor via extending from the first internal conductor pattern to the at least one heat-absorbing member, wherein: The thermally conductive via is made of a material with higher thermal conductivity than the material of the substrate body.

10. The semiconductor device according to any one of claims 1 to 9, further comprising: A grounding line is disposed on the first surface or the second surface of the substrate body, wherein: The first internal conductor pattern is electrically connected to the grounding line in the substrate body.

Images