Process electron beam lithography

By using programmed electron beam lithography (PEBL) technology, pattern data is dynamically generated and exposure settings are calculated in real time, solving the problem of handling large-scale non-periodic layouts in existing systems and achieving efficient layout design and simplified data processing flow.

CN115151784BActive Publication Date: 2026-02-17MAGIC LEAP INC
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Patent Information

Application Number
CN202180016720.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-02-26
Filing Date
2021-02-23
Publication Date
2026-02-17
Estimated Expiration
2041-02-23

AI Technical Summary

Technical Problem

Existing electron beam lithography systems struggle to handle large-scale, non-periodic, and non-Manhattan geometry layout designs, resulting in high data preparation complexity and making it difficult to spend significant time on design and layout.

Method used

Employing programmed electron beam lithography (PEBL) technology, it dynamically generates pattern data, uses oracle functions to calculate local exposure settings in real time, decomposes and discretizes large pattern files, supports raster scanning and vector scanning modes, and simplifies the data processing flow.

Benefits of technology

It reduces the complexity of layout data preparation, improves the ability to handle large pattern files, reduces data storage requirements, and improves design efficiency and time efficiency.

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Abstract

The program EBL system implements user-provided oracle functions (e.g., associated with a particular pattern) to generate control instructions for the e-beam drive electronics on demand. The control system can call the oracle functions to query the pattern at individual point locations (e.g., individual x, y locations), and / or it can query the pattern over an area corresponding to the current field region being addressed by the beam and stage positioners, for example. This program EBL configures the management of control and pattern generation such that the low-level drive electronics and beam column can remain unchanged, allowing them to leverage existing EBL technology.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 981,756, entitled “PROCEDURALELECTRON BEAM LITHOGRAPHY”, filed February 26, 2020, under 35 USC 119(e). Technical Field

[0003] This disclosure relates to automated lithography. Background Technology

[0004] Existing software interfaces for electron beam lithography systems require users to provide monolithic top-down specifications of the entire layout, such as in the form of GDS or OASIS files. The mature field of designer metasurfaces involves very large area layouts, which can involve fully aperiodic and non-Manhattan geometry. However, these layouts are difficult to use, for example, due to their large size and the time spent on design and layout. Summary of the Invention

[0005] Despite this apparent lack of symmetry, almost all practically interesting layouts can be represented mathematically. Therefore, programmed electron beam lithography (PEBL) is described here, which dynamically requests pattern generator fields from a user-provided script. The control system can then calculate local exposure settings from the relevant underlying mathematical expressions. This reduces the complexity of layout data preparation by many orders of magnitude in terms of data size and the time spent on design and layout. While this method is discussed here with reference to nano-optics, it is also applicable to other user domains. For example, the systems and methods discussed here can be used to design large-scale holographic patterns, diffuser patterns for illumination designs, antenna designs for RF and terahertz circuits, and even for classical IC designs that dynamically load sub-layouts instead of being on a monolithic database.

[0006] In some implementations, the PEBL system discussed herein is configured to decompose, discretize, and execute diffraction patterns in files of terabyte, petabyte (or larger) size, which would render existing EBL systems ineffective. For example, large pattern files that existing EBL systems cannot handle (e.g., those associated with unconventional, non-repetitive, and / or non-linear patterns) can be processed by the PEBL system discussed herein. An example of a pattern associated with large pattern files that can be processed by the PEBL system discussed herein is a metasurface lens:

[0007]

[0008] This example metasurface lens pattern could result in a pattern file size of approximately 100 Mb for a 1 mm lens and 500 Gb or more for a 50 mm lens. For even more complex patterns, the file size could easily reach terabytes or even petabytes. Attached Figure Description

[0009] The following figures and associated descriptions are provided to illustrate embodiments of this disclosure and do not limit the scope of the claims. For clarity, the relative positions of features and elements may have been modified. Where feasible, according to one or more embodiments, the same or similar reference numerals denote the same or similar or equivalent structures, features, aspects, or elements.

[0010] The accompanying drawings illustrate the design and utility of various embodiments of this disclosure. It should be noted that the drawings are not necessarily drawn to scale, and elements with similar structures or functions are indicated by similar reference numerals in all the drawings. It is understood that these drawings depict only exemplary embodiments of this disclosure and should therefore not be considered as limiting its scope. This disclosure will be described and explained with additional specificity and detail using the drawings, in which:

[0011] Figure 1 This is a diagram showing an example complete pattern that has been divided into multiple field zones.

[0012] Figure 2 This is a high-level diagram illustrating the general workflow of patterning a wafer or tracing mask using an electron beam lithography (EBL) system.

[0013] Figure 3A The vector scan mode and raster scan mode available in the PEBL system are shown.

[0014] Figure 3B This is an example diagram of a chessboard grating.

[0015] Figure 3C An example pattern and the field area of ​​the pattern are shown.

[0016] Figure 4A An example of an oracle function is shown, which takes dimensional inputs (e.g., x, y) and outputs various control data, such as beam blanking, beam current, and / or other data to be used at specific points on the wafer.

[0017] Figure 4B This is a block diagram illustrating an example configuration of a PEBL system, where user-provided oracle functions reside on the control system (e.g., the control computer).

[0018] Figure 5 This is a block diagram illustrating an example configuration for a vector scan PEBL implementation.

[0019] Figure 6A It is an approximate example of a pattern with approximately linear stripes.

[0020] Figure 6B This is an approximate example of a non-periodic chessboard pattern. Detailed Implementation

[0021] Terminology

[0022] To facilitate understanding of the systems and methods discussed herein, several terms are described below. These terms, and others used herein, should be interpreted to include the provided description, common and customary meaning of the terms, and / or any other implied meaning of the corresponding terms, where such interpretation is consistent with the context of the term. Therefore, the following description does not limit the meaning of these terms, but only provides illustrative examples.

[0023] Graphical Database Systems (GDS), Open Artwork System Exchange Standard (OASIS), and Manufacturing Electron Beam Exposure Systems (MEBES) are examples of languages ​​used by computers to define patterns, which are often associated with integrated circuit manufacturing processes. For example, these languages ​​define the code requirements for defining geometries such as rectangles, trapezoids, and polygons, as well as the types of features each language can have. These file formats, and others like them, allow for the exchange of integrated circuit layout data between vendors.

[0024] Metasurfaces: Structures designed to interact with light waves in ways that natural materials cannot. Metasurfaces can include layers one billionth of a meter (nanometer) thick and contain nanoscale optical features (e.g., antennas) that can control the reflection or transmission of light.

[0025] Example e-beam lithography workflow

[0026] Figure 1 This is a diagram showing the complete pattern 101 of the example, which has been divided into field areas as shown in the division pattern 101D (e.g., 20 × 20 = 400 field areas in this example).

[0027] Figure 2 This is a high-level diagram illustrating the general workflow of patterning a wafer or marker mask using an electron beam lithography (EBL) system. For example, as... Figure 2 As shown, the process may include:

[0028] • The user prepares a data file, such as GDS, which contains polygons representing all areas of the entire wafer or datum that should be exposed to the electron beam.

[0029] • In a process commonly referred to as decomposition, the data file is processed and converted into a proprietary file format that is read by the low-level software driving the EBL system. This process can be performed by third-party software (such as Synopsis CATS or GenISys Beamer) or proprietary software. Data operations may include Boolean operations, proximity correction, scaling, restoration, and pitch reversal.

[0030] • During the decomposition process, patterns are divided in the write field, and in each individual write field, all shapes are identified and decomposed into rectangles or trapezoids, and converted into a proprietary exposure machine format for output. Figure 1 An example of a complete pattern 101 is shown, which has been divided into field areas as shown in the divided pattern 101D (20×20=400 field areas in this example).

[0031] The decomposed data is sent to the EBL control computer. For example, for each field region, a vector raster pattern can be generated to move the platform to the field region location on the wafer.

[0032] • The grating pattern is sent to an electronic device that drives the electron beam, and the entire pattern can be written onto the chip using a beam blanking system.

[0033] As mentioned above, the layouts are becoming so complex that they are not suitable for core memory, and may not be suitable for hard drives or tapes.

[0034] Example program e-beam lithography

[0035] To address the technical shortcomings of existing photolithography processes, such as those mentioned above, programmed electron beam lithography (PEBL) is described herein, in which pattern data is generated programmatically. This method is fully backward compatible with existing EBL workflows. In fact, in some implementations, PEBL can be a superset of monolithic layout expressiveness.

[0036] Depending on the scanning mode, PEBL can include at least two different implementations: raster scan mode or vector scan mode. For example, as Figure 3A As shown in the block diagram, vector scan mode 310 can include all shapes to be written into the field area (e.g., Figure 2 One of the 400 field areas in the example is decomposed into trapezoids or rectangles. These original shapes can then be written by moving the beam only in the areas defined by the original shapes. Alternatively, in raster scan mode 320, the beam is scanned in all written field areas and blanked in areas outside the pattern.

[0037] Each of these scan modes is discussed further below with reference to the example implementation of PEBL. In any mode, the pattern can be defined by an available scripting language (e.g., Python) or by a dedicated language. In some implementations, additional dedicated computers (and / or processors or memory) can be employed to enhance the computational power for creating write fields at write speeds.

[0038] Raster scan mode

[0039] Due to the restricted beam travel, the EBL system can perform exposure of one field area at a time. Therefore, the platform can move in increments corresponding to the field area size (e.g., approximately 1 mm) and then remain stable while the electron beam performs a raster scan. During the exposure of the entire wafer, only data for the next field area to be exposed is needed at any given time. Therefore, the vast majority of pattern data is not needed at any given time, and the portion needed for the upcoming field area is used only once and discarded. Furthermore, any necessary modifications to the local data within a field area are typically performed in advance, operating across the entire layout.

[0040] Based on previous observations, as discussed herein, the PEBL workflow can generate pattern data on demand, avoiding the enormous burden of storing it all at once and simplifying representation. Existing data formats, whether Graphic Design Systems (“GDS” or GDSII), MEBES, the Open Artwork System Exchange Standard (“OASIS”), or other proprietary formats, use boundary representation, where the exposure area is represented by polygons.

[0041] An alternative approach is to provide an "oracle" function that takes the coordinates of a point on the wafer (or other substrate) as input and returns the exposure settings (e.g., blanking, beam current, etc.) to be applied to the point in question. As a basic example of an oracle function, a checkerboard grating chirped in two directions (such as in...) Figure 3B The example diagram can be expressed in C code as follows:

[0042]

[0043]

[0044] As described elsewhere, Oracle functions can be provided in various forms (e.g., programming languages) and can have varying degrees of complexity, such as performing functions that are much more complex than the examples above.

[0045] Figure 3CExample pattern 330 and field region 332 of pattern 330 are shown. By eliminating the data description and processing difficulties that may exist in typical EBL systems, the PEBL system disclosed herein, such as those that use oracle functions to calculate the exposure settings for specific field regions of the pattern in real time (or even those that pre-calculate for some field regions as discussed further below), allows for the construction of complex patterns using electron beam lithography. In contrast, existing EBL systems may only provide high resolution within small areas (which may be straight lines) and require elements to be as repeatable as possible. These requirements are not necessary using the PEBL technique discussed herein.

[0046] Figure 4A For example, an oracle function is shown that takes dimensional inputs (e.g., x, y) and outputs various control data, such as beam blanking, beam current, and / or other data to be used at that specific point on the wafer. By using an oracle, pattern data is generated dynamically (e.g., in real-time or substantially in real-time), rather than generating all pattern data before the EBL process begins. This dynamic generation of control data allows for the generation of arbitrarily complex pattern data, one point at a time, or one field region at a time, as part of the EBL process.

[0047] Figure 4B This is a block diagram illustrating an example configuration of a PEBL system, where user-provided oracle functions reside on control system 410 (e.g., a control computer). In this example, pattern generator 420 can implement oracle functions (e.g., associated with a specific pattern) that interface bidirectionally with control system 410 to provide feedback on the current position the electron beam is addressing. Control system 410 can invoke the oracle to query the pattern at a single point location (e.g., a single x, y position), and / or, for example, it can query the pattern over a region corresponding to the current field area being addressed by the beam and platform locators. Advantageously, while this PEBL configuration manages control and pattern generation, the low-level drive electronics and beam posts can remain unchanged, allowing it to leverage existing EBL technologies.

[0048] Backward compatibility

[0049] Advantageously, PEBL configurations (such as the example in 4B) are compatible with integrated layout files (e.g., in the form of GDS files). For example, oracle functions (e.g., provided by control system 410 and pattern generator 420) can be configured to read the layout file and render the required portion within the currently written field area.

[0050] Synchronization and buffering

[0051] In some embodiments, user-defined oracles may have arbitrary complexity, and therefore dynamic data generation may halt the data pipeline and render low-level data-driven systems ineffective. This can result in lost throughput and increased write times. Therefore, in some embodiments, the PEBL system may include an emulation module 425 (in... Figure 4B (Shown as an optional component of the PEBL system), the simulation module 425 simulates part or all of the pattern generation process by calling an oracle as needed to determine the time required to write the entire pattern, including any time intervals during which new output data from the driving electronics is unavailable. For example, the simulation module 425 may be coupled to the pattern generator and communicate with the pattern generator 420 during simulation, rather than the pattern generator communicating with the driving electronics 430. Once the simulation is successfully executed (e.g., there are no gaps between output data from the pattern generator), pattern generation can be performed again, where the pattern generator outputs control signals to the driving electronics 430.

[0052] In some embodiments, such as when there are lengthy oracle calculations, the simulation module 425 may buffer the results in a manner similar to that of the drive electronics 430. This buffering requires additional memory in the system control system (e.g., within the simulation module), but the amount is typically orders of magnitude smaller than that required to store the entire pattern at once. In some implementations, buffering can be achieved using a hybrid approach between fully decomposing the layout before writing and dynamically decomposing each field area. For example, the simulation module 425 may buffer portions of the layout output from the pattern generator and feed these control signals to the drive electronics as needed to prevent the electronics from stopping.

[0053] Vector scan mode

[0054] Similar to the raster scan mode discussed above, the complete pattern data file is not generated all at once, but rather dynamically generated by a script for each field area. In some implementations, for situations requiring more intelligent conformal scanning within the exposure area boundaries (which can lead to better sidewall smoothness and generally better write times), a vector scan mode can be selected (e.g., automatically by the system or manually by user input). For example, for generating vector paths, the vector scan mode may require more pre-computation than the raster mode.

[0055] Figure 5This is a block diagram illustrating an example configuration of a vector scan PEBL implementation. In this embodiment, the preprocessing system 505 is configured to generate exposure programs for individual field areas. For example, the preprocessing system 505 can be configured to simultaneously generate exposure programs for more than one field area, such as field area n (e.g., the current field area), field area n+1 (the next field area), and any other number of field areas (e.g., field areas n+m, where m is the number of field areas processed simultaneously). In some embodiments, each field area is decomposed into basic shapes (e.g., trapezoids and rectangles), and the preprocessing system 505 converts the field area data into EBL machine input. Field area data (e.g., for...) Figure 5 In the example, field area n is sent from preprocessing system 505 to control system 510, and the next field area (e.g., field area n+1) is generated while control system 510, pattern generator 520, and / or drive electronics 530 move the platform to field area coordinates, generate a raster pattern, apply sub-field correction, and write the shape in field area n. This process is then repeated for subsequent field areas, wherein an exposure program for one or more next field areas is generated as control system 510, pattern generator 520, and / or drive electronics 530 processes the current field area. In some embodiments, the preprocessing system may generate several field areas before scanning begins (e.g., before providing the field area n exposure program to control system 510). For example, the preprocessing system may be configured to automatically detect the complexity of the pattern and, based on the complexity, determine an appropriate field area buffer to be calculated before scanning begins.

[0056] In some embodiments, for the current field region (e.g., field region n) being processed by the preprocessing system 505, the platform is moved to the corresponding position on the substrate and, for each element shape, sub-field correction is applied to generate a raster pattern. Simultaneously with writing to the field region, the next field region (e.g., field region n+1) is generated, such as by decomposing the shape into trapezoids and rectangles, converting it to EBL machine input, and transferring the file to the control system. Therefore, the task of writing to a field region using EBL and preprocessing another field region (before it is sent for writing) can be pipelined (e.g., performed at least partially simultaneously). That is, when field region n is written, field region n+1 is being preprocessed. Next, field region n+1 will be written, and field region n+2 can be preprocessed, and so on.

[0057] Proximity effect

[0058] In some embodiments, the entire pattern layout is unknown at a certain time, and therefore, correction for proximity effects may not be applied a priori. Therefore, in implementations requiring proximity effect correction, a local neighborhood of the pattern data can be generated before output to the driving electronics. For example, instead of generating one data field area at a time (e.g., in...),... Figure 5In the vector mode, instead of maintaining a 3×3 field grid, it is possible to apply proximity correction to one or more fields (e.g., the center field with adjacent fields generated in each direction).

[0059] Example pattern

[0060] As an example of patterns that can be generated in real time using the PEBL architecture discussed here, consider a diffractive optical element (DOE) operating at first order and given a phase function F(x, y). The resulting pattern to be written corresponds to the region, where

[0061] frac{[G+grad F(x,y)].(x,y)}<0.5

[0062] Where G is the constant grating vector corresponding to the basic diffraction grating, grad F(x,y) is the gradient vector of the phase function, the period '.' denotes the 2D dot product, and frac{} denotes taking the fractional part of the result (a value always between 0 and 1). In this example, given any coordinates (x,y), it can be determined whether a pattern should be written by evaluating the above inequality. This results in a pattern as a series of approximately linear fringes. This pattern representation using, for example, a GDS file can be readily processed. Figure 6A This is an approximate example of the pattern.

[0063] As another example, consider patterns of two such DOEs multiplexed together in nearly orthogonal directions. In this case, the XOR of the two striped patterns can produce a pattern including islands resembling a checkerboard pattern, but without periodicity anywhere (see, for example...). Figure 6B (This is an approximate example of such a pattern). For example, attempting to represent such a pattern using a GDS file can be cumbersome over a wide range. For instance, in a GDS file, each quadrilateral region can be represented by a polygon. For diffractive structures, each polygon can have a size smaller than the wavelength of light (e.g., for visible light, these sizes can range from 10 to 1000 nanometers). For large-area diffractive optics, such as eyeglasses, the overall size can be on the order of centimeters. Therefore, using 100 nm as the polygon size, a 1 cm diffractive optics sheet would require 10 billion polygons, and the GDS file would be approximately 2 TB in size. This is an impractically large amount of data for medium-sized optics.

[0064] Additional notes

[0065] Each process, method, and algorithm described herein and / or depicted in the accompanying drawings may be embodied in a code module executed by one or more physical computing systems, hardware computer processors, application-specific circuitry, and / or electronic hardware configured to execute specific and particular computer instructions, and may be fully or partially automated by that code module. For example, a computing system may include a general-purpose computer (e.g., a server) programmed with specific computer instructions or dedicated computers, dedicated circuitry, etc. The code module may be compiled and linked into an executable program, installed in a dynamic link library, or written in an interpreted programming language. In some implementations, specific operations and methods may be performed by circuitry specific to a given function.

[0066] Furthermore, some implementations of the functions disclosed herein are mathematically, computationally, or technically complex enough that, for example, due to the amount or complexity of the calculations involved, it may require the application of specific hardware or one or more physical computing devices (using appropriate special-purpose executable instructions) to perform the function or provide substantially real-time results. For example, animations or videos may comprise many frames, each with millions of pixels, and require specially programmed computer hardware to process the video data to provide the required image processing tasks or applications within a commercially reasonable timeframe.

[0067] The various embodiments of this disclosure can be systems, methods, and / or computer program products at any possible level of technical detail integration. A computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to perform aspects of this disclosure.

[0068] For example, the functionality described herein can be executed by software instructions executed by one or more hardware processors and / or any other suitable computing device and / or in response to the execution of software instructions by one or more hardware processors and / or any other suitable computing device. The software instructions and / or other executable code can be read from a computer-readable storage medium (or media).

[0069] Computer-readable storage media can be tangible devices capable of retaining and storing data and / or instructions for use by an instruction execution device. Computer-readable storage media can be, for example, but not limited to, electronic storage devices (including any volatile and / or non-volatile electronic storage devices), magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: portable computer floppy disks, hard disks, solid-state drives, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, mechanical encoding devices such as punched cards or raised structures in recesses into which instructions are recorded, and any suitable combination of the foregoing. As used herein, computer-readable storage media should not be construed as transient signals, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses passing through fiber optic cables), or electrical signals transmitted through wires.

[0070] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a suitable computing / processing device, or downloaded via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network) to an external computer or external storage device. This network may include copper cables, fiber optic cables, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the suitable computing / processing device.

[0071] Computer-readable program instructions (also referred to herein as, for example, "code," "instructions," "modules," "applications," "software applications," etc.) used to perform the operations of this disclosure may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and procedural programming languages ​​such as the "C" programming language or similar programming languages. Computer-readable program instructions may be invoked from other instructions or from themselves, and / or may be invoked in response to a detected event or interrupt. Computer-readable program instructions configured to execute on a computing device may be provided on a computer-readable storage medium, and / or provided as a digital download (and may initially be stored in a compressed or installable format that needs to be installed, decompressed, or decrypted prior to execution), which may then be stored on the computer-readable storage medium. Such computer-readable program instructions may be stored, in part or in whole, on a storage device (e.g., a computer-readable storage medium) for execution by the computing device. Computer-readable program instructions may execute entirely on a user's computer (e.g., an execution computing device), partially on a user's computer, as a standalone software package, partially on a user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network (including a local area network (LAN) or a wide area network (WAN)) or may be connected to an external computer (e.g., via the Internet through an Internet service provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, a field-programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer-readable program instructions to personalize the electronic circuitry in order to perform aspects of this disclosure by utilizing state information of the computer-readable program instructions.

[0072] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0073] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create components for implementing the functions / actions specified in one or more boxes of a flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and / or other device to operate in a particular manner, such that the computer-readable storage medium storing the instructions comprises an article of manufacture of instructions implementing aspects of the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0074] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus, or other device, implement the function / action specified in one or more boxes of a flowchart and / or block diagram. For example, the instructions may initially be carried on a hard disk or solid-state drive of a remote computer. The remote computer may load the instructions and / or modules into its dynamic memory and transmit the instructions via telephone, cable, or optical line using a modem. A modem local to the server computing system may receive data over telephone / cable / optical line and place the data on a bus using a converter device including appropriate circuitry. The bus may carry the data to memory from which the processor may retrieve and execute instructions. Instructions received from memory may optionally be stored on a storage device (e.g., a solid-state drive) before or after execution by the computer processor.

[0075] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a portion of a module, segment, or instruction, which includes one or more executable instructions for implementing a specific logical function. In some alternative implementations, the functions marked in the blocks may not appear in the order indicated in the figures. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. Furthermore, certain blocks may be omitted in some implementations. The methods and processes described herein are not limited to any particular order, and the blocks or states associated with them may be executed in other suitable orders.

[0076] It will also be noted that each box in the block diagram and / or flowchart illustration, and combinations of boxes in the block diagram and / or flowchart illustration, can be implemented by a dedicated hardware-based system that performs a specific function or behavior or executes a combination of dedicated hardware and computer instructions. For example, any process, method, algorithm, element, box, application, or other function (or part of a function) described in the preceding sections can be embodied in electronic hardware such as dedicated processors (e.g., application-specific integrated circuits (ASICs)), programmable processors (e.g., field-programmable gate arrays (FPGAs)), dedicated circuits, etc. (any of which can also combine custom hardwired logic, logic circuits, ASICs, FPGAs, etc. with custom programming / execution of software instructions to accomplish these techniques), and / or fully or partially automated via that electronic hardware.

[0077] Any of the above-described processors and / or devices in combination with any of the above-described processors may be referred to herein as, for example, a "computer," "computer device," "computing device," "hardware computing device," "hardware processor," "processing unit," etc. The computing devices of the above embodiments are typically (but not necessarily) controlled and / or coordinated by operating system software, such as Mac OS, iOS, Android, Chrome OS, Windows OS (e.g., Windows XP, Windows Vista, Windows 7, Windows 8, Windows 10, Windows Server, etc.), Windows CE, Unix, Linux, SunOS, Solaris, Blackberry OS, VxWorks, or other suitable operating systems. In other embodiments, the computing device may be controlled by a proprietary operating system. Conventional operating systems control and schedule computer processes for execution, perform memory management, provide file systems, networking, I / O services, and provide user interface functionality, such as a graphical user interface ("GUI").

[0078] As described above, in various embodiments, a user can access certain functions through a web-based viewer (such as a web browser) or other suitable software program. In such implementations, the user interface can be generated by a server computing system and sent to the user's web browser (e.g., running on the user's computing system). Alternatively, the data required to generate the user interface (e.g., user interface data) can be provided to the browser by the server computing system, whereby the user interface can be generated (e.g., the user interface data can be executed by a browser accessing a web service and can be configured to render the user interface based on the user interface data). The user can then interact with the user interface through the web browser. In some implementations, the user interface can be accessed through one or more dedicated software applications. In some embodiments, one or more computing devices and / or systems of this disclosure may include mobile computing devices, and the user interface can be accessed through such mobile computing devices (e.g., smartphones and / or tablets).

[0079] These computer programs (also referred to as programs, software, software applications, applications, components, or code) may include machine instructions for programmable controllers, processors, microprocessors, or other computing or computerized architectures, and may be implemented in high-level programming languages, object-oriented programming languages, functional programming languages, logic programming languages, and / or assembly / machine languages. As used herein, the term "machine-readable medium" means any computer program product, apparatus, and / or device for providing machine instructions and / or data to a programmable processor, such as, for example, disks, optical disks, memories, and programmable logic devices (PLDs), including machine-readable media that receive machine instructions as machine-readable signals. The term "machine-readable signal" means any signal used to provide machine instructions and / or data to a programmable processor. Machine-readable media may store such machine instructions non-transitory, such as, for example, non-transitory solid-state memory or magnetic hard disk drives or any equivalent storage medium. Machine-readable media may alternatively or additionally store such machine instructions transiently, such as, for example, processor caches or other random access memory associated with one or more physical processor cores.

[0080] Many variations and modifications can be made to the above embodiments, and the elements therein should be understood as other acceptable examples. All such modifications and variations are intended to be included within the scope of this disclosure. The foregoing description details certain embodiments. However, it should be understood that the systems and methods can be implemented in a variety of ways, no matter how detailed they have appeared in the foregoing text. As mentioned above, it should be noted that the use of specific terms in describing certain features or aspects of systems and methods should not be construed as implying that the term is hereby redefined as limited to any specific feature of the system and method that includes the features or aspects of the system and method associated with that term.

[0081] Conditional language, such as “can,” “could,” “might,” or “may,” unless explicitly stated otherwise or otherwise understood in the context in which they are used, is generally intended to convey that certain embodiments include certain features, elements, and / or steps, while other embodiments do not. Therefore, such conditional language is not generally intended to imply that one or more embodiments require features, elements, and / or steps in any way, or that one or more embodiments must include methods for determining whether such features, elements, and / or steps are included or will be performed in any particular embodiment, with or without user input or prompts.

[0082] When used in conjunction with the term "real-time," the term "substantially" forms phrases that will be readily understood by a person skilled in the art. For example, it is easy to understand that such language would include speeds with little or no delay or waiting that is perceptible, or speeds with such delays being short enough not to disturb, irritate, or otherwise annoy the user.

[0083] Unless otherwise explicitly stated, conjunctions such as “at least one of X, Y, and Z” or “at least one of X, Y, or Z” should be understood from the context in which they are used. These conjunctions generally indicate that an item, term, etc., can be X, Y, or Z, or a combination thereof. For example, the term “or” is used in its inclusive (rather than exclusive) sense, such that when used, for example, to connect lists of elements, the term “or” indicates one, some, or all of the elements in the list. Therefore, such conjunctions are generally not intended to imply that certain embodiments require the presence of each of at least one of X, at least one of Y, and at least one of Z.

[0084] As used herein, the term “a(a)” should be interpreted inclusively rather than exclusively. For example, unless otherwise specified, the term “a” should not be understood as “exactly one” or “one and only one”; rather, the term “a” means “one or more” or “at least one”, whether used in the claims or elsewhere in the specification, and regardless of whether quantifiers such as “at least one,” “one or more,” or “multiple” are used in the claims or elsewhere in the specification.

[0085] As used herein, the term "comprising" should be interpreted in an inclusive rather than exclusive sense. For example, a general-purpose computer that includes one or more processors should not be construed as excluding other computer components and may include components such as memory, input / output devices, and / or network interfaces.

[0086] For ease of description, spatially related terms such as “forward,” “backward,” “below,” “below,” “lower,” “above,” and “higher” may be used herein to describe the relationship between one element or feature and another, as shown in the figure. It should be understood that, in addition to the orientation depicted in the figure, the spatially related terms are intended to cover different orientations of the device in use or operation. For example, if the device in the figure is inverted, an element described as “below” or “under” other elements or features will be oriented as “above” other elements or features due to the inverted state. Therefore, the term “below” can include both above and below orientations, depending on the reference point or orientation. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatially related descriptors used herein shall be interpreted accordingly. Similarly, unless otherwise explicitly stated, the terms “upward,” “downward,” “vertical,” “horizontal,” etc., used herein are for illustrative purposes only.

[0087] While the terms “first” and “second” may be used herein to describe various features / elements (including steps or processes), unless the context otherwise requires, these features / elements should not be limited by these terms to an indication of the order of features / elements or whether one is primary or more important than the other. These terms may be used to distinguish one feature / element from another. Thus, the first feature / element discussed may be referred to as the second feature / element, and similarly, the second feature / element discussed below may be referred to as the first feature / element without departing from the teachings provided herein.

[0088] As used herein in the specification and claims, including in the embodiments, and unless expressly stated otherwise, all figures may be interpreted as if they begin with the word “about” or “approximately”, even if the term is not explicitly stated to appear. When describing magnitude and / or location, the phrase “about” or “approximately” may be used to indicate that the described value and / or location is within a reasonably expected range of value and / or location. For example, a numerical value may have + / - 0.1% of a specified value (or range), + / - 1% of a specified value (or range), + / - 2% of a specified value (or range), + / - 5% of a specified value (or range), + / - 10% of a specified value (or range), etc. Any numerical value given herein should also be understood to include about or approximately that value, unless the context otherwise requires.

[0089] For example, if the value “10” is disclosed, then “about 10” is also disclosed. Any numerical range described herein is intended to include all subranges contained therein. It should also be understood that when a value is disclosed, “less than or equal to” that value, “greater than or equal to” that value, and possible ranges between values ​​are also disclosed, as properly understood by those skilled in the art. For example, if the value “X” is disclosed, then “less than or equal to X” and “greater than or equal to X” (e.g., where X is a numerical value) are also disclosed. It should also be understood that throughout the application, data is provided in a variety of different formats, and that data may represent endpoints or starting points, and ranges of any combination of data points. For example, if a particular data point “10” and a particular data point “15” can be disclosed, then it should be understood that greater than, greater than or equal to, less than, less than or equal to, and equal to 10 and 15, as well as the range between 10 and 15, can be considered disclosed. It should also be understood that each unit between two particular units can also be disclosed. For example, if 10 and 15 can be disclosed, then 11, 12, 13, and 14 can also be disclosed.

[0090] Although various illustrative embodiments have been disclosed, any of the many changes to the various embodiments can be made without departing from the teachings herein. For example, the order in which the various described method steps are performed may be changed or reconfigured in different or alternative embodiments, and in other embodiments, one or more method steps may be skipped entirely. Optional or desired features of the various device and system embodiments may be included in some embodiments but not in others. Therefore, the above description is provided primarily for illustrative purposes and should not be construed as limiting the scope of the claims and particular embodiments or the specific details or features disclosed.

[0091] Similarly, while operations may be described in a specific order in the accompanying drawings, it should be understood that such operations need not be performed in the specific order shown or sequentially, or all of the shown operations need to be performed to achieve the desired result. Furthermore, the drawings may schematically depict another example process in the form of a flowchart. However, other operations not depicted may be incorporated into the illustrative example methods and processes. For example, one or more additional operations may be performed before, after, simultaneously with, or between any of the shown operations. Furthermore, in other implementations, operations may be rearranged or reordered. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the above implementations should not be construed as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products. Furthermore, other implementations are within the scope of the following claims. In some cases, the actions described in the claims may be performed in a different order and still achieve the desired result.

[0092] While the above detailed description has shown, described, and pointed out novel features applicable to various embodiments, it will be understood that various omissions, substitutions, and changes may be made to the form and details of the illustrated apparatus or process without departing from the spirit of this disclosure. It will be appreciated that certain embodiments of the invention described herein may be embodied in a form that does not provide all the features and benefits set forth herein, as some features may be used or practiced separately from others. The scope of certain inventions disclosed herein is indicated by the appended claims rather than by the foregoing description. All variations within the equivalent meaning and scope of the claims should be included within their scope.

Claims

1. A computing system, comprising: A non-transitory computer-readable storage device storing an oracle function associated with a pattern to be produced on a substrate, wherein the oracle function is executable to receive the coordinates of the substrate as input and provide output including control data including exposure settings available from an electron beam lithography system at the coordinates of the substrate, to provide dynamic exposure settings available from the electron beam lithography system to produce the pattern; A control system having one or more hardware computer processors, the control system being configured to, for each of a plurality of field regions of the pattern to be generated on the substrate: For each of the multiple coordinates of the substrate: Determine the coordinates of the substrate; The oracle function is invoked using the determined coordinates of the substrate; The oracle function receives control data including exposure settings, which is configured to control the operation of the electron beam lithography system. Sending the control data to the electron beam lithography driving electronics; and An electron beam lithography driving electronics device, which is configured as follows: Receive the control data; Based on the control data, one or more of the following parameters of the electron beam lithography system are determined: current, voltage, or blanking.

2. The computing system according to claim 1, wherein, The control system is further configured to: Generate decomposed data representing the pattern.

3. The computing system according to claim 2, wherein, The decomposed data includes multiple field areas of the pattern.

4. The computing system according to claim 1, wherein, The driving electronic device is further configured to: Feedback is sent to the control system to indicate the operating status of the electron beam lithography system controlled by the control data.

5. The computing system according to claim 1, wherein, The control system selects the next coordinate of the substrate in response to feedback from the driving electronics.

6. The computing system according to claim 1, further comprising: A simulation module configured to generate simulation control data to simulate at least a portion of the process of generating the pattern.

7. The computing system according to claim 6, wherein, The simulation module is configured as follows: For each of the multiple coordinates of the substrate: Determine the coordinates of the substrate; The oracle function is invoked using the determined coordinates of the substrate; Receive control data configured to control the operation of the electron beam lithography system from the oracle function; as well as At least a portion of the process of simulating the generation of the pattern using the received control data.

8. The computing system according to claim 7, wherein, The simulation module is further configured to provide simulation feedback to the control system.

9. A computerized method executed by a computing system having one or more hardware computer processors and one or more non-transitory computer-readable storage devices storing software instructions executable by the computing system to perform the computerized method, the computerized method comprising: The pattern to be generated on the substrate is divided into multiple field areas; For each of the plurality of field areas: Determine the coordinates of the substrate; The oracle function is evaluated using the determined coordinates of the substrate to generate decomposed data, wherein the oracle function is a user-designed function configured to provide control data, including exposure settings, that can be used by the electron beam lithography system to generate the pattern. Based at least on the decomposed data, control data including exposure settings is generated, the control data being configured to control the operation of the electron beam lithography system to produce the pattern, the control data indicating one or more of the current, voltage, or blanking of the electron beam lithography system at the current field region; and The control data is sent to the electron beam lithography system.

10. The computerized method according to claim 9, wherein, While the electron beam lithography system executes the control data at the current field region, it generates control data for the next field region among the plurality of field regions.

11. The computerized method according to claim 9, wherein, The control data is temporarily cached until control data for one or more additional field areas is generated.

12. The computerized method according to claim 11, wherein, The number of the one or more additional field areas is determined based on the complexity of the pattern, wherein more complex patterns are associated with a higher number, while less complex patterns are associated with a lower number.

13. The computerized method according to claim 9, wherein, Simultaneously generate control data for two or more field areas.

Citation Information

Patent Citations

  • Method for processing mask data and mask writing system

    JP2004079987A