Low EMI Spread Spectrum Clock Method and Its Circuit Applied to Motor Drive Chips

Abstract

The present invention discloses a low-EMI spread-spectrum clock method and its circuit applied to a motor drive chip. The low-EMI spread-spectrum clock method applied to a motor drive chip includes step S1: an oscillation circuit combines periodic modulation and random modulation, uses the periodic modulation as coarse tuning to modulate the charge and discharge current of the oscillation circuit with a triangular wave signal, thereby obtaining a periodically changing oscillation frequency, and uses the random modulation as fine tuning to adjust the output signal of the oscillation circuit. The low-EMI spread-spectrum clock method and its circuit applied to a motor drive chip disclosed by the present invention adopt a combination of periodic modulation and random modulation, use the periodic modulation technology as coarse tuning and the random modulation technology as fine tuning, and at the same time adopt a buffer circuit with low di / dt to reduce the EMI of the charge pump circuit.

Description

Technical Field

[0001] The present invention belongs to the technical field of charge pump oscillation in motor drive, and particularly relates to a spread-spectrum clock method with low EMI applied to a motor drive chip and a spread-spectrum clock circuit with low EMI applied to a motor drive chip. Background Art

[0002] EMI (Electromagnetic Interference) has always been a problem existing in electronic devices. It can be divided into three factors, namely the interference source, the propagation path, and the sensitive component. Eliminating the interference source and cutting off the propagation path, that is, the coupling path of the circuit, can reduce the impact of electromagnetic interference.

[0003] With the wide popularity of portable and consumer electronic devices, electromagnetic interference (EMI) is becoming a key problem in consumer electronic devices using serial communication systems, class-D switched power amplifiers, or switched-mode power converters. This makes the concern about EMI not only focus on the impact on electronic devices but also on the impact on human health. In a DC brushless motor drive circuit using double N-type power transistors, a high-voltage charge pump circuit is essential. When using a charge pump circuit with an internal load capacitor, to improve the driving ability of the charge pump circuit, the switching frequency will increase. Since the charge pump circuit is in a high-frequency and high-voltage environment, high-changing-slope voltages (dV / dt) or current nodes (dI / dt) will appear during the switching process, and the EMI problem is more serious.

[0004] Methods for reducing electromagnetic interference problems are diverse in the industrial field. Currently, there are several effective interference suppression technologies, namely grounding and shielding technology, soft-switching technology, electromagnetic interference filtering technology, clock slope control technology, and spread-spectrum clock technology, etc. However, the first three technologies require higher hardware costs and more complex techniques. The clock slope control technology has a simple structure but is more suitable for application scenarios with small loads. Compared with other technologies, the spread-spectrum clock technology is applicable to large loads and is easier to operate and effective.

[0005] A spread-spectrum clock generation circuit (SSCG) is the most effective way to solve the problem of reducing electromagnetic interference. It is a technology that spreads the energy to a wider frequency band to reduce the peak value and its harmonic radiation emissions. Among them, directly modulating a voltage-controlled oscillator (VCO) can be easily implemented in the SSCG and can obtain better electromagnetic interference reduction performance. The modulation methods include periodic signal modulation, random signal modulation, and chaotic signal modulation.

[0006] Periodically modulated waveforms include triangular waves, sine waves, and Hershey Kiss waveforms. Although the spectrum after modulation by the Hershey Kiss waveform basically becomes an equal-amplitude energy distribution, the Hershey Kiss waveform requires many registers to implement, is relatively complex, and has a large area. The triangular wave has high controllability, is convenient to implement, and has a good simultaneous spreading spectrum effect. Although random modulation is more effective than periodic modulation and has the least impact on audio performance, true random signals are difficult to implement, and pseudo-random signals are often used. Chaotic signals are easier to implement than true random signals, have a continuous spectrum, and have a better spreading spectrum effect than periodic signals. However, the inductors and capacitors used are often difficult to integrate and are usually made off-chip. On the other hand, although directly modulating a voltage-controlled oscillator (VCO) requires a larger area and larger on-chip capacitors in the chip, this is easier to meet within a motor drive chip.

[0007] Therefore, in view of the above problems, further improvements are made. Summary of the Invention

[0008] The main object of the present invention is to provide a low-EMI spread-spectrum clock method and its circuit applicable to a motor drive chip, which combines periodic modulation and random modulation, uses periodic modulation technology as coarse tuning, random modulation technology as fine tuning, and simultaneously uses a low di / dt buffer circuit to reduce the EMI of the charge pump circuit.

[0009] To achieve the above object, the present invention provides a low-EMI spread-spectrum clock method applicable to a motor drive chip for reducing the EMI of a charge pump circuit, including the following steps:

[0010] Step S1: The oscillation circuit combines periodic modulation and random modulation, uses periodic modulation as coarse tuning, so that a triangular wave signal modulates the charging and discharging current of the oscillation circuit, thereby obtaining a periodically changing oscillation frequency, and uses random modulation as fine tuning, so that the output signal of the oscillation circuit is adjusted, and then on the basis of the coarse tuning, the oscillation circuit jitters at the edge below a certain frequency, randomly changes the delay to slow down the speed of the switching edge, and finally, in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the energy peak value concentrated on the switching frequency and each harmonic point to reduce the EMI value once;

[0011] Step S2: The level shift circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low voltage domain into an oscillation signal in the high voltage domain to drive the charge pump circuit in the high voltage domain;

[0012] Step S3: The buffer circuit receives the oscillation signal in the high-voltage domain output by the level-shifting circuit, and after buffering, transmits the oscillation signal to the charge pump circuit. The buffer circuit limits the peak value of the current flowing through the pump capacitor Cf of the charge pump circuit through a switching transistor of a predetermined size to further reduce the EMI value.

[0013] As a further preferred technical solution of the above technical solution, step S1 is specifically implemented as the following steps:

[0014] Step S1.1: The modulation current generation circuit of the oscillation circuit receives the control signal generated by the periodic signal generation circuit to control the on / off of each modulation current branch, thereby generating a periodically changing current signal and superimposing it to generate a periodically changing charge / discharge current I OSC signal, which provides a bias current for the comparator circuit of the oscillation circuit;

[0015] Step S1.2: The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor C1 through comparison, thereby generating an oscillation signal at a predetermined frequency;

[0016] Step S1.3: The random delay circuit of the oscillation circuit receives the control signal generated by the random signal generation circuit to control the on / off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and further causing the edge of the oscillation circuit to jitter at a certain frequency on the basis of coarse adjustment, and randomly changing the delay to slow down the speed of the switching edge.

[0017] As a further preferred technical solution of the above technical solution, step S1.2 is specifically implemented as:

[0018] By making the charging current equal to the discharging current through the modulation current generation circuit, the initial voltage of the charging capacitor C1 is 0, and the output signal Vout of the comparator U1 is at a low level, so that the switch S1 is turned on and the switch S2 is turned off, and then the charge / discharge current I OSC signals charge the charging capacitor C1. At the same time, the switch S3 is turned on and the switch S4 is turned off, and the negative terminal of the comparator U1 selects VrefH;

[0019] When the voltage on the charging capacitor C1 is greater than VrefH, the output signal Vout is at a high level, so that the switch S1 is turned off and the switch S2 is turned on, and the charge / discharge current I OSC signals discharge the charging capacitor C1. At the same time, the switch S3 is turned off and the switch S4 is turned on, and the negative terminal of the comparator U1 selects VrefL;

[0020] When the charging capacitor C1 discharges to below VrefL, the output signal Vout turns to a low level. Next, the charging capacitor C1 is recharged again, thereby generating an oscillation signal with the required frequency.

[0021] To achieve the above object, the present invention further provides a low-EMI spread-spectrum clock circuit applied to a motor drive chip, including an oscillation circuit, a level-shifting circuit, and a (BUFFER or buffer) buffer circuit, where:

[0022] The oscillation circuit combines periodic modulation and random modulation. The periodic modulation is used as coarse tuning to modulate the charge and discharge current of the oscillation circuit with a triangular wave signal, thereby obtaining a periodically changing oscillation frequency. The random modulation is used as fine tuning to adjust the output signal of the oscillation circuit, and then on the basis of the coarse tuning, the oscillation circuit jitters at the edge of a certain frequency, randomly changes the delay to slow down the speed of the switching edge. Finally, in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the peak energy value concentrated on the switching frequency and each harmonic point to reduce the EMI value once.

[0023] The level-shifting circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low-voltage domain into an oscillation signal in the high-voltage domain to drive the charge pump circuit in the high-voltage domain.

[0024] The buffer circuit receives the oscillation signal in the high-voltage domain output by the level-shifting circuit and transmits the oscillation signal to the charge pump circuit after buffering. The buffer circuit limits the peak current flowing through the pump capacitor Cf of the charge pump circuit through a switching transistor of a predetermined size to reduce the EMI value a second time.

[0025] As a further preferred technical solution of the above technical solution, the oscillation circuit includes a modulation current generation circuit, a comparator circuit, and a random delay circuit, where:

[0026] The modulation current generation circuit receives the control signal generated by the periodic signal generation circuit to control the on and off of each modulation current branch, thereby generating a periodically changing current signal and generating a periodically changing charge and discharge current I OSC signal, providing a bias current for the comparator circuit of the oscillation circuit;

[0027] The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor (C1) through comparison, thereby generating an oscillation signal at a predetermined frequency;

[0028] The random delay circuit receives the control signal generated by the random signal generation circuit to control the on / off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and further causing the edge of the oscillation circuit to jitter at a certain frequency on the basis of coarse tuning, randomly changing the delay to slow down the speed of the switching edge.

[0029] The beneficial effects of the present invention are as follows:

[0030] Adopt a combination of periodic modulation and random modulation. Use the periodic modulation technique as coarse tuning, modulate the charge and discharge current of the oscillator with a triangular wave signal to obtain a periodically changing oscillation frequency. Use the random modulation technique as fine tuning to adjust the output signal of the oscillator, and further cause the edge to jitter at a certain frequency on the basis of coarse tuning, randomly changing its delay to slow down the speed of the switching edge. The generated oscillation signal is used to control the on / off of the output buffer to drive the pump capacitor to charge and discharge. Among them, on the premise of ensuring the driving ability of the charge pump, the buffer circuit limits the magnitude of the current charging and discharging the charge pump, reduces the change of the current peak value, and reduces EMI. Description of the Drawings

[0031] Figure 1 It is the oscillation circuit diagram of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0032] Figure 2 It is the level shift circuit diagram of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0033] Figure 3 It is the buffer circuit diagram of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0034] Figure 4A It is the circuit diagram before and after modulation of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0035] Figure 4B It is the power spectrum diagram (unmodulated) of the square wave signal with a power of 2K of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0036] Figure 5A It is the power spectrum diagram after periodic modulation of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0037] Figure 5B It is the power spectrum diagram after random modulation of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention.

[0038] Figure 5C It is the power spectrum diagram after periodic modulation and random modulation of the low-EMI spread-spectrum clock method and its circuit applied to the motor drive chip of the present invention. Specific embodiments

[0039] The following description is used to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments in the following description are only examples, and those skilled in the art can think of other obvious variations. The basic principles defined in the following description of the present invention can be applied to other implementation schemes, variant schemes, improvement schemes, equivalent schemes, and other technical schemes without departing from the spirit and scope of the present invention.

[0040] In the preferred embodiment of the present invention, those skilled in the art should note that the motor drive chip, charge pump circuit, etc. involved in the present invention can be regarded as the prior art.

[0041] Preferred embodiment.

[0042] The present invention provides a low-EMI spread-spectrum clock method applied to a motor drive chip for reducing the EMI of a charge pump circuit, including the following steps:

[0043] Step S1: The oscillation circuit combines periodic modulation and random modulation, uses periodic modulation as coarse tuning to modulate the charging and discharging current of the oscillation circuit with a triangular wave signal, thereby obtaining a periodically changing oscillation frequency, and uses random modulation as fine tuning to adjust the output signal of the oscillation circuit, and then on the basis of coarse tuning, makes the oscillation circuit jitter at the edge below a certain frequency, randomly changes the delay to slow down the speed of the switching edge, and finally in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the energy peak value concentrated on the switching frequency and each harmonic point to reduce the EMI value once;

[0044] Step S2: The level shift circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low voltage domain into an oscillation signal in the high voltage domain to drive the charge pump circuit in the high voltage domain;

[0045] Step S3: The buffer circuit receives the oscillation signal in the high voltage domain output by the level shift circuit, and after buffering, transmits the oscillation signal to the charge pump circuit. The buffer circuit limits the peak current flowing through the pump capacitor Cf of the charge pump circuit through a switching transistor of a predetermined size to reduce the EMI value a second time.

[0046] Specifically, step S1 is specifically implemented as the following steps:

[0047] Step S1.1: The modulation current generation circuit of the oscillation circuit receives the control signal generated by the periodic signal generation circuit to control the on / off of each modulation current branch, thereby generating a periodically varying current signal and superimposing it to generate a periodically varying charge-discharge current I OSC signal, which provides a bias current for the comparator circuit of the oscillation circuit;

[0048] Step S1.2: The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor (C1) through comparison, thereby generating an oscillation signal at a predetermined frequency (Steps S1.1 and S1.2 are coarse tuning);

[0049] Step S1.3: The random delay circuit of the oscillation circuit receives the control signal generated by the random signal generation circuit to control the on / off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and further causing the edge of the oscillation circuit to jitter at a certain frequency on the basis of coarse tuning, randomly changing the delay to slow down the speed of the switching edge (Step S1.3 is fine tuning).

[0050] More specifically, Step S1.2 is specifically implemented as follows:

[0051] The charging current is made equal to the discharging current by the modulation current generation circuit, the initial voltage of the charging capacitor C1 is 0, and the output signal Vout of the comparator U1 is at a low level, so that the switch S1 is turned on and the switch S2 is turned off, and then the charge-discharge current I OSC signal charges the charging capacitor C1, and at the same time the switch S3 is turned on and the switch S4 is turned off, and the negative terminal of the comparator U1 selects VrefH;

[0052] When the voltage on the charging capacitor C1 is greater than VrefH, the output signal Vout is at a high level, so that the switch S1 is turned off and the switch S2 is turned on, and the charge-discharge current I OSC signal discharges the charging capacitor C1, and at the same time the switch S3 is turned off and the switch S4 is turned on, and the negative terminal of the comparator U1 selects VrefL;

[0053] When the charging capacitor C1 discharges to below VrefL, the output signal Vout turns to a low level, and then the charging capacitor C1 is recharged again, thereby generating an oscillation signal at the required frequency.

[0054] The present invention also discloses a low-EMI spread-spectrum clock circuit applied to a motor drive chip, including an oscillation circuit, a level shift circuit, and a (BUFFER or buffer) buffer circuit, wherein:

[0055] The oscillation circuit combines periodic modulation and random modulation. The periodic modulation is used as coarse tuning, so that the charging and discharging current of the oscillation circuit is modulated by a triangular wave signal, thereby obtaining a periodically varying oscillation frequency. The random modulation is used as fine tuning, so that the output signal of the oscillation circuit is adjusted, and then on the basis of the coarse tuning, the edge of the oscillation circuit jitters at a certain frequency, randomly changing the delay to slow down the speed of the switching edge. Finally, in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the peak energy value concentrated on the switching frequency and each harmonic point to reduce the EMI value once.

[0056] The level shift circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low voltage domain into an oscillation signal in the high voltage domain, so as to drive the charge pump circuit in the high voltage domain.

[0057] The buffer circuit receives the oscillation signal in the high voltage domain output by the level shift circuit and transmits the oscillation signal to the charge pump circuit after buffering. The buffer circuit limits the peak current flowing through the charge pump circuit (pump capacitor Cf) through a switching transistor of a predetermined size to reduce the EMI value a second time.

[0058] Specifically, the oscillation circuit includes a modulation current generation circuit, a comparator circuit, and a random delay circuit, where:

[0059] The modulation current generation circuit receives the control signal generated by the periodic signal generation circuit to control the on / off of each modulation current branch, thereby generating a periodically varying current signal and superimposing it to generate a periodically varying charging and discharging current I OSC signal, providing a bias current for the comparator circuit of the oscillation circuit.

[0060] The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor (C1) through comparison, and generates an oscillation signal at a predetermined frequency.

[0061] The random delay circuit receives the control signal generated by the random signal generation circuit to control the on / off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and then on the basis of the coarse tuning, the edge of the oscillation circuit jitters at a certain frequency, randomly changing the delay to slow down the speed of the switching edge.

[0062] Specifically, the modulation current generation circuit includes a switch S1, a switch S2, and several modulation current branches, where:

[0063] The combined output terminal of the circuit branch is used to generate a periodically varying charging and discharging current I OSCa signal, and the combined output terminal of the current branch is grounded through the switch S1 and the switch S2 in sequence, and both ends of the switch S2 (and the series charging and discharging current I OSC signal) are shunted with a charging capacitor C1;

[0064] Each of the modulation current branches is provided with a first control switch and a current source (as Figure 1 shown, the modulation current branch is controlled by a periodic signal generation circuit, and the first control switch is controlled by control signals QO-Q3, thereby combining and varying the power sources of each modulation current branch. The switch and current source I0 corresponding to signal Q0 form one branch, the switch and current source 2I0 corresponding to signal Q1 form one branch, the switch and current source 4I0 corresponding to signal Q2 form one branch, and the switch and current source 8I0 corresponding to signal Q3 form one branch).

[0065] More specifically, the comparator circuit includes a comparator U1, wherein:

[0066] The positive input terminal of the comparator U1 is connected to the common connection terminal of the switch S1 and the switch S2;

[0067] One path of the negative input terminal of the comparator U1 is connected to the signal terminal VrefH through the switch S3, and the other path of the negative input terminal of the comparator is connected to the signal terminal VrefL through the switch S4;

[0068] The output terminal (output signal Vout) of the comparator U1 is electrically connected to the switch S1, the switch S2, the switch S3, and the switch S4 respectively.

[0069] Furthermore, the random delay circuit includes a plurality of delay branches, and each delay branch is provided with a second control switch and a capacitor (the delay branch is controlled by a random signal generation circuit, and the second control switch is controlled by control signals Q4-Q7, thereby combining and varying the capacitors of each branch, as Figure 1 shown, the switch and capacitor C2 corresponding to signal Q4 form one branch, the switch and capacitor C3 corresponding to signal Q5 form one branch, the switch and capacitor C4 corresponding to signal Q6 form one branch, and the switch and capacitor C5 corresponding to signal Q7 form one branch).

[0070] As Figure 2 shown, the level shift circuit includes switching transistors MN2, MN3, MP3, MP4, MN6, and MN7, wherein:

[0071] The gates of the switching transistor MN2 and the switching transistor MN3 are both electrically connected to the output terminal of the random delay circuit (connected through VIN). The switching transistor MN2 is electrically connected to the switching transistor MP1 through the switching transistor MN4, and the switching transistor MN3 is electrically connected to the switching transistor MP2 through the switching transistor MN5;

[0072] The common connection terminal of the drain of the switching transistor MP3 and the drain of the switching transistor MN6 is connected to the output terminal CLKA, and the common connection terminal of the drain of the switching transistor MP4 and the drain of the switching transistor MN7 is connected to the output terminal CLKB.

[0073] As Figure 3 shown, the buffer circuit includes switching transistors MN8, MN9, MN10, and MN11, where:

[0074] The common connection terminal of the gates of the switching transistor MN8 and the switching transistor MN9 is connected to the output terminal CLKA, and the common connection terminal of the gates of the switching transistor MN10 and the switching transistor MN11 is connected to the output terminal CLKB;

[0075] The drain of the switching transistor MN9 is electrically connected to the source of the switching transistor MP7, and the gate of the switching transistor MP7 is connected to the output terminal CLKA. The drain of the switching transistor MN10 is electrically connected to the source of the switching transistor MP6, and the gate of the switching transistor MP6 is connected to the output terminal CLKB;

[0076] The common connection terminal of the drain of the switching transistor MN8 and the source of the switching transistor MP8 is connected to the output terminal OUTA. The common connection terminal of the drain of the switching transistor MN11 and the source of the switching transistor MP9 is connected to the output terminal OUTB (one path of the output terminal OUTA is connected to the switching transistor Q9 at the positive electrode of the pumping capacitor Cf, and the other path is directly electrically connected to the negative electrode of the pumping capacitor Cf. The output terminal OUTB is connected to the switching transistor Q8 at the positive electrode of the pumping capacitor Cf. One end of the switching transistor Q9 far from the positive electrode of the pumping capacitor Cf is connected to the negative electrode of the pumping capacitor Cf through a zener diode. At the same time, the output terminal OUTA and the output terminal OUTB are used to control the on and off of the switching transistors Q8 and Q9 with an inverted signal).

[0077] The principle of the present invention is:

[0078] The present invention mainly reduces the EMI of the circuit in two ways. One is to modulate the frequency of the switching transistor, disperse the peak energy concentrated on the switching frequency and harmonic frequencies to the surrounding frequency bands, and reduce the energy peak value concentrated on the switching frequency and each harmonic point to reduce the EMI value, as Figure 4A shown;

[0079] For more convenient and intuitive comparison, the power spectrum of a square wave signal with a frequency of 2K is asFigure 4B As shown, the periodic modulation and random modulation are compared through MATLAB simulation waveforms, and the results are as Figure 5A and 5B shown. It is found that under the same conditions, the effect of random modulation is better than that of periodic modulation. In this paper, a combined modulation method of periodic modulation technology and random modulation technology is adopted to reduce the EMI of the circuit. As Figure 5C shown, it can be found through the above power spectrum comparison that the method of combining the two can significantly reduce the EMI.

[0080] The other is to limit the magnitude of the charging and discharging current of the capacitor, that is, to limit the peak value of di / dt flowing through the capacitor, so as to reduce EMI.

[0081] The new spread spectrum clock circuit includes an oscillation circuit, a level shift circuit, and a BUFFER circuit. As Figure 1 shown, the specific oscillation circuit implementation of the present invention is mainly divided into three parts, namely a modulation current generation circuit, a comparator circuit, and a random delay circuit. Among them, the control signals Q0-Q3 in the modulation current generation circuit are generated by a periodic signal generation circuit. Its output signal can change from 0000 to 1111, thus controlling the on and off of a certain path of current, thereby generating a periodically changing current signal, which is then superimposed on I1 to generate a periodically changing charging and discharging current IOSC(I OSC ) signal to provide a bias current for the comparator. The periodic signal generation circuit is composed of a 4-bit adder and a D flip-flop to generate modulation signals Q0-Q3. The control signals Q4-Q7 in the random delay circuit are generated by a random signal generation circuit, where the capacitance values of C2-C5 are 1:2:4:8. The on and off of a certain path of current are controlled by the random signal generation circuit to generate Q4-Q7, adjusting the output signal of the oscillator, and then making the edge jitter at a certain frequency on the basis of coarse tuning, randomly changing its delay to slow down the speed of the switching edge. The pseudo-random signal selection is generated by a 4-bit linear feedback shift register and a feedback network.

[0082] The working process is as follows: Let the charging current be equal to the discharging current (IOSC above the switch S1 is equal to IOSC below the switch S2). At the beginning, the voltage on the capacitor is 0, and VOUT (Vout) is at a low level. Therefore, S1 is turned on and S2 is turned off. IOSC charges the capacitor C1, and at the same time S3 is turned on and S4 is turned off. The negative terminal of the comparator selects VrefH. When the voltage on the capacitor is greater than VrefH, Vout is at a high level. At this time, S1 is turned off and S2 is turned on. IOSC discharges the capacitor C1, and at the same time S3 is turned off and S4 is turned on. The negative terminal of the comparator selects VrefL. When the capacitor discharges below VrefL, the VOUT signal turns back to the low level. Next, the capacitor is recharged again, and so on, and an oscillation signal with the required frequency can be generated.

[0083] Figure 2 It is a level shift circuit. Since the oscillation signal described above is in the low voltage domain and cannot drive the charge pump in the high voltage domain, a level shift circuit is required to raise the oscillation signal to the high voltage domain. Figure 3 It is an output buffer circuit. The oscillation signal is output to the pump capacitor Cf of the subsequent charge pump through the buffer circuit, and at the same time, the on and off of the switching transistors Q8 and Q9 are controlled. Among them, MP5 and MN12 are small-sized transistors, mainly to limit the peak value of di / dt flowing through the capacitor and reduce EMI.

[0084] It is worth mentioning that the technical features such as the motor drive chip and the charge pump circuit involved in this invention patent application should be regarded as the prior art. The specific structures, working principles, and possible control methods and spatial arrangement methods of these technical features can be selected conventionally in the art and should not be regarded as the invention points of this invention patent. This invention patent will not be further specifically elaborated.

[0085] For those skilled in the art, it is still possible to modify the technical solutions recorded in the foregoing embodiments or perform equivalent replacements on some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A spread-spectrum clock method with low EMI applied to a motor drive chip, used to reduce the EMI of a charge pump circuit, characterized in that, It includes the following steps: Step S1: The oscillation circuit combines periodic modulation and random modulation. The periodic modulation is used as coarse tuning, so that the charging and discharging current of the oscillation circuit is modulated by a triangular wave signal, thereby obtaining a periodically changing oscillation frequency. The random modulation is used as fine tuning to adjust the output signal of the oscillation circuit, and then on the basis of the coarse tuning, the edge of the oscillation circuit jitters at a certain frequency, randomly changing the delay to slow down the speed of the switching edge. Finally, in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the peak energy value concentrated on the switching frequency and each harmonic point to reduce the EMI value once; The specific implementation of step S1 is the following steps: Step S1.1: The modulation current generation circuit of the oscillation circuit receives the control signal generated by the periodic signal generation circuit to control the on / off of each modulation current branch, thereby generating a periodically varying current signal and generating a periodically varying charge / discharge current I after superposition, providing a bias current for the comparator circuit of the oscillation circuit; OSC signal; Step S1.2: The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor after comparison, and then generates an oscillation signal at a predetermined frequency; Step S1.3: The random delay circuit of the oscillation circuit receives the control signal generated by the random signal generation circuit to control the on and off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and then on the basis of the coarse tuning, the edge of the oscillation circuit jitters at a certain frequency, randomly changing the delay to slow down the speed of the switching edge; Step S2: The level shift circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low voltage domain into an oscillation signal in the high voltage domain to drive the charge pump circuit in the high voltage domain; Step S3: The buffer circuit receives the oscillation signal in the high voltage domain output by the level shift circuit and transmits the oscillation signal to the charge pump circuit after buffering. The buffer circuit limits the peak current flowing through the charge pump circuit through a switching transistor of a predetermined size to reduce the EMI value a second time.

2. A low-EMI spread-spectrum clock method applied to a motor drive chip according to claim 1, wherein The specific implementation of step S1.2 is: The charging current is made equal to the discharging current through the modulation current generation circuit. The initial voltage of the charging capacitor C1 is 0, and the output signal Vout of the comparator U1 is at a low level, so that the switch S1 is turned on and the switch S2 is turned off, and then the charge and discharge current I OSC charges the charging capacitor C1. At the same time, the switch S3 is turned on and the switch S4 is turned off, and the negative terminal of the comparator U1 selects VrefH; When the voltage on the charging capacitor C1 is greater than VrefH, the output signal Vout is at a high level, so that the switch S1 is turned off and the switch S2 is turned on, and the charge and discharge current I OSC The signal discharges the charging capacitor C1. At the same time, the switch S3 is turned off and the switch S4 is turned on, and the negative terminal of the comparator U1 selects VrefL; When the charging capacitor C1 discharges to below VrefL, the output signal Vout turns to low level. Next, the charging capacitor C1 is recharged again to generate an oscillation signal at the required frequency.

3. A spread-spectrum clock circuit with low EMI for a motor drive chip, which is applied to the spread-spectrum clock method with low EMI for a motor drive chip according to any one of claims 1-2, and is characterized in that, It includes an oscillation circuit, a level shift circuit and a buffer circuit, where: The oscillation circuit combines periodic modulation and random modulation. The periodic modulation is used as coarse tuning, so that the charging and discharging current of the oscillation circuit is modulated by a triangular wave signal, thereby obtaining a periodically changing oscillation frequency. The random modulation is used as fine tuning to adjust the output signal of the oscillation circuit, and then on the basis of the coarse tuning, the edge of the oscillation circuit jitters at a certain frequency, randomly changing the delay to slow down the speed of the switching edge. Finally, in the output oscillation signal, the peak energy concentrated on the switching frequency and harmonic frequencies is dispersed to the surrounding frequency bands, thereby reducing the peak energy value concentrated on the switching frequency and each harmonic point to reduce the EMI value once; The level shift circuit receives the oscillation signal output by the oscillation circuit and converts the oscillation signal in the low voltage domain into an oscillation signal in the high voltage domain to drive the charge pump circuit in the high voltage domain; The buffer circuit receives the oscillation signal in the high-voltage domain output by the level-shifting circuit and transmits the oscillation signal to the charge pump circuit after buffering. The buffer circuit limits the peak value of the current flowing through the charge pump circuit through a switching transistor of a predetermined size to further reduce the EMI value.

4. A low-EMI spread-spectrum clock circuit applied to a motor drive chip according to claim 3, characterized in that, The oscillation circuit includes a modulation current generation circuit, a comparator circuit, and a random delay circuit, where: The modulation current generation circuit receives the control signal generated by the periodic signal generation circuit to control the on / off of each modulation current branch, thereby generating a periodically varying current signal and superimposing them to generate a periodically varying charge / discharge current I OSC signal, and provides a bias current for the comparator circuit of the oscillation circuit; The comparator circuit takes the voltage value of the charging capacitor as the positive input and the reference voltage as the negative input, and then continuously charges and discharges the charging capacitor through comparison, and then generates an oscillation signal at a predetermined frequency; The random delay circuit receives the control signal generated by the random signal generation circuit to control the on / off of each delay branch, thereby adjusting the oscillation signal output by the comparator circuit, and further causing the edge of the oscillation circuit to jitter at a certain frequency on the basis of coarse tuning, and randomly changing the delay to slow down the speed of the switching edge.

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