A slope detection circuit with programmable blanking function and switching power supply system

Abstract

The application provides a slope detection circuit with programmable blanking function and a switching power supply system, comprising: a slope generator generating an initial blanking slope signal; a programmable module and an amplitude modulation circuit connected to the slope generator respectively, used for adjusting the blanking slope falling time and amplitude of the blanking slope signal respectively, forming a required slope DC voltage signal; a capacitive coupling differential circuit used for sampling the voltage change slope of the SENSE terminal and outputting a sampling voltage positively correlated with the voltage change slope of the SENSE terminal; a comparison circuit receiving the voltage after the superposition of the sampling voltage and the slope DC voltage signal, and comparing the superposed voltage with the first threshold voltage and the second threshold voltage set internally respectively, so as to judge whether the voltage change slope of the SENSE terminal reaches the expectation, and complete the slope detection. The circuit structure of the application is simple, can realize the slope detection and resonance valley bottom detection function, and realize the anti-misoperation opening function applied in the synchronous rectification control DCM mode.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and specifically to a slope detection circuit and switching power supply system with programmable blanking function. Background Technology

[0002] The integrated circuit field typically utilizes a wide variety of slope detection circuits, ranging from analog to digital designs, showcasing a diverse array of complexity and innovation. However, with the rapid development of integrated circuits in recent years and increasingly fierce market competition, the requirements for reducing chip costs, increasing functionality, and optimizing performance have become more stringent. Therefore, designing a streamlined and highly reliable slope detection circuit is bound to be favored by engineers.

[0003] Meanwhile, in the field of switching power supplies, with the widespread use of new energy efficiency standards, the efficiency requirements for switching power supplies are becoming increasingly stringent. Using quasi-resonant valley conduction can effectively improve the efficiency of switching power supplies, reduce the temperature rise of switching power supplies, and increase the power density of switching power supplies.

[0004] As for the synchronous rectifier controller on the secondary side, it is usually in a fixed voltage turn-on mode. Therefore, how to avoid the synchronous rectifier controller from being turned on incorrectly during the quasi-resonance process is also a problem that we urgently need to solve. Summary of the Invention

[0005] To address the problems existing in the prior art, a simplified and highly reliable slope detection circuit with programmable blanking function is provided. This circuit can be applied in the field of switching power supplies, and can effectively realize quasi-resonant valley detection. It can also prevent the synchronous rectifier controller from being mistakenly turned on due to resonance in DCM, QR and other operating modes.

[0006] The technical solution adopted in this invention is as follows: a slope detection circuit with programmable blanking function, including a ramp generator, a programmable module, an amplitude modulation circuit, a capacitively coupled differentiating circuit, and a comparator circuit;

[0007] The ramp generator produces an initial blanking ramp signal based on the enable signal.

[0008] The programmable module and the amplitude modulation circuit are respectively connected to the ramp generator to adjust the blanking ramp fall time and amplitude of the blanking ramp signal, so as to form the required fall time and amplitude and the ramp DC voltage signal with blanking function.

[0009] A capacitively coupled differentiating circuit is used to sample the slope of the voltage change at the SENSE terminal and output a sampled voltage that is positively correlated with the slope of the voltage change at the SENSE terminal.

[0010] The comparison circuit receives the voltage after the sampling voltage and the ramp DC voltage signal are superimposed, and compares the superimposed voltage with the internally set first threshold voltage and second threshold voltage respectively, so as to determine whether the slope of the voltage change at the SENSE terminal reaches the expectation and complete the slope detection.

[0011] Furthermore, the ramp generator includes a first proportional current mirror circuit, a second proportional current mirror circuit, an NMOS transistor N01, a PMOS transistor P01, and a capacitor C01; the input terminal of the first proportional current mirror circuit is connected to a programmable module, and the output terminal is connected to the input terminal of the second proportional current mirror circuit; the output terminal of the second proportional current mirror circuit is connected to the source of the NMOS transistor N01; the drain of the NMOS transistor N01 is connected to the drain of the PMOS transistor P01 and the positive terminal of the capacitor C01; the negative terminal of the capacitor C01 is grounded; the source of the PMOS transistor P01 is connected to VCC; and the gates of both the NMOS transistor N01 and the PMOS transistor P01 are connected to the enable signal EN.

[0012] Furthermore, the programmable module is connected between the input terminal of the first proportional current mirror circuit and ground, and the programmable function is realized through an adjustable resistor or an adjustable bias current.

[0013] Furthermore, the amplitude modulation circuit includes a PMOS transistor P02, a bipolar transistor NPN1, resistors R01, R02, R03, and R04; resistors R01, R02, and PMOS transistor P02 are connected in series between VCC and GND. The gate of PMOS transistor P02 is connected to the positive terminal of capacitor C01, the source is connected to resistor R02, and the drain is grounded; bipolar transistor NPN1, resistors R03, and R04 are connected in series between VCC and GND. The base of bipolar transistor NPN1 is connected to the series node of resistors R01 and R02, the collector is connected to VCC, and the emitter is connected to resistor R03; the series node of resistors R03 and R04 is connected to the comparator circuit.

[0014] Furthermore, the positive terminal of the capacitively coupled differentiating circuit is connected to the SENSE terminal, and the negative terminal is connected to the comparator circuit.

[0015] Furthermore, the capacitively coupled differentiating circuit is a capacitor or a MOSFET.

[0016] Furthermore, the comparator circuit includes a fixed bias current circuit, a third proportional current mirror circuit, mirrored NMOS transistors N02 and N03 of the same size, resistors R05 / R06 of the same specification, and a first comparator COMP1 and a second comparator COMP2. The fixed bias current circuit is connected between the input terminal of the third proportional current mirror circuit and GND, providing a constant bias current. The first and second output terminals of the third proportional current mirror circuit are respectively connected to the drains of the mirrored NMOS transistors N02 and N03. The gates of the mirrored NMOS transistors N02 and N03 are shorted and connected to the drain of NMOS transistor N03. One end of resistor R05 is connected to the source of NMOS transistor N02, and the other end is connected to the negative terminal of the capacitive coupling differentiator circuit and the series node of resistors R03 and R04 of the amplitude modulation circuit. Resistor R06 is connected between the source of NMOS transistor N03 and GND. The non-inverting input terminal of the first comparator COMP1 is connected to the first threshold voltage V. TH1 The output terminal is VOUT1; the inverting input terminal of the second comparator COMP2 is connected to the second threshold voltage V. TH2 The output terminal is VOUT2; the inverting input terminal of the first comparator COMP1 and the non-inverting input terminal of the second comparator COMP2 are both connected to node E between the drain of the NMOS transistor N02 and the first output terminal of the third proportional current mirror circuit.

[0017] Furthermore, the slope detection process of the comparison circuit is as follows: VOUT1 outputs a high level, indicating that the slope of the falling edge at the SENSE terminal has reached a certain standard, which is related to the first threshold voltage V. TH1 The VOUT2 output is high, and the slope of the rising edge at the surface SENSE pin reaches a certain standard, which is related to the second threshold voltage. TH2 ...

[0018] Furthermore, the comparison circuit also includes a resonant valley detection function: between the falling edge of the VOUT1 pulse signal and the immediately following rising edge of the VOUT2 pulse signal, there must be a point where the slope of the voltage change at the SENSE terminal is 0, and this point is the valley.

[0019] This invention also proposes a switching power supply system, including a transformer, a switching power supply controller, a power switching transistor, a synchronous rectifier MOSFET, an output energy storage capacitor, a synchronous rectifier controller, and a programmable resistor; the synchronous rectifier controller integrates the aforementioned slope detection circuit with programmable blanking function; the drain of the power switching transistor is connected to one end of the primary side of the transformer, and the source is connected to ground; the output of the switching power supply controller is connected to the gate of the power switching transistor; the drain of the synchronous rectifier MOSFET is connected to one end of the secondary side of the transformer and the slope sampling input SENSE terminal of the synchronous rectifier controller; the source of the synchronous rectifier MOSFET is grounded; the gate of the synchronous rectifier MOSFET is connected to the output control terminal GATE of the synchronous rectifier controller; the other end of the secondary side of the transformer is connected to the output energy storage capacitor and the VCC terminal of the synchronous rectifier controller, responsible for charging the output energy storage capacitor and the VCC terminal of the synchronous rectifier controller.

[0020] Compared with existing technologies, the advantages of adopting the above technical solution are as follows: 1. The slope detection circuit is simplified to the greatest extent while ensuring reliability; 2. A dual threshold comparison mode is introduced into the comparison circuit to realize the resonance valley detection function; 3. On the basis of the ordinary slope detection circuit, a programmable blanking function is added. When applied to the synchronous rectification control system, it can effectively shield the slope detection during the resonance stage, prevent the synchronous rectification controller from being turned on erroneously during resonance, and thus protect the power supply system. Attached Figure Description

[0021] Figure 1 This is a structural diagram of the slope detection circuit with programmable blanking function proposed in this invention.

[0022] Figure 2 This is a schematic diagram of a slope detection circuit with programmable blanking function in one embodiment of the present invention.

[0023] Figure 3 This is a schematic diagram illustrating the working principle of a slope detection circuit with programmable blanking function according to an embodiment of the present invention when a pulse signal is applied to the SENSE terminal.

[0024] Figure 4 This is a schematic diagram of a switching power supply system that uses a slope detection circuit with programmable blanking function.

[0025] Figure 5 for Figure 4 The diagram shows the principle of preventing the synchronous rectifier controller from turning on erroneously during resonance in a switching power supply system.

[0026] Figure 6 This is a schematic diagram illustrating the working principle of a slope detection circuit with programmable blanking function applied in a switching power supply system to achieve the function of detecting the resonant valley.

[0027] Figure reference numerals: 1-Slope generator, 2-Programmable module, 3-Amplitude modulation circuit, 4-Capacitive coupling circuit, 5-Comparison circuit, 6-Transformer, 7-Switching power supply controller, 8-Power switching transistor, 9-Synchronous rectifier MOSFET, 10-Output energy storage capacitor, 11-Synchronous rectifier controller. Detailed Implementation

[0028] The embodiments of this application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar modules or modules having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Rather, the embodiments of this application include all variations, modifications, and equivalents falling within the spirit and scope of the appended claims.

[0029] Example 1

[0030] like Figure 1 As shown, this embodiment proposes a slope detection circuit with programmable blanking function, including a ramp generator 1, a programmable module 2, an amplitude modulation circuit 3, a capacitively coupled differentiating circuit 4, and a comparator circuit 5;

[0031] Slope generator 1 generates an initial blanking slope signal based on the enable signal;

[0032] Programmable module 2 and amplitude modulation circuit 3 are respectively connected to ramp generator, which are used to adjust the blanking ramp fall time and amplitude of the blanking ramp signal to form the required fall time and amplitude and ramp DC voltage signal with blanking function.

[0033] The capacitively coupled differentiating circuit 4 is used to sample the slope of the voltage change at the SENSE terminal and output a sampled voltage that is positively correlated with the slope of the voltage change at the SENSE terminal.

[0034] Comparison circuit 5 receives the voltage after the sampling voltage and the ramp DC voltage signal are superimposed, and compares the superimposed voltage with the internally set first threshold voltage and second threshold voltage respectively, so as to determine whether the slope of the voltage change at the SENSE terminal reaches the expectation and completes the slope detection.

[0035] Specifically, such as Figure 2As shown, the ramp generator 1 includes a first proportional current mirror circuit, a second proportional current mirror circuit, an NMOS transistor N01, a PMOS transistor P01, and a capacitor C01. The input terminal of the first proportional current mirror circuit is connected to a programmable module, and the output terminal is connected to the input terminal of the second proportional current mirror circuit. The output terminal of the second proportional current mirror circuit is connected to the source of the NMOS transistor N01. The drain of the NMOS transistor N01 is connected to the drain of the PMOS transistor P01 and the positive terminal of the capacitor C01. The negative terminal of the capacitor C01 is grounded. The source of the PMOS transistor P01 is connected to VCC. The gates of both the NMOS transistor N01 and the PMOS transistor P01 are connected to the enable signal EN. The first and second proportional current mirror circuits are conventional integrated circuit components, constructed using basic semiconductor devices such as MOS transistors or bipolar transistors. In this embodiment, any form of current mirror can be used.

[0036] Programmable module 2 is connected between the input terminal of the first proportional current mirror circuit and ground, and its programmable function is achieved through an adjustable resistor or an adjustable bias current. In this embodiment, the programmable module is mainly used for adjusting... Figure 2 The bias currents I1, I2, and I3 are used to change the discharge rate of capacitor C01, thereby adjusting the fall time of the blanking ramp.

[0037] The amplitude modulation circuit 3 includes a PMOS transistor P02, a bipolar transistor NPN1, resistors R01, R02, R03, and R04. Resistors R01, R02, and PMOS transistor P02 are connected in series between VCC and GND. The gate of PMOS transistor P02 is connected to the positive terminal of capacitor C01, the source is connected to resistor R02, and the drain is grounded. Bipolar transistor NPN1, resistors R03 and R04 are connected in series between VCC and GND. The base of bipolar transistor NPN1 is connected to the series junction of resistors R01 and R02, the collector is connected to VCC, and the emitter is connected to resistor R03. The series junction of resistors R03 and R04 is connected to a comparator circuit.

[0038] After being processed by the aforementioned ramp generator 1, programmable module 2, and amplitude modulation circuit 3, a ramp DC voltage signal V with appropriate fall time and amplitude and blanking function is obtained. C1 .

[0039] The positive terminal of the capacitively coupled differentiating circuit 4 is connected to the SENSE terminal, and the negative terminal is connected to the comparator circuit. The capacitively coupled differentiating circuit is preferably implemented using a capacitor or a MOSFET; in this embodiment, a capacitor is used. The capacitively coupled differentiating circuit samples the rate of change of the voltage at the SENSE terminal and outputs a sampling voltage V that is positively correlated with the slope of the rate of change. C2 Slope DC voltage signal V C1 With sampling voltage V C2Superposition Figure 2 Voltage V at node C C Voltage V C It is also positively correlated with the slope of the voltage change at the SENSE terminal.

[0040] The comparator circuit 5 includes a fixed bias current circuit, a third proportional current mirror circuit, mirrored NMOS transistors N02 and N03 of the same size, resistors R05 / R06 of the same specification, and a first comparator COMP1 and a second comparator COMP2. The fixed bias current circuit is connected between the input terminal of the third proportional current mirror circuit and GND, providing a constant bias current. The first and second output terminals of the third proportional current mirror circuit are respectively connected to the drains of the mirrored NMOS transistors N02 and N03. The gates of the mirrored NMOS transistors N02 and N03 are shorted and connected to the drain of NMOS transistor N03. One end of resistor R05 is connected to the source of NMOS transistor N02, and the other end is connected to the negative terminal of the capacitive coupling differentiator circuit and the series node of resistors R03 and R04 of the amplitude modulation circuit. Resistor R06 is connected between the source of NMOS transistor N03 and GND. The non-inverting input terminal of the first comparator COMP1 is connected to the first threshold voltage V. TH1 The output terminal is VOUT1; the inverting input terminal of the second comparator COMP2 is connected to the second threshold voltage V. TH2 The output terminal is VOUT2; the inverting input terminal of the first comparator COMP1 and the non-inverting input terminal of the second comparator COMP2 are both connected to node E between the drain of the NMOS transistor N02 and the first output terminal of the third proportional current mirror circuit. It should be noted that in this embodiment, the fixed bias current circuit can be implemented by any module or circuit capable of providing a constant bias current.

[0041] Furthermore, in conjunction with the appendix Figure 1 , Figure 2 The working process of this slope detection circuit will be explained in detail. Figure 2 At node C, Kirchhoff's current law yields the following expression:

[0042]

[0043] Typically, the bias currents I7 and I4 are very small and can be approximated as negligible, that is:

[0044]

[0045] When R 04 and C X Smaller values ​​make hour:

[0046] The expression can be obtained as follows:

[0047]

[0048] Therefore, we can conclude that: in I7, I4, R 04 and C X When the circuit parameters are set within a reasonable range, V C and An approximately positively correlated relationship, and at the same time, due to V E and V C It is also a positive correlation, so V E and This relationship is also approximately positively correlated. Figure 3 , Figure 5 , Figure 6 SENSE, V C V E This is also clearly reflected in the waveform.

[0049] A ramp generator, programmable module, and amplitude modulation circuit are used to generate a programmable blanking ramp signal. This ramp detection circuit is applied in the synchronous rectifier controller. When the synchronous rectifier controller operates in DCM mode, the blanking ramp signal effectively masks the ramp detection function during the resonant phase. Figure 5 As shown, when V E >V TH1 VOUT1 outputs a low-level signal, so even if the voltage at the SENSE terminal is detected to be lower than the synchronous turn-on threshold, the GATE output terminal of the synchronous rectifier controller will not be turned on because the slope sampling signal VOUT1, which is a necessary but not sufficient condition for the synchronous rectifier controller to turn on, fails to flip to a high level in time.

[0050] like Figure 3 The diagram shows the working principle of the slope detection circuit when a pulse signal is applied to the SENSE terminal. The comparator circuit will... Figure 2 The voltage V at node E in the middle C The positively correlated voltage VE and the internally set first threshold voltage V TH1 Second threshold voltage V TH2 Comparison (where the first threshold voltage V) TH1 Less than the second threshold voltage V TH2 This is used to determine whether the slope of the voltage change at the SENSE terminal reaches the expected value; when the slope of the voltage change at the SENSE terminal... The summation voltage V is negative (i.e., falling edge) and large enough that the summation voltage V... E <V TH1 When VOUT1 is high, it will output a high level; when the slope of the voltage change at the SENSE terminal is... The summation voltage V is positive (i.e., rising edge) and large enough that the summation voltage V... E >V TH2When VOUT2 outputs a high level, that is, VOUT1 outputs a high level, indicating that the slope of the falling edge at the SENSE terminal has reached a certain standard (this standard is related to the set first threshold voltage V). TH1 The value is related to the magnitude of the voltage; the specific value should be determined according to the specific application. A high-level output from VOUT2 indicates that the slope of the rising edge at the SENSE terminal has reached a certain standard (this standard is related to the set second threshold voltage V). TH2 The magnitude is related to the specific application; the exact value should be determined based on the specific application. Furthermore, there must be a slope for the voltage change at the SENSE terminal between the falling edge of the VOUT1 pulse signal and the immediately following rising edge of the VOUT2 pulse signal. A point with a value of 0 is a trough.

[0051] Example 2

[0052] This embodiment proposes a switching power supply system, such as Figure 4 As shown, the switching power supply system includes a transformer 6, a switching power supply controller 7, a power switching transistor 8, a synchronous rectifier MOSFET 9, an output energy storage capacitor 10, a synchronous rectifier controller 11, and a programmable resistor 12. The synchronous rectifier controller 11 integrates the slope detection circuit with programmable blanking function described in Embodiment 1. The programmable module in the original slope detection circuit is externally placed in the synchronous rectifier controller and implemented by the programmable resistor 12.

[0053] Specifically, the drain of the power switch 8 is connected to one end of the primary side of the transformer 6, and the source is connected to ground. The output of the switching power supply controller 7 is connected to the gate of the power switch 8. The drain of the synchronous rectifier MOSFET 9 is connected to one end of the secondary side of the transformer 6 and the slope sampling input SENSE terminal of the synchronous rectifier controller 11. The source of the synchronous rectifier MOSFET 9 is grounded. The gate of the synchronous rectifier MOSFET 9 is connected to the output control terminal GATE of the synchronous rectifier controller 11. The other end of the secondary side of the transformer 6 is connected to the output energy storage capacitor 10 and the VCC terminal of the synchronous rectifier controller 11, which is responsible for charging the output energy storage capacitor 10 and the VCC terminal of the synchronous rectifier controller 11.

[0054] Combination Figure 4 and Figure 6 The working process of the switching power supply system in this embodiment will be described.

[0055] When the switching power supply system is operating, the switching power supply controller 7 controls the power switching transistor 8. Regardless of whether the power supply system operates in continuous current, critically continuous current, or discontinuous current mode, when the power switching transistor 8 is turned on, energy is stored in the transformer 6. According to Faraday's law and Lenz's law, the inductor current on the primary side of the transformer 6 gradually increases, and the induced voltage is positive at the upper end and negative at the lower end. The induced voltage on the secondary side is positive at the lower end and negative at the upper end. At this time, the parasitic diode of the synchronous rectifier MOSFET 9 is reverse biased, so the drain-source voltage difference V of the synchronous rectifier MOSFET 9 is... SENSE When it becomes high, its amplitude is equal to the sum of the output voltage and the voltage induced by the secondary inductor.

[0056] When power switch 8 is turned off, the primary side inductor current of transformer 6 gradually decreases, and the induced voltage is positive at the lower end and negative at the upper end. The induced voltage of the secondary side inductor is positive at the upper end and negative at the lower end. The drain voltage V of synchronous rectifier MOSFET 9... SENSE The current drops rapidly, and the parasitic diode of synchronous rectifier MOSFET 9 turns on, enabling freewheeling.

[0057] When the switching power supply system is operating in DCM mode, when the inductor current in transformer 6 drops to 0 (i.e., Figure 6 China T DEMAG After the process ends, due to the influence of parasitic parameters such as the parasitic capacitance of the synchronous rectifier MOSFET 9, the switching power supply system begins to enter the resonant / magnetic oscillation process, such as... Figure 6 As shown in the DRAIN terminal waveform, if the switching power supply controller 7 has a quasi-resonant valley-bottom conduction function, then at a specific valley, the switching power supply controller 7 will turn on, controlling the power switching transistor 8 to turn on, pulling the DRAIN terminal voltage down to 0. The actual waveform is as follows. Figure 6 DRAIN_ VALLEY As shown.

[0058] Combination Figure 6 Here is a simple explanation of the principle: Figure 6 There must be a valley between the first falling edge of VOUT1 and the first rising edge of VOUT2, the second falling edge of VOUT1 and the second rising edge of VOUT2, the third falling edge of VOUT1 and the third rising edge of VOUT2, the fourth falling edge of VOUT1 and the fourth rising edge of VOUT2, and so on... the nth falling edge of VOUT1 and the nth rising edge of VOUT2 (n is a meaningful positive integer in practical circuit applications). The selection of which valley to choose for conduction can be determined based on actual application requirements. Here, we take the fourth valley in the diagram as an example. Assume that the fourth valley at the DRAIN terminal corresponds to V... E The voltage value is V CENTER If and only if V TH1 V TH2 infinitely close to VCENTER At this time, the falling edge of the fourth pulse of VOUT1 and the rising edge of the fourth pulse of VOUT2 will be infinitely close. Therefore, the falling edge of the fourth pulse of VOUT1 or the rising edge of the fourth pulse of VOUT2 can be considered to correspond to the valley of the waveform at the DRAIN terminal. At this point, the switching power supply controller is turned on, and the waveform of quasi-resonant valley conduction will appear as follows... Figure 6 DRAIN_ VALLEY As shown.

[0059] See Figure 5 ,yes Figure 4 The diagram shown illustrates the principle of a switching power supply system to prevent the synchronous rectifier controller from accidentally turning on during resonant / excitation oscillation. During the resonant / excitation oscillation phase, the width of the blanking ramp is manually set by adjusting the programmable resistor 12, based on empirical values ​​or specific application requirements, to ensure that V... E It is higher than V throughout the entire resonant / excitation oscillation phase. TH1 If VOUT1 remains low, the synchronous rectifier controller will be prevented from being turned on erroneously during this stage, thus ensuring the normal operation of the entire system.

[0060] It should be noted that the slope detection circuit of the present invention can be used not only in switching power supplies, but also in any other form of electronic circuit that needs to detect the slope of voltage changes. As long as it does not depart from the spirit and scope of the present invention, it should be within the scope of protection claimed by the present invention.

[0061] It should be noted that, in the description of the embodiments of the present invention, unless otherwise explicitly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances. The accompanying drawings in the embodiments are used to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0062] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A slope detection circuit with programmable blanking function, characterized in that, It includes a ramp generator, a programmable module, an amplitude modulation circuit, a capacitively coupled differentiating circuit, and a comparator circuit; The ramp generator produces an initial blanking ramp signal based on the enable signal. The programmable module and the amplitude modulation circuit are respectively connected to the ramp generator to adjust the blanking ramp fall time and amplitude of the blanking ramp signal, so as to form the required fall time and amplitude and the ramp DC voltage signal with blanking function. A capacitively coupled differentiating circuit is used to sample the slope of the voltage change at the SENSE terminal and output a sampled voltage that is positively correlated with the slope of the voltage change at the SENSE terminal. The comparison circuit receives the voltage after the sampling voltage and the ramp DC voltage signal are superimposed, and compares the superimposed voltage with the internally set first threshold voltage and second threshold voltage respectively, so as to determine whether the slope of the voltage change at the SENSE terminal reaches the expectation and completes the slope detection. The ramp generator includes a first proportional current mirror circuit, a second proportional current mirror circuit, an NMOS transistor N01, a PMOS transistor P01, and a capacitor C01. The input terminal of the first proportional current mirror circuit is connected to a programmable module, and the output terminal is connected to the input terminal of the second proportional current mirror circuit. The output terminal of the second proportional current mirror circuit is connected to the source of the NMOS transistor N01. The drain of the NMOS transistor N01 is connected to the drain of the PMOS transistor P01 and the positive terminal of the capacitor C01. The negative terminal of the capacitor C01 is grounded. The source of the PMOS transistor P01 is connected to VCC. The gates of both the NMOS transistor N01 and the PMOS transistor P01 are connected to the enable signal EN. The programmable module is connected between the input terminal of the first proportional current mirror circuit and ground, and the programmable function is realized through an adjustable resistor or an adjustable bias current. The amplitude modulation circuit includes a PMOS transistor P02, a bipolar transistor NPN1, resistors R01, R02, R03, and R04. Resistors R01, R02, and PMOS transistor P02 are connected in series between VCC and GND. The gate of PMOS transistor P02 is connected to the positive terminal of capacitor C01, the source is connected to resistor R02, and the drain is grounded. Bipolar transistor NPN1, resistors R03 and R04 are connected in series between VCC and GND. The base of bipolar transistor NPN1 is connected to the series junction of resistors R01 and R02, the collector is connected to VCC, and the emitter is connected to resistor R03. The series junction of resistors R03 and R04 is connected to a comparator circuit.

2. The slope detection circuit with programmable blanking function according to claim 1, characterized in that, The positive terminal of the capacitively coupled differentiating circuit is connected to the SENSE terminal, and the negative terminal is connected to the comparator circuit.

3. The slope detection circuit with programmable blanking function according to claim 2, characterized in that, The capacitive coupling differentiating circuit is a capacitor or a MOSFET.

4. The slope detection circuit with programmable blanking function according to claim 2, characterized in that, The comparator circuit includes a fixed bias current circuit, a third proportional current mirror circuit, mirrored NMOS transistors N02 and N03 of the same size, resistors R05 / R06 of the same specification, and a first comparator COMP1 and a second comparator COMP2; the fixed bias current circuit is connected between the input terminal of the third proportional current mirror circuit and GND to provide a constant bias current. The first and second output terminals of the third proportional current mirror circuit are respectively connected to the drains of the mirrored NMOS transistors N02 and N03; the gates of the mirrored NMOS transistors N02 and N03 are shorted and connected to the drain of NMOS transistor N03; one end of resistor R05 is connected to the source of NMOS transistor N02, and the other end is connected to the negative terminal of the capacitive coupling differentiator circuit and the series node of resistors R03 and R04 in the amplitude modulation circuit; resistor R06 is connected between the source of NMOS transistor N03 and GND; the non-inverting input terminal of the first comparator COMP1 is connected to the first threshold voltage V. TH1 The output terminal is VOUT1; the inverting input terminal of the second comparator COMP2 is connected to the second threshold voltage V. TH2 The output terminal is VOUT2; the inverting input terminal of the first comparator COMP1 and the non-inverting input terminal of the second comparator COMP2 are both connected to node E between the drain of the NMOS transistor N02 and the first output terminal of the third proportional current mirror circuit.

5. The slope detection circuit with programmable blanking function according to claim 4, characterized in that, The slope detection method of the comparator circuit is as follows: VOUT1 outputs a high level, indicating that the slope of the falling edge of the SENSE terminal has reached a certain standard, which is related to the first threshold voltage. TH1 The VOUT2 output is high, and the slope of the rising edge at the surface SENSE pin reaches a certain standard, which is related to the second threshold voltage. TH2 .

6. The slope detection circuit with programmable blanking function according to claim 5, characterized in that, The comparison circuit also includes a resonant valley detection function: between the falling edge of the VOUT1 pulse signal and the immediately following rising edge of the VOUT2 pulse signal, there must be a point where the slope of the voltage change at the SENSE terminal is 0, and this point is the valley.

7. A switching power supply system, comprising a transformer, a switching power supply controller, a power switching transistor, a synchronous rectifier MOSFET, an output energy storage capacitor, a synchronous rectifier controller, and a programmable resistor; the synchronous rectifier controller integrates a slope detection circuit with programmable blanking function as described in any one of claims 1-6; the drain of the power switching transistor is connected to one end of the primary side of the transformer, and the source is connected to ground; the output of the switching power supply controller is connected to the gate of the power switching transistor; the drain of the synchronous rectifier MOSFET is connected to one end of the secondary side of the transformer and the slope sampling input SENSE terminal of the synchronous rectifier controller; the source of the synchronous rectifier MOSFET is grounded; the gate of the synchronous rectifier MOSFET is connected to the output control terminal GATE of the synchronous rectifier controller; the other end of the secondary side of the transformer is connected to the output energy storage capacitor and the VCC terminal of the synchronous rectifier controller, and is responsible for charging the output energy storage capacitor and the VCC terminal of the synchronous rectifier controller.

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