Method for preparing light-emitting diode epitaxial wafer with improved internal quantum efficiency and epitaxial wafer

Abstract

The present disclosure discloses a method for preparing a light-emitting diode epitaxial wafer and an epitaxial wafer with improved internal quantum efficiency, and belongs to the field of light-emitting diode production. During the first stage of the growth of the InGaN well layer, the indium source flow rate is linearly increased to the first indium source threshold, and the gallium source is linearly reduced from the first gallium source threshold to the second gallium source threshold, so that an In source enriched region can be formed within the thickness of the thin InGaN well layer in a short time, thereby improving the light extraction efficiency of the multi-quantum well layer. The second stage of growth plays a role in transition and improving the crystal quality. In the third stage, the indium source remains unchanged while the gallium source increases linearly, and in the fourth stage, both the indium source and the flow rate are increased to improve the luminous efficiency. In the fifth and sixth stages, the enrichment of In is further reduced, thereby improving the overall quality. The changes in the enrichment degree of In in the six stages relieve the polarization electric field, increase the overlapping area of ​​the electron-hole wave function, and improve the internal quantum efficiency of the light-emitting diode.

Description

Technical Field

[0001] The present invention relates to the field of light emitting diode manufacturing, and in particular to a method for preparing a light emitting diode epitaxial wafer and an epitaxial wafer for improving internal quantum efficiency. Background Art

[0002] Light-emitting diodes are semiconductor electronic components that can emit light. As a new type of efficient, environmentally friendly, green solid-state lighting source, they are rapidly and widely used, such as traffic lights, car interior and exterior lights, urban landscape lighting, mobile phone backlights, etc. Improving the chip's luminous efficiency is the goal that light-emitting diodes are constantly pursuing.

[0003] In the related art, the epitaxial wafer of a light emitting diode generally includes a substrate and an n-type GaN layer, a multi-quantum well layer and a p-type GaN layer grown sequentially on the substrate. In the related art, the multi-quantum well layer includes alternately stacked InGaN well layers and GaN barrier layers.

[0004] In the multi-quantum well layer, due to the low solubility of In atoms in the InGaN well layer relative to the gallium nitride unit cell, defects such as In clusters and even metal In precipitation are prone to occur in the InGaN well layer during the growth process. At the same time, the lattice mismatch and thermal mismatch between the InGaN well layer and the GaN barrier layer will also cause the existence of a polarization electric field inside the multi-quantum well layer. The polarization electric field will cause the wave functions of electrons and holes to separate and thus reduce the recombination efficiency of electrons and holes. Defects will capture electrons or holes, resulting in a decrease in the number of electrons and holes that recombine to emit light, making the internal quantum efficiency of the multi-quantum well layer low. Summary of the invention

[0005] The embodiments of the present disclosure provide a method for preparing a light-emitting diode epitaxial wafer and an epitaxial wafer with improved internal quantum efficiency, which can improve the internal quantum efficiency of the light-emitting diode epitaxial wafer. The technical solution is as follows:

[0006] The present disclosure provides a method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency, the method comprising:

[0007] providing a substrate;

[0008] growing an n-type GaN layer on the substrate;

[0009] Growing a multi-quantum well layer on the n-type GaN layer, wherein the multi-quantum well layer includes GaN barrier layers and InGaN well layers stacked alternately;

[0010] Growing a p-type GaN layer on the multi-quantum well layer;

[0011] Growing the InGaN well layer comprises:

[0012] The first stage of introducing an indium source whose flow rate increases linearly to a first indium source threshold and a gallium source whose flow rate decreases linearly from a first gallium source threshold to a second gallium source threshold into the reaction chamber to grow the InGaN well layer;

[0013] A second stage of introducing an indium source having a flow rate equal to the first indium source threshold and a gallium source having a flow rate equal to the second gallium source threshold to grow the InGaN well layer;

[0014] A third stage of introducing the indium source whose flow rate increases linearly from the first indium source threshold to the second indium source threshold and the gallium source whose flow rate is the second gallium source threshold to grow the InGaN well layer;

[0015] A fourth stage of introducing the indium source having a flow rate of the second indium source threshold and a gallium source having a flow rate linearly increased from the second gallium source threshold to the first gallium source threshold to grow the InGaN well layer;

[0016] A fifth stage of introducing the indium source whose flow rate is linearly reduced from the second indium source threshold to the first indium source threshold and the gallium source whose flow rate is linearly reduced from the first gallium source threshold to the second gallium source threshold to grow the InGaN well layer;

[0017] The sixth stage of growing the InGaN well layer is by introducing the indium source whose flow rate is linearly reduced from the first indium source threshold to zero and the gallium source whose flow rate is linearly increased from the second gallium source threshold to the first gallium source threshold.

[0018] Optionally, the duration of the first stage, the duration of the second stage, the duration of the third stage, the duration of the fourth stage, the duration of the fifth stage and the duration of the sixth stage are all equal.

[0019] Optionally, the duration of the first stage is 20 to 40 seconds.

[0020] Optionally, the absolute value of the flow change rate of the first stage, the absolute value of the flow change rate of the second stage, the absolute value of the flow change rate of the third stage, the absolute value of the flow change rate of the fourth stage, the absolute value of the flow change rate of the fifth stage and the absolute value of the flow change rate of the sixth stage are all equal, and the flow change rate is the rate at which the flow changes over time.

[0021] Optionally, the gallium source flow rate change rate in the first stage is 8 to 20 mol / s, and the indium source flow rate change rate in the first stage is 15 to 75 mol / s.

[0022] Optionally, the difference between the first indium source threshold and the second indium source threshold is 1000 to 3000 sccm.

[0023] Optionally, the first indium source threshold is 1000-2000 sccm, and the second indium source threshold is 2000-4000 sccm.

[0024] Optionally, the difference between the second gallium source threshold and the first gallium source threshold is 100-600 sccm.

[0025] Optionally, the first gallium source threshold is 500-1000 sccm, and the second gallium source threshold is 200-400 sccm.

[0026] The embodiment of the present disclosure provides a light-emitting diode epitaxial wafer with improved internal quantum efficiency. The light-emitting diode epitaxial wafer with improved internal quantum efficiency is realized by the method for preparing the light-emitting diode epitaxial wafer with improved internal quantum efficiency as described above.

[0027] The technical solution provided by the embodiments of the present disclosure brings the following beneficial effects:

[0028] When growing the InGaN well layer, controlling the growth of the InGaN well layer includes six stages. During the first stage of the growth of the InGaN well layer, the indium source flow rate is linearly increased to the first indium source threshold, and the gallium source is linearly reduced from the first gallium source threshold to the second gallium source threshold, so that an In source enriched region can be formed within the thickness of the thin InGaN well layer in a short time, and the exciton luminescence of the In-rich quantum dots and the strongly localized excitons is enhanced, and the exciton localization effect is improved, thereby improving the light extraction efficiency of the multi-quantum well layer. Then, the flow rates of the indium source and gallium source are maintained unchanged to carry out the second stage of the growth of the InGaN well layer, which plays a role in transition and improving the crystal quality. In the third stage, the indium source is kept unchanged while the gallium source is linearly increased. In the fourth stage, both the indium source and the flow rate are increased, and an enriched region is further formed in the middle of the InGaN well layer, further improving the luminous efficiency; and in the fourth stage, due to the increase of the gallium source and the unchanged flow rate of the indium source, the In enrichment degree of In in the InGaN material formed in the fourth stage is lower than the In enrichment degree of In in the InGaN material formed in the third stage. In the fifth stage, both the indium source and the gallium source are linearly reduced, which can reduce the In content in the InGaN material while ensuring the quality of the obtained InGaN material. In the sixth stage, the enrichment of In is further reduced, which can make the lattice of the InGaN material closer to the lattice of the GaN barrier layer and reduce the possibility of In precipitation and infiltration into the GaN barrier layer, improve the crystal quality of the obtained GaN barrier layer to improve the overall quality of the multi-quantum well layer. In addition, the linear change of the enrichment degree of In in the six stages of the InGaN well layer can also make the stress inside the InGaN well layer offset each other, which can alleviate the polarization electric field to a certain extent, increase the overlapping area of ​​the electron-hole wave function, increase the effective recombination probability of carriers, and improve the internal quantum efficiency of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 It is a flow chart of a method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency provided by an embodiment of the present disclosure;

[0031] Figure 2 It is a structural schematic diagram of a light-emitting diode epitaxial wafer for improving internal quantum efficiency provided by an embodiment of the present disclosure;

[0032] Figure 3 It is a flow chart of another method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency provided by an embodiment of the present disclosure;

[0033] Figure 4 It is a schematic diagram of the structure of another light-emitting diode epitaxial wafer for improving internal quantum efficiency provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0035] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0036] Figure 1 is a flow chart of a method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency provided by an embodiment of the present disclosure, with reference to Figure 1It can be seen that the embodiment of the present disclosure provides a method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency, the preparation method comprising:

[0037] S101: providing a substrate.

[0038] S102: growing an n-type GaN layer on a substrate.

[0039] S103: growing a multi-quantum well layer on the n-type GaN layer, the multi-quantum well layer comprising alternately stacked GaN barrier layers and InGaN well layers. The growing of the InGaN well layer comprises: introducing an indium source whose flow rate increases linearly to a first indium source threshold and a gallium source whose flow rate decreases linearly from a first gallium source threshold to a second gallium source threshold into the reaction chamber to grow the first stage of the InGaN well layer; introducing an indium source whose flow rate is the first indium source threshold and a gallium source whose flow rate is the second gallium source threshold to grow the second stage of the InGaN well layer; introducing an indium source whose flow rate increases linearly from the first indium source threshold to the second indium source threshold and a gallium source whose flow rate is the second gallium source threshold to grow the third stage of the InGaN well layer; introducing a flow The fourth stage is to grow an InGaN well layer by introducing an indium source with a flow rate of the second Indium source threshold and a gallium source with a flow rate linearly increased from the second Gallium source threshold to the first Gallium source threshold; the fifth stage is to grow an InGaN well layer by introducing an indium source with a flow rate linearly reduced from the second Indium source threshold to the first Indium source threshold and a gallium source with a flow rate linearly reduced from the first Gallium source threshold to the second Gallium source threshold; the sixth stage is to introduce an InGaN well layer by introducing an indium source with a flow rate linearly reduced from the first Indium source threshold to zero and a gallium source with a flow rate linearly increased from the second Gallium source threshold to the first Gallium source threshold.

[0040] S104: growing a p-type GaN layer on the multi-quantum well layer.

[0041] Growing an InGaN well layer, including:

[0042] When growing the InGaN well layer, controlling the growth of the InGaN well layer includes six stages. During the first stage of the growth of the InGaN well layer, the indium source flow rate is linearly increased to the first indium source threshold, and the gallium source is linearly reduced from the first gallium source threshold to the second gallium source threshold, so that an In source enriched region can be formed within the thickness of the thin InGaN well layer in a short time, and the exciton luminescence of the In-rich quantum dots and the strongly localized excitons is enhanced, and the exciton localization effect is improved, thereby improving the light extraction efficiency of the multi-quantum well layer. Then, the flow rates of the indium source and gallium source are maintained unchanged to carry out the second stage of the growth of the InGaN well layer, which plays a role in transition and improving the crystal quality. In the third stage, the indium source is kept unchanged while the gallium source is linearly increased. In the fourth stage, both the indium source and the flow rate are increased, and an enriched region is further formed in the middle of the InGaN well layer, further improving the luminous efficiency; and in the fourth stage, due to the increase of the gallium source and the unchanged flow rate of the indium source, the In enrichment degree of In in the InGaN material formed in the fourth stage is lower than the In enrichment degree of In in the InGaN material formed in the third stage. In the fifth stage, both the indium source and the gallium source are linearly reduced, which can reduce the In content in the InGaN material while ensuring the quality of the obtained InGaN material. In the sixth stage, the enrichment of In is further reduced, which can make the lattice of the InGaN material closer to the lattice of the GaN barrier layer and reduce the possibility of In precipitation and infiltration into the GaN barrier layer, improve the crystal quality of the obtained GaN barrier layer to improve the overall quality of the multi-quantum well layer. Moreover, the linear change of the enrichment degree of In in the six stages in the InGaN well layer can form a structure with symmetrical In content in the InGaN well layer, which can make the stress inside the InGaN well layer offset each other, relieve the polarization electric field to a certain extent, increase the overlapping area of ​​the electron-hole wave function, increase the effective recombination probability of carriers, and improve the internal quantum efficiency of the light-emitting diode.

[0043] It should be noted that in the embodiments provided by the present disclosure, the change in the flow rate in the InGaN well layer is a change from a certain flow rate threshold to another flow rate threshold in the corresponding growth stage. For example, in the first stage, "the indium source whose flow rate increases linearly to the first indium source threshold and the gallium source whose flow rate decreases linearly from the first gallium source threshold to the second gallium source threshold are introduced into the reaction chamber", which means "in the growth process of the first stage, the flow rate of the indium source increases linearly to the first indium source threshold, the flow rate of the gallium source decreases from the first gallium source threshold to the second gallium source threshold, and the flow rate of the indium source increases to the first indium source threshold and the flow rate of the gallium source changes to the second gallium source threshold, the growth of the first stage is completed". The same is true for the third to sixth stages where the flow rate changes. It should be noted that for the second stage where the flow rate does not change, it is a period of growth when the indium source and the gallium source are each a specific flow rate.

[0044] Optionally, the duration of the first stage, the duration of the second stage, the duration of the third stage, the duration of the fourth stage, the duration of the fifth stage and the duration of the sixth stage are all equal.

[0045] The duration of each stage of the InGaN well layer is equal, which can facilitate the preparation of the InGaN well layer. At the same time, the duration of each stage is equal, which can ensure the stable formation and control of the In enriched area.

[0046] Exemplarily, the duration of the first stage is 20 to 40 seconds.

[0047] When the duration of the first stage is within the above range, good quality InGaN material can be formed, and at the same time, sufficient time can be ensured for the environment of the reaction chamber to become more stable, so as to ensure the quality of the subsequently grown InGaN material.

[0048] It should be noted that the duration corresponding to each of the second to sixth stages can be within the above range. In other implementations provided by the present disclosure, the duration corresponding to each stage is separately corresponding, and the duration of the second stage can also be set to be the longest, and the duration of the second stage is greater than the duration of other stages. Alternatively, the duration of the second and sixth stages can also be set to be greater than the duration corresponding to other stages.

[0049] Optionally, the absolute value of the flow change rate in the first stage, the absolute value of the flow change rate in the second stage, the absolute value of the flow change rate in the third stage, the absolute value of the flow change rate in the fourth stage, the absolute value of the flow change rate in the fifth stage and the absolute value of the flow change rate in the sixth stage are all equal, and the flow change rate is the rate at which the flow changes over time.

[0050] In the first stage to the sixth stage, the absolute value of the flow rate change rate in each stage is equal, which can effectively reduce the internal polarization electric field of the InGaN well layer and ensure that the quality of the obtained InGaN well layer is also good.

[0051] For example, the flow rate change rate of the indium source can be equal to the flow rate change rate of the gallium source, which can improve the light extraction efficiency and facilitate the preparation of epitaxial wafers.

[0052] Optionally, the gallium source flow rate change rate in the first stage is 8 to 20 mol / s, and the indium source flow rate change rate in the first stage is 15 to 75 mol / s.

[0053] The flow rate change rate in the first stage is within the above range, which can quickly form an In-rich area, and at the same time can ensure the stable infiltration of In in the obtained InGaN material, thereby improving the quality of the obtained InGaN well layer.

[0054] It should be noted that in other implementations provided by the present disclosure, the flow rate change rate of the indium source and the flow rate change rate of the gallium source may not be equal. However, in each growth stage of the InGaN well layer, the absolute value of the flow rate change rate of the indium source is equal, and the absolute value of the flow rate change rate of the gallium source is equal.

[0055] Optionally, the difference between the first indium source threshold and the second indium source threshold is 1000-3000 sccm.

[0056] The difference between the first indium source threshold and the second indium source threshold is within the above range, which can ensure the stable change of the In content in the InGaN well layer and improve the stability of In atoms inside the InGaN well layer to ensure the crystal quality of the final InGaN well layer.

[0057] Exemplarily, the first indium source threshold is 1000-2000 sccm, and the second indium source threshold is 2000-4000 sccm.

[0058] The difference between the first indium source threshold and the second indium source threshold is within the above range, which can ensure the stable change of the In content in the InGaN well layer and improve the stability of In atoms inside the InGaN well layer to ensure the crystal quality of the final InGaN well layer.

[0059] Optionally, the difference between the second gallium source threshold and the first gallium source threshold is 100-600 sccm.

[0060] The difference between the first gallium source threshold and the second gallium source threshold is within the above range, which can ensure that In atoms are stably integrated into the GaN unit cell of the InGaN well layer, so as to ensure the crystal quality of the InGaN well layer finally obtained.

[0061] Optionally, the first gallium source threshold is 500-1000 sccm, and the second gallium source threshold is 200-400 sccm. The quality of the obtained InGaN well layer is good.

[0062] For example, during the growth of the InGaN well layer, the flow rates of the introduced ammonia gas and the carrier gas are 150 sccm to 200 sccm and 100 sccm to 150 sccm respectively, which can ensure that the quality of the obtained InGaN well layer is good.

[0063] Optionally, the growth temperature and growth pressure of the InGaN well layer are 700-830° C. and 100-300 Torr respectively, and the growth temperature and pressure of the GaN barrier layer are 800-960° C. and 100-300 Torr, respectively. The quality of the obtained multi-quantum well layer can be improved.

[0064] It should be noted that in the implementation method provided by the present disclosure, when the multi-quantum well layer is grown, the pressure and growth speed of the multi-quantum well layer are unchanged, which can ensure the quality of the multi-quantum well layer while controlling the preparation cost of the multi-quantum well layer. During the growth process of the InGaN well layer, the pressure, temperature and growth speed of the InGaN well layer are unchanged. The quality of the obtained InGaN well layer can be guaranteed to be good.

[0065] In one implementation provided by the present disclosure, an embodiment of the present disclosure provides a light-emitting diode epitaxial wafer with improved internal quantum efficiency, and the light-emitting diode epitaxial wafer with improved internal quantum efficiency is implemented by using the aforementioned method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency. Figure 2 , Figure 2 is a schematic structural diagram of a light-emitting diode epitaxial wafer for improving internal quantum efficiency provided by an embodiment of the present disclosure, Figure 2 The light emitting diode epitaxial wafer can be made of Figure 1 The preparation method shown in the figure obtains a light-emitting diode epitaxial wafer with improved internal quantum efficiency, comprising an n-type GaN layer 2, a multi-quantum well layer 3 and a p-type GaN layer 4 stacked in sequence, wherein the multi-quantum well layer 3 comprises an InGaN well layer 31 and a GaN barrier layer 32 stacked alternately.

[0066] When growing the InGaN well layer 31, controlling the growth of the InGaN well layer 31 includes six stages. During the first stage of the growth of the InGaN well layer 31, the indium source flow rate is linearly increased to the first indium source threshold, and the gallium source is linearly reduced from the first gallium source threshold to the second gallium source threshold, so that an In source enriched region can be formed within the thickness of the InGaN well layer 31 in a short time and with a relatively thin thickness, thereby strengthening the luminescence of the excitons that are rich in In quantum dots and strongly localized, improving the exciton localization effect, and thus improving the light extraction efficiency of the multi-quantum well layer. Then, the flow rates of the indium source and gallium source are maintained unchanged to carry out the second stage of the growth of the InGaN well layer 31, which plays a role in transition and improving the crystal quality. In the third stage, the indium source is kept unchanged while the gallium source is linearly increased. In the fourth stage, both the indium source and the flow rate are increased, and an enriched region is further formed in the middle of the InGaN well layer 31, further improving the luminescence efficiency; and in the fourth stage, due to the increase of the gallium source and the unchanged flow rate of the indium source, the enrichment degree of In in the InGaN material formed in the fourth stage is lower than the enrichment degree of In in the InGaN material formed in the third stage. In the fifth stage, both the indium source and the gallium source are linearly reduced, which can reduce the In content in the InGaN material while ensuring the quality of the obtained InGaN material. In the sixth stage, the enrichment of In is further reduced, which can make the lattice of the InGaN material closer to the lattice of the GaN barrier layer 32 and reduce the possibility of In precipitation and infiltration into the GaN barrier layer 32, improve the crystal quality of the obtained GaN barrier layer 32 to improve the overall quality of the multi-quantum well layer. In addition, the linear change of the enrichment degree of In in the six stages in the InGaN well layer 31 can form a structure with symmetrical In content in the InGaN well layer 31, which can make the stress inside the InGaN well layer 31 offset each other, relieve the polarization electric field to a certain extent, increase the overlapping area of ​​the electron-hole wave function, increase the effective recombination probability of carriers, and improve the internal quantum efficiency of the light-emitting diode.

[0067] For example, the thickness of the multi-quantum well layer 3 is 16-80 nm, which can ensure the light extraction efficiency of the light emitting diode.

[0068] Optionally, the total thickness of each InGaN well layer 31 is 2-5 nm, and the total thickness of each GaN barrier layer 32 is 8-20 nm, so that the multi-quantum well layer 3 can emit light stably.

[0069] Figure 3 is a flow chart of another method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency provided by the embodiment of the present disclosure, with reference to Figure 3 It can be seen that the method for preparing the light emitting diode epitaxial wafer may also include:

[0070] S201: providing a substrate.

[0071] The substrate may be a sapphire substrate, which is easy to implement and manufacture.

[0072] Optionally, step S201 may further include: treating the surface of the substrate for growing the epitaxial layer for 5 to 6 minutes under a hydrogen atmosphere.

[0073] For example, when processing the surface of the substrate for growing the epitaxial layer, the temperature of the reaction chamber may be 1000-1100° C., and the pressure of the reaction chamber may be 200-500 torr.

[0074] S202: growing a buffer layer on a substrate.

[0075] The buffer layer may be an AlN buffer layer. The AlN layer may be obtained by magnetron sputtering.

[0076] For example, the deposition temperature of the AlN layer may be 400-800° C., the sputtering power may be 3000-5000 W, and the pressure may be 2-20 mtorr. The quality of the obtained AlN layer is good.

[0077] S203: growing a non-doped GaN layer on the buffer layer.

[0078] The thickness of the undoped GaN layer may be 0.5 to 3 um.

[0079] For example, the growth temperature of the non-doped GaN layer may be 1000-1100° C., and the growth pressure may be controlled at 100-300 torr. The quality of the obtained non-doped GaN layer is good.

[0080] S204: growing an n-type GaN layer on the non-doped GaN layer.

[0081] Optionally, the n-type GaN layer may be an n-type GaN layer, the growth temperature of the n-type GaN layer may be 1000-1100° C., and the growth pressure of the n-type GaN layer may be 100-300 Torr.

[0082] Optionally, the thickness of the n-type GaN layer may be 0.5-3 um.

[0083] S205: growing a multi-quantum well layer on the n-type GaN layer.

[0084] It should be noted that the growth conditions and parameters of the multi-quantum well layer in step S205 can be referred to Figure 1 The growth conditions and parameters of the multi-quantum well layer in step S103 are not described in detail here.

[0085] S206: growing an AlGaN electron blocking layer on the multi-quantum well layer.

[0086] The growth temperature of the AlGaN electron blocking layer can be 800-1000° C., and the growth pressure of the AlGaN electron blocking layer can be 100-300 Torr. The AlGaN electron blocking layer grown under these conditions has good quality, which is beneficial to improving the luminous efficiency of the light-emitting diode.

[0087] S207: growing a p-type GaN layer on the AlGaN electron barrier layer.

[0088] Optionally, the growth pressure of the p-type GaN layer may be 200-600 Torr, and the growth temperature of the p-type GaN layer may be 800-1000° C.

[0089] S208: growing a p-type contact layer on the p-type GaN layer.

[0090] Optionally, the growth pressure of the p-type contact layer may be 200-600 Torr, and the growth temperature of the p-type contact layer may be 800-1000° C.

[0091] It should be noted that Figure 3 The method for preparing the light emitting diode epitaxial wafer shown in Figure 1 The method for preparing a light-emitting diode shown in provides a more detailed growth method for a light-emitting diode epitaxial wafer.

[0092] The structure of the light emitting diode epitaxial wafer after executing step S208 can be seen in Figure 4 .

[0093] It should be noted that in the disclosed embodiment, Veeco K465ior C4or RBMOCVD (Metal Organic Chemical Vapor Deposition) equipment is used to realize the growth method of light-emitting diodes. High-purity H2 (hydrogen) or high-purity N2 (nitrogen) or a mixture of high-purity H2 and high-purity N2 is used as a carrier gas, high-purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0094] Figure 4 is a schematic diagram of the structure of another light-emitting diode epitaxial wafer for improving internal quantum efficiency provided by the embodiment of the present disclosure, with reference to Figure 4It can be seen that the embodiment of the present disclosure provides a light-emitting diode epitaxial wafer with improved internal quantum efficiency. The light-emitting diode epitaxial wafer with improved internal quantum efficiency includes a buffer layer 6, an undoped GaN layer 7, an n-type GaN layer 2, a multi-quantum well layer 3, an AlGaN electron blocking layer 8, a p-type GaN layer 4 and a p-type contact layer 5 stacked in sequence, and the multi-quantum well layer 3 includes alternately stacked InGaN well layers 31 and GaN barrier layers 32.

[0095] It should be noted that Figure 4 The structures of the InGaN well layer 31 and the GaN barrier layer 32 are respectively Figure 2 The structures of the InGaN well layer 31 and the GaN barrier layer 32 shown in FIG. 3 are the same, and are not described in detail here.

[0096] Optionally, the substrate 1 may be a sapphire substrate 1. It is easy to manufacture and obtain.

[0097] Exemplarily, the buffer layer 6 may be an AlN buffer layer 6. The crystal quality of the epitaxial thin film grown on the low-temperature buffer layer 6 can be guaranteed.

[0098] Optionally, the thickness of the buffer layer 6 may be 10-30 nm, which can reduce the lattice mismatch between the n-type GaN layer 2 and the substrate 1 and ensure the growth quality of the epitaxial layer.

[0099] For example, the thickness of the non-doped GaN layer 7 may be 1-3.5 μm. In this case, the quality of the light emitting diode epitaxial wafer obtained is good.

[0100] In an implementation provided by the present disclosure, the thickness of the non-doped GaN layer 7 may also be 1 μm, which is not limited by the present disclosure.

[0101] Optionally, the doping element of the n-type GaN layer 2 may be Si, and the doping concentration of the Si element may be 1×10 18 ~1×10 19 cm -3 The overall quality of the n-type GaN layer 2 is good.

[0102] For example, the thickness of the n-type GaN layer 2 may be 2-3 μm. The obtained n-type GaN layer 2 has good overall quality.

[0103] In an implementation provided by the present disclosure, the thickness of the n-type GaN layer 2 may be 2 μm, which is not limited by the present disclosure.

[0104] Optionally, the multi-quantum well layer 3 includes alternately stacked InGaN well layers and GaNGaN barrier layers, which can ensure stable light emission of the light emitting diode.

[0105] Optionally, the Al composition in the AlGaN electron blocking layer 8 may be 0.15-0.25, which has a better effect of blocking electrons.

[0106] The above description does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not used to limit the present disclosure. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure still falls within the scope of the technical solution of the present disclosure.

Claims

1. A method for preparing a light-emitting diode epitaxial wafer with improved internal quantum efficiency, characterized in that: The preparation method comprises: providing a substrate; growing an n-type GaN layer on the substrate; Growing a multi-quantum well layer on the n-type GaN layer, wherein the multi-quantum well layer includes GaN barrier layers and InGaN well layers stacked alternately; Growing a p-type GaN layer on the multi-quantum well layer; Growing the InGaN well layer comprises: Introducing into the reaction chamber an indium source whose flow rate increases linearly to a first indium source threshold and a gallium source whose flow rate decreases linearly from a first gallium source threshold to a second gallium source threshold, so as to grow the first stage of the InGaN well layer; A second stage of introducing an indium source having a flow rate equal to the first indium source threshold and a gallium source having a flow rate equal to the second gallium source threshold to grow the InGaN well layer; A third stage of introducing the indium source whose flow rate increases linearly from the first indium source threshold to the second indium source threshold and the gallium source whose flow rate is the second gallium source threshold to grow the InGaN well layer; A fourth stage of introducing the indium source having a flow rate of the second indium source threshold and a gallium source having a flow rate linearly increased from the second gallium source threshold to the first gallium source threshold to grow the InGaN well layer; A fifth stage of introducing the indium source whose flow rate is linearly reduced from the second indium source threshold to the first indium source threshold and the gallium source whose flow rate is linearly reduced from the first gallium source threshold to the second gallium source threshold to grow the InGaN well layer; The sixth stage of growing the InGaN well layer is by introducing the indium source whose flow rate is linearly reduced from the first indium source threshold to zero and the gallium source whose flow rate is linearly increased from the second gallium source threshold to the first gallium source threshold.

2. The preparation method according to claim 1, characterized in that: The duration of the first stage, the duration of the second stage, the duration of the third stage, the duration of the fourth stage, the duration of the fifth stage and the duration of the sixth stage are all equal.

3. The preparation method according to claim 2, characterized in that: The duration of the first stage is 20 to 40 seconds.

4. The preparation method according to any one of claims 1 to 3, characterized in that: The absolute value of the flow change rate of the first stage, the absolute value of the flow change rate of the second stage, the absolute value of the flow change rate of the third stage, the absolute value of the flow change rate of the fourth stage, the absolute value of the flow change rate of the fifth stage and the absolute value of the flow change rate of the sixth stage are all equal, and the flow change rate is the rate at which the flow changes over time.

5. The preparation method according to claim 4, characterized in that: The gallium source flow rate change rate in the first stage is 8-20 mol / s, and the indium source flow rate change rate in the first stage is 15-75 mol / s.

6. The preparation method according to any one of claims 1 to 3, characterized in that: The difference between the first indium source threshold and the second indium source threshold is 1000-3000 sccm.

7. The preparation method according to claim 6, characterized in that: The first indium source threshold is 1000-2000 sccm, and the second indium source threshold is 2000-4000 sccm.

8. The preparation method according to any one of claims 1 to 3, characterized in that: The difference between the second gallium source threshold and the first gallium source threshold is 100-600 sccm.

9. The preparation method according to claim 8, characterized in that: The first gallium source threshold is 500-1000 sccm, and the second gallium source threshold is 200-400 sccm.

10. A light-emitting diode epitaxial wafer with improved internal quantum efficiency, characterized in that: The light-emitting diode epitaxial wafer with improved internal quantum efficiency is realized by using the method for preparing the light-emitting diode epitaxial wafer with improved internal quantum efficiency as claimed in any one of claims 1 to 9.

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