Semiconductor parts protective coating and manufacturing method thereof

Abstract

The semiconductor component protective coating of the present invention is applied to a semiconductor component, and the semiconductor component protective coating includes a first seed layer and a first component protective layer. The first seed layer is deposited on the surface of the semiconductor component. In addition, the first component protective layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protective layer is the same as the lattice direction of the surface of the first seed layer. The thickness of the first component protective layer is 7 times or more than 7 times the thickness of the first seed layer. The bottom first component protective layer has a characteristic direction, and grows along the direction when depositing multiple first component protective layers, so that the first component protective layer presents a single crystal structure, thereby increasing the anti-plasma performance.

Description

Technical Field

[0001] The present invention relates to a semiconductor component protective coating and a manufacturing method thereof, in particular to a semiconductor component protective coating having a first seed layer and a manufacturing method thereof. Background Art

[0002] In the semiconductor technology industry, commonly used semiconductor processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), reactive ion etching (RIE, Reactive Ion Etching), panel and automation equipment applications, etc., all use ceramic layers to protect metal parts in the cavity. Since plasma etching is the application of electromagnetic energy in a gas containing chemical reaction components (such as fluorine or chlorine), the plasma will release charged ions and hit the wafer to etch the material and produce a chemical reaction. The plasma interacts with the etched material to form volatile or non-volatile residues. Therefore, the ceramic layer above the metal layer of the semiconductor part becomes a good protective layer. In addition, when the semiconductor part is exposed to fluorine-based plasma, the corroded ceramic layer will be fluorinated to generate particles, which will contaminate the cavity environment and cause defects in the semiconductor part.

[0003] At present, the anti-plasma etching coating used to protect semiconductor parts is mainly applied by plasma spraying. However, since the typical anti-plasma etching coating is polycrystalline ceramic, the grain boundary etching rate in polycrystalline ceramic is fast, which easily causes the surface roughness to increase and contamination to form after etching.

[0004] As semiconductor technology grows, component miniaturization becomes the biggest focus, and the corresponding sensitivity to defects increases, and the particles and contaminants allowed by components become more stringent. In order to reduce particle contamination and defects caused by the chamber during the process, current technology usually focuses on material changes such as Y2O3, YF3, YOF, Y3Al5O 12 (YAG), Er3Al5O 12 (EAG) and Y2O3-ZrO2 solid solutions or solid solutions mainly composed of Y2O3 and Al2O3 with the addition of rare earth oxides such as Er2O3, Nd2O3, CeO2, Sm2O3, Yb2O3, La2O3, Sc2O3, etc. Ceramic materials. Broadly speaking, for the purpose of having better resistance to plasma corrosion, the plasma corrosion-resistant layer can be selected from ceramic materials formed by transition metals of relatively high quality, such as oxides, nitrides, fluorides, etc. of transition metals with atomic numbers 39 to 80 in the periodic table. The plasma corrosion-resistant layer can also be formed by transition metal oxides, nitrides or fluorides in different proportions, or a multilayer film can be formed to further enhance the ability of its plasma corrosion-resistant layer.

[0005] However, according to patent number TWI389248, the anti-plasma layer with lattice orientation deposited by atomic layer deposition (ALD) is more protective than the anti-plasma layer formed by deposition methods such as chemical vapor deposition (CVD), physical vapor deposition (PVD), and plasma thermal spray. However, an extremely low deposition rate is required to grow a coating with lattice orientation. In addition, when it is necessary to deposit an anti-plasma layer of the appropriate thickness, a lot of time and cost will be consumed.

[0006] Therefore, there is an urgent need for new methods of manufacturing protective coatings for semiconductor components or changes in their own structures to meet the requirements of high product characteristics. Summary of the invention

[0007] The present invention provides a semiconductor component protective coating, which has a short manufacturing time and can reduce manufacturing costs. In addition, the semiconductor component protective coating can enhance the anti-plasma corrosion property of the semiconductor component to reduce the contamination of the semiconductor component.

[0008] The semiconductor component protection coating of the present invention is applied to a semiconductor component, and the semiconductor component protection coating includes a first seed layer and a first component protection layer. The first seed layer is deposited on the surface of the semiconductor component. In addition, the first component protection layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protection layer is the same as the lattice direction of the surface of the first seed layer. The thickness of the first component protection layer is 7 times or more than 7 times the thickness of the first seed layer.

[0009] A semiconductor component protection coating according to another embodiment of the present invention is applied to a semiconductor component, and the semiconductor component protection coating includes a first seed layer, an adhesive layer, and a first component protection layer. The first seed layer is deposited on the surface of the semiconductor component, and the adhesive layer is located between the first seed layer and the semiconductor component. In addition, the first component protection layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protection layer is the same as the lattice direction of the surface of the first seed layer. The thickness of the first component protection layer is 7 times or more than 7 times the thickness of the first seed layer.

[0010] The semiconductor part protective coating described above also includes at least one second seed layer and at least one second part protection layer, the second seed layer is deposited on the surface of the first part protection layer, and the second part protection layer is deposited on the surface of the second seed layer, so that the lattice direction of the surface of the second part protection layer is the same as the lattice direction of the surface of the second seed layer.

[0011] In the semiconductor component protective coating described above, the lattice direction of the surface of the second seed layer is different from the lattice direction of the surface of the first seed layer.

[0012] In the semiconductor component protective coating described above, the lattice direction of the surface of the second component protective layer is different from the lattice direction of the surface of the first component protective layer.

[0013] In the semiconductor component protection coating described above, the deposition rate of the first component protection layer is 20 times or more than the deposition rate of the first seed layer.

[0014] In the semiconductor component protective coating described above, the first seed layer is selected from one of the oxides, nitrides, borides, and fluorides of transition metal elements with atomic numbers 39 to 80 in the periodic table, or any combination thereof.

[0015] In the semiconductor component protective coating described above, the first component protective layer is selected from one of the oxides, nitrides, borides, and fluorides of transition metal elements with atomic numbers 39 to 80 in the periodic table, or any combination thereof.

[0016] In the semiconductor component protection coating described above, the material of the first seed layer is different from the material of the first component protection layer.

[0017] In the semiconductor component protective coating described above, the lattice direction of the surface of the first component protective layer is along the most densely packed direction.

[0018] In the semiconductor component protection coating described above, the thermal expansion coefficient of the first component protection layer is between 6.0x10-6 / °C and 8.0x10-6 / °C.

[0019] In the semiconductor component protective coating described above, the flexural strength of the first component protective layer is greater than 150 MPa.

[0020] In the semiconductor component protective coating described above, the material of the adhesive layer is selected from one of aluminum oxide (Al2O3), aluminum nitride (AlN), aluminum fluoride (AlF3) or any combination thereof.

[0021] The method for manufacturing a semiconductor component protective coating of the present invention comprises the following steps. First, a first seed layer is deposited on the surface of a semiconductor component. Then, a first component protective layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protective layer is the same as the lattice direction of the surface of the first seed layer. The thickness of the first component protective layer is 7 times or more than the thickness of the first seed layer.

[0022] In the above-mentioned method for manufacturing a semiconductor component protective coating, the deposition rate of the first component protective layer is 20 times or more than the deposition rate of the first seed layer.

[0023] In the above-mentioned method for manufacturing a semiconductor component protective coating, the material of the first seed layer is different from the material of the first component protective layer.

[0024] In the above-mentioned method for manufacturing a semiconductor component protective coating, the lattice direction of the surface of the first component protective layer is along the most densely packed direction.

[0025] In the above-mentioned method for manufacturing a semiconductor component protective coating, the thermal expansion coefficient of the first component protective layer is between 6.0x10-6 / °C and 8.0x10-6 / °C.

[0026] In the above-mentioned method for manufacturing the semiconductor component protective coating, the flexural strength of the first component protective layer is greater than 150 MPa.

[0027] The method for manufacturing the protective coating for semiconductor parts described above further includes the following step after the step of depositing the first seed layer: performing a preheating treatment.

[0028] In the above-mentioned method for manufacturing a protective coating for semiconductor parts, the temperature of the preheat treatment is 80°C or above.

[0029] The method for manufacturing the semiconductor component protective coating described above further includes the following steps after depositing the first component protective layer: performing a temperature holding treatment and a temperature lowering treatment.

[0030] In the above-mentioned method for manufacturing a protective coating for semiconductor parts, the temperature of the temperature-maintaining treatment is 80° C. or above.

[0031] In the above-mentioned method for manufacturing a protective coating for semiconductor parts, the rate of the temperature reduction treatment is 5° C. per minute or more than 5° C. per minute.

[0032] The method for manufacturing the protective coating of semiconductor parts described above further includes the following steps after the temperature holding treatment and the temperature lowering treatment: performing an annealing treatment.

[0033] In the above-mentioned method for manufacturing the protective coating for semiconductor parts, the temperature of the tempering treatment is 500°C or above. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 Shown is a schematic diagram of the semiconductor component protective coating 1 and the semiconductor component 8 according to this embodiment.

[0035] Figure 2 FIG. 1 is a schematic diagram showing a semiconductor component protective coating 1 being subjected to laser annealing treatment.

[0036] Figure 3 A schematic diagram of forming the textured ceramic layer 14 is shown.

[0037] Figure 4 Shown is a schematic diagram of a semiconductor component protective coating 2 and a semiconductor component 8 according to another embodiment.

[0038] Figure 5A Shown is a schematic diagram of a semiconductor component protective coating 3 and a semiconductor component 8 according to yet another embodiment.

[0039] Figure 5B Shown is a schematic diagram of a semiconductor component protective coating 4 and a semiconductor component 8 according to another embodiment.

[0040] Figure 6 The flowchart shown is a method for manufacturing a protective coating for semiconductor components according to the present invention. DETAILED DESCRIPTION

[0041] See also Figure 1 , Figure 1 The diagram depicts a semiconductor component protection coating 1 and a semiconductor component 8 of the present embodiment. The semiconductor component protection coating 1 of the present embodiment is applied to a semiconductor component 8, and the semiconductor component protection coating 1 includes a first seed layer 11 having a lattice direction and a first component protection layer 12. The material of the first seed layer 11 is, for example, one of oxides, nitrides, borides, and fluorides of transition metal elements with atomic numbers 39-80 in the periodic table, or any combination thereof.

[0042] In the present embodiment, the first seed layer 11 is deposited on the upper surface of the semiconductor component 8 using a low deposition rate process, and the semiconductor component 8 is deposited with at least one first seed layer 11 having a lattice closest packing direction. Specifically, the low deposition rate process is, for example, chemical vapor deposition (CVD), physical vapor deposition (PVD), molecular beam epitaxy (MBE), and atomic layer deposition (ALD), and the thickness of the deposited first seed layer 11 is between 0.3um and 8um, and the thermal expansion coefficient of the first seed layer 11 is between 6.0x10-6 / °C and 8.0x10-6 / °C, and the flexural strength is between 150MPa and 400MPa.

[0043] In addition, the material of the first component protection layer 12 is, for example, one of oxides, nitrides, borides, fluorides of transition metals with atomic numbers 39-80 in the periodic table, or any combination thereof. It is worth noting that in other embodiments, the material of the first component protection layer 12 may be different from the material of the first seed layer 11.

[0044] In the present embodiment, the first part protection layer 12 is deposited on the upper surface of the first seed layer 11 using a high deposition rate process, such as vacuum plasma spraying (VPS), atmospheric plasma spraying (APS), suspension plasma spraying (SPS), aerosol deposition (ADM), etc. It is worth noting that the first part protection layer 12 using the high deposition rate process and the first seed layer 11 using the low deposition rate process have the same crystallographic direction. Specifically, the lattice direction of the surface of the first part protection layer 12 is the same as the lattice direction of the surface of the first seed layer 11. For example, yttrium oxide (Y2O3) and yttrium aluminum garnet (YAG) will form the (222) and (420) most densely packed directions, so the thickness of the deposited first part protection layer 12 can be in the range of 60um to 200um.

[0045] In addition, the thermal expansion coefficient of the first component protection layer 12 is between 6.0x10-6 / ℃ and 8.0x10-6 / ℃, and the flexural strength of the first component protection layer 12 is greater than 150MPa. If the expansion coefficients of the first component protection layer 12 and the first seed layer 11 differ too much, the first component protection layer 12 may be cracked due to rapid temperature changes during the preheating process, the cooling process (described in detail in the following paragraphs), or even in the etching environment, causing the finished product to have reduced strength or serious defects. In addition, the function of the first seed layer 11 of the present embodiment is to increase the crystallization rate of the first part protection layer 12 and help form a crystal phase (Texture Grain Structure) with a preferred directionality, so that the first part protection layer 12 reaches the most densely packed crystal structure to improve the anti-plasma corrosion characteristics, wherein the deposition rate of the first part protection layer 12 is 20 times or more than the deposition rate of the first seed layer 11, and the thickness of the first part protection layer 12 is 7 times or more than the thickness of the first seed layer 11. Moreover, in a preferred embodiment, the thickness of the first part protection layer 12 is more than 15 times the thickness of the first seed layer 11. By using this method, the process time of the semiconductor part protection coating 1 can be greatly shortened and a high-quality anti-plasma coating can be manufactured.

[0046] See also Figure 2 , Figure 2 The diagram shows a semiconductor component protection coating 1 being subjected to laser annealing. The semiconductor component protection coating 1 of this embodiment can be laser annealed to enhance the performance of the anti-plasma film layer. Specifically, a laser annealing machine 7 irradiates the first component protection layer 12 with laser light to melt it at high temperature and uses the low deposition rate layer (first seed layer 11) as a seed to trigger the growth of a single lattice direction of the high deposition rate layer (first component protection layer 12), thereby achieving a textured ceramic layer 14 with the most densely packed direction (see Figure 3 , Figure 3The diagram shows a schematic diagram of forming a textured ceramic layer 14. ) In addition, during the simultaneous annealing process, the first component protection layer 12 becomes molten to reduce the pores formed by rapid deposition.

[0047] See also Figure 4 , Figure 4 The diagram depicts a semiconductor component protection coating 2 and a semiconductor component 8 of another embodiment. The difference between the semiconductor component protection coating 2 and the semiconductor component protection coating 1 is that the semiconductor component protection coating 2 further includes an adhesive layer 15, and the adhesive layer 15 is located between the first seed layer 11 and the semiconductor component 8. Specifically, a layer of adhesive layer 15 with a dense structure is deposited on the semiconductor component 8 (aluminum or anodized component) at a low deposition rate. The material of the adhesive layer 15 can be selected from one or a combination of aluminum oxide (Al2O3), aluminum nitride (AlN) or aluminum fluoride (AlF3). The function of the adhesive layer 15 is to strengthen the adhesion between the subsequent first component protection layer 12 and the semiconductor component 8. The thickness of the deposited adhesive layer 15 can be between 0.1um and 5um, and the thermal expansion coefficient of the adhesive layer 15 is between 6.0x10-6 / ℃ and 11.0x10-6 / ℃. The flexural strength of the adhesive layer 15 is between 300MPa and 700MPa. If the strength is insufficient, it will cause risks in use.

[0048] See also Figure 5A , Figure 5A Shown is a schematic diagram of a semiconductor component protective coating 3 and a semiconductor component 8 of another embodiment. The difference between the semiconductor component protective coating 3 and the semiconductor component protective coating 1 is that the semiconductor component protective coating 3 also includes a second seed layer 11' and a second component protective layer 12'. The second component protective layer 12' is deposited on the upper surface of the second seed layer 11', and the thickness of the ceramic layer deposited by the second component protective layer 12' may be between 40um and 60um, while the second seed layer 11' is deposited on the upper surface of the first component protective layer 12, and the thickness of the ceramic layer deposited by the second seed layer 11' may be between 0.3um and 3um. Therefore, the semiconductor component protective coating 3 is equivalent to two sets of semiconductor component protective coatings 1 stacked to make their crystal texturing better. It is worth noting that the material of the second component protective layer 12' may be different from that of the first component protective layer 12, and the lattice directions of the two may also be different. Similarly, the material of the second seed layer 11' can be different from that of the first seed layer 11, and the lattice direction of the second seed layer 11' can be different from that of the first seed layer 11. In this way, the strength of the semiconductor component protection coating 3 can be further enhanced.

[0049] In the above, the semiconductor component protection coating 3 is equivalent to using two sets of semiconductor component protection coatings 1 to be stacked, the combination of the first seed layer 11 and the first component protection layer 12 can be regarded as the first group, and the combination of the second seed layer 11' and the second component protection layer 12' can be regarded as the second group. However, in other embodiments, the semiconductor component protection coating 3 can also use more sets of semiconductor component protection coatings 1 to be stacked on each other, for example: three sets or more, which can also enhance the strength of the overall coating.

[0050] Figure 5B The diagram depicts a semiconductor component protection coating 4 and a semiconductor component 8 of another embodiment. The difference between the semiconductor component protection coating 4 and the semiconductor component protection coating 3 is that the semiconductor component protection coating 3 further includes an adhesive layer 15', and the adhesive layer 15' is located between the first seed layer 11 and the semiconductor component 8. The material of the adhesive layer 15' can be selected from one or a combination of aluminum oxide (Al2O3), aluminum nitride (AlN) or aluminum fluoride (AlF3). The function of the adhesive layer 15' is also to strengthen the adhesion between the subsequent first component protection layer 12 and the semiconductor component 8.

[0051] In summary, the semiconductor component protection coating of the present invention has a shorter manufacturing time, which can reduce manufacturing costs. In addition, the semiconductor component protection coating can enhance the anti-plasma corrosion property of the semiconductor component to reduce the contamination of the semiconductor component.

[0052] See also Figure 6 , Figure 6 The flowchart of the method for manufacturing the semiconductor component protective coating of the present invention is shown. The method for manufacturing the semiconductor component protective coating comprises the following steps:

[0053] First, please refer to step S1 , a semiconductor component 8 is provided. The semiconductor component 8 is, for example, aluminum or an anodized component.

[0054] Afterwards, referring to step S2 , an adhesive layer 15 is deposited on the surface of the semiconductor component 8 .

[0055] Afterwards, referring to step S3, a first seed layer 11 is deposited on the surface of the adhesive layer 15. However, in other embodiments, step S2 may be omitted, and the adhesive layer 15 need not be deposited on the surface of the semiconductor component 8. Therefore, the first seed layer 11 is deposited on the surface of the semiconductor component 8. Moreover, the surface of the first seed layer 11 has a lattice direction.

[0056] Afterwards, referring to step S4, a preheating treatment is performed. The preheating treatment temperature may be 80° C. or above, and preferably the preheating treatment temperature is above 100° C.

[0057] Afterwards, referring to step S5, a first component protection layer 12 is deposited on the surface of the first seed layer 11, so that the lattice direction of the surface of the first component protection layer 12 is the same as the lattice direction of the surface of the first seed layer 11. It is worth noting that the thickness of the first component protection layer 12 is 7 times or more than the thickness of the first seed layer 11.

[0058] Afterwards, please refer to step S6 to perform temperature holding treatment and temperature reduction treatment. The temperature of the temperature holding treatment can be 80°C or above, and the preferred temperature of the temperature holding treatment is 100°C or above, with an upper limit of 300°C. The temperature holding time is more than 1 minute. In addition, the rate of the temperature reduction treatment is 5°C or less per minute, and the slower the temperature reduction rate, the better the crystallization effect.

[0059] Afterwards, please refer to step S7 for annealing treatment, the annealing temperature is 500°C or above. Specifically, the subsequent heat treatment process (annealing treatment) is used to enhance the crystallization direction and anti-plasma properties of the film layer. Taking laser annealing as an example: a high temperature melting anti-plasma layer is used to form a sintering effect, and the first seed layer 11 (intermediate layer) is used as a seed to trigger the ceramic growth in a single lattice direction, preferably a textured ceramic layer whose crystallization direction is the most densely packed direction. The power of the laser in the laser annealing is between 10W and 100W, so as to keep the surface temperature of the film at 500°C or above. If the laser power is too low, there will be no improvement effect. If the laser power is too high, the film layer may break. The surface roughness of the first component protection layer 12 after laser annealing is between 3um and 6um.

[0060] In summary, through the technical means adopted by the present invention, an anti-plasma layer with a certain crystal orientation can be produced at a relatively low cost, thereby improving the anti-plasma ability in a plasma environment.

Claims

1. A semiconductor component protective coating, applied to a semiconductor component, wherein the semiconductor component protective coating is characterized in that: include: a first seed layer deposited on the surface of the semiconductor component; and A first component protection layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protection layer is the same as the lattice direction of the surface of the first seed layer; Wherein, the thickness of the first component protection layer is more than 7 times the thickness of the first seed layer.

2. A semiconductor component protective coating, applied to a semiconductor component, wherein the semiconductor component protective coating is characterized in that: include: a first seed layer deposited on the surface of the semiconductor component; an adhesive layer located between the first seed layer and the semiconductor component; and A first component protection layer is deposited on the surface of the first seed layer so that the lattice direction of the surface of the first component protection layer is the same as the lattice direction of the surface of the first seed layer; Wherein, the thickness of the first component protection layer is more than 7 times the thickness of the first seed layer.

3. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: Also includes: At least one second seed layer is deposited on the surface of the first component protection layer; and At least one second component protection layer is deposited on the surface of the second seed layer so that the lattice direction of the surface of the second component protection layer is the same as the lattice direction of the surface of the second seed layer.

4. The semiconductor component protective coating as claimed in claim 3, characterized in that: The lattice direction of the surface of the second seed layer is different from the lattice direction of the surface of the first seed layer.

5. The semiconductor component protective coating as claimed in claim 3, characterized in that: The lattice direction of the surface of the second part protection layer is different from the lattice direction of the surface of the first part protection layer.

6. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The deposition rate of the first component protection layer is more than 20 times of the deposition rate of the first seed layer.

7. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The first seed layer is selected from oxides, nitrides, borides, fluorides of transition metal elements with atomic numbers 39-80 in the periodic table, or any combination thereof.

8. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The first component protection layer is selected from one of oxides, nitrides, borides, and fluorides of transition metal elements with atomic numbers 39-80 in the periodic table, or any combination thereof.

9. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The material of the first seed layer is different from the material of the first component protection layer.

10. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The lattice direction of the surface of the first component protection layer is along the most densely packed direction.

11. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The thermal expansion coefficient of the first part protective layer is between 6.0x10 -6 / °C to 8.0x10 -6 / °C.

12. The semiconductor component protective coating according to claim 1 or claim 2, characterized in that: The flexural strength of the first part protective layer is greater than 150 MPa.

13. The semiconductor component protective coating as claimed in claim 2, characterized in that: The material of the adhesive layer is selected from aluminum oxide (Al2O3), aluminum nitride (AlN), aluminum fluoride (AlF3) or any combination thereof.

14. A method for manufacturing a protective coating for semiconductor components, characterized in that: include: (a1) depositing a first seed layer on a surface of a semiconductor component; and (b1) depositing a first component protection layer on the surface of the first seed layer so that the lattice direction of the surface of the first component protection layer is the same as the lattice direction of the surface of the first seed layer; Wherein, the thickness of the first component protection layer is more than 7 times the thickness of the first seed layer.

15. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: The deposition rate of the first component protection layer is more than 20 times that of the first seed layer.

16. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: The material of the first seed layer is different from the material of the first component protection layer.

17. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: The lattice direction of the surface of the first component protection layer is along the most densely packed direction.

18. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: The thermal expansion coefficient of the first part protective layer is between 6.0x10 -6 / °C to 8.0x10 -6 / °C.

19. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: The flexural strength of the first part protective layer is greater than 150 MPa.

20. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: After step (a1), the method further comprises: (a2) performing a preheating treatment.

21. The method for manufacturing a semiconductor component protective coating as claimed in claim 20, characterized in that: The temperature of the preheat treatment is above 80°C.

22. The method for manufacturing a semiconductor component protective coating as claimed in claim 14, characterized in that: After step (b1), the method further includes: (b2) performing a temperature-maintaining treatment and a temperature-lowering treatment.

23. The method for manufacturing a semiconductor component protective coating as claimed in claim 22, characterized in that: The temperature of the heat treatment is above 80°C.

24. The method for manufacturing a semiconductor component protective coating as claimed in claim 22, characterized in that: The cooling rate was 5°C per minute.

25. The method for manufacturing a semiconductor component protective coating as claimed in claim 22, characterized in that: After step (b2), the method further includes: (b3) performing tempering treatment.

26. The method for manufacturing a semiconductor component protective coating as claimed in claim 25, characterized in that: The temperature of the tempering treatment is 500°C or higher.

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