Cascode power devices based on cascaded JFETs and HEMTs

Abstract

The present invention relates to a cascode-type power device based on cascaded JFETs and HEMTs. The cascode-type power semiconductor device comprises a SiC-based JFET, a GaN-based HEMT, and a bidirectional Zener diode. The HEMT and JFET are connected in series, with the HEMT's drain connected to the JFET's source, the JFET's gate connected to the HEMT's source, and a Zener diode B-ZD connected in parallel with the HEMT. Because the Zener diode B-ZD is bidirectionally symmetrical, the direction of the Zener diode B-ZD does not need to be specified. In the cascode device, the JFET's drain serves as the cascode device's drain, the HEMT's source serves as the cascode device's source, and the HEMT's gate serves as the cascode device's gate.

Description

Technical Field

[0001] The present invention belongs to the technical field of power semiconductor device design, and in particular relates to a cascode power device based on cascaded JFETs and HEMTs. Background Art

[0002] In recent years, power devices based on the wide-bandgap power semiconductor materials gallium nitride (GaN) and silicon carbide (SiC) have developed rapidly. Currently, the main commercialized devices are GaN-based high electron mobility transistors (HEMTs), also known as heterojunction field-effect transistors (HFETs), and SiC-based junction field-effect transistors (JFETs). In power electronics applications, normally-off devices offer significant reliability advantages, as they can maintain the inverter's off state even after a control system failure. Currently, HEMTs have relatively mature processes that enable normally-off designs, but these devices are primarily used in medium- and low-voltage applications (<650V). SiC JFETs can block higher voltages (>1200V), but currently JFETs are normally-on devices. Cascode devices combine the advantages of both, resulting in a normally-off device capable of blocking high voltages (>1200V).

[0003] Currently, research and patents for high-voltage cascode devices are primarily focused on cascading high-voltage SiC JFETs and low-voltage Si-based MOSFETs. However, MOSFETs have a body diode, requiring a reverse recovery process to block forward voltage after reverse conduction, reducing system efficiency and switching speed. HEMTs lack a body diode and can conduct in the reverse direction. Therefore, cascode devices can block forward voltage without reverse recovery after reverse conduction, significantly improving switching speed and reducing switching losses.

[0004] However, due to the special structure of cascode devices, during the shutdown process of the device, the voltage amplitude to which the HEMT device is subjected is equal to the gate voltage of the JFET, but with the opposite sign. When the HEMT voltage is too high during the shutdown process, an overvoltage condition will occur at the JFET gate, which is not conducive to the reliable operation of the JFET. Previous research on JFET gate overvoltage at home and abroad has not effectively suppressed the overvoltage, or will reintroduce the problem of reverse recovery. Therefore, this patent designs a protection branch to prevent the HEMT voltage from being too high when designing the device, and this protection branch will not cause reverse recovery problems for the device.

[0005] CN201880070616.2 discloses a high-voltage fast switching device, the purpose of which is to provide a device comprising a plurality of switching devices, a voltage limiter, and a switching time synchronizer. The switching devices are coupled in series starting from the first switching device and ending the coupling at the last switching device. The device enables a high-voltage source to be coupled to at least one selected switching device among the switching devices. The voltage limiter is coupled to the switching device. The first switching device is configured to directly receive a control signal for changing the switching state of the device. The first switching device is configured to facilitate the cascaded conversion of the switching states of consecutive switching devices in the series, wherein the switching time synchronizer is configured to synchronize the time at which the conversion of the switching states of the consecutive switching devices takes effect. The voltage limiter is configured to limit the overvoltage condition of the switching device during the conversion. This technical solution: A device for switching a high-voltage source, comprising: a plurality of switching devices coupled in series, starting with a first switching device and ending at a last switching device, the device enabling the high-voltage source to couple to at least one selected switching device among the switching devices; a voltage limiter coupled to the switching device; and a switching time synchronizer. The first switching device is configured to directly receive a control signal for changing the switching state of the device, and the first switching device is configured to facilitate cascaded switching state transitions of consecutive switching devices in the series. The switching time synchronizer is configured to synchronize the timing at which the switching state transitions of consecutive switching devices take effect, and the voltage limiter is configured to limit overvoltage conditions within the switching devices during the transitions. A shortcoming of this invention is that it primarily focuses on time synchronization and voltage balancing for the entire system when multiple switching transistors operate in series. The present invention focuses on how to prevent internal overvoltage damage to a single switching transistor in the design of a single switching transistor, thereby improving the reliability of the transistor. The two approaches differ in their research objectives, methods, and results. Summary of the Invention

[0006] The present invention aims to provide a cascode-type high-voltage power semiconductor device that combines a GaN-based HEMT and a SiC-based JFET, and is designed to have no reverse recovery and no gate overvoltage on the JFET.

[0007] The technical solution of the present invention is the cascode-type power device based on cascaded JFETs and HEMTs. The cascode-type power semiconductor device is characterized in that it comprises a SiC-based JFET, a GaN-based HEMT, and a bidirectional Zener diode. The HEMT and JFET are connected in series, with the drain of the HEMT connected to the source of the JFET, the gate of the JFET connected to the source of the HEMT, and the Zener diode B-ZD connected in parallel with the HEMT. Since the Zener diode B-ZD is bidirectionally symmetrical, the direction of the Zener diode B-ZD does not need to be specified. In the cascode device, the drain of the JFET serves as the drain of the cascode device, the source of the HEMT serves as the source of the cascode device, and the gate of the HEMT serves as the gate of the cascode device.

[0008] Preferably, during the shutdown process, the gate voltage of the HEMT changes from a high voltage to a low voltage, causing the voltage across the HEMT to rise. At this point, the voltage across the HEMT equals the gate voltage of the JFET, but with an opposite sign. As the voltage across the HEMT rises, the JFET gate voltage decreases until the JFET is turned off. During this process, when the voltage across the HEMT reaches the clamping voltage of the Zener diode B-ZD, the voltage across the HEMT is clamped by the Zener diode B-ZD and cannot increase further. This clamping process prevents high voltage from occurring across the HEMT, thereby preventing gate overvoltage at the JFET. During reverse conduction, since the Zener diode B-ZD cannot conduct current until the voltage falls below the clamping voltage, all current flows in the reverse direction through the HEMT channel. Since the HEMT does not have a PN junction, the device can withstand forward voltage without undergoing a reverse recovery process. This reduces switching losses and improves switching speed in the cascode device.

[0009] As a preference: during the entire operation process, the gate voltage of the JFET is effectively clamped, and no gate overvoltage occurs; when the current flows in the reverse direction through the Zener diode DUT, the current of the Zener diode B-ZD is 0, and no current flows through the PN junction in the Zener diode B-ZD, thereby avoiding the reverse recovery process.

[0010] Preferably, during the switching process, the drain-source voltage of the HEMT is effectively clamped, thereby avoiding mis-conduction caused by the Miller effect; 0V is used to control the cascode power device to turn off, and 5V to 6V is used to control the cascode power device to turn on.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] The present invention combines SiC JFET and GaN HEMT to realize a normally-off high-voltage power device, which does not have the problem of JFET gate overvoltage and has no reverse recovery process. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a schematic diagram of the structure of the cascode type power device designed by the present invention;

[0014] Figure 2 is a test circuit diagram of the present invention;

[0015] Figure 3 It is a waveform diagram of the cascode type power semiconductor device of the present invention in a simulation test circuit. DETAILED DESCRIPTION

[0016] The present invention will be further described below in conjunction with the accompanying drawings:

[0017] See also Figure 1 As shown, Figure 1 The cascode type power device structure designed for the present invention. The cascode type device is composed of a SiC-based JFET, a GaN-based HEMT and a bidirectional Zener diode (Bidirectional ZenerDiode, B-ZD). The design scheme of the cascode type power device is: the HEMT and the JFET are connected in series, wherein the drain of the HEMT is connected to the source of the JFET, and the gate of the JFET is connected to the source of the HEMT. In addition, the Zener diode B-ZD is connected in parallel with the HEMT. Since the Zener diode B-ZD is bidirectionally symmetrical, there is no need to specify the direction of the Zener diode B-ZD. In the cascode device, the drain of the JFET is the drain of the cascode device, the source of the HEMT is the source of the cascode device, and the gate of the HEMT is the gate of the cascode device.

[0018] During the turn-off process, the HEMT's gate voltage changes from high to low, causing the voltage across the HEMT to rise. At this point, the HEMT voltage equals the JFET's gate voltage, but with opposite sign. As the voltage across the HEMT rises, the JFET's gate voltage decreases until the JFET is turned off. During this process, when the HEMT voltage reaches the clamping voltage of the Zener diode B-ZD, the voltage across the HEMT is clamped by the Zener diode B-ZD and cannot increase further. This clamping process prevents high voltages from occurring across the HEMT, thereby preventing overvoltages at the JFET's gate.

[0019] During reverse conduction, the Zener diode (B-ZD) cannot conduct current until the voltage drops below the clamping voltage. Therefore, all current flows in the reverse direction through the HEMT channel. Because the HEMT lacks a PN junction, it can withstand forward voltage without undergoing a reverse recovery process. This reduces switching losses in cascode devices and increases switching speed.

[0020] See also Figure 2 As shown, the device under test (DUT) in the test circuit is a cascode-type power semiconductor device designed by the present invention. The test circuit is a buck circuit, in which the device designed by the present invention serves as the bottom transistor. After the top transistor is turned off, the load current will flow in the reverse direction through the DUT. After the top transistor is turned on, the DUT needs to switch from a reverse current-conducting state to a voltage-blocking state.

[0021] See also Figure 3 Figure 2 shows the waveforms of a cascode-type power semiconductor device in a simulated test circuit. Throughout operation, the JFET's gate voltage is effectively clamped, preventing gate overvoltage. During reverse current flow through the DUT, the current in Zener diode B-ZD is zero, preventing current from flowing through the PN junction of Zener diode B-ZD, thus preventing reverse recovery.

[0022] During the switching process, the drain-source voltage of the HEMT is effectively clamped, avoiding false turn-on due to the Miller effect; 0V is used to control the cascode power device to turn off, and 5V to 6V is used to control the cascode power device to turn on.

[0023] The above descriptions are merely preferred embodiments of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention shall fall within the scope of the claims of the present invention.

Claims

1. A cascode power device based on a cascaded JFET and a HEMT, the cascode power device comprising a SiC-based JFET, a GaN-based HEMT, and a bidirectional Zener diode; the HEMT and the JFET are connected in series, wherein the drain of the HEMT is connected to the source of the JFET, the gate of the JFET is connected to the source of the HEMT, and the Zener diode B-ZD is connected in parallel with the HEMT. Since the Zener diode B-ZD is bidirectionally symmetrical, the direction of the Zener diode B-ZD does not need to be specified; in the cascode power device, the drain of the JFET is the drain of the cascode power device, the source of the HEMT is the source of the cascode power device, and the gate of the HEMT is the gate of the cascode power device, characterized in that: The HEMT has no PN junction and does not need to undergo a reverse recovery process to withstand a forward voltage. This reduces the switching loss of the cascode power device and improves the switching speed. During the entire operation process, the gate voltage of the JFET is effectively clamped, and no gate overvoltage occurs. When current flows in the reverse direction through the Zener diode DUT, the current in the Zener diode B-ZD is zero, and no current flows through the PN junction in the Zener diode B-ZD, thereby avoiding the reverse recovery process.

2. The cascode power device based on cascaded JFET and HEMT according to claim 1, characterized in that: During the shutdown process, the HEMT's gate voltage changes from high to low, causing the voltage across the HEMT to rise. At this point, the HEMT voltage equals the JFET's gate voltage, but with the opposite sign. As the voltage across the HEMT rises, the JFET's gate voltage decreases until the JFET is turned off. During this process, when the HEMT voltage reaches the clamping voltage of the Zener diode B-ZD, the voltage across the HEMT is clamped by the Zener diode B-ZD and cannot increase further. This clamping process prevents high voltages from occurring across the HEMT, thereby preventing gate overvoltages in the JFET. During reverse conduction, since the Zener diode B-ZD cannot conduct current until the voltage drops below the clamping voltage, all current flows in the reverse direction through the HEMT's channel.

3. The cascode power device based on cascaded JFET and HEMT according to claim 1, characterized in that: During the switching process, the drain-source voltage of the HEMT is effectively clamped, avoiding false turn-on caused by the Miller effect; 0V is used to control the cascode power device to turn off, and 5V to 6V is used to control the cascode power device to turn on.

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