A driving circuit and electronic device

Abstract

This application provides a driving circuit and an electronic device. In this driving circuit, the driving signals of the SI device and the SiC device connected in parallel in the hybrid switch are sequentially transmitted through the logic module and the driving module, respectively reaching the control terminals of the SI device and the SiC device. Because the logic circuit clamps the driving signal level of the SI device to the off level when the driving signal level of the SiC device is off, and maintains other levels of the driving signals of the SI device and the SiC device, the logic module can keep the SI device off when the SiC device is off. In other words, the logic module only allows the SI device to be turned on when the SiC device is on. Therefore, this driving circuit ensures that the SiC device is turned on first and then turned off.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a drive circuit and electronic device. Background Technology

[0002] In the development of power electronics technology, the high frequency and miniaturization of power electronic devices are among the main goals of technological progress. Therefore, SiC devices have gradually emerged in recent years, and some commercial power electronic devices are designed around SiC devices.

[0003] Compared to SI devices, SiC devices have lower switching losses and can withstand higher junction temperatures, thus enabling higher switching frequencies in power electronic devices and reducing the size and weight of accompanying passive filtering devices. However, the high cost of SiC devices limits their large-scale commercialization. To address this issue, researchers have proposed hybrid SI-SiC device switching technology, such as... Figure 1 As shown, SI devices and SiC devices are connected in parallel and used as a single device according to a certain current ratio; when the drive signal PWM1 of the SI device and the drive signal PWM2 of the SiC device are respectively as follows: Figure 2 When the signal is shown (t1 is the turn-on delay and t2 is the turn-off delay in the figure), the SiC device turns on before the SI device turns on and turns off after the SI device turns off. This not only utilizes the low switching loss characteristic of the SiC device, but also realizes zero-voltage turn-on and zero-voltage turn-off of the SI device. This technology has broad application prospects, but its driving circuit is not yet mature and cannot completely ensure that the SiC device turns on before turning off.

[0004] Therefore, ensuring that SiC devices in a hybrid switch are turned on before being turned off is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] In view of this, the present invention provides a driving circuit and electronic device to ensure that the SiC device in a hybrid switch is turned on first and then turned off.

[0006] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:

[0007] This application provides a driving circuit for driving a hybrid switch, the hybrid switch comprising: a SiC device and a SI device connected in parallel; the driving circuit comprising: a logic module and a driving module; wherein:

[0008] The drive signals of the SI device and the SiC device are transmitted sequentially through the logic module and the drive module, and arrive at the control terminals of the SI device and the SiC device respectively.

[0009] The logic module is configured to clamp the level of the driving signal of the SI device to the off level when the level of the driving signal of the SIC device is the off level; and maintain other levels of the driving signals of the SI device and the SIC device.

[0010] Optionally, the logic module is configured to maintain the other levels of the driving signals of the SI device and the SIC device, and specifically configured to:

[0011] maintain the level of the driving signal of the SIC device; and

[0012] maintain the level of the driving signal of the SI device when the level of the driving signal of the SIC device is the on level.

[0013] Optionally, the logic module comprises a first logic unit and a second logic unit; and wherein:

[0014] The first logic unit is configured to clamp or maintain the level of the driving signal of the SI device according to the level of the driving signal of the SIC device.

[0015] The second logic unit is configured to maintain the level of the driving signal of the SIC device.

[0016] Optionally, the first logic unit is specifically configured to:

[0017] clamp the level of the driving signal of the SI device to the off level when the level of the driving signal of the SIC device is the off level, and the level of the driving signal of the SI device is the on level or the off level;

[0018] maintain the level of the driving signal of the SI device to the on level when the level of the driving signal of the SIC device is the on level, and the level of the driving signal of the SI device is the on level; and

[0019] maintain the level of the driving signal of the SI device to the off level when the level of the driving signal of the SIC device is the on level, and the level of the driving signal of the SI device is the off level.

[0020] Optionally, the first logic unit comprises an XOR gate and a first AND gate; and wherein:

[0021] one input end of the XOR gate receives the driving signal of the SIC device, and the other input end is grounded;

[0022] An input terminal of the first AND gate is connected with an output terminal of the XOR gate, another input terminal of the first AND gate receives a driving signal of the SI device, and an output terminal of the first AND gate is connected with a control terminal of the SI device through the driving module.

[0023] Optionally, the second logic unit comprises a second AND gate, a first NOT gate, a third AND gate and a second NOT gate, wherein:

[0024] An input terminal of the first NOT gate receives the driving signal of the SIC device;

[0025] An input terminal of the third AND gate is connected with an output terminal of the first NOT gate, another input terminal of the third AND gate receives the driving signal of the SI device;

[0026] An input terminal of the second NOT gate is connected with an output terminal of the third AND gate;

[0027] An input terminal of the second AND gate is connected with an output terminal of the second NOT gate, another input terminal of the second AND gate receives the driving signal of the SIC device, and an output terminal of the second AND gate is connected with a control terminal of the SIC device through the driving module.

[0028] Optionally, the second logic unit further comprises a third NOT gate and a fourth NOT gate, wherein:

[0029] An input terminal of the third NOT gate is connected with an output terminal of the second AND gate, an input terminal of the fourth NOT gate is connected with an output terminal of the third NOT gate, and an output terminal of the fourth NOT gate is connected with the control terminal of the SIC device through the driving module.

[0030] Optionally, the driving module is configured to amplify the driving signals of the SI device and the SIC device and then output to the control terminal of the SI device and the control terminal of the SIC device.

[0031] Optionally, the driving module comprises a first driving unit and a second driving unit, wherein:

[0032] The first driving unit is configured to amplify the driving signal of the SI device and then output to the control terminal of the SI device.

[0033] The second driving unit is configured to amplify the driving signal of the SIC device and then output to the control terminal of the SIC device.

[0034] Another aspect of the present application provides an electronic device comprising a digital signal processor (DSP), at least one hybrid switch and at least one driving circuit as described in any one of the preceding aspects, wherein:

[0035] The DSP is connected with the corresponding hybrid switch through each driving circuit to control the on-off of each hybrid switch.

[0036] Optionally, the driving circuit corresponds to the hybrid switch one by one.

[0037] Optionally, one driving circuit corresponds to at least two hybrid switches.

[0038] Optionally, the hybrid switch comprises an SI device and an SIC device, wherein:

[0039] The input end of the SI device is connected with the input end of the SIC device, and the output end of the SI device is connected with the output end of the SIC device.

[0040] Optionally, the SI device is an SI-IGBT.

[0041] Optionally, the SIC device is an SIC-MOS tube.

[0042] From the above technical solution, the application provides a driving circuit, which comprises a logic module and a driving module. In the driving circuit, the driving signals of the SI device and the SIC device connected in parallel in the hybrid switch are sequentially transmitted through the logic module and the driving module, and reach the control end of the SI device and the control end of the SIC device. Since the logic circuit clamps the level of the driving signal of the SI device to the off level when the level of the driving signal of the SIC device is the off level, and maintains other levels of the driving signals of the SI device and the SIC device, the logic module can make the SI device always off when the SIC device is off, in other words, only when the SIC device is on, the logic module allows the SI device to be on, so that the driving circuit ensures that the SIC device is turned on first and then turned off. BRIEF DESCRIPTION OF DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only illustrate the embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of the provided drawings.

[0044] Figure 1 It is a structural schematic diagram of the hybrid switch;

[0045] Figure 2 It is the driving signal received by the SI device and the SIC device in the hybrid switch respectively;

[0046] Figures 3-7 It is five structural schematic diagrams of the driving circuit provided by the embodiments of the present application respectively;

[0047] Figure 8 and Figure 9 Fig. 1 and Fig. 2 are two structural schematic diagrams of electronic devices provided by embodiments of the present application, respectively. DETAILED DESCRIPTION

[0048] The technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0049] In the present application, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitation, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0050] In order to ensure the first-on and last-off of the SIC device 03 in the hybrid switch 01, the present application provides a driving circuit for driving the hybrid switch 01, and the specific structure thereof is as shown in Fig. 3, which comprises a logic module 10 and a driving module 20. Figure 3

[0051] In the driving circuit, the driving signal PWM1 of the SI device 02 and the driving signal PWM2 of the SIC device 03 (as shown in Fig. 4) are sequentially transmitted through the logic module 10 and the driving module 20, and are correspondingly transmitted to the control ends of the SI device 02 and the SIC device 03, so as to control the SI device 02 and the SIC device 03 correspondingly. Figure 2

[0052] In the working process of the driving circuit, when the level of the driving signal PWM2 of the SIC device 03 is the off level, the logic module 10 clamps the level of the driving signal PWM1 of the SI device 02 to the off level, that is, no matter whether the level of the driving signal PWM1 of the SI device 02 is the off level or the on level, after being transmitted through the logic module 10, the level of the driving signal PWM1 of the SI device 02 is the off level when transmitted to the control end of the SI device 02.

[0053] ​​When the driving signal PWM2 of the SIC device 03 and the driving signal PWM1 of the SI device 02 are at other levels, the logic module keeps the levels unchanged, specifically:

[0054] When the driving signal PWM2 of the SIC device 03 is at the on level, the level of the driving signal PWM1 of the SI device 02 is kept unchanged, that is, if the level of the driving signal of the SI device 02 is at the off level, after passing through the logic module 10, the level of the driving signal PWM1 of the SI device 02 is at the off level when transmitted to the control end of the SI device 02; if the level of the driving signal PWM1 of the SI device 02 is at the on level, after passing through the logic module 10, the level of the driving signal PWM1 of the SI device 02 is at the on level when transmitted to the control end of the SI device 02.

[0055] No matter whether the level of the driving signal PWM2 of the SIC device 03 is at the on level or the off level, the logic module 10 keeps the level unchanged, that is, if the level of the driving signal PWM2 of the SIC device 03 is at the off level, after passing through the logic module 10, the level of the driving signal PWM2 of the SIC device 03 is at the off level when transmitted to the control end of the SIC device 03; if the level of the driving signal PWM2 of the SIC device 03 is at the on level, after passing through the logic module 10, the level of the driving signal PWM2 of the SIC device 03 is at the on level when transmitted to the control end of the SIC device 03.

[0056] It should be noted that, generally, when the level of the driving signal is at the low level, the corresponding device is off, and when the level of the driving signal is at the high level, the corresponding device is on, therefore, the off level of the driving signal is the low level, and the on level is the high level; in actual application, the off level of the driving signal can also be the high level, and the on level can be the low level, which can be determined according to the specific situation, and is not limited herein.

[0057] Therefore, the logic module 10 can keep the SI device 02 off when the SIC device 03 is off, in other words, only when the SIC device 03 is on, the logic module 10 allows the SI device 02 to be on, therefore, the driving circuit ensures that the SIC device 03 is turned on first and then turned off.

[0058] Based on the above embodiment, another embodiment of the present application provides a specific implementation of the logic module 10, which has a specific structure as shown in Figure 4 The specific structure includes a first logic unit 11 and a second logic unit 12.

[0059] In the embodiment of the logic module 10, two inputs of the first logic unit 11 receive the driving signal PWM1 of the SI device 02 and the driving signal PWM2 of the SIC device 03 respectively, and the output of the first logic unit 11 is connected to the control end of the SI device 02 through the driving module 20; two inputs of the second logic unit 12 receive the driving signal PWM1 of the SI device 02 and the driving signal PWM2 of the SIC device 03 respectively, and the output of the second logic unit 12 is connected to the control end of the SIC device 03 through the driving module 20.

[0060] When the logic module 10 is in the working state, the first logic unit 11 clamps or maintains the level of the driving signal PWM1 of the SI device 02 according to the level of the driving signal PWM2 of the SIC device 03; and the second logic unit 12 maintains the driving signal PWM2 of the SIC device 03.

[0061] In the embodiment of the logic module 10, the process that the first logic unit 11 clamps or maintains the level of the driving signal PWM1 of the SI device 02 according to the level of the driving signal PWM2 of the SIC device 03 is as follows:

[0062] When the level of the driving signal PWM2 of the SIC device 03 is the off level, and the level of the driving signal PWM1 of the SI device 02 is the on level or the off level, the first logic unit 11 clamps the level of the driving signal PWM1 of the SI device 02 to the off level; when the level of the driving signal PWM2 of the SIC device 03 is the on level, and the level of the driving signal PWM1 of the SI device 02 is the on level, the first logic unit 11 maintains the level of the driving signal PWM1 of the SI device 02 to the on level; when the level of the driving signal PWM2 of the SIC device 03 is the on level, and the level of the driving signal PWM1 of the SI device 02 is the off level, the first logic unit 11 maintains the level of the driving signal PWM1 of the SI device 02 to the off level.

[0063] The above is only one specific embodiment of the logic module 10, and in actual application, the embodiment is not limited thereto, and can be determined according to specific conditions. Whether the specific embodiment is limited or not, it is within the protection scope of the present application.

[0064] In the above embodiment of the logic module 10, the present embodiment further provides a specific embodiment of the first logic unit 11, as shown in the following table: Figure 4 As shown, the specific embodiment of the first logic unit 11 includes an XOR gate D1 and a first AND gate D2.

[0065] In the embodiment of the first logic unit 11, one input end of the XOR gate D1 receives the driving signal PWM2 of the SIC device 03, and the other input end is grounded; one input end of the first AND gate D2 is connected with the output end of the XOR gate D1, and the other input end of the first AND gate D2 receives the driving signal PWM1 of the SI device 02, and the output end of the first AND gate D2 is connected with the control end of the SI device 02 through the driving module 20.

[0066] The above is only one embodiment of the first logic unit 11, and in actual application, the above embodiment is included but not limited, and the specific implementation can be determined according to the specific situation, which is not limited here and is within the protection scope of the present application.

[0067] In the embodiment of the above logic module 10, the present embodiment further provides a specific embodiment of the second logic unit 12, as shown in the following figure, which comprises a second AND gate D3, a first NOT gate D4, a third AND gate D5 and a second NOT gate D6. Figure 4

[0068] In the embodiment of the second logic unit 12, the input end of the first NOT gate D4 receives the driving signal PWM2 of the SIC device 03; one input end of the third AND gate D5 is connected with the output end of the first NOT gate D4, and the other input end of the third AND gate D5 receives the driving signal PWM1 of the SI device 02; the input end of the second NOT gate D6 is connected with the output end of the third AND gate D5; one input end of the second AND gate D3 is connected with the output end of the second NOT gate D6, and the other input end of the second AND gate D3 receives the driving signal PWM2 of the SIC device 03, and the output end of the second AND gate D3 is connected with the control end of the SIC device 03 through the driving module 20.

[0069] In the embodiment of the above logic module 10, the present embodiment further provides another specific embodiment of the second logic unit 12, as shown in the following figure, which is based on the above embodiment of the second logic unit 12 and further comprises a third NOT gate D7 and a fourth NOT gate D8. Figure 5

[0070] The input end of the third NOT gate D7 is connected with the output end of the second AND gate D3, the input end of the fourth NOT gate D8 is connected with the output end of the third NOT gate D7, and the output end of the fourth NOT gate D8 is connected with the control end of the SIC device 03 through the driving module 20.

[0071] It should be noted that by adding two NOT gates, the driving capability of the driving circuit can be increased, and when the output signal of the previous stage is not a standard level signal in the driving circuit or the waveform is not ideal, the two NOT gates can shape the waveform of the output signal of the previous stage to become a standard waveform of the driving circuit, so as to ensure that the output signal provided by itself to the next stage is a correct signal.

[0072] ​​The above are only two embodiments of the second logic unit 12, and in actual applications, including but not limited to the above embodiments, and depending on specific conditions, no specific limitations are made herein, and all are within the protection scope of the present application.

[0073] Another embodiment of the present application provides a specific implementation of a driving circuit, which has a structure as shown in Figure 6 or Figure 7 , and includes a first driving unit 21 and a second driving unit 22.

[0074] In this implementation of the driving circuit, the first driving unit 21 is configured to amplify the driving signal PWM1 of the SI device 02 and output to the control end of the SI device 02; and the second driving unit 22 is configured to amplify the driving signal PWM2 of the SIC device 03 and output to the control end of the SIC device 03.

[0075] The above are only one implementation of the driving circuit, and in actual applications, including but not limited to the above implementation, and depending on specific conditions, no specific limitations are made herein, and all are within the protection scope of the present application.

[0076] Another embodiment of the present application provides an electronic device, which has a specific structure as shown in Figure 8 or Figure 9 , and includes a DSP (Digital Signal Process), at least one hybrid switch 01, and at least one driving circuit as provided in the above embodiment.

[0077] In the electronic device, the DSP is connected to the respective hybrid switches 01 through the respective driving circuits to control the on-off of the respective hybrid switches 01; wherein the driving signal PWM1 of the SI device 02 and the driving signal PWM2 of the SIC device 03 output by the DSP are as shown in Figure 2 .

[0078] Specifically, the driving circuit corresponds to the hybrid switch 01 one by one, as shown in Figure 8 ; or, one driving circuit corresponds to at least two hybrid switches 01, as shown in Figure 9 ; in actual applications, including but not limited to the above implementation, and depending on specific conditions, no specific limitations are made herein, and all are within the protection scope of the present application.

[0079] The hybrid switch 01 includes the SI device 02 and the SIC device 03, as shown in Figure 1 , which are connected in parallel; preferably, the SI device 02 is an SI-IGBT, and the SIC device 03 is an SIC-MOS tube; in actual applications, including but not limited to this implementation, no specific limitations are made herein, and all are within the protection scope of the present application.

[0080] The above description of the disclosed embodiments is merely exemplary and not limiting. Since modifications and changes to the described embodiments are obvious in view of the teachings disclosed herein, it is intended that the present disclosure be understood to include all such modifications and alterations with the scope of the present application being indicated by the following claims.

Claims

1. A drive circuit characterized by comprising: The drive circuit is used for driving a hybrid switch, and the hybrid switch comprises an SIC device and an SI device connected in parallel; the drive circuit comprises a logic module and a drive module; wherein: The drive signals of the SI device and the SIC device are sequentially transmitted through the logic module and the drive module, and are correspondingly transmitted to the control end of the SI device and the control end of the SIC device; The logic module is used for clamping the level of the drive signal of the SI device to an off level when the level of the drive signal of the SIC device is the off level, and is used for maintaining other levels of the drive signals of the SI device and the SIC device; The logic module comprises a first logic unit and a second logic unit; wherein: The first logic unit is used for clamping or maintaining the level of the drive signal of the SI device according to the level of the drive signal of the SIC device; The second logic unit is used for maintaining the level of the drive signal of the SIC device; The first logic unit comprises an XOR gate and a first AND gate; wherein: One input end of the XOR gate receives the drive signal of the SIC device, and the other input end is grounded; One input end of the first AND gate is connected with the output end of the XOR gate, the other input end of the first AND gate receives the drive signal of the SI device, and the output end of the first AND gate is connected with the control end of the SI device through the drive module; The second logic unit comprises a second AND gate, a first NOT gate, a third AND gate and a second NOT gate; wherein: The input end of the first NOT gate receives the drive signal of the SIC device; One input end of the third AND gate is connected with the output end of the first NOT gate, and the other input end of the third AND gate receives the drive signal of the SI device; The input end of the second NOT gate is connected with the output end of the third AND gate; One input end of the second AND gate is connected with the output end of the second NOT gate, the other input end of the second AND gate receives the drive signal of the SIC device, and the output end of the second AND gate is connected with the control end of the SIC device through the drive module.

2. The drive circuit according to claim 1, characterized by When the logic module is used for maintaining other levels of the drive signals of the SI device and the SIC device, it is specifically used for: maintaining the level of the drive signal of the SIC device; and maintaining the level of the drive signal of the SI device when the level of the drive signal of the SIC device is an on level.

3. The drive circuit according to claim 1, characterized by The first logic unit is specifically used for: clamping the level of the drive signal of the SI device to an off level when the level of the drive signal of the SIC device is an off level, and the level of the drive signal of the SI device is an on level or an off level; maintaining the level of the drive signal of the SI device as an on level when the level of the drive signal of the SIC device is an on level, and the level of the drive signal of the SI device is an on level; and ​ When the level of the driving signal of the SIC device is the on level and the level of the driving signal of the SI device is the off level, the level of the driving signal of the SI device is maintained as the off level.

4. The drive circuit according to claim 1, characterized by The second logic unit further comprises a third NOT gate and a fourth NOT gate; wherein: The input end of the third NOT gate is connected with the output end of the second AND gate, the input end of the fourth NOT gate is connected with the output end of the third NOT gate, and the output end of the fourth NOT gate is connected with the control end of the SIC device through the driving module.

5. The drive circuit according to any one of claims 1 to 4, characterized by The driving module is used for amplifying the driving signals of the SI device and the SIC device and then outputting to the control end of the SI device and the control end of the SIC device.

6. The drive circuit according to claim 5, characterized in that, The driving module comprises a first driving unit and a second driving unit; wherein: The first driving unit is used for amplifying the driving signal of the SI device and then outputting to the control end of the SI device; The second driving unit is used for amplifying the driving signal of the SIC device and then outputting to the control end of the SIC device.

7. An electronic device, characterized by It comprises: a digital signal processor (DSP), at least one hybrid switch and at least one driving circuit as claimed in any one of claims 1-6; wherein: The DSP is connected with the corresponding hybrid switch through each driving circuit to control the on-off of each hybrid switch.

8. Electronic device according to claim 7, characterized in that The driving circuit corresponds to the hybrid switch one by one.

9. Electronic device according to claim 7, characterized in that One driving circuit corresponds to at least two hybrid switches.

10. Electronic device according to any of claims 7-9, characterized in that, The hybrid switch comprises an SI device and an SIC device; wherein: The input end of the SI device is connected with the input end of the SIC device, and the output end of the SI device is connected with the output end of the SIC device.

11. Electronic device according to claim 10, characterized in that The SI device is an SI-IGBT.

12. The electronic device of claim 10, wherein, The SIC device is an SIC-MOS tube.

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