Monolithic Approach

Abstract

The singulation method comprises: a first step of forming a surface retention film on the upper surface of the wafer; a second step of thinning the lower surface of the wafer; a third step of removing the surface retention film; a fourth step of forming a first metal layer and a second metal layer on the lower surface of the wafer after thinning; a fifth step of attaching a dicing tape to the lower surface of the second metal layer; a sixth step of performing a hydrophilicity enhancement treatment on the upper surface of the wafer; a seventh step of forming a water-soluble protective layer on the surface of the wafer; and an eighth step of irradiating a specified area on the upper surface of the wafer. Laser cuts the first metal layer and the second metal layer; in the ninth step, the water-soluble protective layer is removed; the thickness of the first metal layer is between 30 μm and 60 μm, the thickness of the second metal layer is between 10 μm and 40 μm, the Young's modulus of the first metal layer is between 80 GPa and 130 GPa, and the Young's modulus of the second metal layer is between 190 GPa and 220 GPa; in the eighth step, the first metal layer is cut by irradiating with the first laser, and then the second metal layer is cut by irradiating with the second laser.

Description

[0001] This application is a divisional application of the Chinese patent application with application number "202180005345.4", application date "2021 / 02 / 17", and invention name "Singularization Method". Technical Field

[0002] The present invention relates to a singulation method for singulating a wafer. Background Art

[0003] Conventionally, there is known a semiconductor device including a semiconductor layer and a metal layer formed on the lower surface thereof (see, for example, Patent Document 1).

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: International Publication No. 2020 / 129786 Summary of the invention

[0007] Problems to be solved by the invention

[0008] A semiconductor device including a semiconductor layer and a metal layer formed on the lower surface thereof is obtained by dividing a wafer having a metal layer formed on the lower surface into individual pieces.

[0009] Conventionally, in the above-mentioned semiconductor device, in order to reduce the resistance value of the semiconductor layer in the thickness direction, there is a demand to make the thickness of the wafer relatively thin, more specifically, to be thinner than 30 μm.

[0010] However, if the thickness of a wafer having a metal layer formed on the lower surface is 30 μm or less, it is difficult to separate the wafer into individual pieces using a dicing blade.

[0011] Therefore, the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a method for singulating a wafer into pieces without using a dicing blade.

[0012] Means used to solve problems

[0013] A method for singulating a wafer having a plurality of semiconductor element structures formed on its upper surface is provided for singulating the wafer, and the method comprises the following steps in sequence: a first step of forming a surface retaining film on the upper surface of the wafer; a second step of thinning the lower surface of the wafer so that the thickness of the wafer becomes less than 30 μm; a third step of removing the surface retaining film from the upper surface of the wafer; a fourth step of sequentially forming a first metal layer and a second metal layer on the lower surface of the wafer after the thinning process; a fifth step of attaching a dicing tape to the lower surface of the second metal layer; a sixth step of subjecting the upper surface of the wafer to a treatment that improves the hydrophilicity of the surface of the wafer; and a seventh step of forming a surface retaining film on the surface of the wafer. The present invention relates to a method of forming a water-soluble protective layer; in the eighth step, irradiating a specified area of ​​the upper surface of the wafer with a laser to cut off the first metal layer and the second metal layer; and in the ninth step, removing the water-soluble protective layer from the surface of the wafer using cleaning water; the thickness of the first metal layer is between 30 μm and 60 μm, the thickness of the second metal layer is between 10 μm and 40 μm, the Young's modulus of the first metal layer is between 80 GPa and 130 GPa, and the Young's modulus of the second metal layer is between 190 GPa and 220 GPa; in the eighth step, the first metal layer is cut off by irradiating with the first laser, and then the second metal layer is cut off by irradiating with the second laser.

[0014] In addition, a singulation method according to a technical solution of the present invention singulates a wafer having a plurality of semiconductor element structures formed on the upper surface, and comprises the following steps in sequence: a first step of thinning the lower surface of the wafer; a second step of forming a metal layer on the lower surface of the wafer after the thinning; a third step of irradiating a specified area of ​​the upper surface of the wafer with a first laser to cut the wafer and the metal layer; and a fourth step of irradiating a cut adjacent area within a specified range on both sides of a center line of a cut area cut by the third step in a plan view of the wafer with a second laser, and irradiating a cut inner area contained in the cut area with a third laser in a plan view of the wafer.

[0015] Effects of the Invention

[0016] According to the singulation method of one aspect of the present invention, a wafer can be singulated without using a dicing blade. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment.

[0018] Figure 2 This is a plan view showing an example of the structure of the semiconductor device according to the first embodiment.

[0019] Figure 3A This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0020] Figure 3B This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0021] Figure 3C This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0022] Figure 3D This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0023] Figure 3E This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0024] Figure 3F This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0025] Figure 3G This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0026] Figure 3H This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0027] Fig. 3I This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0028] Figure 3J This is a schematic enlarged cross-sectional view of the wafer according to the first embodiment.

[0029] Figure 4 This is a schematic plan view of the wafer according to Embodiment 1.

[0030] Figure 5A This is a schematic plan view showing an example of irradiating the upper surface of the wafer with laser light in the eighth step of the first embodiment.

[0031] Figure 5B This is a schematic plan view showing an example of irradiating the upper surface of the wafer with laser light in the eighth step of the first embodiment.

[0032] Figure 6 This is a schematic enlarged cross-sectional view of the semiconductor device according to the first embodiment.

[0033] Figure 7 This is a schematic enlarged cross-sectional view of the semiconductor device according to the first embodiment.

[0034] Fig. 8A This is a schematic enlarged cross-sectional view of the wafer according to the second embodiment.

[0035] Figure 8BThis is a schematic enlarged cross-sectional view of a wafer according to the second embodiment.

[0036] Figure 8C This is a schematic enlarged cross-sectional view of a wafer according to the second embodiment.

[0037] Fig.9A This is a schematic enlarged cross-sectional view of a chip according to the third embodiment.

[0038] Fig. 9B This is a schematic enlarged cross-sectional view of a chip according to the third embodiment.

[0039] Fig. 9C This is a schematic enlarged cross-sectional view of a chip according to the third embodiment.

[0040] Fig.9D This is a schematic enlarged cross-sectional view of a chip according to the third embodiment.

[0041] Fig.10 This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser and the third laser in the 49th step of the third embodiment.

[0042] Fig.11A This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser in the 49th step of the third embodiment.

[0043] Fig. 11B This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser in the 49th step of the third embodiment.

[0044] Fig. 11C This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser in the 49th step of the third embodiment.

[0045] Fig.11D This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser in the 49th step of the third embodiment.

[0046] Fig. 12A This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser and the third laser in the 49th step of the third embodiment.

[0047] Fig. 12B This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser and the third laser in the 49th step of the third embodiment.

[0048] Fig. 12C This is a schematic enlarged plan view showing an example of irradiating the upper surface of the wafer with the second laser and the third laser in the 49th step of the third embodiment. DETAILED DESCRIPTION

[0049] (The process of achieving a technical solution of the present invention)

[0050] The inventor has repeatedly conducted experiments and research on a singulation method for singulating a wafer having a metal layer formed on the lower surface without using a dicing blade. The inventor has also come to the realization that the wafer and the metal layer can be cut together by irradiating a laser onto the upper surface of a wafer having a metal layer formed on the lower surface.

[0051] Based on this knowledge, the inventors further conducted experiments and studies repeatedly. More specifically, the inventors used a wafer with a thickness of 30 μm or less, and formed on the lower surface thereof a first metal layer composed of a metal (e.g., silver, copper, etc.) with a thickness of 30 μm to 60 μm and a Young's modulus of 80 GPa to 130 GPa or less, and a second metal layer composed of a metal (e.g., nickel, etc.) with a thickness of 10 μm to 40 μm and a Young's modulus of 100 GPa to 220 GPa or less, and conducted experiments and studies repeatedly.

[0052] The following describes the contents of experiments and studies conducted by the inventors.

[0053] When a metal layer is cut by laser, the following phenomenon is known: a formation composed of metal scattered under the irradiation of laser, or a formation formed by metal temporarily liquefied or vaporized due to the heat brought by the irradiation of laser and then cooled and solidified again, adheres to the semiconductor device. Therefore, when a metal layer is cut by laser, it is desirable to cover the surface of the wafer with a water-soluble protective layer before laser irradiation so that the formation containing the metal constituting the metal layer does not adhere to the surface of the wafer. In this case, if the entire surface of the wafer cannot be covered with a water-soluble protective layer, the formation containing the metal constituting the metal layer may adhere to the portion of the surface of the wafer that is not covered by the water-soluble protective layer.

[0054] Usually, before the process of forming the metal layer on the lower surface of the wafer, the process of grinding the lower surface of the wafer to thin the wafer is performed. In addition, in order to protect the upper surface of the wafer during the thinning process, a process of forming a surface retention film on the upper surface of the wafer is performed before the thinning process. The surface retention film is removed from the wafer after the thinning process.

[0055] The inventors have come to the following understanding through experiments and research, namely, the reason why the formation containing the metal constituting the metal layer adheres to the semiconductor layer is due to the following phenomenon: when the surface retention film is removed from the upper surface of the wafer, the surface retention film remains partially or partially on the surface of the wafer, and the remaining surface retention film causes the hydrophilicity of the surface of the wafer to decrease, thereby making it impossible to cover the entire surface of the wafer with a water-soluble protective layer. Moreover, based on this understanding, the inventors believe that if the surface of the wafer can be made highly hydrophilic at the start time of the process of covering the entire surface of the wafer with a water-soluble protective layer, the semiconductor device in which the adhesion of the formation containing the metal constituting the metal layer is suppressed can be singulated, and further experiments and research have been repeatedly conducted. As a result, the inventors came up with the following singulation method.

[0056] The singulation method of one technical solution of the present invention singulates a wafer having a plurality of semiconductor element structures formed on the upper surface, and comprises the following steps in sequence: a first step of forming a surface retaining film on the upper surface of the wafer; a second step of thinning the lower surface of the wafer so that the thickness of the wafer becomes less than 30 μm; a third step of removing the surface retaining film from the upper surface of the wafer; a fourth step of sequentially forming a first metal layer and a second metal layer on the lower surface of the wafer after the thinning process; a fifth step of attaching a dicing tape to the lower surface of the second metal layer; a sixth step of applying a surface treatment to the upper surface of the wafer to increase the thickness of the wafer. hydrophilic treatment; a seventh step, forming a water-soluble protective layer on the surface of the wafer; an eighth step, irradiating a specified area of ​​the upper surface of the wafer with laser to cut the wafer, the first metal layer and the second metal layer; and a ninth step, removing the water-soluble protective layer from the surface of the wafer using cleaning water; the thickness of the first metal layer is between 30 μm and 60 μm, the thickness of the second metal layer is between 10 μm and 40 μm, the Young's modulus of the first metal layer is between 80 GPa and 130 GPa, and the Young's modulus of the second metal layer is between 190 GPa and 220 GPa.

[0057] According to the above-described singulation method, the wafer can be singulated without using a dicing blade.

[0058] Furthermore, according to the above-mentioned singulation method, before forming the water-soluble protective layer on the surface of the wafer in the seventh step, the surface of the wafer can be made highly hydrophilic by the sixth step. Thus, in the seventh step, the entire surface of the wafer can be covered with the water-soluble protective layer. Therefore, the formation containing the metal constituting the metal layer formed by the laser irradiation in the eighth step is suppressed from adhering to the wafer surface. Therefore, in the semiconductor device singulated by the above-mentioned singulation method, the adhesion of the formation containing the metal constituting the metal layer is suppressed.

[0059] Therefore, according to the above-mentioned singulation method, a semiconductor device in which adhesion of a formed object including a metal constituting a metal layer is suppressed is provided.

[0060] Furthermore, the prescribed area may include a plurality of straight lines in a grid shape that respectively divide the plurality of semiconductor element structures in a plan view of the wafer; the eighth step may include: an eleventh step of performing the tenth step a plurality of times, in which the laser is irradiated from one end to the other end or from the other end to the one end of a plurality of first straight lines extending in a first direction in a plan view of the wafer; and a thirteenth step of performing the twelfth step a plurality of times, in which the laser is irradiated from one end to the other end or from the other end to the one end of a plurality of second straight lines extending in a second direction orthogonal to the first direction in a plan view of the wafer. The laser is irradiated from one end to the other end of the second straight track or from the other end to the one end; the 11th step is a step in which the laser is not irradiated on other first straight tracks among the plurality of first straight tracks during the period from the start to the end of the 10th step performed multiple times on one first straight track among the plurality of first straight tracks; the 13th step is a step in which the laser is not irradiated on other second straight tracks among the plurality of second straight tracks during the period from the start to the end of the 12th step performed multiple times on one second straight track among the plurality of second straight tracks.

[0061] The first metal layer and the second metal layer have a bimetallic structure composed of two metals having different Young's moduli. Therefore, if the wafer, the first metal layer, and the second metal layer in one straight line are not completely cut off before the wafer, the first metal layer, and the second metal layer in the next straight line are cut off, the release of the inherent warping stress in the wafer occurs in an uneven state in the wafer, resulting in a situation where the straight line is shifted.

[0062] According to the above-mentioned singulation method, in the 11th process, after the 10th process is performed multiple times for one first straight track, the 10th process for the next first straight track is started. Therefore, after the wafer, the first metal layer and the second metal layer in one first straight track are reliably and completely cut, the cutting of the wafer, the first metal layer and the second metal layer in the next first straight track can be started.

[0063] Similarly, in the 13th process, after the 12th process is performed multiple times for one second straight track, the 12th process for the next second straight track is started. Therefore, after the wafer, the first metal layer, and the second metal layer in one second straight track are completely and reliably cut, the cutting of the wafer, the first metal layer, and the second metal layer in the next second straight track can be started.

[0064] Thus, according to the above-mentioned singulation method, it is possible to prevent the wafer, the first metal layer and the second metal layer in the next straight line from being cut off when the wafer, the first metal layer and the second metal layer in one straight line are not completely cut off.

[0065] Therefore, according to the above-described singulation method, it is possible to suppress the occurrence of straight line position deviation during laser irradiation, which may occur due to the release of the warpage stress of the wafer.

[0066] Furthermore, it may be that, in the above-mentioned 11th process, the above-mentioned 10th process which is performed for each of the above-mentioned multiple first straight tracks is performed in the order of being arranged from the first straight track at one end toward the first straight track at the other end in the above-mentioned second direction; and in the above-mentioned 13th process, the above-mentioned 12th process which is performed for each of the above-mentioned multiple second straight tracks is performed in the order of being arranged from the second straight track at one end toward the second straight track at the other end in the above-mentioned first direction.

[0067] Thus, the wafer, the first metal layer, and the second metal layer can be cut efficiently in the plurality of first straight passes, and the wafer, the first metal layer, and the second metal layer can be cut efficiently in the plurality of second straight passes.

[0068] Furthermore, it may be that, in the above-mentioned 11th process, the above-mentioned 10th process performed a plurality of times on the above-mentioned plurality of first straight roads respectively includes: a first outward irradiation process of irradiating the above-mentioned laser from the above-mentioned one end to the above-mentioned other end of the first straight road, and a first return irradiation process of irradiating the above-mentioned laser from the above-mentioned other end to the above-mentioned one end of the first straight road; and in the above-mentioned 13th process, the above-mentioned 12th process performed a plurality of times on the above-mentioned plurality of second straight roads respectively includes: a second outward irradiation process of irradiating the above-mentioned laser from the above-mentioned one end to the above-mentioned other end of the second straight road, and a second return irradiation process of irradiating the above-mentioned laser from the above-mentioned other end to the above-mentioned one end of the second straight road.

[0069] Thus, when the wafer, the first metal layer, and the second metal layer can be cut in one straight line by performing the tenth step twice, the tenth step twice can be efficiently performed.

[0070] In addition, the first metal layer may be cut off in the process which is performed first among the first outward irradiation process and the first return irradiation process; and the first metal layer may be cut off in the process which is performed first among the second outward irradiation process and the second return irradiation process.

[0071] Furthermore, it may be that, in the above-mentioned 11th step, the above-mentioned 10th step performed a plurality of times on the above-mentioned plurality of first straight tracks respectively includes: a first outward irradiation step of irradiating the above-mentioned laser beam from the above-mentioned one end to the above-mentioned other end of the first straight track more than once, and a first return irradiation step of irradiating the above-mentioned laser beam from the above-mentioned other end to the above-mentioned one end of the first straight track more than once; the irradiation condition of the above-mentioned laser beam in the above-mentioned first outward irradiation step is equal to the irradiation condition of the above-mentioned laser beam in the above-mentioned first return irradiation step; in the above-mentioned 13th step, the above-mentioned 12th step performed a plurality of times on the above-mentioned plurality of second straight tracks respectively includes: a second outward irradiation step of irradiating the above-mentioned laser beam from the above-mentioned one end to the above-mentioned other end of the second straight track more than once, and a second return irradiation step of irradiating the above-mentioned laser beam from the above-mentioned other end to the above-mentioned one end of the second straight track more than once; the irradiation condition of the above-mentioned laser beam in the above-mentioned second outward irradiation step is equal to the irradiation condition of the above-mentioned laser beam in the above-mentioned second return irradiation step.

[0072] Therefore, in the 11th step, there is no need to change the laser irradiation conditions, and in the 13th step, there is no need to change the laser irradiation conditions.

[0073] In addition, it may be that between the end of the above-mentioned process 7 and the start of the above-mentioned process 8, a 14th process is also included, and the 14th process forms a groove in the inter-element structure region between the above-mentioned multiple semiconductor element structures in the upper surface of the above-mentioned chip; the above-mentioned specified area is included in the above-mentioned inter-element structure region.

[0074] Generally, when a wafer is irradiated with a laser beam having an output power capable of cutting a metal layer, a region called a HAZ (Heat Affected Zone) where the crystal of the semiconductor is altered due to the thermal effect of the laser beam may be formed around the cutting region of the wafer.

[0075] According to the above-described singulation method, the region where HAZ may be generated, which may be formed by laser irradiation in the eighth step, can be removed in advance in the fourteenth step.

[0076] Therefore, according to the above-mentioned singulation method, a semiconductor device in which the formation of HAZ is suppressed is provided.

[0077] A singulation method according to a technical solution of the present invention singulates a wafer having a plurality of semiconductor element structures formed on its upper surface, and comprises the following steps in sequence: a first step of thinning the lower surface of the wafer; a second step of forming a metal layer on the thinned lower surface of the wafer; a third step of irradiating a specified area of ​​the upper surface of the wafer with a first laser to cut the wafer and the metal layer; and a fourth step of irradiating a cut adjacent area within a specified range on both sides of a center line of a cut area cut by the third step in a plan view of the wafer with a second laser, and irradiating a cut inner area contained in the cut area with a third laser in a plan view of the wafer.

[0078] According to the above-described singulation method, the wafer can be singulated without using a dicing blade.

[0079] Furthermore, according to the above-described singulation method, the HAZ that may be formed by the first laser beam irradiation in the third step can be removed by the irradiation with the second laser beam in the fourth step.

[0080] On the other hand, due to the irradiation with the second laser beam in the fourth step, a formed substance including the metal constituting the metal layer may adhere as a burr inside the cutting region in a plan view of the wafer.

[0081] On the other hand, according to the above-mentioned singulation method, the above-mentioned burrs can be removed by irradiation with the third laser beam in the fourth step.

[0082] Therefore, according to the above-mentioned singulation method, a semiconductor device in which the formation of HAZ and the adhesion of the above-mentioned burrs are suppressed is provided.

[0083] Furthermore, the first laser beam, the second laser beam, and the third laser beam may be emitted from a single laser output device as a light source.

[0084] Thus, the above-mentioned singulation method can be realized by one laser output device.

[0085] Furthermore, it may be that, in a plan view of the wafer, the cut adjacent region includes a first cut adjacent region on one side of the center line and a second cut adjacent region on the other side of the center line; in the fourth step, the first cut adjacent region is irradiated with a plurality of first irradiation spots obtained by branching a portion of the laser light outputted from the one laser output device into a plurality of first irradiation spots, and the second cut adjacent region is irradiated with a plurality of second irradiation spots obtained by branching a portion of the laser light outputted from the one laser output device into a plurality of second irradiation spots, thereby irradiating the cut adjacent region with the second laser light; the cut inner region is irradiated with a plurality of third irradiation spots obtained by branching a portion of the laser light outputted from the one laser output device into a plurality of third irradiation spots, thereby irradiating the cut inner region with the third laser light; in a plan view of the wafer The first irradiation spots, the second irradiation spots and the third irradiation spots are moved or the wafer is moved so that the first irradiation spots, the second irradiation spots and the third irradiation spots move relative to the wafer in the cutting direction of the cutting region; in a plan view of the wafer, the first irradiation spots and the second irradiation spots are in a line-symmetric relationship with the center line as the axis of symmetry; in a plan view of the wafer, the first irradiation spots are arranged so that the shortest distance to the center line increases monotonically from the front to the rear in the moving direction in which the first irradiation spots, the second irradiation spots and the third irradiation spots move relative to the wafer; in a plan view of the wafer, the third irradiation spots are arranged on more than one straight line.

[0086] Generally, since the closer the HAZ is to the wafer surface, which is the irradiated surface of the laser, the larger the deteriorated area, it is necessary to remove the shallower part from the wafer surface until it is far from the cutting area. In contrast, since the deeper the HAZ is from the wafer surface, the narrower the deteriorated area, it is sufficient to remove only the part closer to the cutting area as far as the part deeper from the wafer surface is concerned. By irradiating the laser in this way, since the irradiation of the laser of each irradiation spot has a normal distribution with the irradiation spot as the center, even if the intensity of the laser of all irradiation spots is the same, the overlapping of the irradiation spots will remove the shallower part from the wafer surface, which is the irradiated surface of the laser, until it is far from the cutting area, and the deeper part from the wafer surface will be removed only near the cutting area. Furthermore, by slightly shifting the position of the irradiation spot each time, the probability of a certain irradiation spot being irradiated near the two ends of the cutting area can be increased, so the desired processing can be achieved.

[0087] Furthermore, at least one of the plurality of first irradiation spots may be located in the cutting region in a plan view of the wafer.

[0088] Thus, even if a HAZ is formed in the cutting region, the HAZ formed in the cutting region can be removed by irradiation with the second laser beam in the fourth step.

[0089] Furthermore, the plurality of first irradiation spots may be arranged on a straight line in a plan view of the wafer.

[0090] This can prevent the second laser beam from being irradiated on the same position a plurality of times.

[0091] Furthermore, the plurality of first irradiation spots may be arranged on two or more sides in a plan view of the wafer.

[0092] This can prevent the cutting adjacent area from being unnecessarily expanded.

[0093] Furthermore, in a plan view of the wafer, at least one of the plurality of third irradiation spots may be located ahead of the plurality of first irradiation spots in the traveling direction.

[0094] Thus, the irradiation of the third laser light prior to the second laser light can preheat the planned processing area of ​​the second laser light, so that the metal layer can be efficiently vaporized. Therefore, the adhesion of the burr can be suppressed.

[0095] Furthermore, in a plan view of the wafer, at least one of the plurality of first irradiation spots may be located ahead of the plurality of third irradiation spots in the traveling direction.

[0096] Thus, after the formation of the metal constituting the metal layer newly generated by the irradiation of the second laser light grows into a burr in a state that is easy to remove, it can be removed by the third laser light. Therefore, the adhesion of the burr can be suppressed.

[0097] Furthermore, in a plan view of the wafer, at least one of the plurality of third irradiation spots may be located rearward of the plurality of first irradiation spots in the traveling direction.

[0098] Thus, the formation containing the metal constituting the metal layer newly generated by the irradiation of the second laser beam can be more effectively removed by the third laser beam. Therefore, the adhesion of the burr can be suppressed.

[0099] Furthermore, the plurality of third irradiation spots may be arranged on two straight lines in a plan view of the wafer.

[0100] Thereby, the burrs can be removed more effectively.

[0101] Hereinafter, a specific example of a monolithic method of a technical solution of the present invention will be described with reference to the accompanying drawings. The embodiments shown here all represent a specific example of the present invention. Therefore, the numerical values, shapes, constituent elements, configurations and connection forms of constituent elements, and steps (processes) and the order of steps shown in the following embodiments are used as examples and are not intended to limit the present invention. In addition, each figure is a schematic diagram and is not necessarily strictly illustrated. In each figure, the same reference numerals are attached to substantially the same structure, and repeated descriptions are omitted or simplified.

[0102] (Implementation Method 1)

[0103] [1-1. Structure of semiconductor device]

[0104] The structure of the semiconductor device of Embodiment 1 is described below. The semiconductor device of Embodiment 1 is a chip size package (CSP) type semiconductor device that can be face-down mounted and has two vertical MOS (Metal Oxide Semiconductor) transistors formed therein. The two vertical MOS transistors are power transistors and are so-called trench MOS FETs (Field Effect Transistors).

[0105] Figure 1 This is a cross-sectional view showing an example of the structure of the semiconductor device 1 according to the first embodiment. Figure 2 It is a plan view showing an example of the structure of the semiconductor device 1 . Figure 1 express Figure 2 I-I section surface.

[0106] like Figure 1 and Figure 2 As shown, the semiconductor device 1 includes a semiconductor layer 40, a metal layer 30, a first vertical MOS transistor 10 (hereinafter also referred to as "transistor 10") formed in a first region A1 in the semiconductor layer 40, and a second vertical MOS transistor 20 (hereinafter also referred to as "transistor 20") formed in a second region A2 in the semiconductor layer 40. Figure 2 As shown, the first region A1 and the second region A2 are adjacent to each other in a plan view of the semiconductor layer 40 , and are one side and the other side that divide the semiconductor device 1 into two equal parts in terms of area.

[0107] The semiconductor layer 40 is formed by laminating the semiconductor substrate 32, the low-concentration impurity layer 33, and the oxide film 34. When the thickness of a wafer is described in the present invention, for example, when the wafer is reduced to a thickness of 30 μm or less, the wafer refers to the semiconductor layer 40.

[0108] The semiconductor substrate 32 is disposed on the lower surface side of the semiconductor layer 40 and is made of silicon containing first conductivity type impurities.

[0109] The low-concentration impurity layer 33 is disposed on the upper side of the semiconductor layer 40, is formed in contact with the semiconductor substrate 32, and contains the first conductivity type impurities at a concentration lower than the concentration of the first conductivity type impurities of the semiconductor substrate 32. The low-concentration impurity layer 33 can be formed on the semiconductor substrate 32 by epitaxial growth, for example.

[0110] The oxide film 34 is disposed on the uppermost surface of the semiconductor layer 40 and is formed in contact with the low-concentration impurity layer 33 .

[0111] The protective layer 35 is formed in contact with the upper surface of the semiconductor layer 40 , and covers at least a portion of the upper surface of the semiconductor layer 40 .

[0112] The metal layer 30 is formed in contact with the entire lower surface of the semiconductor substrate 32. The metal layer 30 is formed by laminating a first metal layer 30A on the semiconductor substrate 32 side and a second metal layer 30B on the opposite side.

[0113] The first metal layer 30A is formed of, for example, a plating layer, has a thickness of 30 μm to 60 μm, and a Young's modulus of 80 GPa to 130 GPa. As a non-limiting example, the first metal layer may be made of silver or copper.

[0114] The second metal layer 30B is formed of, for example, a plating layer, has a thickness of 10 μm to 40 μm, and a Young's modulus of 190 GPa to 220 GPa. As a non-limiting example, the second metal layer may be made of nickel.

[0115] In addition, the first metal layer 30A and the second metal layer 30B may contain a trace amount of elements other than metals mixed as impurities during the manufacturing process of the metal material.

[0116] In addition, if Figure 1 and Figure 2 As shown, the transistor 10 has one or more (six in this case) first source pads 111 (first source pads 111a, 111b, 111c, 111d, 111e, and 111f) bonded to the mounting substrate via a bonding material when face-down mounted, and a first gate pad 119 on the upper surface of the semiconductor layer 40. In addition, the transistor 20 has one or more (six in this case) second source pads 121 (second source pads 121a, 121b, 121c, 121d, 121e, and 121f) bonded to the mounting substrate via a bonding material when face-down mounted, and a second gate pad 129 on the upper surface of the semiconductor layer 40.

[0117] like Figure 1 and Figure 2 As shown, in a plan view, the semiconductor layer 40 is rectangular, and the transistors 10 and 20 are arranged in the first direction. Here, the semiconductor layer 40 is a rectangle having one long side 91 and another long side 92 parallel to the first direction, and one short side 93 and another short side 94 in a direction orthogonal to the first direction in a plan view. That is, here, the semiconductor layer 40 is a rectangle with the long side in the first direction.

[0118] exist Figure 2 In FIG. 1 , the center line 90 is a line that bisects the rectangular semiconductor layer 40 in the first direction in a plan view of the semiconductor layer 40 . Therefore, the center line 90 is a straight line in a direction orthogonal to the first direction in a plan view of the semiconductor layer 40 .

[0119] The boundary 90C is the boundary between the first area A1 and the second area A2. The boundary 90C divides the semiconductor layer 40 into two equal parts according to the area in the plan view of the semiconductor layer 40, but it does not necessarily need to be a straight line. In the plan view of the semiconductor layer 40, the center line 90 and the boundary 90C may or may not coincide.

[0120] In addition, the number of the first gate pads 119 and the number of the second gate pads 129 do not necessarily need to be limited to Figure 2 1 of the examples shown.

[0121] In addition, the number of the one or more first source pads 111 and the number of the one or more second source pads 121 do not necessarily need to be limited to Figure 2 The number of six shown as an example may be a number other than six or one or more.

[0122] like Figure 1 and Figure 2 As shown, a first body region 18 containing impurities of a second conductivity type different from the first conductivity type is formed in the first region A1 of the low-concentration impurity layer 33. In the first body region 18, a first source region 14 containing impurities of the first conductivity type, a first gate conductor 15, and a first gate insulating film 16 are formed. The first source electrode 11 includes a portion 12 and a portion 13, and the portion 12 is connected to the first source region 14 and the first body region 18 via the portion 13. The first gate conductor 15 is electrically connected to the first gate pad 119.

[0123] The portion 12 of the first source electrode 11 is a layer that is joined to the solder during reflow in face-down mounting, and can be made of a metal material containing one or more of nickel, titanium, tungsten, and palladium as a non-limiting example. The upper surface of the portion 12 can be plated with gold or the like.

[0124] The portion 13 of the first source electrode 11 is a layer connecting the portion 12 and the semiconductor layer 40 , and may be made of a metal material including one or more of aluminum, copper, gold, and silver as a non-limiting example.

[0125] In the second region A2 of the low-concentration impurity layer 33, a second body region 28 containing impurities of the second conductivity type is formed. In the second body region 28, a second source region 24 containing impurities of the first conductivity type, a second gate conductor 25, and a second gate insulating film 26 are formed. The second source electrode 21 includes a portion 22 and a portion 23, and the portion 22 is connected to the second source region 24 and the second body region 28 via the portion 23. The second gate conductor 25 is electrically connected to the second gate pad 129.

[0126] The portion 22 of the second source electrode 21 is a layer that is joined to the solder during reflow in face-down mounting, and can be made of a metal material containing one or more of nickel, titanium, tungsten, and palladium as a non-limiting example. The upper surface of the portion 22 can be plated with gold or the like.

[0127] The portion 23 of the second source electrode 21 is a layer connecting the portion 22 and the semiconductor layer 40 , and may be made of a metal material including one or more of aluminum, copper, gold, and silver as a non-limiting example.

[0128] According to the above-described structures of the transistor 10 and the transistor 20 , the low-concentration impurity layer 33 and the semiconductor substrate 32 function as a common drain region obtained by commonizing the first drain region of the transistor 10 and the second drain region of the transistor 20 .

[0129] like Figure 1 As shown, the first body region 18 is covered by an oxide film 34 having an opening, and a portion 13 of the first source electrode 11 is provided which is connected to the first source region 14 via the opening of the oxide film 34. The oxide film 34 and the portion 13 of the first source electrode 11 are covered by a protective layer 35 having an opening, and a portion 12 is provided which is connected to the portion 13 of the first source electrode 11 via the opening of the protective layer 35.

[0130] The second body region 28 is covered by an oxide film 34 having an opening, and a portion 23 of the second source electrode 21 connected to the second source region 24 via the opening of the oxide film 34 is provided. The oxide film 34 and the portion 23 of the second source electrode 21 are covered by a protective layer 35 having an opening, and a portion 22 connected to the portion 23 of the second source electrode 21 via the opening of the protective layer 35 is provided.

[0131] Therefore, the one or more first source pads 111 and the one or more second source pads 121 refer to the regions where the first source electrode 11 and the second source electrode 21 are partially exposed on the upper surface of the semiconductor device 1, so-called terminal portions. Similarly, the first gate pad 119 and the second gate pad 129 refer to the first gate electrode 19 (at Figure 1 , Figure 2 ) and the second gate electrode 29 (not shown in the figure) Figure 1 , Figure 2 The region partially exposed on the upper surface of the semiconductor device 1 (not shown in the figure) is a so-called terminal portion. In this specification, the source pad and the gate pad are collectively referred to as "electrode pads".

[0132] In the standard design example of each structure in the semiconductor device 1 , the thickness of the semiconductor layer 40 is 10 to 90 μm, the thickness of the metal layer 30 is 40 to 100 μm, and the sum of the thicknesses of the oxide film 34 and the protective layer 35 is 3 to 13 μm.

[0133] [1-2. Method for Singulating Semiconductor Devices]

[0134] The semiconductor device 1 is formed by dividing a wafer having a plurality of semiconductor element structures into individual pieces.

[0135] Here, singulating the wafer means cutting the wafer to separate the plurality of semiconductor element structures formed in an array on the wafer one by one.

[0136] Hereinafter, a first singulation method for singulating the semiconductor device 1 from a wafer will be described.

[0137] The first singulation method is performed on a wafer having a plurality of semiconductor element structures formed in an array. The first singulation method includes a plurality of steps.

[0138] Figure 3A is a schematic enlarged cross-sectional view of the vicinity of the cut region of the wafer 100 at the time of starting the first singulation method. Figure 3B to Figure 3J It is a schematic enlarged cross-sectional view of the vicinity of the cutting region of the wafer 100 in each step performed in the first singulation method.

[0139] like Figure 3B to Figure 3J As shown, the first singulation method includes the first step to the ninth step in sequence.

[0140] like Figure 3B As shown, the first step is a step of forming a surface retention film 50 on the upper surface of the wafer 100. The first step is performed to prevent the surface of the wafer 100 from being damaged or contaminated by foreign matter or the like that may be generated in the second step described later.

[0141] The surface retaining film 50 may be, for example, a back grinding tape. When the surface retaining film 50 is a back grinding tape, the first step is achieved by, for example, attaching the back grinding tape to the upper surface of the wafer 100. The back grinding tape is, for example, an adhesive tape having ethylene vinyl acetate copolymer as a surface base material and acrylic resin as an adhesive layer.

[0142] like Figure 3C As shown, the second step is a step of thinning the lower surface of the wafer 100 so that the thickness of the wafer 100 becomes 30 μm or less.

[0143] The second step is achieved, for example, by grinding the lower surface of the wafer 100. Generally, the process of grinding the lower surface of the wafer is also called back grinding. Therefore, in other words, the second step is achieved, for example, by grinding the lower surface of the wafer 100. In addition, at the end of the second step, the grinding may be transferred to polishing or etching.

[0144] like Figure 3D As shown, the third step is a step of removing the surface holding film 50 formed on the upper surface of the wafer 100 in the first step from the upper surface of the wafer 100 .

[0145] When the surface retaining film 50 is a back grinding tape, the third step is achieved by, for example, peeling off the back grinding tape affixed to the upper surface of the wafer 100 .

[0146] In the third step, it is difficult to completely remove the surface holding film 50 formed on the upper surface of the wafer 100 .

[0147] like Figure 3E As shown, the fourth step is a step of sequentially forming the first metal layer 30A and the second metal layer 30B on the lower surface of the wafer 100 that has been thinned in the second step, that is, a step of forming the metal layer 30 .

[0148] The first metal layer 30A and the second metal layer 30B may be composed of a single metal or an alloy formed of a plurality of metals, respectively. In addition, the first metal layer 30A and the second metal layer 30B may be composed of a single layer formed of one metal or one alloy, respectively, or may be composed of a plurality of layers formed of different metals or alloys stacked together.

[0149] The first metal layer 30A may be formed by, for example, evaporating a metal on the lower surface of the wafer 100 , or by, for example, electroplating a metal, or by electroplating the same or different metal after evaporating the metal.

[0150] The second metal layer 30B may be formed by, for example, evaporating metal on the lower surface of the first metal layer 30A, or by, for example, electroplating metal, or by electroplating the same or different metal after evaporating the metal.

[0151] like Figure 3F As shown, the fifth step is a step of attaching a dicing tape 52 to the lower surface of the metal layer 30 formed in the fourth step. The dicing tape 52 may be an adhesive tape having a base material such as polyolefin, acrylic polyurethane resin, or acrylic ester copolymer.

[0152] like Figure 3G As shown in FIG. 1 , the sixth step is a step of performing a treatment on the upper surface of the wafer 100 to improve the hydrophilicity of the surface of the wafer 100 .

[0153] The treatment for improving the hydrophilicity is a process for cleaning the surface retaining film 50 that has not been completely removed from the surface of the chip 100 in the third process and remains. For example, it can be a plasma treatment for dry cleaning using plasma, or an organic solvent cleaning treatment for wet cleaning using a suitable organic solvent such as acetone, for example, it can also be a UV irradiation treatment for irradiating ultraviolet rays, or it can be an ashing treatment.

[0154] Here, as an example, the treatment for improving the hydrophilicity is assumed to be a plasma treatment of an atmospheric pressure plasma system using argon and oxygen as raw materials.

[0155] The sixth step is to make the surface of the wafer 100 relatively hydrophilic so that the water-soluble protective layer 51 (see FIG. Figure 3H ) A process of covering the entire surface of the chip 100.

[0156] As described above, in the third step, it is difficult to completely remove the surface retention film 50 formed on the upper surface of the wafer 100. If the surface retention film 50 is not completely removed and remains on the surface of the wafer 100, the remaining surface retention film 50 reduces the hydrophilicity of the surface of the wafer 100. Therefore, the sixth step is performed before starting the seventh step to make the surface of the wafer 100 relatively hydrophilic.

[0157] Conversely, if the sixth step is not performed before the seventh step, the hydrophilicity of the surface of the wafer 100 decreases in the third step, so that the entire surface of the wafer 100 cannot be covered with the water-soluble protective layer 51 in the seventh step.

[0158] In the seventh step, by covering the entire surface of the wafer 100 with the water-soluble protective layer 51 , it is possible to suppress adhesion of a formation containing metal constituting the metal layer 30 to the surface of the wafer 100 due to laser irradiation in the eighth step described later.

[0159] like Figure 3H As shown, the seventh step is a step of forming a water-soluble protective layer 51 on the surface of the wafer 100 .

[0160] The water-soluble protective layer 51 is formed on the surface of the wafer 100 by, for example, applying a coating agent for forming the water-soluble protective layer 51 to the surface of the wafer 100 using a spin coater.

[0161] The coating agent, that is, the water-soluble protective layer 51 may be, for example, 1-methoxy-2-propanol propylene glycol monomethyl ether.

[0162] The coating by the spin coater is achieved by, for example, rotating the wafer 100 at a rotation speed faster than 500 rpm and dropping less than 100 ml of the coating agent onto the surface of the wafer 100 .

[0163] Generally, during the period from the sixth step to the start of the seventh step after the upper surface of the wafer 100 is subjected to a treatment to improve the hydrophilicity of the surface of the wafer 100, the hydrophilicity of the surface of the wafer 100 is lost depending on the environment in which the wafer 100 is stored and the length of the storage period. Therefore, the storage of the wafer 100 during the period from the end of the sixth step to the start of the seventh step is preferably performed in a managed environment. As an example, it is preferred that during the period from the end of the sixth step to the start of the seventh step, the wafer 100 is stored in an environment with 5,000 or less particles of 0.5 μm per cubic foot, and the seventh step is started within 240 hours from the end of the sixth step.

[0164] like Fig. 3I As shown, the eighth step is a step of irradiating a predetermined region of the wafer 100, namely, a cutting region, with laser light to cut the wafer 100, the first metal layer 30A, and the second metal layer 30B. The laser for irradiating the laser light may be, for example, a Q-switched laser having a wavelength of 355 nm.

[0165] Figure 4 is a schematic plan view of the wafer 100 .

[0166] like Figure 4 As shown, the predetermined area of ​​the wafer 100, i.e., the cutting area, is composed of a plurality of grid-like streets that respectively divide the plurality of semiconductor element structures 230 in the plan view of the wafer 100. Here, the plurality of streets are composed of a first direction (here, Figure 4A plurality of first straight paths 210 (herein, first straight paths 210A, 210B, 210C, 210D, 210E, and 210F) extending in a left-right direction in the plan view of the wafer 100 and a second direction (herein, Figure 4 It is composed of a plurality of second straight paths 220 (here, second straight paths 220A, 220B, 220C, 220D, 220E, 220F, 220G and 220H) extending in the up-down direction (in the vertical direction).

[0167] The eighth process includes: the eleventh process of performing the tenth process of irradiating the plurality of first straight lanes 210 with laser light from one end to the other end or from the other end to one end a plurality of times; and the thirteenth process of performing the twelfth process of irradiating the plurality of second straight lanes 220 with laser light from one end to the other end or from the other end to one end a plurality of times.

[0168] Here, the 11th process is a process in which the laser is not irradiated on the other first straight roads 210 during the period from the start of the 10th process multiple times to the end for one of the plurality of first straight roads 210, and the 13th process is a process in which the laser is not irradiated on the other second straight roads 220 during the period from the start of the 12th process multiple times to the end for one of the plurality of second straight roads 220.

[0169] In the wafer 100, the first metal layer 30A and the second metal layer 30B have a bimetallic structure including two metals having different Young's moduli. Therefore, if the wafer 100, the first metal layer 30A, and the second metal layer 30B in one straight line are not completely cut before the wafer 100, the first metal layer 30A, and the second metal layer 30B in the next straight line are cut, the warpage stress inherent in the wafer may be released in an uneven manner within the wafer, thereby causing the position of the straight line to shift.

[0170] As described above, in the 11th process, after the 10th process is performed multiple times for one first straight track 210, the 10th process is started for the next first straight track 210. Therefore, after the wafer 100, the first metal layer 30A, and the second metal layer 30B in one first straight track 210 are completely and reliably cut, the cutting of the wafer 100, the first metal layer 30A, and the second metal layer 30B in the next first straight track 210 can be started.

[0171] Similarly, in the 13th step, after the 12th step is performed multiple times for one second straight track 220, the 12th step is started for the next second straight track 220. Therefore, in the 13th step, after the wafer 100, the first metal layer 30A, and the second metal layer 30B in the second straight track 220 are reliably and completely cut, the cutting of the wafer 100, the first metal layer 30A, and the second metal layer 30B in the next second straight track 220 can be started.

[0172] In this way, the 8th process includes the 11th process and the 13th process, thereby preventing the cutting of the chip 100, the first metal layer 30A and the second metal layer 30B in the next straight line from starting without completely cutting the chip 100, the first metal layer 30A and the second metal layer 30B in one straight line.

[0173] This can suppress the occurrence of positional deviation of the straight line during laser irradiation due to the release of the warpage stress of the wafer 100 .

[0174] Furthermore, in the 11th process, the multiple 10th processes performed on the multiple first straight paths 210 are performed in the order of being arranged from the first straight path 210 at one end in the second direction (here, the first straight path 210A) toward the first straight path 210 at the other end (here, the first straight path 210F); and in the 13th process, the multiple 12th processes performed on the multiple second straight paths 220 are performed in the order of being arranged from the second straight path 220 at one end in the first direction (here, the second straight path 220A) toward the second straight path 220 at the other end (here, the second straight path 220H).

[0175] Thus, the wafer 100 , the first metal layer 30A, and the second metal layer 30B can be efficiently cut in the plurality of first straight streets 210 , and the wafer 100 , the first metal layer 30A, and the second metal layer 30B can be efficiently cut in the plurality of second straight streets 220 .

[0176] Hereinafter, a specific example of the eighth process which is not necessarily limitative will be described with reference to the accompanying drawings. The specific example illustrated here is a specific example in which the wafer 100, the first metal layer 30A, and the second metal layer 30B in the first straight road 210 are reliably and completely cut by performing the tenth process twice on the first straight road 210, and the wafer 100, the first metal layer 30A, and the second metal layer 30B in the second straight road 220 are reliably and completely cut by performing the twelfth process twice on the second straight road 220.

[0177] Figure 5A and Figure 5BThis is a schematic plan view showing an example of how the upper surface of the wafer 100 is irradiated with laser light in the eighth step.

[0178] First, if Figure 5A As shown, in the eighth step, the tenth step is performed on the plurality of first straight paths 210 in the order of A1, B1, C1, D1, E1, F1, . . . .

[0179] That is, in the eighth step, first, a first forward irradiation step ( ) of irradiating the first straight path 210A with laser light from one end to the other end is performed. Figure 5A A1 in the figure), then, a first return path irradiation process of irradiating the laser from the other end to one end is performed ( Figure 5A Next, for the first straight path 210B, a first forward irradiation step of irradiating the laser from one end to the other end is performed ( Figure 5A Then, the laser is irradiated from the other end to the one end in a first return irradiation process ( Figure 5A Next, for the first straight path 210C, a first forward irradiation step of irradiating the laser from one end to the other end is performed ( Figure 5A Then, the laser is irradiated from the other end to the one end for the first return irradiation process ( Figure 5A in the menu).

[0180] In this way, a plurality of first straight roads 210 are cut by performing one first outward irradiation step and one first return irradiation step in the order of arranging from the first straight road 210 at one end in the second direction (here, the first straight road 210A) toward the first straight road 210 at the other end (here, the first straight road 210F).

[0181] In this way, while the chip 100, the first metal layer 30A and the second metal layer 30B can be reliably and completely cut off by performing the 10th process twice on one first straight street 210, these two 10th processes can be efficiently implemented by performing the first outward irradiation process once and the first return irradiation process once on multiple first straight streets 210 respectively.

[0182] Here, the irradiation conditions of the laser light in the first outward irradiation step and the irradiation conditions of the laser light in the first return irradiation step may be equal.

[0183] Therefore, in the eleventh step, there is no need to change the laser irradiation conditions.

[0184] Alternatively, the first metal layer 30A may be cut by the first step (here, the first forward irradiation step) of the first forward irradiation step and the first return irradiation step.

[0185] Then, if Figure 5B As shown, in the eighth step, the twelfth step is performed on the plurality of second straight paths 220 in the order of A2, B2, C2, D2, E2, F2, . . . .

[0186] That is, in the eighth step, first, a second forward irradiation step (i.e., irradiating the second straight path 220A with laser light from one end to the other end) is performed once. Figure 5B A2 in the figure), then, a second return irradiation process is performed from the other end to one end ( Figure 5B Next, for the second straight path 220B, a second forward irradiation step of irradiating the laser from one end to the other end is performed ( Figure 5B Then, a second return irradiation process (C2 in the figure) is performed from the other end to one end. Figure 5B Next, for the second straight path 220C, a second forward irradiation step of irradiating the laser from one end to the other end is performed ( Figure 5B Then, a second return irradiation process ( Figure 5B in the menu bar).

[0187] In this way, the plurality of second straight roads 220 are cut by performing one second outward irradiation step and one second return irradiation step in the order of arranging from the second straight road 220 at one end in the first direction (here, the second straight road 220A) toward the second straight road 220 at the other end (here, the second straight road 220H).

[0188] In this way, while the chip 100, the first metal layer 30A and the second metal layer 30B can be reliably and completely cut off by performing the 12th process twice on one second straight road 220, these two 12th processes can be efficiently implemented by performing the second outward irradiation process once and the second return irradiation process once on multiple second straight roads 220 respectively.

[0189] Here, the irradiation conditions of the laser light in the second outward irradiation step and the irradiation conditions of the laser light in the second return irradiation step may be equal.

[0190] Therefore, in the thirteenth step, there is no need to change the laser irradiation conditions.

[0191] Alternatively, the first metal layer 30A may be cut by the first step (here, the second forward irradiation step) of the second forward irradiation step and the second backward irradiation step.

[0192] In addition, when it is impossible to reliably and completely cut off the chip 100, the first metal layer 30A and the second metal layer 30B by performing the 10th process twice on one first straight street 210, the first outward irradiation process may be performed more than once and the first return irradiation process may be performed more than once, so that the number of times the 10th process is performed on one first straight street 210 becomes the number of times that the chip 100, the first metal layer 30A and the second metal layer 30B can be reliably and completely cut off.

[0193] Similarly, in a case where the chip 100, the first metal layer 30A, and the second metal layer 30B cannot be completely and reliably cut off by performing the 12th process twice on one second straight street 220, the second outward irradiation process may be performed more than once and the second return irradiation process may be performed more than once, so that the number of times the 12th process is performed on one second straight street 220 becomes the number of times that the chip 100, the first metal layer 30A, and the second metal layer 30B can be completely and reliably cut off.

[0194] At this time, the laser irradiation conditions in the first outward irradiation process may be equal to the laser irradiation conditions in the first return irradiation process, and the laser irradiation conditions in the second outward irradiation process may be equal to the laser irradiation conditions in the second return irradiation process.

[0195] In the eighth step, when the metal layer 30 is cut by laser irradiation, the laser irradiation causes a phenomenon in which a formation formed by the metal constituting the metal layer 30 is scattered, and a phenomenon in which the metal temporarily liquefied or vaporized by the heat brought by the laser irradiation is cooled and solidified again to form a formation.

[0196] Figure 6 It is a schematic enlarged cross-sectional view of a wafer 100 in a state of being cut by laser irradiation, showing a situation in which a formation (hereinafter also referred to as "chips") formed of the metal constituting the metal layer 30 is formed by the above-mentioned phenomenon, i.e., a semiconductor device 1 singulated by the first singulation method.

[0197] exist Figure 6 In the middle, debris 62 ( Figure 6 The debris 62A and the debris 62B in the above-mentioned structure are formed on the water-soluble protective layer 51 attached to the surface of the protective layer 35, among the formations scattered by the irradiation of the laser. In addition, the debris is also generated by the laser irradiation to the semiconductor layer 40. That is, the constituent material of the debris is not limited to metals, and there are cases where semiconductors such as silicon are included.

[0198] Debris 63( Figure 6 The debris 63A and the debris 63B in FIG. 1 are formed on the water-soluble protective layer 51 on the surface of the semiconductor layer 40, among the formed objects scattered by the irradiation of the laser.

[0199] The debris 64 is a formation in which the formations on the water-soluble protective layer 51 on the surface of the semiconductor layer 40 , among the formations scattered by the irradiation of the laser, are connected to form a film formed by vapor deposition.

[0200] The chips 65 are formed by metal that has been temporarily liquefied or vaporized by the heat of laser irradiation, is pulled upward and extended along the cut surface by air suction generated by upper suction, and is cooled and solidified as it is.

[0201] The chips 66 are formed by metal that has temporarily liquefied or vaporized due to the heat of laser irradiation, extending toward the surface side of the protective layer 35, and cooling and solidifying in a region where the water-soluble protective layer 51 has disappeared due to laser irradiation.

[0202] The debris 67 is formed by metal that has been temporarily liquefied or vaporized due to the heat from the irradiation of the laser beam and has been cooled and solidified on the side surfaces of the semiconductor layer 40 and the metal layer 30 .

[0203] like Figure 3J As shown, the ninth step is a step of removing the water-soluble protective layer 51 from the surface of the wafer 100 using cleaning water. In this ninth step, the debris attached to the water-soluble protective layer 51 is removed from the surface of the wafer 100 together with the water-soluble protective layer 51.

[0204] The ninth step is achieved by spraying cleaning water at a predetermined water pressure onto the upper surface of the rotating wafer 100. At this time, it is preferable to perform the ninth step by adjusting the predetermined water pressure in stages so that the water-soluble protective layer 51 can be removed efficiently.

[0205] Figure 7 This is a schematic enlarged cross-sectional view of the wafer 100 at the end of the ninth step, that is, the semiconductor device 1 singulated by the first singulation method.

[0206] according to Figure 6 and Figure 7 As can be seen from the comparison, in the ninth step, although the debris 65 , the debris 66 , and the debris 67 are not removed and remain, the debris 62 , the debris 63 , and the debris 64 are removed together with the water-soluble protective layer 51 .

[0207] [1-3. Investigation]

[0208] As described above, according to the first singulation method, the wafer 100 can be singulated without using a dicing blade.

[0209] As described above, semiconductor device 1 singulated by the first singulation method suppresses adhesion of the formation containing the metal constituting metal layer 30. Therefore, according to the first singulation method, semiconductor device 1 in which adhesion of the formation containing the metal constituting metal layer 30 is suppressed is provided.

[0210] (Implementation Method 2)

[0211] Hereinafter, a semiconductor device according to a second embodiment in which a part of the structure is changed from the semiconductor device 1 according to the first embodiment will be described.

[0212] [2-1. Structure of semiconductor device]

[0213] As described above, the semiconductor device 1 of the first embodiment is manufactured by singulating the wafer 100 by the first singulation method. In contrast, the semiconductor device of the second embodiment is manufactured by singulating the wafer 100 by the second singulation method in which a part of the process of the first singulation method is changed. Therefore, the semiconductor device of the second embodiment singulated by the second singulation method has different shapes of the semiconductor substrate 32, the low-concentration impurity layer 33, the oxide film 34, and the water-soluble protective layer 51 compared with the semiconductor device 1. Therefore, in the second embodiment, the semiconductor substrate 32 is referred to as the semiconductor substrate 32A, the low-concentration impurity layer 33 is referred to as the low-concentration impurity layer 33A, the oxide film 34 is referred to as the oxide film 34A, and the water-soluble protective layer 51 is referred to as the water-soluble protective layer 51A. In addition, accordingly, the semiconductor layer 40 is referred to as the semiconductor layer 40A, and the wafer 100 is referred to as the wafer 100A.

[0214] [2-2. Method for Singulating Semiconductor Devices]

[0215] Next, a second singulation method for singulating the semiconductor device according to the second embodiment from the wafer 100A will be described.

[0216] The second singulation method includes steps 21 to 30 in sequence. Among these steps, steps 21 to 27 are the same as the steps 1 to 7 of the first singulation method of embodiment 1, where the wafer 100 is renamed as wafer 100A, the semiconductor substrate 32 is renamed as semiconductor substrate 32A, the low-concentration impurity layer 33 is renamed as low-concentration impurity layer 33A, the oxide film 34 is renamed as oxide film 34A, the water-soluble protective layer 51 is renamed as water-soluble protective layer 51A, and the semiconductor layer 40 is renamed as semiconductor layer 40A. Therefore, steps 21 to 27 are considered to have been described and omitted here, and steps 28 to 30 are described.

[0217] Figure 8A to Figure 8CThese are schematic enlarged cross-sectional views of the vicinity of the cutting region of the wafer 100A in the 28th to 30th steps, respectively.

[0218] like Fig. 8A As shown, the 28th step is a step of forming grooves in the inter-element structure region between the plurality of semiconductor element structures on the upper surface of the wafer 100A. Fig. 8A As shown, the 28th step is, for example, a step of forming a groove in the region between the element structures by irradiating a laser beam to the region where the groove is to be formed on the upper surface of the wafer 100A. Fig. 8A As shown, the cut-off region is contained in the inner region of the groove.

[0219] Generally, when a laser with an output power capable of cutting a metal layer (here, the first metal layer 30A and the second metal layer 30B) is irradiated onto a wafer, a region called HAZ is formed around the cut region in the wafer where the crystal of the semiconductor is deformed due to the thermal effect of the laser.

[0220] By performing the 28th step before the 29th step described later, a region where a HAZ may be formed by laser light in the 29th step can be removed in advance by the 28th step.

[0221] Thus, a semiconductor device in which the formation of HAZ is suppressed is provided.

[0222] like Figure 8B As shown, the 29th step is a step of irradiating a cutting region of the wafer 100A as a predetermined region with laser light to cut the metal layer 30. The 29th step is the same step as the step 8 in the first singulation method of the first embodiment except that the wafer 100 is renamed as the wafer 100A, the semiconductor substrate 32 is renamed as the semiconductor substrate 32A, the low-concentration impurity layer 33 is renamed as the low-concentration impurity layer 33A, the oxide film 34 is renamed as the oxide film 34A, the water-soluble protective layer 51 is renamed as the water-soluble protective layer 51A, and the semiconductor layer 40 is renamed as the semiconductor layer 40A.

[0223] like Figure 8C As shown, the 30th step is a step of removing the water-soluble protective layer 51A from the surface of the wafer 100A using cleaning water. The 30th step is the same step as the 9th step in the first singulation method of the first embodiment, in which the wafer 100 is renamed as the wafer 100A, the semiconductor substrate 32 is renamed as the semiconductor substrate 32A, the low-concentration impurity layer 33 is renamed as the low-concentration impurity layer 33A, the oxide film 34 is renamed as the oxide film 34A, the water-soluble protective layer 51 is renamed as the water-soluble protective layer 51A, and the semiconductor layer 40 is renamed as the semiconductor layer 40A.

[0224] [2-3. Investigation]

[0225] As described above, according to the second singulation method, the wafer 100A can be singulated without using a dicing blade.

[0226] Furthermore, as described above, the semiconductor device singulated by the second singulation method suppresses the formation of HAZ. Therefore, according to the second singulation method, a semiconductor device in which the formation of HAZ is suppressed is provided.

[0227] (Implementation 3)

[0228] Hereinafter, a semiconductor device according to a third embodiment in which a part of the structure is changed from the semiconductor device 1 according to the first embodiment will be described.

[0229] [3-1. Structure of semiconductor device]

[0230] As described above, the semiconductor device 1 of the first embodiment is manufactured by singulating the wafer 100 by the first singulation method. In contrast, the semiconductor device of the third embodiment is manufactured by singulating the wafer 100 by the third singulation method in which a part of the process is changed from the first singulation method. Therefore, the shapes of the semiconductor substrate 32, the low-concentration impurity layer 33, the oxide film 34, and the water-soluble protective layer 51 are different between the semiconductor device of the third embodiment singulated by the third singulation method and the semiconductor device 1. Therefore, in the third embodiment, the semiconductor substrate 32 is referred to as the semiconductor substrate 32B, the low-concentration impurity layer 33 is referred to as the low-concentration impurity layer 33B, the oxide film 34 is referred to as the oxide film 34B, and the water-soluble protective layer 51 is referred to as the water-soluble protective layer 51B. In addition, accordingly, the semiconductor layer 40 is referred to as the semiconductor layer 40B, and the wafer 100 is referred to as the wafer 100B.

[0231] [3-2. Method for Singulating Semiconductor Devices]

[0232] Next, a third singulation method for singulating the semiconductor device according to the third embodiment from the wafer 100B will be described.

[0233] The third singulation method includes steps 41 to 50 in sequence. Among these steps, steps 41 to 48 are the same as the steps 1 to 8 of the first singulation method of embodiment 1, where the wafer 100 is renamed as wafer 100B, the semiconductor substrate 32 is renamed as semiconductor substrate 32B, the low-concentration impurity layer 33 is renamed as low-concentration impurity layer 33B, the oxide film 34 is renamed as oxide film 34B, the water-soluble protective layer 51 is renamed as water-soluble protective layer 51B, and the semiconductor layer 40 is renamed as semiconductor layer 40B. Therefore, steps 41 to 48 are considered to have been described and omitted here, and steps 49 to 50 are described.

[0234] Fig.9A , Fig. 9B and Fig. 9C It is a schematic enlarged cross-sectional view of the vicinity of the cutting region of the wafer 100B in the 49th to 50th steps.

[0235] like Fig.9A As shown, the 49th process is a process of irradiating a trimming laser (hereinafter also referred to as the "second laser") onto a cutting adjacent area (herein referred to as the first cutting adjacent area and the second cutting adjacent area) within a specified range on both sides of the center line of the cutting area cut by the 8th process in the plan view of the chip 100B, and irradiating a cleaning laser (hereinafter also referred to as the "third laser") onto a cutting inner area included in the cutting area in the plan view of the chip 100B.

[0236] By performing step 49 after step 8, the HAZ formed by irradiation with the laser in step 8 (hereinafter also referred to as "first laser") can be removed by irradiation with the second laser in step 49. The second laser is called a trimming laser because its main function is to remove only the portion with a high possibility of forming the HAZ.

[0237] On the other hand, due to the irradiation of the second laser beam in the 49th step, there is a case where a formation including the metal constituting the metal layer 30 adheres as a burr inside the cutting region in a plan view of the wafer 100B.

[0238] Fig.9D This is a schematic enlarged cross-sectional view of the vicinity of the cutting region of the wafer 100B assuming that only the second laser beam is irradiated and the third laser beam is not irradiated in the 49th step.

[0239] like Fig.9D As shown, in the 49th process, when only the second laser irradiation is performed without the third laser irradiation, there is a situation where the formation of the metal constituting the metal layer 30 is attached as burrs 60A and burrs 60B inside the cutting area in the planar view of the chip 100B.

[0240] On the other hand, in the actually performed step 49, since the irradiation with the second laser beam and the irradiation with the third laser beam are performed, the burr can be removed by the irradiation with the third laser beam.

[0241] Therefore, by performing the 49th step after the 8th step, a semiconductor device in which the formation of the HAZ and the adhesion of the burrs are suppressed can be provided.

[0242] Here, as an example which is not necessarily limitative, the first laser beam, the second laser beam, and the third laser beam may be emitted from a single laser output device as a light source.

[0243] Thus, the third singulation method can be realized by one laser output device.

[0244] Hereinafter, the first laser beam, the second laser beam, and the third laser beam will be described assuming that one laser output device is used as a light source.

[0245] In addition, in step 49, if Fig. 9B As shown, the width of the area irradiated with the third laser light may be expanded to the width of the cutting area, that is, the width of the inner cutting area may be expanded to the width of the cutting area, and the third laser light may be irradiated to the cutting area. Thus, the entire cutting area can be cleaned.

[0246] Fig.10 This is a schematic enlarged plan view of the wafer 100B, showing an example of how the upper surface of the wafer 100B is irradiated with the second laser beam and the third laser beam in the 49th step.

[0247] like Fig.10 As shown, the cut adjacent area includes a first cut adjacent area on one side of the center line of the cut area and a second cut adjacent area on the other side. In addition, the irradiation of the second laser to the cut adjacent area is performed by irradiating the first cut adjacent area with a plurality of (here, 9) first irradiation spots 301 (here, first irradiation spots 301A, 301B, 301C, 301D, 301E, 301F, 301G, 301H, and 301I) obtained by branching a part of the laser output by a laser output device into a plurality of spots, and irradiating the second cut adjacent area with a plurality of (here, as an example, 9) second irradiation spots 302 (here, second irradiation spots 302A, 302B, 302C, 302D, 302E, 302F, 302G, 302H, and 302I) obtained by branching a part of the laser output by a laser output device into a plurality of spots. In addition, irradiation of the cut-off inner area with the third laser is achieved by irradiating the cut-off inner area with a plurality of (here 8) third irradiation spots 303 (here are the third irradiation spots 303A, 303B, 303C, 303D, 303E, 303F, 303G and 303H) obtained by branching a part of the laser output by a laser output device into a plurality of spots.

[0248] In addition, the number of the plurality of first irradiation spots 301 and the number of the plurality of second irradiation spots 302 do not necessarily need to be limited to Fig.10 In addition, the number of the plurality of third irradiation spots 303 does not necessarily need to be limited to Fig.10 8 are shown as examples.

[0249] like Fig.10 As shown, in the 49th process, in the plan view of the chip 100B, the multiple first irradiation spots 301, the multiple second irradiation spots 302 and the multiple third irradiation spots 303 are moved, or the chip 100B is moved so that the multiple first irradiation spots 301, the multiple second irradiation spots 302 and the multiple third irradiation spots 303 move relative to the chip 100B along the cutting direction of the cutting area.

[0250] Here, if Fig.10 As shown, in the plan view of the wafer 100B, the plurality of first irradiation spots 301 and the plurality of second irradiation spots 302 are in a line symmetric relationship with the center line of the cutting region as the axis of symmetry, and from the front to the rear in the direction of travel of the plurality of first irradiation spots 301, the plurality of second irradiation spots 302, and the plurality of third irradiation spots 303 relative to the wafer 100B along the cutting direction of the cutting region, the plurality of first irradiation spots 301 are arranged so that the shortest distance to the above-mentioned center line increases monotonically, and the third irradiation spots 303 are arranged in more than one straight line (here, one straight line). Here, "arranged so that the shortest distance to the center line increases monotonically" means "arranged so that the shortest distance to the center line increases or remains unchanged".

[0251] Several specific examples of the irradiation patterns of the first irradiation spot 301 and the second irradiation spot 302 in the 49th step, which are not necessarily limitative, are described below.

[0252] FIG. 11A to FIG. 11D 1 is a schematic enlarged plan view of the wafer 100B, showing an example of how the upper surface of the wafer 100B is irradiated with the second laser beam.

[0253] like Fig.11A As shown, in a plan view of the wafer 100B, a plurality of first irradiation spots 301 may be arranged in a straight line, and a plurality of second irradiation spots 302 may be arranged in a straight line.

[0254] This can prevent the same position from being irradiated with the second laser beam multiple times.

[0255] like Fig. 11B As shown, in a plan view of the wafer 100B, at least one of the plurality of first irradiation spots 301 may be located in the cutting region, and at least one of the plurality of second irradiation spots 302 may be located in the cutting region.

[0256] Thus, even if a HAZ is formed in the cutting region due to variations in finished products, the HAZ formed in the cutting region can be removed by irradiation with the second laser beam.

[0257] like Fig. 11C , Fig.11DAs shown, in a plan view of the wafer 100B, a plurality of first irradiation spots 301 may be arranged on two or more sides, and a plurality of second irradiation spots 302 may be arranged on two or more sides.

[0258] This can prevent the cutting adjacent area from being unnecessarily expanded.

[0259] Hereinafter, several specific examples which are not necessarily limitative will be described regarding the relationship between the irradiation patterns of the first irradiation spot 301 and the second irradiation spot 302 and the irradiation pattern of the third irradiation spot 303 in the 49th step.

[0260] like Fig.10 As shown, in the plan view of the chip 100B, at least one of the multiple first irradiation spots 301 is further forward than the multiple third irradiation spots 303 in the traveling direction, and at least one of the multiple second irradiation spots 302 is further forward than the multiple third irradiation spots 303 in the traveling direction.

[0261] Thus, the burrs newly generated by the irradiation of the second laser beam, which are formed of the metal constituting the metal layer 30, can be removed by the third laser beam after the burrs are grown to a state that is easy to remove. Therefore, the adhesion of the burrs can be suppressed. In addition, it is also effective to expand the width of the cut inner region to the width of the cut region and irradiate the third laser beam.

[0262] Fig. 12A , Fig. 12B , Fig. 12C This is a schematic enlarged plan view of the wafer 100B showing another example of how the upper surface of the wafer 100B is irradiated with the second laser beam and the third laser beam in the 49th step.

[0263] like Fig. 12A As shown, in the plan view of the chip 100B, at least one of the plurality of third irradiation spots 303 is further forward than the plurality of first irradiation spots 301 in the traveling direction, and at least one of the plurality of third irradiation spots 303 is further forward than the plurality of second irradiation spots 302 in the traveling direction.

[0264] Thus, the irradiation of the third laser light prior to the second laser light can preheat the planned processing area of ​​the second laser light, so that the metal layer 30 can be efficiently vaporized. Therefore, the adhesion of the burr can be suppressed.

[0265] like Fig. 12B As shown, in the plan view of the wafer 100B, the plurality of third irradiation spots 303 may be arranged in two straight lines.

[0266] Thereby, the burrs can be removed more effectively.

[0267] like Fig. 12CAs shown, in the plan view of the chip 100B, at least one of the plurality of third irradiation spots 303 is further rearward than the plurality of first irradiation spots 301 in the traveling direction, and at least one of the plurality of third irradiation spots 303 is further rearward than the plurality of second irradiation spots 302 in the traveling direction.

[0268] Thus, the formation including the metal constituting the metal layer 30 newly generated by the irradiation of the second laser beam can be more effectively removed by the third laser beam. Therefore, the adhesion of the above-mentioned burrs can be suppressed.

[0269] like Fig. 9C As shown, the 50th step is a step of removing the water-soluble protective layer 51B from the surface of the wafer 100B using cleaning water. The 30th step is the same step as the 9th step in the first singulation method of the first embodiment except that the wafer 100 is renamed as the wafer 100B, the semiconductor substrate 32 is renamed as the semiconductor substrate 32B, the low-concentration impurity layer 33 is renamed as the low-concentration impurity layer 33B, the oxide film 34 is renamed as the oxide film 34B, the water-soluble protective layer 51 is renamed as the water-soluble protective layer 51B, and the semiconductor layer 40 is renamed as the semiconductor layer 40B.

[0270] [3-3. Investigation]

[0271] As described above, according to the third singulation method, the wafer 100B can be singulated without using a dicing blade.

[0272] Furthermore, as described above, the formation of HAZ is suppressed in the semiconductor device singulated by the third singulation method. Therefore, according to the third singulation method, a semiconductor device in which the formation of HAZ is suppressed is provided.

[0273] (Replenish)

[0274] The above describes a monolithic method of a technical solution of the present invention based on Embodiments 1 to 3, but the present invention is not limited to these embodiments. As long as it does not deviate from the main purpose of the present invention, various forms after deformation thought of by those skilled in the art to these embodiments, or forms constructed by combining constituent elements of different embodiments can also be included in the scope of one or more technical solutions of the present invention.

[0275] Industrial Applicability

[0276] The present invention can be widely used in semiconductor devices and the like having a metal layer formed on the lower surface.

[0277] Description of symbols

[0278] 1 Semiconductor devices

[0279] 10 Transistor (1st vertical MOS transistor)

[0280] 11. 1st source electrode

[0281] Parts 12, 13, 22, 23

[0282] 14 1st source region

[0283] 15 1st gate conductor

[0284] 16. First gate insulating film

[0285] 18. 1st body region

[0286] 20 transistor (second vertical MOS transistor)

[0287] 21 Second source electrode

[0288] 24 Second source region

[0289] 25 2nd gate conductor

[0290] 26 Second gate insulating film

[0291] 28 Second body region

[0292] 30 Metal Layer

[0293] 30A 1st metal layer

[0294] 30B 2nd metal layer

[0295] 32, 32A, 32B Semiconductor substrate

[0296] 33, 33A, 33B Low concentration impurity layer

[0297] 34, 34A, 34B oxide film

[0298] 35 protective layer

[0299] 40, 40A, 40B semiconductor layer

[0300] 50 Surface retention film

[0301] 51, 51A, 51B Water-soluble protective layer

[0302] 52 Cutting tape

[0303] 60A, 60B burr

[0304] 62, 62A, 62B, 63, 63A, 63B, 64, 65, 66, 67 Chips (formations formed of metal constituting the metal layer)

[0305] 90 Central Line

[0306] 90C Boundary

[0307] 91 one long side

[0308] 92 Another long side

[0309] 93 one short side

[0310] 94 Another short side

[0311] 100, 100A, 100B chips

[0312] 111, 111a, 111b, 111c, 111d, 111e, 111f: first source pad

[0313] 119 1st gate pad

[0314] 121, 121a, 121b, 121c, 121d, 121e, 121f second source pad

[0315] 129 2nd gate pad

[0316] 301, 301A, 301B, 301C, 301D, 301E, 301F, 301G, 301H, 301I 1st irradiation spot

[0317] 302, 302A, 302B, 302C, 302D, 302E, 302F, 302G, 302H, 302I Second irradiation spot

[0318] 303, 303A, 303B, 303C, 303D, 303E, 303F, 303G, 303H 3rd irradiation spot

[0319] A1 Area 1

[0320] A2 Area 2

Claims

1. A singulation method for singulating a wafer having a plurality of semiconductor element structures formed on its upper surface, characterized in that: The process includes the following steps: The first step is to form a surface retaining film on the upper surface of the wafer; In the second step, the lower surface of the wafer is thinned so that the thickness of the wafer becomes less than 30 μm; The third step is to remove the surface retaining film from the upper surface of the wafer; The fourth step is to sequentially form a first metal layer and a second metal layer on the lower surface of the wafer after the thinning process; Step 5: attaching a dicing tape to the lower surface of the second metal layer; Step 6: performing a treatment on the upper surface of the wafer to improve the hydrophilicity of the surface of the wafer; Step 7, forming a water-soluble protective layer on the surface of the wafer; An eighth step of irradiating a predetermined area of ​​the upper surface of the wafer with laser light to cut the first metal layer and the second metal layer; and Step 9, removing the water-soluble protective layer from the surface of the wafer using cleaning water; The thickness of the first metal layer is 30 μm to 60 μm, the thickness of the second metal layer is 10 μm to 40 μm, the Young's modulus of the first metal layer is 80 GPa to 130 GPa, and the Young's modulus of the second metal layer is 190 GPa to 220 GPa; In the eighth step, the first metal layer is cut by irradiating with the first laser beam, and then the second metal layer is cut by irradiating with the second laser beam.

2. The singulation method according to claim 1, wherein: The predetermined area includes a plurality of straight lines in a grid shape that respectively divide the plurality of semiconductor element structures in a plan view of the wafer; The eighth step includes: an 11th step of performing the 10th step a plurality of times, wherein the 10th step comprises irradiating a plurality of first straight lines extending in the first direction in a plan view of the wafer with the first laser or the second laser from one end to the other end of the first straight lines or from the other end to the one end thereof; and In the 13th process, the 12th process is performed multiple times, wherein the 12th process irradiates the first laser or the second laser from one end to the other end or from the other end to the one end of a plurality of second straight lines extending in a second direction orthogonal to the first direction in a planar view of the chip.

3. The singulation method according to claim 2, wherein: The eleventh step is a step of not irradiating the other first straight lines among the plurality of first straight lines with the first laser beam and the second laser beam during the period from the start to the end of the plurality of the tenth step performed on one first straight line among the plurality of first straight lines. The thirteenth step is a step of not irradiating the other second straight lines among the plurality of second straight lines with the first laser beam and the second laser beam during the period from the start to the end of the plurality of the twelfth step performed on one second straight line among the plurality of second straight lines.

4. The singulation method according to claim 2 or 3, characterized in that: In the eleventh step, the plurality of the tenth steps performed on the plurality of first straight paths are performed in the order of arranging the first straight paths at one end toward the first straight paths at the other end in the second direction; In the thirteenth step, the plurality of the twelfth steps performed on the plurality of second straight paths are performed in order from the second straight path at one end toward the second straight path at the other end in the first direction.

5. The singulation method according to claim 2 or 3, characterized in that: In the 11th step, the plural times of the 10th step respectively performed on the plural first straight paths include: a first outward irradiation step of irradiating the first laser or the second laser from the one end to the other end of the first straight path, and a first return irradiation step of irradiating the first laser or the second laser from the other end to the one end of the first straight path; In the above-mentioned 13th process, the above-mentioned 12th process performed multiple times on the above-mentioned multiple second straight paths respectively includes: a second outward irradiation process of irradiating the above-mentioned first laser or the above-mentioned second laser from the above-mentioned one end to the above-mentioned other end of the second straight path, and a second return irradiation process of irradiating the above-mentioned first laser or the above-mentioned second laser from the above-mentioned other end to the above-mentioned one end of the second straight path.

6. The singulation method according to claim 2 or 3, characterized in that: The first metal layer is cut by the first step 10 performed in the 11th step; The first metal layer is cut by the 12th step which is performed first in the 13th step.

7. The singulation method according to claim 2 or 3, characterized in that: In the 11th step, the plural times of the 10th step respectively performed on the plural first straight paths include: a first outward irradiation step of irradiating the first laser or the second laser from the one end to the other end of the first straight path one or more times, and a first return irradiation step of irradiating the first laser or the second laser from the other end to the one end of the first straight path one or more times; The irradiation conditions of the first laser beam or the second laser beam in the first outward irradiation step are equal to the irradiation conditions of the first laser beam or the second laser beam in the first return irradiation step; In the above-mentioned 13th step, the above-mentioned 12th step performed a plurality of times on the above-mentioned plurality of second straight paths respectively includes: a second outward irradiation step of irradiating the above-mentioned first laser or the above-mentioned second laser from the above-mentioned one end to the above-mentioned other end of the second straight path one or more times, and a second return irradiation step of irradiating the above-mentioned first laser or the above-mentioned second laser from the above-mentioned other end to the above-mentioned one end of the second straight path one or more times; The irradiation conditions of the first laser beam or the second laser beam in the second outward irradiation step are equal to the irradiation conditions of the first laser beam or the second laser beam in the second return irradiation step.

8. The singulation method according to claim 2 or 3, characterized in that: The method further includes a 14th step between the end of the 7th step and the start of the 8th step of forming grooves in the inter-element structure regions between the plurality of semiconductor element structures on the upper surface of the wafer; The predetermined area is included in the inter-element structure area.

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