An oscillation suppression circuit and method for output voltage

Abstract

An oscillation suppression circuit and method for output voltage, characterized in that: the circuit includes a first switch, a second switch, an output inductor, a first capacitor, a second capacitor, a charging unit and a feedback control unit; wherein, the first switch and the second switch are both connected to the output inductor to control the output inductor current by means of interleaved opening; one end of the first capacitor is connected to the connection point of the first switch and the second switch, and the other end is connected to the charging unit to adjust the voltage difference between the upper and lower plates of the first capacitor; the feedback control unit is connected to the first switch, the second switch and the first capacitor, respectively collects the current of the first switch and the voltage between the upper and lower plates of the first capacitor, and generates a feedback control signal after comparison to control the on or off state of the first switch and the second switch. The method of the present invention is simple, ingeniously conceived, utilizes existing components, and realizes the oscillation suppression of the voltage converter under high duty cycle.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and more particularly to an output voltage oscillation suppression circuit and method. Background Art

[0002] With the rapid development of electronic power technology, the penetration of electronic products in daily life has become increasingly widespread, and various power supply technologies are evolving rapidly. From the initial RC step-down circuit to linear regulators, and from linear regulators to switching power supplies, components have become increasingly smaller and more efficient while achieving the same functional results.

[0003] With the increasing popularity of mobile devices, the battery life of mobile devices in the market has been further improved. On the one hand, the capacity of device batteries has been increasing, which can meet the battery life requirements of some devices. On the other hand, various fast charging technologies are becoming more and more powerful, making up for the lack of battery capacity increase.

[0004] In existing technologies, various control circuits and sensor circuits require a relatively stable power supply with a reasonable amplitude to reliably power them. Voltage-to-current converters can dynamically adjust the power supply output to the amplitude range required by various control circuits based on load conditions, providing stable and safe output.

[0005] However, in these circuits, poor input power supply conditions often lead to wide fluctuations in the input voltage range, resulting in unstable output voltage. For example, when the state of charge of the input power supply is low, the input voltage may approach the set output voltage. In this case, due to the delay effects of nonlinear components such as inductors and capacitors, the voltage-to-current converter circuit may experience overshoot or undershoot during loop adjustment, further causing circuit oscillation. This unstable output voltage reduces the output accuracy of the voltage-to-current converter, resulting in large output ripple and, in severe cases, even circuit failure.

[0006] In view of the above problems, the present invention provides an output voltage oscillation suppression circuit and method. Summary of the Invention

[0007] In order to solve the deficiencies in the prior art, the purpose of the present invention is to provide an output voltage oscillation suppression circuit and method, which realizes feedback control of the control signal by selectively charging the first capacitor and collecting the upper and lower plate voltages.

[0008] The present invention adopts the following technical solutions.

[0009] In a first aspect of the present invention, there is provided an oscillation suppression circuit for an output voltage. The circuit includes a first switch, a second switch, an output inductor, a first capacitor, a second capacitor, a charging unit, and a feedback control unit. The first switch and the second switch are both connected to the output inductor to control the current of the output inductor by means of interleaved switching. One end of the first capacitor is connected to the connection point of the first switch and the second switch, and the other end is connected to the charging unit to adjust the voltage difference between the upper and lower plates of the first capacitor. The feedback control unit is connected to the first switch, the second switch, and the first capacitor, respectively collects the current of the first switch and the voltage between the upper and lower plates of the first capacitor, and generates a feedback control signal after comparison to control the on or off state of the first switch and the second switch.

[0010] Preferably, the first switch and the second switch are connected in series and connected between the input terminal of the circuit and the ground. One end of the output inductor is connected to the connection point of the first switch and the second switch, and the other end is the output of the circuit. The second capacitor is connected between the output terminal of the circuit and the ground. The control terminals of the first switch and the second switch respectively receive the output of the feedback control unit.

[0011] Preferably, the feedback control unit includes a current acquisition unit, a voltage acquisition unit, a comparator, and a control module. The input terminal of the current acquisition unit is connected to one end of the first switch to collect the current of the first switch and generate a first sampled voltage. The voltage acquisition unit is connected to both ends of the first capacitor to collect the voltage between the upper and lower plates of the first capacitor and generate a second sampled voltage. The comparator compares the first sampling unit and the second sampling unit to generate a comparison signal. The control module receives the comparison signal and generates a feedback control signal.

[0012] Preferably, the control module is connected to the connection point of the first switch and the second switch, and realizes the original control logic based on the signal state at the connection point. The control module also receives the comparison signal and generates a feedback control signal according to the original control logic.

[0013] Preferably, one end of the charging unit is connected to the input voltage, and the other end is connected to the upper plate of the first capacitor. When the first switch is on and the second switch is off, the voltage of the lower plate of the first capacitor is the input voltage, the charging unit is in a non-charging state, and the first capacitor discharges to control the second sampled voltage to gradually decrease. When the first switch is off and the second switch is on, the voltage of the lower plate of the first capacitor is the ground level, the charging unit is in a charging state, and the first capacitor charges to control the second sampled voltage to gradually increase.

[0014] Preferably, when the first switch is on and the second switch is off, the first sampled voltage gradually increases. When the first switch is off and the second switch is on, the first sampled voltage is at zero level.

[0015] Preferably, when the first sampling voltage is greater than the second sampling voltage, the feedback control signal controls the first switch to turn off earlier than the original control logic to suppress the peak value of the output inductor current.

[0016] Preferably, the voltage acquisition unit further includes a level shifter to adjust the value range of the voltages of the upper and lower plates of the first capacitor collected.

[0017] Preferably, the charging unit is a series circuit of a voltage source and a freewheeling diode, and the first capacitor of the first capacitor multiplexing circuit is used as the bootstrap capacitor of the first switch; the first switch and the second switch are MOS transistors.

[0018] In the second aspect of the present invention, there is provided a method for suppressing oscillation of an output voltage, which is implemented by using the output voltage oscillation suppression circuit described in the first aspect of the present invention. The beneficial effects of the present invention are that, compared with the prior art, the output voltage oscillation suppression circuit and method in the present invention can realize the feedback control of the control signal by selectively charging the first capacitor and collecting the voltages of the upper and lower plates. The method of the present invention is simple, makes full use of the existing components in the voltage converter circuit in the prior art, and realizes the oscillation suppression of the voltage converter circuit operating in a high duty cycle state.

[0019] The beneficial effects of the present invention further include:

[0020] 1. By using the method of the present invention, not only can the abnormal increase in the peak value of the inductor current during the oscillation period be restricted, but also the amplitude of the oscillation can be reduced throughout the entire oscillation process, and the oscillation can be suppressed.

[0021] 2. In the present invention, there is no need to add too many new circuit structures or components. The bootstrap capacitor on the first switch can be reused, and the current of the first switch and the voltages of the upper and lower plates of the bootstrap capacitor are acquired through the acquisition unit, and then the feedback control signal is obtained by comparison. In this way, the present invention fully improves the power utilization rate, simplifies the circuit structure, and can be widely applied to various circuits.

[0022] 3. In the circuit structure of the present invention, when the circuit is not in a high duty cycle, the conduction time of the first switch is short, and it will not cause the long-term discharge of the first capacitor. Therefore, by reasonably designing the circuit parameters, the second sampling voltage will not be reduced to the same state as the first sampling voltage. In the case of a low duty cycle, the feedback control signal will not affect the original logic of the circuit. When the duty cycle is high, the conduction time of the first switch is long, resulting in the full discharge of the first capacitor. Through this ingenious design, the circuit can fully identify the circuit oscillation at a high duty cycle and provide adaptive adjustment. Description of the Drawings

[0023] Figure 1 Schematic diagram of the circuit structure of an oscillation suppression circuit for an output voltage in the present invention;

[0024] Figure 2 Timing diagram of voltages and currents at various points when the circuit oscillates in an oscillation suppression circuit for an output voltage in the present invention;

[0025] Figure 3 Schematic diagram of oscillation suppression in an oscillation suppression circuit for an output voltage in the present invention. Detailed implementation manners

[0026] The following further describes the present application with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and cannot be used to limit the protection scope of the present application.

[0027] Figure 1 Schematic diagram of the circuit structure of an oscillation suppression circuit for an output voltage in the present invention. As Figure 1 shown, in the first aspect of the present invention, an oscillation suppression circuit for an output voltage is involved. The circuit includes a first switch, a second switch, an output inductor, a first capacitor, a second capacitor, a charging unit, and a feedback control unit; wherein, both the first switch and the second switch are connected to the output inductor to control the current of the output inductor through an interleaved opening method; one end of the first capacitor is connected to the connection point of the first switch and the second switch, and the other end is connected to the charging unit to adjust the voltage difference between the upper and lower plates of the first capacitor; the feedback control unit is connected to the first switch, the second switch, and the first capacitor, respectively collects the current of the first switch and the voltage between the upper and lower plates of the first capacitor, and generates a feedback control signal after comparison to control the on or off state of the first switch and the second switch.

[0028] It can be understood that the oscillation suppression circuit in the present invention can control the magnitude of the current on the output inductor through the on and off states of the first switch and the second switch. When the current on the output inductor is large, the output voltage may slowly increase, and when the current on the output inductor is small, the output voltage slowly decreases.

[0029] The feedback control unit in the present invention can also collect the magnitude of the voltage at the connection point of the first switch and the second switch, and timely obtain the output characteristics of the output inductor through the voltage situation at this point, so as to feedback the output state of the circuit and control the on and off of the first switch and the second switch.

[0030] It should be noted that the second capacitor in the present invention is connected to the output end, and this capacitor can adjust the further stability of the output voltage through charge and discharge behaviors.

[0031] In addition, the first capacitor in the present invention is used to provide a reasonable voltage difference and supply this voltage difference to the feedback control unit to suppress the peak value of the output inductor current during the oscillation process.

[0032] Preferably, the first switch and the second switch are connected in series and connected between the circuit input terminal and the ground; one end of the output inductor is connected to the connection point of the first switch and the second switch, and the other end serves as the output of the circuit; the second capacitor is connected between the output terminal of the circuit and the ground; the control terminals of the first switch and the second switch respectively receive the output of the feedback control unit.

[0033] It can be understood that the first switch and the second switch in the present invention can be implemented by using the commonly used MOS transistor structure in the prior art. Its gate serves as the control terminal of the switch, and the type of the MOS transistor determines the specific connection manner of the source and the gate.

[0034] Preferably, the feedback control unit includes a current acquisition unit, a voltage acquisition unit, a comparator, and a control module; wherein, the input end of the current acquisition unit is connected to one end of the first switch to acquire the current of the first switch and generate a first sampled voltage; the voltage acquisition unit is connected to both ends of the first capacitor to acquire the upper and lower plate voltages of the first capacitor and generate a second sampled voltage; the comparator compares the first sampling unit and the second sampling unit to generate a comparison signal; the control module receives the comparison signal and generates a feedback control signal.

[0035] It can be understood that the feedback control unit in the present invention can respectively acquire the current on the first switch and the upper and lower plate voltages of the first capacitor, and respectively convert them into sampled voltages of appropriate magnitudes, namely the first and second sampled voltages. When the magnitudes of the two sampled voltages are reversed, it indicates that the first capacitor has discharged too much at this time, which also means that the circuit is operating under a relatively large duty cycle and the inductor current has increased relatively high. By timely reversing the states of the first switch and the second switch, the peak value of the inductor current can be limited, thereby suppressing the oscillation.

[0036] Preferably, the control module is connected to the connection point of the first switch and the second switch, and implements the original control logic based on the signal state at the connection point; the control module also receives the comparison signal and generates a feedback control signal according to the original control logic.

[0037] The signal state here can be to first acquire the voltage at the connection point, then filter the voltage to a certain extent to obtain a signal with interference removed, and use this signal as a feedback reference input to the control module, so that the control module can control the first switch and the second switch. This control method is also a commonly used method in the prior art.

[0038] It can be understood that the control module in the present invention can be implemented in various ways in the prior art. For example, the control module may include a PWM (Pulse Width Modulation) unit, etc., and can also adjust the on or off time of the switch by the level of the feedback voltage.

[0039] Specifically, the control module can also perform feedback adjustment on the control method according to the situation of the circuit output terminal or the voltage situation at the connection point of the first switch and the second switch. Since an output inductor is connected to the switch connection point, the magnitude of the voltage at one end of the output voltage can to a certain extent characterize the actual state of the circuit. After the control unit obtains the voltage at this point, it can consider whether the on and off durations of the first switch and the second switch can still ensure the circuit output voltage. If the voltage at the connection point is too high at this time, the control module can reduce the on time of the first switch, and vice versa, increase the on time of the first switch. In this way, the output voltage of the circuit can be maintained at an ideal stable state. The control process of this control module is the original control logic described in the previous text.

[0040] Based on this logic, if the duty cycle of the circuit is not too large, the newly added circuit structure in the present invention will not affect the original logic of the control module. When the newly added circuit structure affects the control module in the prior art, it will cause the premature turn-off of the first switch.

[0041] Preferably, one end of the charging unit is connected to the input voltage, and the other end is connected to the upper plate of the first capacitor; when the first switch is on and the second switch is off, the voltage of the lower plate of the first capacitor is the input voltage, the charging unit is in a non-charging state, and the first capacitor discharges to control the second sampling voltage to gradually decrease; when the first switch is off and the second switch is on, the voltage of the lower plate of the first capacitor is the ground level, the charging unit is in a charging state, and the first capacitor charges to control the second sampling voltage to gradually increase.

[0042] It can be understood that the first capacitor in the present invention can be implemented by a bootstrap capacitor commonly used in the prior art. The original function of this capacitor in the circuit can be to provide a temporary power supply for the drive of the first switch. However, in the present invention, this capacitor can be simply reused to achieve the suppression of oscillation.

[0043] Preferably, when the first switch is on and the second switch is off, the first sampling voltage gradually increases; when the first switch is off and the second switch is on, the first sampling voltage is at zero level.

[0044] Figure 2 This is the timing diagram of the voltage and current at each point when the circuit oscillates in an output voltage oscillation suppression circuit of the present invention. As Figure 2As shown, the first sampling voltage is output by the current sampling unit, that is Figure 2 the second line timing diagram in. When the circuit starts to oscillate, the inductor current will rapidly increase along with the interference. At this time, according to the original control logic of the circuit, in order to ensure the increase of the inductor current, the duty cycle of the first switch control signal will also increase. At this time, the first switch conducts for a long time and turns off for a short time within a cycle. In this case, the first sampling voltage generated by the current sampling unit will also rapidly increase during the conduction time of the first switch, and decrease to 0 as the switch turns off during the short cut-off time.

[0045] Meanwhile, as described above, the second sampling voltage will also be affected accordingly. This voltage gradually decreases when the first switch conducts and drops below the first sampling voltage before the first switch turns off. In this way, a comparison signal can be generated ahead of the original turn-off control logic, thereby extending the turn-off time of the first switch.

[0046] In addition, as Figure 2 shown, when the circuit is not in the oscillating state and the inductor current is relatively low or has dropped back, the first sampling voltage of the current sampling unit will not be too high, so no comparison signal will be generated with the second sampling voltage. Therefore, the circuit still controls the switch according to the original logic.

[0047] It can be understood that the switch state in the present invention affects the magnitude of the first sampling voltage. And the second sampling voltage is controlled by the first capacitor.

[0048] Preferably, when the first sampling voltage is greater than the second sampling voltage, the feedback control signal controls the first switch to turn off ahead of the original control logic to suppress the peak value of the output inductor current.

[0049] Figure 3 is a schematic diagram of oscillation suppression in an oscillation suppression circuit for an output voltage in the present invention. As Figure 3 shown, according to the original control logic in the circuit of the present invention, the first inductor current will rise to the peak value in the S2 region, and then the first switch turns off and the second switch turns on. At this time, the inductor current flows out along the second switch and the magnitude of the current gradually decreases. After adding the feedback control signal, the peak value of the current of the output inductor will only reach the peak value in the S1 region. As the first sampling voltage and the second sampling voltage flip, the feedback control signal controls the first switch to turn off in advance, and at the same time the second switch turns on in advance. The peak value of the inductor current no longer reaches the peak value corresponding to the higher S2 region, but decreases in advance. As the inductor current decreases in advance, the output voltage, that is, the voltage on the second capacitor, also decreases in advance and remains at a relatively low level and maintains relative stability.

[0050] Preferably, a level shifter is further included in the voltage acquisition unit to adjust the value range of the voltages of the upper and lower plates of the first capacitor acquired.

[0051] It can be understood that a phase shifter is further included in the voltage acquisition unit of the present invention. The phase shifter can reasonably adjust the voltages of the upper and lower plates of the first capacitor acquired, so that the value range of the second sampling voltage reaches the pre-designed range. Through the adjustment of the phase shifter, the second sampling voltage can be reduced to the state equal to the first sampling voltage at a reasonable time, thereby reasonably suppressing the oscillation of the inductor current.

[0052] Preferably, the charging unit is a series circuit of a voltage source and a diode, and the bootstrap capacitor of the first switch in the first capacitor multiplexing circuit; the first switch and the second switch are MOS transistors.

[0053] In an embodiment of the present invention, the way of connecting a voltage source to a freewheeling diode can be adopted as the charging unit of the first capacitor. The positive terminal of the diode is connected to the input voltage, and the negative terminal is connected to the upper plate of the bootstrap capacitor. After the second switch is turned off, the charging of the bootstrap capacitor is realized. In the present invention, the bootstrap capacitor of the first switch in the prior art can be considered to implement this function. Specifically, the bootstrap capacitor of the first switch can be arranged on the control element of the control terminal of the first switch. For example, it provides device voltage for an inverter and prevents the rapid turn-off of the first switch through bootstrap. And in the present invention, this element can be multiplexed, and further enables the bootstrap capacitor to discharge when the first switch is turned on and charge when the first switch is turned off, thereby more enhancing the suppression of the output voltage oscillation by controlling the switch state. Since the present invention multiplexes the related elements in the prior art, the control circuit will not cause a large burden or influence on the main functions of the original chip, improves the efficiency of the circuit, and saves chip area.

[0054] In the second aspect of the present invention, it relates to a method for suppressing the oscillation of the output voltage, and this method is implemented by using the oscillation suppression circuit of the output voltage described in the first aspect of the present invention.

[0055] The beneficial effect of the present invention is that, compared with the prior art, an oscillation suppression circuit and method for an output voltage in the present invention can realize the feedback control of the control signal by selectively charging the first capacitor and acquiring the voltages of the upper and lower plates. The method of the present invention is simple, makes full use of the existing elements in the voltage converter circuit in the prior art, and realizes the oscillation suppression of the voltage converter circuit working in a high duty cycle state.

[0056] The applicant of the present invention has made a detailed description and illustration of the embodiments of the present invention in conjunction with the accompanying drawings. However, those skilled in the art should understand that the above embodiments are only the preferred implementation schemes of the present invention, and the detailed description is only to help readers better understand the spirit of the present invention, rather than a limitation on the protection scope of the present invention. On the contrary, any improvement or modification made based on the spirit of the present invention should fall within the protection scope of the present invention.

Claims

1. An oscillation suppression circuit for output voltage, characterized in that: The circuit includes a first switch, a second switch, an output inductor, a first capacitor, a second capacitor, a charging unit and a feedback control unit; wherein, Both the first switch and the second switch are connected to the output inductor to control the output inductor current by means of interleaved switching; One end of the first capacitor is connected to the connection point of the first switch and the second switch, and the other end is connected to the charging unit to adjust the voltage difference between the upper and lower plates of the first capacitor; The feedback control unit is connected to the first switch, the second switch and the first capacitor, respectively collects the current of the first switch and the voltage between the upper and lower plates of the first capacitor, and generates a feedback control signal after comparison to control the on or off state of the first switch and the second switch.

2. The oscillation suppression circuit for output voltage according to claim 1, characterized in that: The first switch and the second switch are connected in series and connected between the circuit input terminal and the ground; One end of the output inductor is connected to the connection point of the first switch and the second switch, and the other end is the output of the circuit; The second capacitor is connected between the output terminal of the circuit and the ground; The control terminals of the first switch and the second switch respectively receive the output of the feedback control unit.

3. The oscillation suppression circuit for output voltage according to claim 2, characterized in that: The feedback control unit includes a current acquisition unit, a voltage acquisition unit, a comparator and a control module; wherein, The input end of the current acquisition unit is connected to one end of the first switch to collect the current of the first switch and generate a first sampling voltage; The voltage acquisition unit is connected to both ends of the first capacitor to collect the voltage between the upper and lower plates of the first capacitor and generate a second sampling voltage; The comparator compares the first sampling voltage and the second sampling voltage to generate a comparison signal; The control module receives the comparison signal and generates the feedback control signal.

4. The oscillation suppression circuit for output voltage according to claim 3, characterized in that: The control module is connected to the connection point of the first switch and the second switch, and realizes the original control logic based on the signal state at the connection point; The control module also receives the comparison signal and generates a feedback control signal according to the original control logic.

5. The oscillation suppression circuit for output voltage according to claim 4, characterized in that: One end of the charging unit is connected to the input voltage, and the other end is connected to the upper plate of the first capacitor; When the first switch is on and the second switch is off, the voltage of the lower plate of the first capacitor is the input voltage, the charging unit is in a non-charging state, and the first capacitor discharges to control the second sampling voltage to gradually decrease; When the first switch is off and the second switch is on, the voltage of the lower plate of the first capacitor is the ground level, the charging unit is in a charging state, and the first capacitor charges to control the second sampling voltage to gradually increase.

6. An oscillation suppression circuit for an output voltage, characterized in that: When the first switch is turned on and the second switch is turned off, the first sampling voltage gradually increases; When the first switch is turned off and the second switch is turned on, the first sampling voltage is at zero level.

7. An oscillation suppression circuit for an output voltage, characterized in that: When the first sampling voltage is greater than the second sampling voltage, the feedback control signal controls the first switch to turn off earlier than the original control logic to suppress the peak value of the output inductor current.

8. An oscillation suppression circuit for an output voltage, characterized in that: The voltage acquisition unit further includes a level shifter to adjust the value range of the voltages of the upper and lower plates of the first capacitor collected.

9. An oscillation suppression circuit for an output voltage, characterized in that: The charging unit is a series circuit of a voltage source and a diode, and the first capacitor multiplexes the boost capacitor of the first switch in the circuit; The first switch and the second switch are MOS transistors.

10. An oscillation suppression method for an output voltage, characterized in that: The method is implemented by using the oscillation suppression circuit for an output voltage described in any one of claims 1-9.

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