Optimization Method of Bipolar Transistor for Resisting Ionization or Displacement Synergistic Radiation Damage Effect

Abstract

The present invention discloses an optimization method for bipolar transistors against the combined effects of ionization or displacement radiation damage, which relates to the field of microelectronics technology and includes: constructing a radiation field model; obtaining the charge traps caused by ionization damage and the change in carrier lifetime caused by displacement damage of the bipolar transistor; importing the charge traps and the change in carrier lifetime of the bipolar transistor into a TCAD simulation model to respectively obtain the influence of ionization damage on the characteristics of the bipolar transistor, the influence of displacement damage on the characteristics of the bipolar transistor, and the influence of the combined effect of ionization damage and displacement damage on the characteristics of the bipolar transistor; obtaining the variation law of the characteristics of the bipolar transistor by adjusting the parameters of the emitter perimeter-to-area ratio, emitter junction depth, base doping concentration, and neutral base width of the bipolar transistor; and further proposing an optimized design scheme. This application can effectively improve the ability of bipolar transistors to resist the combined effect of ionization and displacement damage.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics technology, and particularly relates to an optimization method for bipolar transistors against ionization or displacement synergistic radiation damage effects. Background Art

[0002] Electronic components will be irradiated by different rays in a radiation field, which will cause device damage. Among them, due to the strong penetration ability of neutrons and γ rays, the damage to electronic components is particularly prominent.

[0003] In the prior art, for a single radiation source, the displacement damage effect caused by neutrons and the ionization damage effect caused by γ rays have been fully studied, and the radiation hardening technology is mature. However, in a mixed radiation field, the damage effect on electronic components is still unknown.

[0004] Therefore, it is urgent to improve the ability of electronic components to resist the ionization / displacement synergistic effect. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides an optimization method for bipolar transistors against ionization or displacement synergistic radiation damage effects. The technical problems to be solved by the present invention are realized through the following technical solutions:

[0006] In a first aspect, the present application provides an optimization method for bipolar transistors against ionization or displacement synergistic radiation damage effects, including:

[0007] Construct a radiation field model and place the bipolar transistor in the radiation field model. Among them, the radiation field is a mixed radiation field, and the radiation field includes the total dose of γ rays and the neutron fluence.

[0008] Obtain the charge traps caused by ionization damage and the change in carrier lifetime caused by displacement damage of the bipolar transistor. Among them, the radiation of γ rays causes ionization damage to the bipolar transistor, and the radiation of neutrons causes displacement damage to the bipolar transistor.

[0009] Import the charge traps and the change in carrier lifetime of the bipolar transistor into the TCAD simulation model to obtain the influence of ionization damage on the characteristics of the bipolar transistor, the influence of displacement damage on the characteristics of the bipolar transistor, and the influence of the synergistic effect of ionization damage and displacement damage on the characteristics of the bipolar transistor, respectively.

[0010] By adjusting the parameters of the perimeter-to-area ratio of the emitter region, the emitter junction depth, the base doping concentration, and the neutral base width of the bipolar transistor, obtain the change law of the characteristics of the bipolar transistor under the synergistic effect of ionization damage and displacement damage.

[0011] Based on the change law of the characteristics of the bipolar transistor, propose an optimized design scheme.

[0012] Optionally, the greater the ratio of the emitter region perimeter to the area of the bipolar transistor, the greater the synergistic effect of ionization damage and displacement damage.

[0013] Optionally, in the synergistic effect of ionization damage and displacement damage, the higher the ionization damage component, the stronger the sensitivity of the synergistic effect of ionization damage and displacement damage to the ratio of the emitter region perimeter to the area.

[0014] Optionally, the greater the emitter junction depth, the more serious the performance degradation of the bipolar transistor.

[0015] Optionally, the higher the base doping concentration, the more serious the performance degradation of the bipolar transistor.

[0016] Optionally, the greater the width of the neutral base region, the more serious the performance degradation of the bipolar transistor.

[0017] Advantages of the present invention:

[0018] An optimization method for a bipolar transistor against the synergistic radiation damage effect of ionization or displacement provided by the present invention. By constructing a radiation field model and placing the bipolar transistor in the radiation field model, where the radiation field is a mixed radiation field of γ-rays and neutrons; calculating the changes in traps and carrier lifetimes; introducing a TCAD parameter simulation model; adjusting each parameter of the bipolar transistor to obtain the variation law of the bipolar transistor characteristics; based on the variation law of the bipolar transistor characteristics, proposing an optimization design scheme for resisting the synergistic effect of ionization and displacement damage; thus, it can effectively improve the ability of the bipolar transistor to resist the synergistic effect of ionization and displacement damage and improve the quality of the bipolar transistor.

[0019] The following will further elaborate on the present invention in detail with reference to the drawings and embodiments. Description of the Drawings

[0020] Figure 1 is a flowchart of an optimization method for a bipolar transistor against the synergistic radiation damage effect of ionization or displacement provided by an embodiment of the present invention;

[0021] Figure 2 is a schematic diagram of the trap change of a bipolar transistor provided by an embodiment of the present invention;

[0022] Figure 3 is a schematic diagram of Gummel curves of different total doses provided by an embodiment of the present invention;

[0023] Figure 4 is a schematic diagram of Gummel curves of a neutron-irradiated bipolar transistor provided by an embodiment of the present invention;

[0024] Figure 5It is a schematic diagram of the Gummel curve after cooperative irradiation provided by an embodiment of the present invention;

[0025] Figure 6 It is a schematic structural diagram of the cross-section of a bipolar transistor under different emitter perimeter-to-area ratios provided by an embodiment of the present invention;

[0026] Figure 7 It is a schematic diagram of the gain attenuation of the cooperative effect of a bipolar transistor provided by an embodiment of the present invention;

[0027] Figure 8 It is a schematic diagram of the performance degradation under the cooperative effect of a bipolar transistor under different emitter perimeter-to-area ratios provided by an embodiment of the present invention;

[0028] Figure 9 It is a schematic structural diagram of the cross-section of a bipolar transistor with different emitter junction depths provided by an embodiment of the present invention;

[0029] Figure 10 It is a schematic structural diagram of the gain attenuation of the cooperative effect of a bipolar transistor with different emitter junction depths provided by an embodiment of the present invention;

[0030] Figure 11 It is a schematic diagram of the performance degradation under the cooperative effect of a bipolar transistor with different emitter junction depths provided by an embodiment of the present invention;

[0031] Figure 12 It is a schematic structural diagram of the gain attenuation of the cooperative effect of a bipolar transistor with different base doping concentrations provided by an embodiment of the present invention;

[0032] Figure 13 It is a schematic diagram of the performance degradation under the cooperative effect of a bipolar transistor with different base doping concentrations provided by an embodiment of the present invention;

[0033] Figure 14 It is a schematic structural diagram of the gain attenuation of the cooperative effect of a bipolar transistor with different neutral base widths provided by an embodiment of the present invention;

[0034] Figure 15 It is a schematic diagram of the performance degradation under the cooperative effect of a bipolar transistor with different neutral base widths provided by an embodiment of the present invention. Detailed implementation manners

[0035] The present invention will be further described in detail below with reference to specific embodiments, but the implementation manners of the present invention are not limited thereto.

[0036] Please refer to Figure 1 , Figure 1It is a flowchart of an optimization method for a bipolar transistor against ionization or displacement synergistic radiation damage effects provided by an embodiment of the present invention. An optimization method for a bipolar transistor against ionization or displacement synergistic radiation damage effects provided by this application includes:

[0037] S101. Construct a radiation field model and place the bipolar transistor in the radiation field model; wherein, the radiation field is a mixed radiation field, and the radiation field includes the total dose of γ-rays and the neutron fluence;

[0038] S102. Obtain the charge traps caused by ionization damage and the change in carrier lifetime caused by displacement damage of the bipolar transistor; wherein, the radiation of γ-rays causes ionization damage to the bipolar transistor, and the radiation of neutrons causes displacement damage to the bipolar transistor;

[0039] S103. Import the charge traps and the change in carrier lifetime of the bipolar transistor into the TCAD simulation model to obtain the influence of ionization damage on the characteristics of the bipolar transistor, the influence of displacement damage on the characteristics of the bipolar transistor, and the influence of the synergistic effect of ionization damage and displacement damage on the characteristics of the bipolar transistor respectively;

[0040] S104. By adjusting parameters such as the perimeter-to-area ratio of the emitter region, the emitter junction depth, the base doping concentration, and the neutral base region width of the bipolar transistor, obtain the variation law of the characteristics of the bipolar transistor under the synergistic effect of ionization damage and displacement damage;

[0041] S105. Based on the variation law of the characteristics of the bipolar transistor, propose an optimized design scheme.

[0042] Specifically, an optimization method for a bipolar transistor against ionization or displacement synergistic radiation damage effects provided in this embodiment includes constructing a radiation field model and placing the bipolar transistor in the radiation field model, wherein the radiation field is a mixed radiation field of γ-rays and neutrons; calculating the trap and the change in carrier lifetime; introducing the TCAD parameter simulation model; adjusting each parameter of the bipolar transistor to obtain the variation law of the characteristics of the bipolar transistor; based on the variation law of the characteristics of the bipolar transistor, propose an optimized design scheme against the synergistic effect of ionization and displacement damage; thus, it can effectively improve the ability of the bipolar transistor against the synergistic effect of ionization and displacement damage and improve the quality of the bipolar transistor.

[0043] It should be noted that when a bipolar transistor is irradiated by γ-rays, an ionization radiation effect is generated, causing ionization damage. Among them, the mechanism of ionization damage is that ionization radiation induces the formation of oxide traps in the oxide layer of the bipolar transistor and interface traps at the interface, thereby changing the carrier surface recombination rate and the electric field distribution of the bipolar transistor, and ultimately leading to the performance degradation of the bipolar transistor. Of course, when irradiated by a fixed dose rate of γ-rays, the oxide traps and interface traps of the bipolar transistor can be calculated, and then the corresponding traps can be added in TCAD to simulate the influence of the ionization radiation effect on the parameters of the bipolar transistor.

[0044] When a bipolar transistor is irradiated by neutrons, a displacement radiation effect is generated, forming displacement defects, resulting in a change in the carrier lifetime in the bipolar transistor. The relationship between the neutron irradiation fluence Φ and the carrier lifetime τ is expressed as:

[0045]

[0046] where τ r and τ0 respectively represent the carrier lifetimes after and before neutron irradiation, and K r is the radiation damage coefficient. For neutrons with an energy higher than 10 keV, K r = 10 6 s / cm 3 ; The change in the carrier lifetime under different neutron fluence conditions can be calculated, and then the carrier lifetime can be changed in TCAD to simulate the influence of the displacement radiation effect on the device parameters.

[0047] In a mixed radiation field, for a bipolar transistor, based on the total dose of γ-rays and the neutron fluence, the changes in oxide traps, interface traps, and carrier lifetimes can be calculated, and they can be added to the TCAD simulation model simultaneously, so as to calculate the influence of the ionization and displacement synergistic radiation damage effect of the bipolar transistor on the device parameters.

[0048] It should be noted that the bipolar transistor is a three-dimensional NPN transistor.

[0049] In an optional embodiment of the present application, the larger the ratio of the emitter perimeter to the area of the bipolar transistor, the greater the synergistic effect of ionization damage and displacement damage.

[0050] In an optional embodiment of the present application, in the synergistic effect of ionization damage and displacement damage, the higher the ionization damage component, the stronger the sensitivity of the synergistic effect of ionization damage and displacement damage to the ratio of the emitter perimeter to the area.

[0051] In an optional embodiment of the present application, the larger the emitter junction depth, the more serious the performance degradation of the bipolar transistor.

[0052] In an alternative embodiment of the present application, the higher the doping concentration of the base region, the more serious the performance degradation of the bipolar transistor.

[0053] In an alternative embodiment of the present application, the larger the width of the neutral base region, the more serious the performance degradation of the bipolar transistor.

[0054] In an alternative embodiment of the present application, through the following specific process, the bipolar transistor is in a mixed radiation field. By adjusting each parameter in the bipolar transistor, the variation law of each parameter of the bipolar transistor is obtained, further improving the ability of the bipolar transistor to resist ionization and damage synergistic damage effects.

[0055] Step 1: Construct a radiation field model; obtain the total γ-ray dose and neutron fluence in the mixed radiation field through actual measurement or source term simulation. Among them, during actual measurement, according to the relative position of the bipolar transistor and the radiation source, a γ dose rate meter and a neutron dose rate meter are used to measure the γ dose rate and neutron dose rate at the position where the bipolar transistor is located respectively. During source term simulation, the MCNP program is used. First, a physical model of the radiation field and the dose rate meter is established, including geometric boundaries, regions of interest, and grids for simulation calculation. Then, a source term model is established according to the type, intensity, position, and irradiation direction of the radiation field source term. Finally, the model is set according to the collected γ dose rate and neutron dose rate, and the simulation process is controlled by the simulation time or the number of particles to obtain the total γ-ray dose and neutron fluence at the position where the bipolar transistor is located in the radiation field.

[0056] Step 2: Calculate the change of traps and carrier lifetime; calculate the charge traps caused by ionization damage and the change of carrier lifetime caused by displacement damage according to the total γ-ray dose and neutron fluence at the position where the bipolar transistor is located. Among them, for the calculation of traps, please refer to Figure 2 as shown in Figure 2 which is a schematic diagram of the trap change of the bipolar transistor provided by the embodiment of the present invention. When the dose rate of γ-rays is fixed and the total dose rate changes for the bipolar transistor, the variation laws of the oxide traps N ot and the interface traps N it The fixed dose rate of γ-rays is 0.1 rad(SiO2) / s; for the calculation of carriers, the irradiation fluences of neutrons are set to be 5×10 11 cm -2 、1×10 12 cm -2 、5×10 12 cm -2 、1×10 13 cm -2 、2×10 13 cm -2 、3×10 13 cm-2 and 4×10 13 cm -2 , calculate the corresponding changes in the carrier lifetimes in the bipolar transistor after the transistor is irradiated with neutrons of the same fluence. Please refer to Table 1 below.

[0057] Table 1 Corresponding relationship between neutron fluence and carrier lifetime

[0058]

[0059] Step 3: Introduce the TCAD parameter simulation model; introduce the trap and the change in carrier lifetime into the TCAD simulation model respectively to obtain the changes in the characteristic parameters of the bipolar transistor caused by ionization damage and displacement damage. Then, introduce the ionization damage and displacement damage into the TCAD simulation model simultaneously to obtain the influence of the synergistic effect on the bipolar characteristic parameters and the relationship between independent damage and synergistic damage. Among them, the change in the characteristic parameters of the bipolar transistor is represented by the Gummel curve, and the Gummel curve is the curve of the base current I B of the bipolar transistor and the collector current I C changing with the base-emitter voltage V BE ;

[0060] Please refer to Figure 3 shown below, Figure 3 which is a schematic diagram of the Gummel curves of different total doses provided by the embodiments of the present invention. For ionization damage, simulate and calculate the Gummel curves of the bipolar transistor irradiated with γ-rays of 20 krad, 40 krad, 60 krad, 80 krad, and 100 krad respectively (dose rate: 10 rad / s).

[0061] Please refer to Figure 4 shown below, Figure 4 which is a schematic diagram of the Gummel curves of the neutron-irradiated bipolar transistor provided by the embodiments of the present invention. For displacement damage, simulate and calculate the Gummel curves of the transistor irradiated with neutron fluences of 5×10 11 cm -2 , 1×10 12 cm -2 , 5×10 12 cm -2 , 1×10 13 cm -2 , 2×10 13 cm -2 , 3×10 13 cm -2 and 4×10 13 cm -2 respectively.

[0062] Please refer toFigure 5 As shown Figure 5 is a schematic diagram of the Gummel curve after co-irradiation provided by an embodiment of the present invention. For co-radiation damage, the total dose of γ-rays is fixed at 100 krad, and the neutron irradiation fluence is continuously increased to 4×10 13 cm -2 , and the Gummel curve of the bipolar transistor after co-irradiation with neutrons and γ-rays is obtained.

[0063] Step Four: Propose an optimized design scheme for anti-synergistic effect; by adjusting the emitter perimeter-to-area ratio, emitter junction depth, base doping concentration, and neutral base width parameters of the bipolar transistor, the influence of each parameter on the characteristic parameters of the bipolar transistor under the condition of synergistic effect damage is obtained. According to the variation law of the characteristic parameters of the bipolar transistor, the influence law of the above parameters on the anti-synergistic damage effect ability of the bipolar transistor is obtained, and an optimized design scheme is proposed.

[0064] For the emitter perimeter-to-area ratio, without changing the information of the base region and collector region of the bipolar transistor, the area of the emitter region is fixed, and its emitter area is A = 0.112 μm 2 , by changing the length and width of the fixed emitter region, four bipolar transistors with different emitter perimeter-to-area ratios are obtained. Please refer to Figure 6 shown Figure 6 is a schematic diagram of the cross-section of a bipolar transistor at different emitter perimeter-to-area ratios provided by an embodiment of the present invention. In the schematic diagram of each cross-section in the figure, from left to right are the base region, emitter region, and collector region, Figure 6 The emitter perimeter-to-area ratios of the four cross-sections in are 15.357 μm -1 , 13.571 μm -1 , 12.929 μm -1 , 12.143 μm -1 ; respectively simulate and calculate the gain attenuation of the four bipolar transistors under ionization and displacement synergistic effects. Please refer to Figure 7 shown Figure 7 is a schematic diagram of the gain attenuation of the synergistic effect of a bipolar transistor provided by an embodiment of the present invention. When the neutron fluence is low, the ionization radiation effect dominates, so the curve drops steeply at first and then gradually levels off during the decline, and the displacement radiation effect gradually dominates; please refer to Figure 8 shown Figure 8It is a schematic diagram of the performance degradation under the synergistic effect of bipolar transistors with different emitter perimeter-to-area ratios provided by an embodiment of the present invention. As can be seen from the figure, the normalized gain of the bipolar transistor drops suddenly to varying degrees at the beginning of the curve, indicating that the influence of the emitter perimeter-to-area ratio on the interface and oxide layer is greater, and the influence in the bipolar transistor Si is relatively small; the excess base current generated per unit area by bipolar transistors with different emitter perimeter-to-area ratios is different, resulting in certain differences in the attenuation of the normalized gain, and these differences gradually decrease with the increase of the neutron fluence; it can be understood that, overall, the larger the emitter perimeter-to-area ratio, the greater the ionization and displacement synergistic damage, and at the same time, the higher the ionization radiation damage component in the synergistic effect, and the stronger the sensitivity of the synergistic effect to the emitter perimeter-to-area ratio.

[0065] For the emitter junction depth, in a vertical bipolar transistor, the emitter junction depth T emit represents the depth of the B-E junction in the base region, which is an important parameter determining the gain of the bipolar transistor; when modeling the bipolar transistor, in the emitter injection step, bipolar transistors with four different emitter junction depths of 0.08μm, 0.09μm, 0.10μm, and 0.11μm are obtained by changing the doping depth of the injected emitter region. Please refer to Figure 9 shown in Figure 9 It is a schematic structural diagram of the cross-section of bipolar transistors with different emitter junction depths provided by an embodiment of the present invention, simulating and calculating the performance degradation of different T emit bipolar transistors under the ionization and displacement synergistic effect; please refer to Figure 10 and Figure 11 shown in Figure 10 It is a schematic structural diagram of the gain attenuation of the synergistic effect of bipolar transistors with different emitter junction depths provided by an embodiment of the present invention. Figure 11 It is a schematic diagram of the performance degradation under the synergistic effect of bipolar transistors with different emitter junction depths provided by an embodiment of the present invention. When the neutron fluence is low, the ionization radiation damage causes serious attenuation of the device gain, and from the attenuation of the normalized gain, it can be obtained that the gain degradation caused by the total ionization radiation dose becomes more serious with the increase of T emit and the synergistic effect also shows sensitivity to T emit , that is, the larger T emit is, the more serious the performance degradation of the bipolar transistor; therefore, in the manufacturing process of the bipolar transistor, controlling the size of the emitter junction depth T emit should not be too small, which is helpful for the γ-ray and neutron irradiation resistance performance of the bipolar transistor.

[0066] For the base doping concentration, to ensure the amplification performance of the bipolar transistor, the base is usually thin and its doping concentration (BaseDop) is usually low (two orders of magnitude lower than that of the emitter), aiming to improve the efficiency of carrier injection from the emitter; by changing the base doping concentration of the transistor, the performance of the bipolar transistor can vary to different degrees, which is also a reinforcement strategy in the anti-radiation process design of bipolar transistors; bipolar transistors with base doping concentrations of 2×10 18 cm -3 、3×10 18 cm -3 、4×10 18 cm -3 and 5×10 18 cm -3 are established respectively to study the sensitivity of the co-radiation damage effect to different BaseDop; please refer to Figure 12 and Figure 13 shown. Figure 12 is a schematic diagram of the gain attenuation of the co-effect of bipolar transistors under different base doping concentrations provided by an embodiment of the present invention. Figure 13 is a schematic diagram of the performance degradation of bipolar transistors under the co-effect of different base doping concentrations provided by an embodiment of the present invention. When the neutron fluence is low, the ionization damage caused by the total dose effect makes the gain attenuation amplitude of bipolar transistors with lower BaseDop very large. At this time, the excess base current mainly comes from the surface recombination of carriers; as the neutron fluence continuously increases, the recombination process of carriers through the defects in the base region gradually becomes the main source of the excess base current. Overall, the gain attenuation situation shows an inversion, and the higher the BaseDop, the more serious the performance degradation. In summary, in the process design of bipolar transistors, the base doping concentration BaseDop should be reasonably set according to the irradiation environment on the premise of ensuring the gain, so as to reduce the irradiation damage of the device.

[0067] For the neutral base width, during the manufacturing process of bipolar transistors, the emitter is an N-type region formed by injecting high-doped group V elements into the base. This region is usually small, and the distance between it and the base is the neutral base width WB; the size of the neutral base width will also directly affect the performance of bipolar transistors; bipolar transistor models with neutral base widths of 0.14μm, 0.17μm, 0.185μm, and 0.20μm are established respectively, and the rest of the information remains unchanged; the sensitivity differences of bipolar transistors with different WB to the co-effect are simulated and calculated; please refer to Figure 14 and Figure 15 shown. Figure 14 is a schematic diagram of the gain attenuation of the co-effect of bipolar transistors under different neutral base widths provided by an embodiment of the present invention. Figure 15It is a schematic diagram of the performance degradation under the synergistic effect of bipolar transistors with different neutral base widths provided by the embodiments of the present invention. As can be seen from the figure, the wider the neutral base region of the bipolar transistor, the more serious the performance degradation caused by the ionization and displacement synergistic effects; in the design of the radiation resistance parameters of the bipolar transistor, the width of the neutral base region should be reduced on the premise of ensuring the gain, which is more beneficial to the radiation resistance performance.

[0068] In summary, by increasing the emitter perimeter-to-area ratio (P / A ratio), deepening the emitter junction depth (Temit), increasing the base doping concentration (BaseDop), and widening the neutral base width (WB), the synergistic irradiation effect of the bipolar transistor can be aggravated, resulting in more serious gain attenuation; on the premise of ensuring the gain requirement of the bipolar transistor, appropriately reducing the emitter perimeter-to-area ratio, emitter junction depth, and neutral base width, and reasonably setting the base doping concentration can improve the anti-synergistic radiation performance of the bipolar transistor.

[0069] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should all be regarded as belonging to the protection scope of the present invention.

Claims

1. An optimization method for a bipolar transistor against the combined effects of ionization or displacement radiation damage, characterized in that, Including: Construct a radiation field model and place a bipolar transistor in the radiation field model; wherein, the radiation field is a mixed radiation field, and the radiation field includes the total dose of gamma rays and the neutron fluence; Obtain the charge traps caused by ionization damage and the change in carrier lifetime caused by displacement damage to the bipolar transistor; wherein, the radiation of the gamma rays causes ionization damage to the bipolar transistor, and the radiation of the neutrons causes displacement damage to the bipolar transistor; Import the charge traps and the change in carrier lifetime of the bipolar transistor into a TCAD simulation model to respectively obtain the influence of ionization damage on the characteristics of the bipolar transistor, the influence of displacement damage on the characteristics of the bipolar transistor, and the influence of the synergistic effect of ionization damage and displacement damage on the characteristics of the bipolar transistor; By adjusting the parameters of the emitter perimeter-to-area ratio, emitter junction depth, base doping concentration, and neutral base width of the bipolar transistor, obtain the variation law of the characteristics of the bipolar transistor under the synergistic effect of ionization damage and displacement damage; Based on the variation law of the characteristics of the bipolar transistor, propose an optimized design scheme.

2. The method for optimizing a bipolar transistor against ionization or displacement synergistic radiation damage effects according to claim 1, wherein The greater the emitter perimeter-to-area ratio of the bipolar transistor, the greater the synergistic effect of ionization damage and displacement damage.

3. The method for optimizing a bipolar transistor against ionization or displacement synergistic radiation damage effects according to claim 1, wherein In the synergistic effect of ionization damage and displacement damage, the higher the ionization damage component, the stronger the sensitivity of the synergistic effect of ionization damage and displacement damage to the emitter perimeter-to-area ratio.

4. The method for optimizing a bipolar transistor against ionization or displacement synergistic radiation damage effects according to claim 1, wherein The greater the emitter junction depth, the more serious the performance degradation of the bipolar transistor.

5. The optimization method of a bipolar transistor against ionization or displacement synergistic radiation damage effects according to claim 1, characterized in that The higher the base doping concentration, the more serious the performance degradation of the bipolar transistor.

6. The method for optimizing a bipolar transistor against ionization or displacement synergistic radiation damage effects according to claim 1, characterized in that, The greater the neutral base width, the more serious the performance degradation of the bipolar transistor.

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