A method for improving the performance of a field-effect transistor

Abstract

The present invention discloses a method for improving the performance of a field effect transistor. Its structural design is simple and reasonable, and it can improve the performance at the same time. The field effect transistor amplifier circuit structure includes a source electrode, a drain electrode, a gate electrode, an input signal, and an output signal. The gate electrode is connected to the drain electrode through a capacitor Cgd in series with a resistor r<subgt;d< / subgt>. The gate electrode is connected to the source electrode through a capacitor Cgs and a resistor r<subgt;s< / subgt>. It also includes a resistor g<subgt;ds< / subgt>. The resistor g<subgt;ds< / subgt> is connected in series with the resistor r<subgt;s< / subgt>. The capacitor Cgd is connected to the source electrode through the resistor g<subgt;ds< / subgt> and the resistor r<subgt;s< / subgt>. The input signal is input between the source electrode and the drain electrode, and the output signal is output between the drain electrode and the source electrode. The method for improving the performance of the field effect transistor is realized based on the sensitivity analysis method and the field effect transistor amplifier circuit structure, and includes obtaining key process parameters, analyzing the influence of the fluctuation of the key process parameters on the electrical parameters, and improving the key process parameters according to the change of the electrical parameters.

Description

Technical Field

[0001] The present invention relates to the technical field of field effect transistors, and specifically to a method for improving the performance of a field effect transistor. Background Art

[0002] A field effect transistor amplifier (MOSFET amplifier) is a voltage-controlled device, which is widely used in electronic circuits due to its advantages such as high input impedance and low noise. Field effect transistors include junction field effect transistors and insulated gate field effect transistors. During the design process of a field effect transistor amplifier, reasonable layout of its various components is required, and the process of the device is optimized according to process parameters to meet the electrical performance requirements such as fast response and high stability. During the analysis of process parameters and process optimization, on-line process parameters of the field effect transistor are measured. Since its production and processing process steps are numerous, the processing of each device includes hundreds of process steps, each process step can generate multiple on-line process parameters, and the process steps are implemented in sequence. The process parameters in the previous or current processing steps may affect the accurate measurement of the process parameters in the subsequent steps. Therefore, if the structure design of the field effect transistor is unreasonable, the measurement errors of the process parameters will accumulate, easily leading to problems such as reduced electrical performance. Summary of the Invention

[0003] Aiming at the problems in the prior art that the structure of the field effect transistor amplifier circuit is complex, the measurement errors of process parameters accumulate, and it is easy to cause a reduction in its electrical performance, the present invention provides a method for improving the performance of a field effect transistor, with a simple and reasonable structure design, which can improve the unity gain frequency and at the same time improve the performance.

[0004] To achieve the above object, the present invention adopts the following technical solutions:

[0005] A structure of a field effect transistor amplifier circuit, which includes a source electrode, a drain electrode, a gate electrode, an input signal, and an output signal. It is characterized in that the gate electrode is connected to the drain electrode in series through a capacitor Cgd and a resistor r d and is connected to the source electrode through a capacitor Cgs and a resistor r s It further includes a resistor g ds The resistor g ds is connected in series with the resistor r s The capacitor Cgd is connected to the source electrode through the resistor g ds and the resistor r s The input signal is input between the source electrode and the drain electrode, and the output signal is output between the drain electrode and the source electrode.

[0006] It is further characterized in that

[0007] The resistor g dsThe transconductance Gm = W gate / L gate *e ox *U n / t ox *(V gs -V t )(1 + λV ds ), where W gate is the effective gate width, L gate is the effective gate length, e ox is the dielectric of the oxide, U n is the electron mobility, t ox is the thickness of the high-K metal layer, Vt is the threshold voltage, λ is an adjustable parameter, and λ > 1.

[0008] A method for improving the performance of a field-effect transistor, which is based on the sensitivity analysis method of machine learning and implemented by applying the field-effect transistor amplifier circuit structure. The improvement method is characterized in that the improvement method includes:

[0009] Step 1: Based on the field-effect transistor amplifier circuit structure, obtain the electrical parameters affecting the performance of the field-effect transistor. The obtaining method includes: adjusting the frequency and amplitude of the input signal, controlling the frequency of the output signal, and measuring and obtaining the voltage, current, capacitance, and / or transconductance of the corresponding components in the field-effect transistor amplifier circuit structure during the adjustment process;

[0010] Step 2: Based on the sensitivity analysis method, analyze the correlation between the process parameters and the electrical parameters of the field-effect transistor, and obtain the important process parameters;

[0011] Step 3: According to the changes in the voltage, current, capacitance, and / or transconductance, improve the important process parameters of the field-effect transistor to improve the performance of the field-effect transistor.

[0012] Its further feature is that

[0013] judge whether the performance of the field-effect transistor amplifier circuit is improved through the unity gain frequency;

[0014] In Step 1, the method for obtaining the electrical parameters includes: keeping the amplitude of the input signal unchanged, changing the frequency of the input signal, reducing the frequency of the output signal to 0.707 times the maximum value, obtaining the unity gain frequency, using a sinusoidal signal with a changing frequency and a constant amplitude as the input signal, obtaining the transconductance Gm and the effective gate capacitance Cgg of the resistor g ds in the field-effect transistor amplifier circuit, and calculating the unity gain frequency F T ;

[0015] Calculate the unit gain frequency F T : F T = Gm / (2πCgg).

[0016] The above method of the present invention can achieve the following beneficial effects:

[0017] 1. Through the method for improving the performance of the field-effect transistor in this application, analyze the influence of the unit gain frequency on the performance of the field-effect transistor. The unit gain frequency is one of the important indicators for measuring the electrical performance of the field-effect transistor. The larger the unit gain frequency, the better the high-frequency performance of the field-effect transistor. Therefore, obtain important process parameters with a relatively high degree of correlation with the unit gain frequency through the sensitivity analysis method, improve the process parameters of the field-effect transistor, that is, improve the corresponding components in the amplifier circuit structure of the field-effect transistor, thereby ensuring the increase of the unit gain frequency. The improvement of the accuracy of the unit gain frequency is beneficial to the improvement of the electrical performance of the field-effect transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is the circuit schematic diagram of the amplifier circuit structure of the field-effect transistor of the present invention;

[0019] Figure 2 is Figure 1 the equivalent circuit diagram;

[0020] Figure 3 is the three-dimensional structure schematic diagram of the field-effect transistor;

[0021] Figure 4 is the cross-sectional structure schematic diagram of the field-effect transistor;

[0022] Figure 5 is the relationship curve of the gate length a, fin height b, high-k / interface layer (HK / IL) thickness c, source / drain (S / D) proximity d, S / D depth e, and gate height f with the transconductance Gm respectively;

[0023] Figure 6 is the relationship curve of the gate length a, fin height b, high-k / interface layer (HK / IL) thickness c, source / drain (S / D) proximity d, S / D depth e, and gate height f with the effective capacitance Cgg respectively;

[0024] Figure 7 is the relationship curve of the gate length a, fin height b, high-k / interface layer (HK / IL) thickness c, source / drain (S / D) proximity d, S / D depth e, and gate height f with the unit gain frequency (FT) respectively.. DETAILED DESCRIPTION OF THE INVENTION

[0025] See Figure 1, a field - effect transistor amplifier circuit structure, which includes a source electrode, a drain electrode, a gate electrode, an input signal, and an output signal. The gate electrode is connected in series with the drain electrode through a capacitor Cgd and a resistor r d and is connected to the source electrode through a capacitor Cgs and a resistor r s It also includes a resistor g ds , and the resistor g ds is in series with the resistor r s The capacitor Cgd is connected to the source electrode through the resistor g ds , the resistor r s The input signal is input between the source electrode and the drain electrode, and the output signal is output between the drain electrode and the source electrode. The transconductance Gm of the resistor g ds is \(Gm = W gate / L gate *e ox *U n / t ox *(V gs -V t )(1 + λV ds ), where W gate is the effective gate width, L gate is the effective gate length, e ox is the dielectric of the oxide, U n is the electron mobility, t ox is the thickness of the high - K metal layer, Vt is the threshold voltage, λ is an adjustable parameter, and λ>1.

[0026] The above - mentioned field - effect transistor amplifier circuit structure forms a common - gate amplifier through the capacitor Cgd, the resistor r d , the capacitor Cgs, the resistor r s , and the resistor g ds , biases the input signal in its saturation region, realizes effective amplification of the input signal amplitude. Compared with the existing amplifier circuits, the field - effect transistor amplifier circuit structure is designed simply and reasonably. As a common - gate amplifier, it has good high - frequency characteristics.

[0027] A method for improving the performance of a field - effect transistor, which is based on the sensitivity analysis method of machine learning and is implemented by applying the above - mentioned field - effect transistor amplifier circuit structure. The performance - improving method includes:

[0028] Step 1: Based on the field - effect transistor amplifier circuit structure, obtain the electrical parameters that affect the performance of the field - effect transistor amplifier circuit. The obtaining method includes: adjusting the frequency and amplitude of the input signal, controlling the frequency of the output signal, and during the adjustment process, measuring and obtaining the voltage, current, capacitance, and / or transconductance of the corresponding components in the field - effect transistor amplifier circuit structure;

[0029] Step 2: Based on the sensitivity analysis method, analyze the correlation between the process parameters and electrical parameters of the field-effect transistor to obtain important process parameters;

[0030] Step 3: According to the changes in voltage, current, capacitance, and / or transconductance, improve the key process parameters of the field-effect transistor to enhance the performance of the field-effect transistor.

[0031] In this embodiment, the performance improvement of the field-effect transistor amplifier circuit is judged by the unity-gain frequency. In Step 1, the specific method for obtaining electrical parameters includes: keeping the amplitude of the input signal unchanged, changing the frequency of the input signal, reducing the frequency of the output signal to 0.707 times the maximum value, obtaining the unity-gain frequency, using a sinusoidal signal with a changing frequency and a constant amplitude as the input signal, measuring and calculating the capacitance Cgd, resistance r d in the field-effect transistor amplifier, capacitance Cgs, resistance r s , resistance g ds , calculating the transconductance Gm and effective gate capacitance Cgg of resistance g ds , and calculating the unity-gain frequency FT based on the transconductance Gm and effective gate capacitance Cgg: FT = Gm / (2πCgg). The smaller the effective gate capacitance Cgg, the larger the unity-gain frequency F T .

[0032] In the above method for obtaining electrical parameters, as the frequency of the input signal continuously changes, the gain of the output signal decreases accordingly. When the closed-loop voltage gain of the output signal drops to 3 dB, the gain-bandwidth product obtained by multiplying the signal frequency corresponding to this by the closed-loop amplification factor 1 is the unity-gain frequency. Controlling the frequency and amplitude of the input signal, the specific control method includes: when the closed-loop voltage gain of the output signal drops to 3 dB, measuring and obtaining the transconductance Gm and effective gate capacitance Cgg of resistance g ds in the field-effect transistor amplifier circuit. The unity-gain frequency (FT) is calculated based on the transconductance Gm and effective gate capacitance Cgg.

[0033] Analyze the process parameters of the field-effect transistor using existing technologies and / or the following method (sensitivity analysis method based on machine learning). According to the influence of the process parameters on the electrical performance of the field-effect transistor, determine the important process parameters, that is, the process parameters that have a greater impact on the electrical performance of the field-effect transistor.

[0034] A sensitivity analysis method for field-effect transistors based on machine learning, which includes: S1. Measure and obtain the process parameters of the field-effect transistor, and the process parameters are measured using existing optical devices, etc. during the semiconductor device processing process;

[0035] S2. Based on the above field effect transistor amplifier circuit and the above method for obtaining the electrical parameters of the field effect transistor, measure and calculate to obtain the electrical parameters of the semiconductor device. In this embodiment, the unity gain frequency (FT) of the field effect transistor is obtained, and the unity gain frequency (FT) is calculated based on the transconductance Gm and the effective gate capacitance Cgg;

[0036] S3. Conduct a sensitivity analysis on the electrical performance of the semiconductor device:

[0037] S31. Associate the electrical parameters with the corresponding process parameters to construct an association model;

[0038] According to the covariance formula, calculate the covariance cov(IK1, IK2) of the association model of the process parameters and the electrical parameters.

[0039] cov(IK1, IK2) = E[(IK1 - k1)(IK2 - k2)];

[0040] Wherein, IK1 represents the key process parameter, IK2 represents the key electrical parameter, k1 is the mean value of the key process parameter, and k2 is the mean value of the key electrical parameter.

[0041] Calculate the correlation coefficient corr(IK1, IK2) of the association model based on the covariance:

[0042]

[0043] S32. Analyze the sensitivity of each association model, and obtain the sensitivity analysis result according to the correlation coefficient of the association model;

[0044] S33. Based on the sensitivity analysis result, sort the process parameters according to the magnitude of the correlation coefficient;

[0045] S34. According to the sorting result, determine the key process parameters: a large correlation coefficient indicates that the process parameter is greatly affected by the electrical parameter. Therefore, the process parameter with a large correlation with the electrical parameter is determined as the key process parameter;

[0046] S4. Use the width method to conduct a similarity test on the key process parameters:

[0047] S41. Based on the machine learning database, conduct a clustering analysis on the key process parameters, and classify the key process parameters with similar or identical characteristics into groups;

[0048] S42. The width method means comparing the key process parameters within the same group after classification with the standard characteristic parameters in a pre-established database. For example, comparing the width of the gate region in the process parameters measured during processing with the standard gate region width in the database, and calculating the correlation between the key process parameters and the standard characteristic parameters within each group according to the covariance formula:

[0049] According to the covariance formula, calculate the covariance cov(IL1, IL2) between the key process parameter and the standard characteristic parameter,

[0050] ;

[0051] where IL1 represents the key process parameter, IL2 represents the key electrical parameter, u1 is the mean value of the key process parameter, and u2 is the mean value of the key electrical parameter.

[0052] Based on the covariance, calculate the correlation coefficient corr(IL1, IL2) between the key process parameter and the standard characteristic parameter,

[0053]

[0054]

[0055] S5. Screen out the important process parameters according to the correlation coefficient, that is, determine the important process parameters according to the correlation between the key process parameters and the standard characteristic parameters. The smaller the correlation, the greater the difference between the key process parameters and the standard characteristic parameters, and then the key process parameter is the important process parameter.

[0056] The method of this application studies the influence of the process parameters of a 16-nm fin field-effect transistor (16-nm HKMG bulk FinFET) on the electrical characteristics of the unity gain frequency (Ft). The field-effect transistor includes a gate 1, a source 2, and a drain 3. The gate 1 includes a high-K metal layer 4 (HK). Since the unity gain frequency (Ft) depends on the transconductance (Gm) and the effective gate capacitance (Cgg), a sensitivity analysis is performed on these two factors to find the key inline process parameters (i.e., important process parameters) that affect them. Through the research using the above sensitivity analysis method, the results show that six inline process parameters, such as the gate length (gatelengt), fin height (finheight), HK / IL thickness (HK / IL thickness), the extension layer thickness on both sides of the source and drain (the extension layer thickness on both sides of the source region and the drain region (SDProximity)), source-drain depth (S / Ddepth), and gate height (gateheight), have an impact on both the transconductance (Gm) and the effective gate capacitance (Cgg). When these six parameters fluctuate simultaneously, it has a greater impact on the transconductance (Gm) and the effective gate capacitance (Cgg), and thus affects the unity gain frequency (Ft). Therefore, the above six inline process parameters are taken as important process parameters and improved, and the impact of the fluctuations of the above inline process parameters on the performance of the field-effect transistor is analyzed. Using the above formula FT = Gm / (2πCgg), the unity gain frequency FT of a 16-nm field-effect transistor (16-nm HKMG bulk FinFET) device is calculated. The smaller the effective capacitance Cgg, the larger the unity gain frequency FT. Unity gain is one of the important indicators for measuring the parameters of FinFET devices. The larger the unity gain frequency F T The better the high-frequency performance of the field-effect transistor. Since Ft is a function of Gm and Cgg, the inline process parameters are also used to check whether Gm and Cgg can meet the electrical performance requirements of the field-effect transistor.

[0057] By Figure 3 、 Figure 4 display the structure of the field-effect transistor and mark its key process parameters (including the gate length a, fin height b, high-k metal layer / interface layer (HK / IL) thickness c, the extension layer thickness on both sides of the source and drain (S / D) d, S / D depth e, and gate height f in Figure 3 、 Figure 4 marked, that is, in Figure 3 、 Figure 4 are represented by a, b, c, d, e, and f respectively. Through the unity gain frequency calculation method, it can be known that Cgg is an important factor affecting Ft, and it is a combination of the gate-source capacitance (Cgs), gate-drain capacitance (Cgd), gate capacitance (Cgate), and channel capacitance (Cchanel). Figure 3Cgs, Cgd, Cgate, and Cchanel are shown. Cgs and Cgd are relative to the gate-to-S / D overlap region, which is also shown in Figure 3 The overlap region (i.e., the extension layer on both sides of the source and drain) is along the fin direction, and the gate filled with the high-K metal layer and the fin are in a vertical structure.

[0058] Using the above sensitivity analysis method to perform sensitivity analysis on all online process parameters, obtain inline process parameters with high sensitivity values (i.e., important process parameters), and illustrate the impact of fluctuations in important process parameters during the inline process on the unity gain frequency, transconductance, and effective capacitance. See Figure 5 、 Figure 6 、 Figure 7 , Figure 5 、 Figure 6 、 Figure 7 which respectively include Figures (a), (b), (c), (d), (e), (f) in Figure 5 、 Figure 6 、 Figure 7 The horizontal axes respectively represent the gate length a, fin height b, high-k metal layer / interface layer (HK / IL) thickness c, source / drain (S / D) proximity d, S / D depth e, and gate height f, and the vertical axes in Figure 5 、 Figure 6 、 Figure 7 respectively represent the transconductance Gm, effective capacitance Cgg, and unity gain frequency Ft. The curves represent the impact of fluctuations in the gate length a, fin height b, high-k metal layer / interface layer (HK / IL) thickness c, source / drain (S / D) proximity d, S / D depth e, and gate height f on the transconductance Gm, effective capacitance Cgg, and unity gain frequency Ft respectively. According to the transconductance Gm calculation formula and the sensitivity analysis method, simulations are performed to obtain the above simulation diagrams Figure 5 、 Figure 6 、 Figure 7 ,From Figure 5 (a), it can be seen that Gm decreases as the gate length increases. From Figure 5 (b), it can be seen that Gm increases as the fin height increases. The fin height is a key factor in constructing the effective gate width. The effective gate width increases as the fin height increases. Therefore, Gm increases as the effective gate width increases, which can be explained by formula (1). Figure 5 (c) shows that due to equation (1), Gm increases as the HK / IL thickness increases. Figure 5 (d) shows that Gm decreases as the thickness of the extension layer on both sides of the source and drain increases. Figure 5 (e) shows that Gm increases as the S / D depth increases, as shown in Figure 5(As shown in (e), according to the relationship between the stress volume and the electron mobility μn, the electron mobility μn (i.e., the carrier mobility μn in the channel) is related to the thickness of the extension layers on both sides of the source-drain and the S / D depth. During the etching process of the source-drain epitaxial growth, the thickness of the extension layers on both sides of the source-drain decreases as the S / D depth increases, the electron mobility μn decreases as the thickness of the extension layers on both sides of the source-drain increases, and the transconductance Gm decreases as the electron mobility μn decreases. Conversely, the electron mobility μn increases as the S / D depth increases, and the transconductance Gm increases as μn increases. This can be explained by the transconductance formula.) Figure 5 (f) shows that Gm increases as the gate height increases.

[0059] From Figure 6 (a), it can be seen that the effective capacitance Cgg increases as the gate length increases. From Figure 6 (b), it can be seen that the effective capacitance Cgg increases as the fin height increases, and the fin height is a key factor in forming the effective gate width. The effective gate width increases as the fin height increases. Therefore, the effective capacitance Cgg increases as the effective gate width increases, which can be explained by the transconductance calculation formula.) Figure 6 (c) shows that due to Equation (1), the effective capacitance Cgg increases as the HK / IL thickness increases.

[0060] Figure 6 (d) shows that Cgg decreases as the thickness of the extension layers on both sides of the source-drain increases. Figure 6 (e) shows that the effective capacitance Cgg decreases as the S / D depth increases. Figure 6 (f) shows that the effective capacitance Cgg decreases as the gate height increases.

[0061] From Figure 7 (a), it can be seen that the unity-gain frequency Ft decreases as the gate length increases. From Figure 7 (b), it can be seen that the unity-gain frequency Ft increases as the fin height increases, and the fin height is a key factor in forming the effective gate width.)

[0062] The effective gate width increases as the fin height increases. Therefore, the unity-gain frequency Ft increases as the effective gate width increases, which can be explained by Equation (1).) Figure 7 (c) shows that due to Equation (1), the unity-gain frequency Ft decreases as the HK / IL thickness increases. Figure 7 (d) shows that Cgg decreases as the thickness of the extension layers on both sides of the source-drain increases. Figure 7 (e) shows that the unity-gain frequency Ft increases as the S / D depth increases. Figure 7 (f) shows that the unity-gain frequency Ft increases as the gate height increases.

[0063] From the above simulation diagram Figure 5 、 Figure 6 、 Figure 7 It can be seen that the electrical parameter unit gain frequency Ft of the field effect transistor is greatly affected by the transconductance Gm and the effective capacitance Cgg, while the transconductance Gm and the effective capacitance Cgg are greatly affected by the online process parameters gate length a, fin height b, high-k metal layer / interface layer (HK / IL) thickness c, source-drain (S / D) proximity d, S / D depth e, and gate height f. Therefore, according to the analysis results of the above sensitivity analysis method and the simulation diagram, it can be seen that the gate length a, fin height b, high-k / interface layer (HK / IL) thickness c, source-drain (S / D) proximity d, S / D depth e, and gate height f are the key process parameters affecting the unit gain frequency Ft of the field effect transistor. Based on the above analysis results, the key process parameters gate length a, fin height b, high-k / interface layer (HK / IL) thickness c, source-drain (S / D) proximity d, S / D depth e, and gate height f are optimized, thereby improving the unit gain frequency Ft. Figure 7 It can be seen that the efficiency of the unity gain frequency Ft can be increased by about 20%, thereby improving the high frequency characteristics of the field effect transistor amplifier circuit, thereby greatly improving the performance of the field effect transistor.

[0064] The above description is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiment. It is understood that other improvements and variations directly derived or imagined by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included in the scope of protection of the present invention.

Claims

1. A method for improving the performance of a field-effect transistor, which is based on a sensitivity analysis method of machine learning and is implemented by applying the structure of a field-effect transistor amplifier circuit, characterized in that, The improvement method includes: Step 1: Based on the field effect transistor amplifier circuit structure, obtain the electrical parameters affecting the performance of the field effect transistor amplifier circuit. The obtaining method includes: adjusting the frequency and amplitude of the input signal of the field effect transistor amplifier circuit, controlling the frequency of the output signal of the field effect transistor amplifier circuit, and during the adjustment process, measuring and obtaining the voltage, current, capacitance, and / or transconductance of the corresponding components in the field effect transistor amplifier circuit structure; Step 2: Based on the sensitivity analysis method, analyze the correlation between the process parameters of the field effect transistor and the electrical parameters, and obtain the important process parameters; Step 3: According to the changes in the voltage, current, capacitance, and / or transconductance, improve the important process parameters of the field effect transistor to enhance the performance of the field effect transistor.

2. The method for enhancing the performance of a field effect transistor according to claim 1, wherein Judge whether the performance of the field effect transistor is improved by the unity gain frequency.

3. The method for improving the performance of the field effect transistor according to claim 2, wherein, Calculate the unity-gain frequency F T : F T = Gm / (2π * Cgg); where Gm is the transconductance of resistor g in the field-effect transistor amplifier circuit ds and Cgg is the effective gate capacitance.

4. The method for improving the performance of a field effect transistor according to claim 3, wherein The important process parameters include gate length, fin height, interface layer thickness, source-drain proximity, source-drain depth, or gate height.

5. The method for improving the performance of a field-effect transistor according to claim 4, wherein Obtain electrical parameters that have a great influence on the unity-gain frequency. The obtaining method includes: keeping the amplitude of the input signal unchanged, changing the frequency of the input signal, reducing the frequency of the output signal to 0.707 times the maximum value, and measuring the transconductance Gm and the effective gate capacitance Cgg of the resistor g in the field-effect transistor amplifier circuit during the adjustment process. ds According to the transconductance Gm and the effective gate capacitance Cgg, calculate the unity-gain frequency F. T During the adjustment process, use a sinusoidal signal with a constant amplitude and a changing frequency as the input signal.

6. A field effect transistor amplifier circuit structure, which is applied to the efficiency improvement method described in claim 1 or 5, and is characterized in that, The field effect transistor amplifier circuit structure includes a source electrode, a drain electrode, a gate electrode, an input signal, and an output signal. The gate electrode is connected to the drain electrode after being serially connected with a resistor r through a capacitor Cgd d and the gate electrode is connected to the source electrode after being serially connected with a resistor r through a capacitor Cgs s It further includes a resistor g ds The resistor g ds is serially connected with the resistor r s The capacitor Cgd is connected to the source electrode after being serially connected with the resistor g ds and the resistor r in sequence s The input signal is input between the source electrode and the drain electrode, and the output signal is output between the drain electrode and the source electrode.

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