Pin-type substrate retainer and method for manufacturing the same

By preparing a column pin substrate holder, the problem of difficult to control the surface shape of the plane substrate holder in high-process lithography process is solved, and the processing of a large-area and high-flatness column pin substrate holder is realized to meet the needs of a high-process lithography process.

CN115440650BActive Publication Date: 2025-08-01INST OF OPTICS & ELECTRONICS CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202211147087.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-20
Publication Date
2025-08-01
Estimated Expiration
2042-09-20

AI Technical Summary

Technical Problem

The existing planar substrate holders are difficult to meet the requirements of silicon wafer surface undulation in high-process lithography processes, and there is a lack of large-area, high-flatness precision column pin substrate holders and their processing technology in China.

Method used

Using the preparation method of a column pin substrate holder, a metal masking layer, an organic protective layer and a photosensitive layer are formed on a low-surface undulating substrate, photolithography and etching are carried out, and the column pin structure is transferred to the substrate, and combined with corrosion liquid corrosion, a large area and high flatness column pin substrate holder is prepared.

Benefits of technology

It effectively reduces the contact area between the wafer and the substrate holder, reduces the risk of surface shape fluctuations, ensures the flatness of the wafer surface, and meets the needs of high-process lithography processes.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a stud-type substrate holder and a preparation method thereof. The preparation method includes: S1, sequentially forming a metal masking layer (2), an organic protection layer (3), and a photosensitive layer (4) on a substrate (1) with low surface topography; S2, exposing and developing the photosensitive layer (4) to obtain a stud-type structure; S3, sequentially etching the organic protection layer (3) and the metal masking layer (2) to transfer the stud-type structure into the organic protection layer (3) and the metal masking layer (2); S4, using an etching solution to etch the substrate (1) to continuously transfer the stud-type structure into the substrate (1), and the upper surface of the stud-type structure in the substrate (1) maintains the initial low surface topography of the substrate (1); S5, removing the photosensitive layer (4), the organic protection layer (3), and the metal masking layer (2) to obtain a stud-type substrate holder. The method of the present disclosure can prepare a large-area and high-flatness stud-type substrate holder based on micro-nano processing technology.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of precision lithography wafer holders, and particularly to a stud-type substrate holder and a preparation method thereof. Background Art

[0002] With the development of integrated circuit technology towards higher process nodes, the requirements for the surface topography undulation of the silicon wafer after being adsorbed by a lithography equipment substrate holder (i.e., a wafer chuck) are getting higher and higher.

[0003] From the earliest planar metal substrate holders to the current planar quartz and silicon carbide substrate holders for lithography, the surface topography undulation of the substrate holder has been continuously reduced, which can basically meet the requirements of low-process lithography. However, in high-process lithography, even if the silicon wafer and the substrate holder have been polished to the limit level of the processing technology, the surface topography undulation of the silicon wafer adsorbed on the existing planar substrate holder is still difficult to meet the requirements of high-process lithography.

[0004] Moreover, there is currently no large-area, high-flatness precision stud-type substrate holder and its processing technology in China. Therefore, it is of great significance to develop a large-area, high-flatness precision stud-type substrate holder and its processing technology. Summary of the Invention

[0005] (I) Technical Problems to be Solved

[0006] In view of the above problems, the present disclosure provides a stud-type substrate holder and a preparation method thereof, which are used to solve technical problems such as the difficulty in controlling the surface topography undulation of the traditional substrate holder for the wafer substrate.

[0007] (II) Technical Solutions

[0008] On the one hand, the present disclosure provides a preparation method of a stud-type substrate holder, including: S1, sequentially forming a metal masking layer, an organic protective layer, and a photosensitive layer on a substrate with low surface topography undulation; S2, exposing and developing the photosensitive layer to obtain a stud-type structure; S3, sequentially etching the organic protective layer and the metal masking layer to transfer the stud-type structure to the organic protective layer and the metal masking layer; S4, using an etching solution to etch the substrate to continue to transfer the stud-type structure to the substrate, and the upper surface of the stud-type structure in the substrate maintains the initial low surface topography undulation of the substrate; S5, removing the photosensitive layer, the organic protective layer, and the metal masking layer to obtain the stud-type substrate holder.

[0009] Further, in S1, the substrate with low surface topography undulation has a difference PV between the highest and lowest points on the surface of the substrate < 20 nm, and an average value RMS of the high and low points on the surface of the substrate < 1 nm; the material of the substrate includes one of quartz, sapphire, and silicon carbide, and the diameter of the substrate is 6 inches, 8 inches, or 12 inches.

[0010] Further, the material of the metal masking layer in S1 includes one of Au, Cu, Cr, and Al, and the thickness d1 of the metal masking layer is 50 - 500 nm; the organic protective layer is an organic material resistant to acid and alkali corrosion, including one of polymethyl methacrylate, 5000 / 41 corrosion-resistant glue, and spin-coated carbon; the thickness d2 of the organic protective layer is 1 - 20 μm; the photosensitive layer is a photoresist material, and the thickness d3 of the photosensitive layer is 100 - 5000 nm.

[0011] Further, the method of lithography on the photosensitive layer in S1 includes one of ultraviolet lithography, laser direct writing lithography, and electron beam direct writing lithography.

[0012] Further, the characteristic dimension d4 of the pin-type structure in S2 is 10 - 500 μm; the periodic dimension of the pin-type structure is 0.5 - 10 mm; the pin-type structure includes one of a cylinder, a cone, and a cube structure.

[0013] Further, the method of etching the organic protective layer in S3 includes one of wet etching and oxygen plasma etching; the method of etching the metal masking layer includes one of ion beam etching, reactive ion beam etching, inductively coupled plasma etching, and wet etching.

[0014] Further, the etching solution in S4 includes one or a combination of HF, NH4F, H2SO4, HNO3, and HCl.

[0015] Further, the etching depth of the substrate in S4 is > 10 μm, and the etching time is 30 min - 180 min.

[0016] Further, removing the photosensitive layer, the organic protective layer, and the metal masking layer in S5 includes sequentially using an organic solvent and an inorganic solvent for removal.

[0017] On the other hand, the present disclosure provides a pin-type substrate holder, which is prepared according to the aforementioned preparation method of the pin-type substrate holder.

[0018] (III) Advantages

[0019] The pin - type substrate holder of the present disclosure and its preparation method process the substrate holder into an array of pin - type structures, effectively reducing the contact area between the wafer and the substrate holder, and greatly reducing the risk of difficult - to - control surface topography fluctuations caused by particle contamination on the back surface of the wafer. Moreover, the upper surface of the pin - type structure maintains the initial low surface topography of the substrate, thus ensuring the surface flatness of the wafer placed on the substrate holder. Specifically, during the process of processing the pin - type structure, through the interaction between the organic protection layer and the metal masking layer, the metal masking layer is beneficial to suppressing the potential for lateral corrosion in the organic protection layer, and the organic protection layer is beneficial to suppressing the potential for pinholes in the metal masking layer. The two complement each other, enabling the acquisition of a large - area and complete pin - type structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Schematically shows a flowchart of the preparation method of the pin - type substrate holder according to an embodiment of the present disclosure;

[0021] Figure 2 Schematically shows a schematic structural diagram after lithography of the photosensitive layer according to an embodiment of the present disclosure;

[0022] Figure 3 Schematically shows a schematic structural diagram after etching the organic protection layer according to an embodiment of the present disclosure;

[0023] Figure 4 Schematically shows a schematic structural diagram after etching the metal masking layer according to an embodiment of the present disclosure;

[0024] Figure 5 Schematically shows a schematic structural diagram after etching the substrate according to an embodiment of the present disclosure;

[0025] Figure 6 Schematically shows a schematic structural diagram of the finally obtained pin - type substrate holder according to an embodiment of the present disclosure;

[0026] Figure 7 Schematically shows a photograph of the pin - type substrate holder obtained according to Embodiment 1 of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0027] To make the objectives, technical solutions, and advantages of the present disclosure clearer and more understandable, the following further describes the present disclosure in detail with reference to specific embodiments and the accompanying drawings.

[0028] The terms used herein are merely for describing specific embodiments and are not intended to limit the present disclosure. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0029] It should be noted that if there are directional indications in the embodiments of the present disclosure, the directional indications are only used to explain the relative positional relationship, movement conditions, etc. between components in a specific posture. If the specific posture changes, the directional indications will also change accordingly.

[0030] The present disclosure provides a preparation method of a pin - type substrate holder. Please refer to Figure 1 , including: S1, sequentially forming a metal masking layer 2, an organic protective layer 3, and a photosensitive layer 4 on a substrate 1 with low surface undulation; S2, exposing and developing the photosensitive layer 4 to obtain a pin - type structure; S3, sequentially etching the organic protective layer 3 and the metal masking layer 2 to transfer the pin - type structure into the organic protective layer 3 and the metal masking layer 2; S4, using an etching solution to etch the substrate 1 to continue to transfer the pin - type structure into the substrate 1, and the upper surface of the pin - type structure in the substrate 1 maintains the initial low surface undulation of the substrate 1; S5, removing the photosensitive layer 4, the organic protective layer 3, and the metal masking layer 2 to obtain a pin - type substrate holder.

[0031] This preparation method utilizes the multi - layer structure of the photosensitive layer 4, the organic protective layer 3, and the metal masking layer 2 to transfer the pin - type structure formed in the photosensitive layer 4 layer by layer into the substrate 1, and a pin - type structure array pattern is formed in the substrate 1. Processing the substrate holder into a pin - type structure array effectively reduces the contact area between the wafer and the substrate holder, and greatly reduces the risk of uncontrollable surface undulation caused by particle contamination on the back surface of the wafer. After removing the photosensitive layer 4, the organic protective layer 3, and the metal masking layer 2, the pin - type structure array pattern in the substrate 1 is revealed, and the upper surface of the pin - type structure maintains the initial low surface undulation of the substrate 1, thus ensuring the surface flatness after the wafer is placed on the substrate holder. Through the above two aspects of reducing the contact area and maintaining the initial low surface undulation, a large - area and high - flatness pin - type substrate holder can be prepared.

[0032] Specifically, during the process of preparing the pin - type structure, there is isotropic etching when etching the organic material, that is, part of it will also be etched laterally, which makes the pin - type structure at risk of being damaged; while there is basically no lateral corrosion problem for metal materials, but due to the large particles of metal materials, pinholes are likely to appear, and the pinholes will cause defects of different sizes and shapes on the surface of the processed pin - type structure. By using the organic protective layer 3 and the metal masking layer 2 at the same time, the lateral corrosion problem existing in the organic protective layer 3 will be suppressed in the metal masking layer 2; for the pinhole problem in the metal masking layer 2, the organic protective layer 3 will cover the pinhole structure, which is beneficial to solving this pinhole hidden danger. The two complement each other to obtain a large - area and complete pin - type structure.

[0033] Based on the above embodiments, in S1, the substrate 1 with low surface topography has a peak-to-valley (PV) value of less than 20 nm between the highest and lowest points on the surface of the substrate 1, and the root mean square (RMS) value of the average of the high and low points on the surface of the substrate 1 is less than 1 nm; the material of the substrate 1 includes one of quartz, sapphire, and silicon carbide, and the diameter of the substrate 1 is 6 inches, 8 inches, or 12 inches.

[0034] Since the upper surface of the stud structure in the substrate 1 maintains the initial low surface topography of the substrate 1, the initial surface topography of the substrate 1 needs to be low enough to ensure the low surface topography of the stud structure, and further ensure the high flatness after the wafer is placed on the substrate holder. The material of the substrate 1 can be a conventional substrate material, as long as it meets the above conditions of low surface topography, it can be applied to the preparation method of the present disclosure. The present disclosure directly uses a lithography process on a large-area substrate to prepare a large-area stud-type substrate holder.

[0035] Based on the above embodiments, in S1, the material of the metal mask layer 2 includes one of Au, Cu, Cr, and Al, and the thickness d1 of the metal mask layer 2 is 50 - 500 nm; the organic protection layer 3 is an organic material resistant to acid and alkali corrosion, including one of polymethyl methacrylate (PMMA), 5000 / 41 corrosion-resistant glue, and spin-on carbon (SOC); the thickness d2 of the organic protection layer 3 is 1 - 20 μm; the photosensitive layer 4 is a photoresist material, and the thickness d3 of the photosensitive layer 4 is 100 - 5000 nm.

[0036] The metal mask layer 2 can be prepared by magnetron sputtering, thermal evaporation, and chemical vapor deposition. The material of the metal mask layer 2 is not limited to the above four, and other feasible metal materials can also be applied to the preparation method of the present disclosure; the thickness of the metal mask layer 2 in the above range has the technical effects of continuous film layer and few defects. The method of forming the organic protection layer 3 is to spin-coat the organic protection layer 3 on the surface of the metal mask layer 2. In addition to PMMA and SOC, it can also be materials such as commercial 5000 / 41 corrosion-resistant glue; the thickness of the organic protection layer 3 in the above range has the technical effect of protecting the underlying structure from being corroded to a certain depth. The method of forming the photosensitive layer 4 is to spin-coat a layer of the photosensitive layer 4 on the surface of the organic protection layer 3. The material of the photosensitive layer 4 can be Az9260 photoresist, Az3100 photoresist, or AR series photoresist; the thickness of the photosensitive layer 4 in the above range is beneficial to preparing the required stud structure.

[0037] Based on the above embodiments, as Figure 2 shown, the method of lithographing the photosensitive layer 4 in S1 includes one of ultraviolet lithography, laser direct writing lithography, and electron beam direct writing lithography.

[0038] Using lithography technology, exposure, development, and etching are performed on the photosensitive layer 4 to obtain a pin-type structure. However, the lithography method is not limited to the above three, and other feasible lithography methods can also be applied to the preparation method of the present disclosure.

[0039] Based on the above embodiments, in S2, the characteristic dimension d4 of the pin-type structure is 10 - 500 μm; the periodic dimension of the pin-type structure is 0.5 - 10 mm; the pin-type structure includes one of a cylinder, a cone, and a cube structure.

[0040] The characteristic dimension of the pin-type structure, that is, the length, width, height, or diameter of the pin-type structure, is within the range of 10 - 500 μm. The characteristic dimension of the pin-type structure should not be too small, otherwise the pin-type structure is prone to breakage. The pin-type structure can be various three-dimensional structures, not limited to the above three, and other feasible structures can also be applied to the preparation method of the present disclosure. The pin-type structure forms a pin-type structure array pattern on the upper surface of the substrate 1, and the distance between adjacent pin-type structures is within the above range, having the technical effect of effectively preventing the wafer from deforming due to gravity.

[0041] Based on the above embodiments, as Figures 3 to 4 shown, the method for etching the organic protective layer 3 in S3 includes wet etching or oxygen plasma etching; the method for etching the metal mask layer 2 includes one of ion beam etching (IBE), reactive ion etching (RIE), inductively coupled plasma etching (ICP), and wet etching.

[0042] Transfer the pin-type structure in the photosensitive layer 4 to the organic protective layer 3 by using the method of wet etching with an organic solvent or oxygen plasma etching; continue to transfer it to the metal mask layer 2 by using a dry or wet etching method, including IBE, RIE, ICP, or wet etching.

[0043] Based on the above embodiments, as Figure 5 shown, the etching solution in S4 includes one or a combination of HF, NH4F, H2SO4, HNO3, and HCl.

[0044] The etching solution is an etching solution corresponding to the material of the substrate 1. For example, when the substrate 1 is quartz, the etching solution uses a mixed solution of HF and NH4F; when the substrate 1 is sapphire, the etching solution uses an HCl solution. The etching solution is required to have a high etching rate for the substrate 1 and a low etching rate for the organic protective layer 3 and the metal mask layer 2. Wet etching is an isotropic process, and part of it will also be etched laterally.

[0045] On the basis of the above embodiments, in S4, the etching depth of the substrate 1 is > 10 μm, and the etching time is 30 min to 180 min.

[0046] The etching depth of the substrate 1 is > 10 μm, that is, the height of the stud structure is > 10 μm. If the height is less than or equal to 10 μm, there is a problem that the height of the particulate matter is relatively large, which affects the surface shape of the wafer.

[0047] On the basis of the above embodiments, as Figure 6 shown, in S5, removing the photosensitive layer 4, the organic protective layer 3, and the metal masking layer 2 includes sequentially using an organic solvent and an inorganic solvent for removal.

[0048] The photosensitive layer 4 is usually removed using an organic solvent, the metal masking layer 2 is usually removed using an inorganic solvent, and the organic protective layer 3 can be removed using an organic solvent or an inorganic solvent. After removing the above multi-layer structure, the required stud-type substrate holder is obtained.

[0049] The present disclosure also provides a stud-type substrate holder, which is prepared according to the preparation method of the foregoing stud-type substrate holder.

[0050] The stud-type substrate holder of the present disclosure has a simple preparation process. Based on micro-nano processing technology, only conventional film coating, photoresist coating, exposure, and etching processes are required to prepare a large-area and high-flatness stud-type substrate holder.

[0051] The present disclosure will be further described below through specific embodiments. In the following embodiments, the above-mentioned stud-type substrate holder and its preparation method are specifically described. However, the following embodiments are only used to illustrate the present disclosure, and the scope of the present disclosure is not limited thereto.

[0052] The stud-type substrate holder of the present disclosure and its preparation method, as Figures 2 to 6 shown, include sequentially performing the following steps:

[0053] Step 1: Select a substrate 1 with low surface topography fluctuations, where the difference PV between the highest and lowest points on the surface of the low-surface-topography-fluctuation substrate 1 is < 20 nm, and the average value RMS of the high and low points on the surface of the substrate 1 is < 1 nm;

[0054] Step 2: Prepare a metal masking layer 2 on the surface of the substrate 1, and the thickness d1 of the metal masking layer 2 is 50 to 500 nm;

[0055] Step 3: Spin-coat an organic protective layer 3 on the surface of the metal masking layer 2, and the thickness d2 of the organic protective layer 3 is 1 to 20 μm;

[0056] Step 4: Spin-coat a photosensitive layer 4 on the surface of the organic protection layer 3, where the thickness d3 of the photosensitive layer 4 is 100 - 5000 nm; this is equivalent to the above-mentioned step S1.

[0057] Step 5: Using photolithography technology, expose and develop the photosensitive layer 4 to obtain the required pin-type structure. The characteristic dimension d4 of the pin-type structure is 10 - 500 μm; control the periodic dimension of the pin-type structure to be 0.5 - 10 mm; the pin-type structure can be a cylinder, a cone, a cube, or other structures; this is equivalent to the above-mentioned step S2.

[0058] Step 6: Etch the pin-type structure obtained in Step 5, and transfer the pin-type structure in the photosensitive layer 4 to the organic protection layer 3 and the metal masking layer 2 in sequence; this is equivalent to the above-mentioned step S3.

[0059] Step 7: Corrode the substrate 1 on the basis of Step 6 to obtain a pin-type structure on the substrate 1. The corrosion depth is > 10 μm, and the corrosion time is 30 min - 180 min; this is equivalent to the above-mentioned step S4.

[0060] Step 8: Clean the substrate on the basis of Step 7 to remove the remaining photosensitive layer 4, organic protection layer 3, and metal masking layer 2, thereby obtaining a pin substrate holder structure; this is equivalent to the above-mentioned step S5.

[0061] According to the above Steps 1 - 8, the following provides 3 specific embodiments.

[0062] Embodiment 1:

[0063] In this embodiment, the processing method of a large-area and high-flatness pin-type substrate holder is as follows:

[0064] Step 11: As Figures 2 to 6 shown, the material of the substrate 1 is high-flatness quartz, with a PV value of 10 nm and an RMS value of 0.5 nm; the material of the metal masking layer 2 is Au, with a thickness of 200 nm; the organic protection layer 3 is 5000 / 41 corrosion-resistant glue, with a thickness of 10 μm; the adopted photolithography method is ultraviolet photolithography technology, the photosensitive layer 4 is Az9260 photoresist, with a film thickness of 5 μm; expose and develop the photosensitive layer 4 to obtain a pin-type structure. The diameter of the pin-type structure in the photosensitive layer 4 is 400 μm, and the periodic dimension is 2 mm.

[0065] Step 12: Realize the transfer of the pin-type structure from the photosensitive layer 4 to the organic protection layer 3 by selectively wet-etching the 5000 / 41 corrosion-resistant glue with AR300 - 74 solution; realize the transfer of the pin-type structure from the organic protection layer 3 to the metal masking layer 2 by dry IBE etching (ion beam etching).

[0066] Step 13: The substrate 1 is corroded with a mixed solution of HF:NH4F=1:1 at a temperature of 40°C. Stirring is performed while corroding to improve the uniformity of the corrosion. The corrosion time is 100 minutes.

[0067] Step 14: After etching, the substrate 1 is cleaned by sequentially using acetone ultrasonic treatment for 5 minutes, AR300-74 solution ultrasonic treatment for 5 minutes, and gold removal solution ultrasonic treatment for 5 minutes to complete the cleaning of the entire substrate. The pin-type substrate holder obtained after cleaning is as follows: Figure 7 As shown, the height of the pin-type structure is about 60 μm, and the entire pin-type substrate holder is 6 inches. Thus, the processing of the entire 6-inch quartz pin-type substrate holder is completed.

[0068] Example 2:

[0069] The specific steps of the processing method of the large-area, high-flatness pin-type substrate holder in this embodiment are as follows:

[0070] Step 21: Figures 2 to 6 As shown, the material of the substrate 1 is sapphire, with a PV value of 15nm and an RMS value of 0.8nm; the material of the metal masking layer 2 is Cr, with a thickness of 100nm; the organic protective layer 3 is PMMA material, with a thickness of 5μm; the photolithography method adopted is laser direct writing photolithography technology, and the photosensitive layer 4 is Az3100 photoresist with a film thickness of 1μm; the photosensitive layer 4 is exposed and developed to obtain a pin-type structure, and the diameter of the pin-type structure in the photosensitive layer 4 is 500μm, and the periodic distance is 3mm.

[0071] Step 22: selectively etch the PMMA organic protective layer 3 using oxygen plasma to achieve transfer of the pin-type structure from the photosensitive layer 4 to the organic protective layer 3; and use an ICP etching process to achieve transfer of the pin-type structure from the organic protective layer 3 to the Cr masking layer.

[0072] Step 23: The substrate 1 is corroded with HCl solution at a temperature of 100° C. The solution is stirred while corroding to improve the uniformity of the corrosion; the corrosion time is 120 minutes.

[0073] Step 24: The cleaning process of the substrate 1 after corrosion is to use alcohol ultrasound for 10 minutes, H2SO4 solution ultrasound for 3 minutes, and dechroming liquid ultrasound for 3 minutes in sequence to complete the cleaning of the entire substrate. After cleaning, the height of the pin-type structure is about 100μm, and the entire pin-type substrate holder is 8 inches. At this point, the processing of the entire 8-inch sapphire pin-type substrate holder is completed.

[0074] Example 3:

[0075] The specific steps of the processing method of the large-area, high-flatness pin-type substrate holder in this embodiment are as follows:

[0076] Step 31: As Figures 2 to 6 shown, the material of the substrate 1 is silicon carbide, the PV value is 12 nm, and the RMS value is 0.6 nm; the material of the metal mask layer 2 is Al, and the thickness is 400 nm; the organic protection layer 3 is made of SOC material, and the thickness is 3 μm; the lithography method used is electron beam direct writing lithography technology, the photosensitive layer 4 is PMMA electron beam photoresist, and the film thickness is 500 nm; the photosensitive layer 4 is exposed and developed to obtain a stud structure, and the diameter of the stud structure in the photosensitive layer 4 is 300 μm, and the period distance is 1 mm.

[0077] Step 32: By selectively etching the SOC organic protection layer 3 with oxygen plasma, the transfer of the stud structure from the photosensitive layer 4 to the organic protection layer 3 is realized; the ICP etching aluminum process is used to realize the transfer of the stud structure from the organic protection layer 3 to the Al mask layer.

[0078] Step 33: The substrate 1 is etched with an HF acid solution, the etching temperature is 30 °C, and stirring is carried out during etching to improve the uniformity of etching; the etching time is 180 min.

[0079] Step 34: The cleaning process of the etched substrate 1 is to ultrasonically clean with isopropanol for 2 min, soak in a mixed solution of H2SO4∶H2O2 = 3∶1 for 10 min, and ultrasonically clean with sodium hydroxide solution for 10 min to complete the cleaning of the entire substrate. After cleaning, the height of the stud structure is about 200 μm, and the entire stud substrate holder is 12 inches. Thus, the processing of the entire 12-inch silicon carbide stud substrate holder is completed.

[0080] The large-area and high-flatness stud substrate holder and its processing method of the present disclosure solve the problems that the traditional planar substrate holder cannot meet the application requirements of high-process lithography technology and the current situation of the lack of domestic stud substrate holders and their processing technologies.

[0081] The specific embodiments described above further elaborate on the purpose, technical solutions, and beneficial effects of the present disclosure. It should be understood that the above are only specific embodiments of the present disclosure and are not used to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A preparation method of a pin-type substrate holder, characterized in that, Including: S1, forming a metal masking layer (2), an organic protective layer (3), and a photosensitive layer (4) in sequence on a substrate (1) with a low surface topography undulation; in S1, for the substrate (1) with a low surface topography undulation, the difference PV between the highest and lowest points on the surface of the substrate (1) < 20 nm, and the average value RMS of the high and low points on the surface of the substrate (1) < 1 nm; S2, exposing and developing the photosensitive layer (4) to obtain a stud - type structure; S3, etching the organic protective layer (3) and the metal masking layer (2) in sequence to transfer the stud - type structure into the organic protective layer (3) and the metal masking layer (2); the metal masking layer (2) is conducive to suppressing the potential lateral corrosion in the organic protective layer (3), and the organic protective layer (3) is conducive to suppressing the pinhole potential in the metal masking layer (2); S4, using an etching solution to etch the substrate (1) to continue to transfer the stud - type structure into the substrate (1), and the upper surface of the stud - type structure in the substrate (1) maintains the initial low surface topography undulation of the substrate (1); S5, removing the photosensitive layer (4), the organic protective layer (3), and the metal masking layer (2) to obtain a stud - type substrate holder; the upper surface of the stud - type substrate holder maintains the initial low surface topography undulation of the substrate (1).

2. The manufacturing method of the stud type substrate holder according to claim 1, characterized in that, The material of the substrate (1) includes one of quartz, sapphire, and silicon carbide, and the diameter of the substrate (1) is 6 inches, 8 inches, or 12 inches.

3. The preparation method of the pin-type substrate holder according to claim 1, characterized in that, In S1, the material of the metal masking layer (2) includes one of Au, Cu, Cr, and Al, and the thickness d1 of the metal masking layer (2) is 50 - 500 nm; The organic protective layer (3) is an organic material resistant to acid and alkali corrosion, including one of polymethyl methacrylate, corrosion - resistant glue, and spin - coated carbon; the thickness d2 of the organic protective layer (3) is 1 - 20 μm; The photosensitive layer (4) is a photoresist material, and the thickness d3 of the photosensitive layer (4) is 100 - 5000 nm.

4. The preparation method of the pin - type substrate holder according to claim 1, characterized in that, In S1, the method for lithography of the photosensitive layer (4) includes one of ultraviolet lithography, laser direct writing lithography, and electron beam direct writing lithography.

5. The manufacturing method of the pin type substrate holder according to claim 4, characterized in that, In S2, the characteristic dimension d4 of the stud - type structure is 10 - 500 μm; The periodic dimension of the stud - type structure is 0.5 - 10 mm; The stud - type structure includes one of a cylinder, a cone, and a cube structure.

6. The preparation method of the pin-type substrate holder according to claim 1, characterized in that, In S3, the method for etching the organic protective layer (3) includes one of wet etching and oxygen plasma etching; The method for etching the metal masking layer (2) includes one of ion beam etching, reactive ion beam etching, inductively coupled plasma etching, and wet etching.

7. The manufacturing method of the pin - type substrate holder according to claim 1, characterized in that, In S4, the etching solution includes one or a combination of HF, NH4F, H2SO4, HNO3, and HCl.

8. The preparation method of the pin-type substrate holder according to claim 1, characterized in that, In S4, the etching depth of etching the substrate (1) > 10 μm, and the etching time is 30 min - 180 min.

9. The manufacturing method of the stud type substrate holder according to claim 1, characterized in that, Removing the photosensitive layer (4), the organic protection layer (3) and the metal mask layer (2) in the S5 includes sequentially using an organic solvent and an inorganic solvent for removal.

10. A stud type substrate retainer, characterized in that, The stud-type substrate holder is prepared by the preparation method of the stud-type substrate holder according to any one of claims 1 to 9.

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