Light emitting diode and method for manufacturing the same

Abstract

The present application discloses a light emitting diode and a method for manufacturing the same. The Al metal layer and the mixed metal layer of In and Sn are deposited between the epitaxial structure and the first ITO layer or between the first ITO layer and the second ITO layer. The Al metal layer and the mixed metal layer of In and Sn are granular structures. Through annealing, some metal elements can penetrate into the ITO layer. The reflective properties of the Al metal can reduce the absorption of light by the ITO layer, thereby appropriately increasing the thickness of the ITO layer without affecting the output of light. In addition, due to the presence of the In and Sn metals, the ITO layer and the epitaxial structure can be more closely bonded to form a good ohmic contact. Moreover, oxygen is introduced during high temperature annealing to improve the light transmission performance of the ITO layer and increase the ohmic contact between the ITO layer and the epitaxial structure, thereby reducing the voltage and improving the luminous efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a light emitting diode and a manufacturing method thereof. Background Art

[0002] Light emitting diode (LED) is a solid-state light-emitting device that converts electrical energy into light energy. It has the advantages of high luminous efficiency, low energy consumption, long life, and high environmental protection. It has long become an indispensable optoelectronic component in daily life. It has been widely used in the field of high-efficiency solid-state lighting, such as digital tubes, display screens, backlight sources, automotive lights, traffic lights, landscape lighting, etc.

[0003] At present, due to the low light extraction efficiency of LED, the external quantum efficiency is not high, so the main problem of LED is how to extract light from the inside of the semiconductor material. The most common method is to grow a current expansion layer on the top of the epitaxial layer. The current expansion layer can expand the carriers outside the electrode, so that part of the light can avoid the reflection of light by the opaque electrode. ITO film has the properties of high transmittance, low resistivity and good lateral current expansion, and is often used as the current expansion layer of LED. However, ITO film will also absorb some light, and further improvement and perfection are needed in current expansion and light extraction performance.

[0004] In the prior art, when the ITO film is in contact with the epitaxial layer, the transmittance increases as the thickness decreases, and the surface resistance also increases. However, the thickness of ITO is too thin to be applied in the existing process. Summary of the invention

[0005] In view of this, the present invention provides a light emitting diode and a method for manufacturing the same. By depositing an Al metal layer and a mixed metal layer of In and Sn between the epitaxial structure and the first ITO layer or between the first ITO layer and the second ITO layer, the absorption of light by the ITO layer can be reduced, the light transmittance of the ITO layer can be increased, and the ohmic contact between the ITO layer and the epitaxial structure can be increased, thereby reducing the voltage and improving the luminous efficiency.

[0006] In order to achieve the above object, the present invention provides the following technical solutions:

[0007] A method for manufacturing a light emitting diode, the method comprising:

[0008] providing a substrate;

[0009] forming an epitaxial structure on a surface of one side of the substrate, wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown sequentially on the substrate;

[0010] Etching away a portion of the P-GaN layer and the multi-quantum well layer by an etching technique to form a gap extending from the P-GaN layer to the N-GaN layer and exposing a portion of the surface of the N-GaN layer;

[0011] Forming a metal layer on a surface of the P-GaN layer facing away from the multi-quantum well layer, wherein the metal layer includes a first metal layer and a second metal layer;

[0012] forming a first ITO layer on a surface of the metal layer facing away from the epitaxial structure;

[0013] forming a second ITO layer on a surface of the first ITO layer facing away from the metal layer;

[0014] forming a P electrode on a surface of the second ITO layer on a side away from the first ITO layer;

[0015] forming an N electrode on the surface of the exposed portion of the N-GaN layer;

[0016] Wherein, the compactness of the first ITO layer is greater than the compactness of the second ITO layer.

[0017] Preferably, in the above-mentioned manufacturing method, the first metal layer is an Al metal layer, and the second metal layer is a mixed metal layer of In and Sn;

[0018] The Al metal layer and the mixed metal layer of In and Sn are both of granular structure, and the particle diameter is 5-20 angstroms.

[0019] Preferably, in the above-mentioned manufacturing method, the thickness of the first ITO layer is 20-100 angstroms, and the refractive index is ≥1.8.

[0020] Preferably, in the above-mentioned manufacturing method, the thickness of the second ITO layer is 100-500 angstroms, and the refractive index is ≤1.5.

[0021] Preferably, in the above-mentioned manufacturing method, after forming the first ITO layer, the metal layer and the first ITO layer are subjected to a first annealing, wherein the annealing is performed under oxygen-free conditions, the annealing temperature is 300-450° C., and the time is 5-10 min;

[0022] After forming the second ITO layer, the metal layer, the first ITO layer and the second ITO layer are subjected to a second annealing, wherein the annealing is carried out under aerobic conditions, the annealing temperature is 400-500° C., the time is 10-30 min, and the oxygen flow rate is 3-7 sccm.

[0023] Preferably, in the above-mentioned manufacturing method, after forming the second ITO layer, the metal layer, the first ITO layer and the second ITO layer are subjected to a first annealing, and aerobic conditions are used during annealing, the annealing temperature is 450-600°C, the time is 15-35min, and the oxygen flow rate is 3-7sccm.

[0024] The present invention also provides a method for manufacturing a light emitting diode, the method comprising:

[0025] providing a substrate;

[0026] forming an epitaxial structure on a surface of one side of the substrate, wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown sequentially on the substrate;

[0027] Etching away a portion of the P-GaN layer and the multi-quantum well layer by an etching technique to form a gap extending from the P-GaN layer to the N-GaN layer and exposing a portion of the surface of the N-GaN layer;

[0028] forming a first ITO layer on a surface of the P-GaN layer facing away from the multi-quantum well layer;

[0029] Forming a metal layer on a surface of the first ITO layer facing away from the epitaxial structure, wherein the metal layer includes a first metal layer and a second metal layer;

[0030] forming a second ITO layer on a surface of the metal layer facing away from the first ITO layer;

[0031] forming a P electrode on a surface of the second ITO layer on a side away from the first ITO layer;

[0032] forming an N electrode on the surface of the exposed portion of the N-GaN layer;

[0033] Wherein, the compactness of the first ITO layer is greater than the compactness of the second ITO layer.

[0034] Preferably, in the above-mentioned manufacturing method, after forming the metal layer, the first ITO layer and the metal layer are subjected to a first annealing, wherein the annealing is performed under oxygen-free conditions, the annealing temperature is 300-450° C., and the time is 5-10 min;

[0035] After forming the second ITO layer, the first ITO layer, the metal layer and the second ITO layer are subjected to a second annealing, wherein the annealing is carried out under aerobic conditions, the annealing temperature is 400-500° C., the time is 10-30 min, and the oxygen flow rate is 3-7 sccm.

[0036] Preferably, in the above-mentioned manufacturing method, after forming the second ITO layer, the first ITO layer, the metal layer and the second ITO layer are subjected to a first annealing, and aerobic conditions are used during annealing, the annealing temperature is 450-600°C, the time is 15-35min, and the oxygen flow rate is 3-7sccm.

[0037] The present invention further provides a light emitting diode manufactured by any of the manufacturing methods described above, the light emitting diode comprising:

[0038] A substrate, and an epitaxial structure, a metal layer, a first ITO layer, a second ITO layer, a P electrode and an N electrode on a surface of one side of the substrate; wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown in sequence on the substrate, and the metal layer comprises a first metal layer and a second metal layer;

[0039] The metal layer is located between the epitaxial structure and the first ITO layer, or between the first ITO layer and the second ITO layer, and the compactness of the first ITO layer is greater than the compactness of the second ITO layer.

[0040] It can be known from the above description that in the light-emitting diode and its manufacturing method provided by the technical solution of the present invention, by depositing an Al metal layer and a mixed metal layer of In and Sn between the epitaxial structure and the first ITO layer or between the first ITO layer and the second ITO layer, the Al metal layer and the mixed metal layer of In and Sn are granular structures, and by annealing, some metal elements can penetrate into the ITO layer, and the reflection property of the Al metal is utilized to reduce the absorption of light by the ITO layer, so that the thickness of the ITO layer can be appropriately increased without affecting the output of light. And because of the presence of In and Sn metals, the combination between the ITO layer and the epitaxial structure can be made tighter, forming a good ohmic contact, and the introduction of oxygen during high-temperature annealing can improve the light transmission performance of the ITO layer, increase the ohmic contact between the ITO layer and the epitaxial structure, thereby reducing the voltage and improving the luminous efficiency.

[0041] At the same time, the density of the first ITO layer is greater than that of the second ITO layer. The first ITO layer material is dense, which can better expand the current, while the second ITO layer has a loose texture and a lower refractive index, which is beneficial for the light emitted from the active area to pass through the first ITO layer and the second ITO layer. Because the gradual change of the refractive index decreases, the light extraction efficiency is increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0043] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application.

[0044] Figure 1-Figure 8 A process flow chart of a method for manufacturing a light emitting diode provided by an embodiment of the present invention;

[0045] Figure 9-Figure 16 A process flow chart of another method for manufacturing a light emitting diode provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the embodiments in the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0047] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0048] like Figure 1-Figure 8 As shown, Figure 1-Figure 8 A process flow chart of a method for manufacturing a light emitting diode provided in an embodiment of the present invention, the manufacturing method comprising:

[0049] Step S101: Figure 1 As shown, a substrate 10 is provided;

[0050] Step S102: Figure 2 As shown, an epitaxial structure 11 is formed on one side surface of the substrate 10, and the epitaxial structure 11 includes an N-GaN layer 111, a multi-quantum well layer 112 and a P-GaN layer 113 grown sequentially on the substrate 10;

[0051] Step S103: Figure 3 As shown, a portion of the P-GaN layer 113 and the multi-quantum well layer 112 are etched away by etching technology to form a gap extending from the P-GaN layer 113 to the N-GaN layer 111, and a portion of the surface of the N-GaN layer 111 is exposed;

[0052] The mask pattern can be made by using photolithography mask technology, and then the P-GaN layer 113 and the multi-quantum well layer 112 are etched by ICP etching technology to form Figure 3 Etched notch shown.

[0053] Step S104: Figure 4 and Figure 5 As shown, a metal layer 12 is formed on a surface of the P-GaN layer 113 facing away from the multi-quantum well layer 112, and the metal layer 12 includes a first metal layer 121 and a second metal layer 122;

[0054] First, Figure 4 As shown, a first metal layer 121 can be formed on a surface of the P-GaN layer 113 facing away from the multi-quantum well layer 112 by magnetron sputtering; and then Figure 5 As shown, the second metal layer 122 is formed on the surface of the first metal layer 121 which is away from the P-GaN layer 113 by magnetron sputtering.

[0055] In the embodiment of the present invention, the first metal layer 121 may be an Al metal layer, and the second metal layer 122 may be a mixed metal layer of In and Sn; the Al metal layer and the mixed metal layer of In and Sn are both granular structures, and the particle diameter may be 5-20 angstroms.

[0056] The thickness of the Al metal layer and the mixed metal layer of In and Sn may be 5-20 angstroms. It should be noted that the particle diameter and thickness of the Al metal layer and the mixed metal layer of In and Sn may be the same or different, and may be set based on actual needs.

[0057] It should be noted that before forming the metal layer 12 , it is also necessary to deposit and etch a current blocking layer (not shown in the figure) on the surface of the P-GaN layer 113 facing away from the multi-quantum well layer 112 .

[0058] Step S105: Figure 6 As shown, a first ITO layer 13 is formed on a surface of the metal layer 12 facing away from the epitaxial structure 11;

[0059] The first ITO layer 13 may be deposited on the metal layer 12 by magnetron sputtering. The thickness of the first ITO layer 13 may be 20-100 angstroms, and the refractive index may be ≥1.8.

[0060] Step S106: Figure 7 As shown, a second ITO layer 14 is formed on a surface of the first ITO layer 13 which is away from the metal layer 12;

[0061] The second ITO layer 14 may be deposited on the first ITO layer 13 by magnetron sputtering or vacuum coating. The thickness of the second ITO layer 14 may be 100-500 angstroms, the deposition rate may be 0.6-1.2 A / s, the oxygen flux may be 0.2 sccm, and the refractive index may be ≤1.5.

[0062] Step S107: Figure 8 As shown, a P electrode 15 is formed on a surface of the second ITO layer 14 which is away from the first ITO layer 13;

[0063] Step S108: Figure 8 As shown, an N electrode 16 is formed on the exposed surface of the N-GaN layer 111 .

[0064] In the embodiment of the present invention, the compactness of the first ITO layer 13 is greater than that of the second ITO layer 14, the refractive index of the first ITO layer 13 is ≥1.8, and the refractive index of the second ITO layer 14 is ≤1.5. The first ITO layer 13 is dense and can better expand the current, while the second ITO layer 14 is loose and has a lower refractive index, which is conducive to the light emitted from the active area passing through the first ITO layer 13 and the second ITO layer 14, and because the gradual change of the refractive index decreases, the light extraction efficiency can be increased.

[0065] In the embodiment of the present invention, the Al metal layer and the mixed metal layer of In and Sn are located between the epitaxial structure 11 and the first ITO layer 13. The Al, In and Sn metal elements in the metal layer are doped into the ITO layer by means of a single annealing or a double annealing. The reflective properties of the Al metal are utilized to reduce the absorption of light by the ITO layer, thereby appropriately increasing the thickness of the ITO layer without affecting the light output.

[0066] In the first method, a secondary annealing method is adopted, that is, after the metal layer 12 is deposited, the first ITO layer 13 is deposited, followed by oxygen-free annealing, and then the second ITO layer 14 is deposited, followed by oxygen annealing, as follows:

[0067] 1. After forming the first ITO layer 13, the metal layer 12 and the first ITO layer 13 are subjected to a first annealing, wherein the annealing is performed under oxygen-free conditions, the annealing temperature is 300-450° C., and the time is 5-10 min;

[0068] 2. After forming the second ITO layer 14, the metal layer 12, the first ITO layer 13 and the second ITO layer 14 are subjected to a second annealing, wherein the annealing is carried out under aerobic conditions, the annealing temperature is 400-500°C, the time is 10-30 minutes, and the oxygen flow rate is 3-7 sccm.

[0069] In this method, the first annealing (high temperature fusion) uses oxygen-free conditions, and the fusion temperature and time are lower than those of the prior art. This not only reduces the damage to the quantum wells in the epitaxial structure 11, but also after fusion, the contact tightness between the metal layer 12 and the epitaxial structure 11 is increased, thereby reducing the contact resistance. In addition, due to the increase in Al, In, and Sn metals, the number of carriers in the first ITO layer 13 is increased, thereby enhancing the conductivity of the first ITO layer 13.

[0070] In the second method, a single annealing method is adopted, that is, after the metal layer 12, the first ITO layer 13 and the second ITO layer 14 are formed in sequence, the metal layer 12, the first ITO layer 13 and the second ITO layer 14 are annealed once, and aerobic conditions are used during annealing, the annealing temperature is 450-600°C, the time is 15-35min, and the oxygen flow rate is 3-7sccm.

[0071] Compared with the first method, it reduces the annealing step by one time. After the second ITO layer 14 is deposited, only one annealing is performed, which increases the contact tightness between the epitaxial structure 11 and the metal layer 12, the first ITO layer 13, and the second ITO layer 14 at one time, reduces the contact resistance, and because of the increase of Al, In, and Sn metals, the number of carriers in the first ITO layer 13 is increased, thereby enhancing the conductivity of the first ITO layer 13.

[0072] In the embodiment of the present invention, on the one hand, due to annealing, Al, In and Sn metal elements are doped into the ITO layer, and the reflective property of Al metal is used to reduce the absorption of light by the ITO layer; secondly, due to the addition of In element, the three elements are fused at high temperature to form a mixed metal, which reduces the fusion temperature when fusing Al with the epitaxial structure 11 and the ITO layer. Because In has the function of an activator, it can effectively improve the activity of Al and reduce its melting temperature; thirdly, due to the addition of Sn element, Sn is formed during the annealing process. 4+ , can replace In 3+ , increase the carrier concentration of the ITO layer, reduce the square resistance of the ITO layer, so that the surface resistance will not increase due to the thinning of the ITO layer, and the chip voltage will not increase. And because of the presence of In and Sn elements, which are the same material as the metal in the ITO layer, the combination between the ITO layer and the epitaxial structure 11 is tighter, and the oxygen content per unit area is reduced, thereby reducing the contact resistance between the ITO layer and the epitaxial structure 11.

[0073] In addition, the metal particles that have not penetrated into the ITO layer can change the angle of the light emitted by the light-emitting layer, increase the probability of light being emitted, and increase the external quantum efficiency.

[0074] At the same time, in the present technical solution, the density of the first ITO layer 13 is greater than that of the second ITO layer 14. The material of the first ITO layer 13 is dense, which can better expand the current, while the second ITO layer 14 has a loose texture and a lower refractive index, which is beneficial for the light emitted from the active area to pass through the materials of the first ITO layer 13 and the second ITO layer 14, because the refractive index gradually decreases, thereby increasing the light extraction efficiency.

[0075] It can be seen from the above description that in the method for manufacturing a light-emitting diode provided by the technical solution of the present invention, an Al metal layer and a mixed metal layer of In and Sn are deposited between the epitaxial structure 11 and the first ITO layer 13 or between the first ITO layer 13 and the second ITO layer 14. The Al metal layer and the mixed metal layer of In and Sn are granular structures. Through annealing, some metal elements can penetrate into the ITO layer, and the reflection property of the Al metal is utilized to reduce the absorption of light by the ITO layer, so that the thickness of the ITO layer can be appropriately increased without affecting the output of light. And because of the presence of In and Sn metals, the combination between the ITO layer and the epitaxial structure can be made tighter, forming a good ohmic contact, and the introduction of oxygen during high-temperature annealing can improve the light transmittance of the ITO layer, increase the ohmic contact between the ITO layer and the epitaxial structure, thereby reducing the voltage and improving the luminous efficiency.

[0076] Based on the above embodiment, another embodiment of the present invention further provides a method for manufacturing a light emitting diode, such as Figure 9-Figure 16 As shown, Figure 9-Figure 16 This is a process flow chart of another method for manufacturing a light emitting diode according to an embodiment of the present invention. The method comprises:

[0077] Step S201: Fig. 9 As shown, a substrate 10 is provided;

[0078] Step S202: Fig.10 As shown, an epitaxial structure 11 is formed on one side surface of the substrate 10, and the epitaxial structure 11 includes an N-GaN layer 111, a multi-quantum well layer 112 and a P-GaN layer 113 grown sequentially on the substrate 10;

[0079] Step S203: Fig.11As shown, a portion of the P-GaN layer 113 and the multi-quantum well layer 112 are etched away by etching technology to form a gap extending from the P-GaN layer 113 to the N-GaN layer 111, and a portion of the surface of the N-GaN layer 111 is exposed;

[0080] The mask pattern can be made by using photolithography mask technology, and then the P-GaN layer 113 and the multi-quantum well layer 112 are etched by ICP etching technology to form Figure 3 Etched notch shown.

[0081] Step S204: Fig.12 As shown, a first ITO layer 13 is formed on a surface of the P-GaN layer 113 facing away from the multi-quantum well layer 112;

[0082] The first ITO layer 13 may be deposited on the P-GaN layer 113 by magnetron sputtering. The thickness of the first ITO layer 13 may be 20-100 angstroms, and the refractive index may be ≥1.8.

[0083] It should be noted that before forming the first ITO layer 13 , a current blocking layer (not shown in the figure) needs to be deposited and etched on the surface of the P-GaN layer 113 facing away from the multi-quantum well layer 112 .

[0084] Step S205: Fig.13 and Fig.14 As shown, a metal layer 12 is formed on a surface of the first ITO layer 13 that is away from the epitaxial structure 11, and the metal layer 12 includes a first metal layer 121 and a second metal layer 122;

[0085] First, Fig.13 As shown, a first metal layer 121 can be formed on a surface of the first ITO layer 13 facing away from the epitaxial structure 11 by magnetron sputtering; and then Fig.14 As shown, the second metal layer 122 is formed on a surface of the first metal layer 121 which is away from the first ITO layer 13 by magnetron sputtering.

[0086] In the embodiment of the present invention, the first metal layer 121 may be an Al metal layer, and the second metal layer 122 may be a mixed metal layer of In and Sn; the Al metal layer and the mixed metal layer of In and Sn are both granular structures, and the particle diameter may be 5-20 angstroms.

[0087] The thickness of the Al metal layer and the mixed metal layer of In and Sn may be 5-20 angstroms. It should be noted that the particle diameter and thickness of the Al metal layer and the mixed metal layer of In and Sn may be the same or different, and may be set based on actual needs.

[0088] Step S206: Fig.15 As shown, a second ITO layer 14 is formed on a surface of the metal layer 12 on one side away from the first ITO layer 13;

[0089] The second ITO layer 14 may be deposited on the second metal layer 122 by magnetron sputtering or vacuum coating. The thickness of the second ITO layer 14 may be 100-500 angstroms, the deposition rate may be 0.6-1.2 A / s, the oxygen flux may be 25-45 sccm, and the refractive index may be ≤1.5.

[0090] Step S207: Fig.16 As shown, a P electrode 15 is formed on a surface of the second ITO layer 14 which is away from the metal layer 12;

[0091] Step S208: Fig.16 As shown, an N electrode 16 is formed on the exposed surface of the N-GaN layer 111 .

[0092] In the embodiment of the present invention, the compactness of the first ITO layer 13 is greater than that of the second ITO layer 14, the refractive index of the first ITO layer 13 is ≥1.8, and the refractive index of the second ITO layer 14 is ≤1.5. The first ITO layer 13 is dense and can better expand the current, while the second ITO layer 14 is loose and has a lower refractive index, which is conducive to the light emitted from the active area passing through the first ITO layer 13 and the second ITO layer 14, and because the gradual change of the refractive index decreases, the light extraction efficiency can be increased.

[0093] In the embodiment of the present invention, the Al metal layer and the mixed metal layer of In and Sn are located between the first ITO layer 13 and the second ITO layer 14. The Al, In and Sn metal elements in the metal layer are doped into the ITO layer by means of a single annealing or a double annealing. The reflective properties of the Al metal are utilized to reduce the absorption of light by the ITO layer, thereby appropriately increasing the thickness of the ITO layer without affecting the light output.

[0094] In the first method, a secondary annealing method is adopted, that is, after the first ITO layer 13 is deposited, the metal layer 12 is deposited, followed by oxygen-free annealing, and then the second ITO layer 14 is deposited, followed by oxygen annealing, as follows:

[0095] 1. After forming the metal layer 12, the metal layer 12 and the first ITO layer 13 are subjected to a first annealing, wherein the annealing is performed under oxygen-free conditions, the annealing temperature is 300-450° C., and the time is 5-10 min;

[0096] 2. After forming the second ITO layer 14, the first ITO layer 13, the metal layer 12 and the second ITO layer 14 are subjected to a second annealing, wherein the annealing is carried out under aerobic conditions, the annealing temperature is 400-500°C, the time is 10-30 minutes, and the oxygen flow rate is 3-7 sccm.

[0097] In this method, the first annealing (high temperature fusion) uses oxygen-free conditions, and the fusion temperature and time are lower than those of the prior art. This not only reduces the damage to the quantum wells in the epitaxial structure 11, but also after fusion, the contact tightness between the metal layer 12 and the epitaxial structure 11 is increased, thereby reducing the contact resistance. In addition, due to the increase in Al, In, and Sn metals, the number of carriers in the first ITO layer 13 is increased, thereby enhancing the conductivity of the first ITO layer 13.

[0098] In the second method, a single annealing method is adopted, that is, after the first ITO layer 13, the metal layer 12 and the second ITO layer 14 are formed in sequence, the metal layer 12, the first ITO layer 13 and the second ITO layer 14 are annealed once, and aerobic conditions are used during annealing, the annealing temperature is 450-600°C, the time is 15-35min, and the oxygen flow rate is 3-7sccm.

[0099] Compared with the first method, it reduces the annealing step by one time. After the second ITO layer 14 is deposited, only one annealing is performed, which increases the contact tightness between the epitaxial structure 11 and the metal layer 12, the first ITO layer 13, and the second ITO layer 14 at one time, reduces the contact resistance, and because of the increase of Al, In, and Sn metals, the number of carriers in the first ITO layer 13 is increased, thereby enhancing the conductivity of the first ITO layer 13.

[0100] In the embodiment of the present invention, on the one hand, due to annealing, Al, In and Sn metal elements are doped into the ITO layer, and the reflective property of Al metal is used to reduce the absorption of light by the ITO layer; secondly, due to the addition of In element, the three elements are fused at high temperature to form a mixed metal, which reduces the fusion temperature when fusing Al with the epitaxial structure 11 and the ITO layer. Because In has the function of an activator, it can effectively improve the activity of Al and reduce its melting temperature; thirdly, due to the addition of Sn element, Sn is formed during the annealing process. 4+ , can replace In 3+ , increase the carrier concentration of the ITO layer, reduce the square resistance of the ITO layer, so that the surface resistance will not increase due to the thinning of the ITO layer, and the chip voltage will not increase. And because of the presence of In and Sn elements, which are the same material as the metal in the ITO layer, the combination between the ITO layer and the epitaxial structure 11 is tighter, and the oxygen content per unit area is reduced, thereby reducing the contact resistance between the ITO layer and the epitaxial structure 11.

[0101] In addition, the metal particles that have not penetrated into the ITO layer can change the angle of the light emitted by the light-emitting layer, increase the probability of light being emitted, and increase the external quantum efficiency.

[0102] Based on the above embodiment, another embodiment of the present invention further provides a light emitting diode, such as Figure 8 or Fig.16 As shown, the light emitting diode comprises:

[0103] A substrate 10, and an epitaxial structure 11, a metal layer 12, a first ITO layer 13, a second ITO layer 14, a P electrode 15, and an N electrode 16 on a surface of one side of the substrate 10; wherein the epitaxial structure 11 includes an N-GaN layer 111, a multi-quantum well layer 112, and a P-GaN layer 113 grown in sequence on the substrate 10, and the metal layer 12 includes a first metal layer and a second metal layer;

[0104] The metal layer 12 is located between the epitaxial structure 11 and the first ITO layer 13 , or between the first ITO layer 13 and the second ITO layer 14 , and the compactness of the first ITO layer 13 is greater than the compactness of the second ITO layer 14 .

[0105] In the embodiment of the present invention, the first ITO layer 13 is dense in material and can better expand the current, while the second ITO layer 14 is loose in texture and has a lower refractive index, which is beneficial for the light emitted from the active area to pass through the materials of the first ITO layer 13 and the second ITO layer 14. After that, the refractive index gradually decreases, thereby increasing the light extraction efficiency.

[0106] It can be known from the above description that in the light-emitting diode and its manufacturing method provided by the technical solution of the present invention, an Al metal layer and a mixed metal layer of In and Sn are deposited between the epitaxial structure 11 and the first ITO layer 13 or between the first ITO layer 13 and the second ITO layer 14. The Al metal layer and the mixed metal layer of In and Sn are granular structures. Through annealing, some metal elements can penetrate into the ITO layer, and the reflection property of the Al metal is used to reduce the absorption of light by the ITO layer, so that the thickness of the ITO layer can be appropriately increased without affecting the output of light. And because of the presence of In and Sn metals, the combination between the ITO layer and the epitaxial structure can be made tighter, forming a good ohmic contact, and the introduction of oxygen during high-temperature annealing can improve the light transmittance of the ITO layer, increase the ohmic contact between the ITO layer and the epitaxial structure, thereby reducing the voltage and improving the luminous efficiency.

[0107] The present invention can be applied to various thicknesses of the ITO layer, because the introduction of the combined metal layer will not increase the surface resistance and chip voltage due to the thinning of the ITO layer. At the same time, the reflective performance of Al can reduce the absorption of light by the ITO layer, so that the thickness of the ITO layer can be appropriately increased without affecting the light output.

[0108] The various embodiments in this specification are described in a progressive, parallel, or progressive and parallel manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referenced to each other.

[0109] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.

[0110] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for manufacturing a light emitting diode, characterized in that: The production method comprises: providing a substrate; forming an epitaxial structure on a surface of one side of the substrate, wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown sequentially on the substrate; Etching away a portion of the P-GaN layer and the multi-quantum well layer by an etching technique to form a gap extending from the P-GaN layer to the N-GaN layer and exposing a portion of the surface of the N-GaN layer; A metal layer is formed on a surface of the P-GaN layer on a side away from the multi-quantum well layer, the metal layer comprising a first metal layer and a second metal layer; the first metal layer is an Al metal layer, and the second metal layer is a mixed metal layer of In and Sn; the Al metal layer and the mixed metal layer of In and Sn are both granular structures, and the particle diameter is 5-20 angstroms; forming a first ITO layer on a surface of the metal layer facing away from the epitaxial structure; forming a second ITO layer on a surface of the first ITO layer facing away from the metal layer; forming a P electrode on a surface of the second ITO layer on a side away from the first ITO layer; forming an N electrode on the surface of the exposed portion of the N-GaN layer; Wherein, the compactness of the first ITO layer is greater than the compactness of the second ITO layer; After forming the first ITO layer, performing a first annealing on the metal layer and the first ITO layer, wherein the annealing is performed under oxygen-free conditions; After forming the second ITO layer, performing a second annealing on the metal layer, the first ITO layer and the second ITO layer, wherein the annealing is performed under oxygen conditions; Alternatively, after forming the second ITO layer, the metal layer, the first ITO layer and the second ITO layer are subjected to a first annealing, and oxygen conditions are used during the annealing.

2. The method according to claim 1, characterized in that: The thickness of the first ITO layer is 20-100 angstroms, and the refractive index is ≥1.

8.

3. The method according to claim 1, characterized in that: The thickness of the second ITO layer is 100-500 angstroms, and the refractive index is ≤1.

5.

4. The method according to claim 1, characterized in that: After forming the first ITO layer, performing a first annealing at a temperature of 300-450° C. for 5-10 minutes; After forming the second ITO layer, a second annealing is performed at a temperature of 400-500° C., a time of 10-30 min, and an oxygen flow rate of 3-7 sccm.

5. The method according to claim 1, characterized in that: After forming the second ITO layer, the first annealing is performed at a temperature of 450-600° C., a time of 15-35 min, and an oxygen flow rate of 3-7 sccm.

6. A method for manufacturing a light emitting diode, characterized in that: The production method comprises: providing a substrate; forming an epitaxial structure on a surface of one side of the substrate, wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown sequentially on the substrate; Etching away a portion of the P-GaN layer and the multi-quantum well layer by an etching technique to form a gap extending from the P-GaN layer to the N-GaN layer and exposing a portion of the surface of the N-GaN layer; forming a first ITO layer on a surface of the P-GaN layer facing away from the multi-quantum well layer; A metal layer is formed on a surface of the first ITO layer on a side away from the epitaxial structure, wherein the metal layer includes a first metal layer and a second metal layer; the first metal layer is an Al metal layer, and the second metal layer is a mixed metal layer of In and Sn; the Al metal layer and the mixed metal layer of In and Sn are both granular structures, and the diameter of the granules is 5-20 angstroms; forming a second ITO layer on a surface of the metal layer facing away from the first ITO layer; forming a P electrode on a surface of the second ITO layer on a side away from the first ITO layer; forming an N electrode on the surface of the exposed portion of the N-GaN layer; Wherein, the compactness of the first ITO layer is greater than the compactness of the second ITO layer; After the metal layer is formed, the first ITO layer and the metal layer are subjected to a first annealing, and an oxygen-free condition is used during the annealing; After forming the second ITO layer, performing a second annealing on the first ITO layer, the metal layer and the second ITO layer, wherein the annealing is performed under oxygen conditions; Alternatively, after forming the second ITO layer, the first ITO layer, the metal layer and the second ITO layer are subjected to a first annealing, and oxygen conditions are used during the annealing.

7. The manufacturing method according to claim 6, characterized in that: After forming the metal layer, performing a first annealing at a temperature of 300-450° C. for 5-10 minutes; After forming the second ITO layer, a second annealing is performed at a temperature of 400-500° C., a time of 10-30 min, and an oxygen flow rate of 3-7 sccm.

8. The manufacturing method according to claim 6, characterized in that: After forming the second ITO layer, the first annealing is performed at a temperature of 450-600° C., a time of 15-35 min, and an oxygen flow rate of 3-7 sccm.

9. A light emitting diode manufactured by the manufacturing method according to any one of claims 1 or 6, characterized in that: The light emitting diode comprises: A substrate, and an epitaxial structure, a metal layer, a first ITO layer, a second ITO layer, a P electrode and an N electrode on a surface of one side of the substrate; wherein the epitaxial structure comprises an N-GaN layer, a multi-quantum well layer and a P-GaN layer grown in sequence on the substrate, and the metal layer comprises a first metal layer and a second metal layer; The metal layer is located between the epitaxial structure and the first ITO layer, or between the first ITO layer and the second ITO layer, and the compactness of the first ITO layer is greater than the compactness of the second ITO layer.

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