A resolver vadc sampling signal processing method and model

By setting the sampling timing of the VADC and DMA redirection, and combining it with the DSADC of the AURIX chip to generate a sine wave excitation signal, accurate acquisition and processing of the rotary transformer signal is achieved. This solves the problem of inaccurate timing in the existing technology, improves decoding accuracy, and reduces the cost of the hardware decoding chip.

CN115459773BActive Publication Date: 2026-04-14JEE AUTOMATION EQUIP SHANGHAI CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-30
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Existing technologies have failed to effectively address the timing accuracy issues of VADC methods in rotary transformer signal processing, particularly during signal sampling and processing, leading to insufficient decoding accuracy.

Method used

By setting the sampling trigger time of VADC and the execution of the sampling interrupt task, combined with the initial position of DMA transfer redirection, the timing consistency of signal acquisition is ensured. A fixed frequency sine wave excitation signal is generated using the DSADC of the AURIX chip. The Sin+, Sin- and Cos+, Cos- signals output by the rotary transformer are acquired using VADC, and differential processing and integration are performed to generate outer envelope data.

Benefits of technology

It improves the accuracy of rotary transformer signal processing, ensures the precision of angle and rotation speed calculations, reduces the cost of hard decoding chips, and improves the reliability of signal processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of sensors, in particular to a resolver VADC sampling signal processing method and model, which are used to solve the problem that the accuracy of signal processing, especially in the timing aspect, cannot be guaranteed for how the VADC method samples and processes data. The application sets the sampling trigger time of the VADC, the execution of the sampling interrupt task trigger and the initial position of the DMA carrying redirection, so that the timing of the three is kept consistent, thereby guaranteeing the accuracy of the angle and the rotational speed signal calculated therefrom and the accuracy of the torque estimation.
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Description

Technical Field

[0001] This invention relates to the field of sensor technology, and in particular to a method and model for processing sampling signals of a VADC (Versatile Analog-to-Digital Converter). Background Technology

[0002] A rotary transformer is a sensor used in the motor drive system of new energy vehicles to measure the motor speed and position in real time. The accuracy of its signal is crucial for motor control and torque estimation. The working principle of a rotary transformer is basically similar to that of a conventional transformer. The difference lies in the fact that the primary and secondary windings of a conventional transformer are relatively fixed, so the ratio of output voltage to input voltage is constant. In contrast, the primary and secondary windings of a rotary transformer change relative to the rotor's angular displacement. Therefore, the magnitude of its output voltage varies with the rotor's angular displacement. The voltage amplitude of the output winding has a sinusoidal or cosine function relationship with the rotor angle, or maintains a certain proportional relationship, or has a linear relationship with the angle within a certain angle range. Rotary transformers can be used to transmit angle or electrical signals in synchronous and digital servo systems; in calculation devices, they can be used for function calculation, hence they are also called solvers.

[0003] Besides the accuracy of the sensor itself, the decoding accuracy of the resolver is even more important. Traditional resolver decoding generally uses dedicated resolver decoding chips, which are usually expensive. Therefore, using the chip's own VADC port to acquire the resolver's Sin and Cos signals, and then performing software decoding through signal processing, can effectively replace hardware decoding solutions.

[0004] The prior art publication number CN202011024398.4 discloses "A Resolver Soft Decoding Method that Meets Functional Safety Requirements", which involves acquiring the resolver output signal and performing VADC soft decoding and resolver soft decoding on the resolver output signal; and verifying the results of VADC soft decoding and resolver soft decoding.

[0005] Existing technologies primarily describe how, in functional safety development, a carrier signal is first generated using GTM, and then the feedback signal from the resolver is processed and verified using both DSADC and VADC sampling methods to achieve redundancy verification and ensure the reliability of resolver sampling. However, this method does not explain how the VADC method samples and processes the data to ensure the accuracy of signal processing, especially in terms of timing. Summary of the Invention

[0006] To address the aforementioned problems, this invention provides a method and model for processing VADC sampling signals from a rotary transformer, which solves the problem that the VADC method cannot guarantee the accuracy of signal processing, especially in terms of timing, when sampling and processing data.

[0007] A method for processing VADC sampling signals from a rotary transformer, the method comprising:

[0008] A sinusoidal signal is input to the rotary transformer as an excitation signal, and the rotary transformer outputs sinusoidal signals Sin+, Sin- and Cos+, Cos- with a 90-degree phase difference.

[0009] The VADC acquisition task acquires and aligns the Sin+, Sin-, Cos+, and Cos- signals output from the rotary transformer to obtain aligned data. The aligned data is then differentially processed and integrated to obtain the outer envelope data. The outer envelope data is then transmitted to the application layer for angle and speed calculation.

[0010] Furthermore, the excitation signal is a sine wave of a fixed frequency generated by the DSADC of the AURIX chip.

[0011] Furthermore, VADC acquisition uses GTMTOM to set two periods: short-period sampling and long-period sampling.

[0012] Furthermore, the short-cycle sampling acquired by the VADC is triggered by setting the timing through GTMTOM0-2, while TOM0-1 is used as an offset reference to adjust the short-cycle sampling time, and one data is acquired every short-cycle interval.

[0013] The long-cycle sampling acquired by the VADC is set through the GTMTOM2-13. The sampling interrupt is triggered once every long-cycle interval. The long-cycle interval is consistent with the length of one cycle of the excitation signal. The TOM2-12 is used as an offset reference to adjust the long-cycle sampling trigger time.

[0014] Furthermore, the process of aligning the Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer via the VADC acquisition task, then differentially processing the aligned data and integrating it to obtain the outer envelope data, specifically includes:

[0015] The Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer are acquired by the VADCSin / Cos acquisition module to obtain sampled data. The sampled data is then transferred to the designated memory and stored in array form by the DMA transfer module.

[0016] The first sampling task of long-cycle sampling performs a DMA redirection, that is, the DMA transfer of this cycle starts recording from array 0. At the same time, the quadrant of the initial resolver position is determined according to the values ​​in the registers corresponding to the Sin+, Sin- and Cos+, Cos- signals acquired by the DSADC excitation retrieval module.

[0017] In the second long-cycle sampling task, the Sin+, Sin- and Cos+, Cos- signals transferred by DMA are read, and combined with the quadrant of the initial resolver position, the starting zero point of the sine waveform is found to be the i-th point, where i is a positive integer; the offset reference of long-cycle sampling is set to i multiplied by the short-cycle interval, so that the starting point of the long-cycle sampling task is aligned with the starting point of the actual sine signal zero.

[0018] After setting the offset reference for long-period sampling, perform another DMA redirection at the start of the long-period sampling task so that the first value of the Sin+, Sin- and Cos+, Cos- signals transferred by DMA to the array is also aligned with the zero starting point of the actual waveform.

[0019] The values ​​in the array are processed within a long period of sampling. The Sin+, Sin- and Cos+, Cos- signals are subtracted respectively to obtain a difference result array. Then, the last 16 values ​​of the difference result array are positiveened to obtain the integral result as the outer envelope data.

[0020] A VADC sampling signal processing model for a rotary transformer includes: an input unit and a processing unit;

[0021] The input unit is used to input a sinusoidal signal as an excitation signal to the rotary transformer. The rotary transformer outputs sinusoidal signals Sin+, Sin- and Cos+, Cos- signals with a 90-degree phase difference.

[0022] The processing unit is used to acquire and align the Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer through the VADC acquisition task to obtain aligned data. The aligned data is then differentially processed and integrated to obtain the outer envelope data. The outer envelope data is then transmitted to the application layer for angle and speed calculation.

[0023] Furthermore, the excitation signal is a sine wave of a fixed frequency generated by the DSADC of the AURIX chip.

[0024] Furthermore, VADC acquisition uses GTMTOM to set two periods: short-period sampling and long-period sampling.

[0025] Furthermore, the short-cycle sampling acquired by the VADC is triggered by setting the timing through GTMTOM0-2, while TOM0-1 is used as an offset reference to adjust the short-cycle sampling time, and one data is acquired every short-cycle interval.

[0026] The long-cycle sampling acquired by the VADC is set through the GTMTOM2-13. The sampling interrupt is triggered once every long-cycle interval. The long-cycle interval is consistent with the length of one cycle of the excitation signal. The TOM2-12 is used as an offset reference to adjust the long-cycle sampling trigger time.

[0027] Furthermore, the processing unit is specifically used for:

[0028] The Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer are acquired by the VADCSin / Cos acquisition module to obtain sampled data. The sampled data is then transferred to the designated memory and stored in array form by the DMA transfer module.

[0029] The first sampling task of long-cycle sampling performs a DMA redirection, that is, the DMA transfer of this cycle starts recording from array 0. At the same time, the quadrant of the initial resolver position is determined according to the values ​​in the registers corresponding to the Sin+, Sin- and Cos+, Cos- signals acquired by the DSADC excitation retrieval module.

[0030] In the second long-cycle sampling task, the Sin+, Sin- and Cos+, Cos- signals transferred by DMA are read, and combined with the quadrant of the initial resolver position, the starting zero point of the sine waveform is found to be the i-th point, where i is a positive integer; the offset reference of long-cycle sampling is set to i multiplied by the short-cycle interval, so that the starting point of the long-cycle sampling task is aligned with the starting point of the actual sine signal zero.

[0031] After setting the offset reference for long-period sampling, perform another DMA redirection at the start of the long-period sampling task so that the first value of the Sin+, Sin- and Cos+, Cos- signals transferred by DMA to the array is also aligned with the zero starting point of the actual waveform.

[0032] The values ​​in the array are processed within a long period of sampling. The Sin+, Sin- and Cos+, Cos- signals are subtracted respectively to obtain a difference result array. Then, the last 16 values ​​of the difference result array are positiveened to obtain the integral result as the outer envelope data.

[0033] This invention ensures the consistency of timing among the VADC sampling trigger time, the sampling interrupt task trigger execution, and the DMA transport redirection initial position by setting the sampling trigger time, thereby guaranteeing the accuracy of the calculated angle and speed signals and the accuracy of torque estimation.

[0034] This invention utilizes the reference signal of GTMTOM and the DMA settings to calibrate and align the interrupt of VADC data processing with the actual waveform signal, thereby ensuring the accuracy of the acquired data in timing and guaranteeing the accurate acquisition of sine and cosine signals in resolver soft decoding technology.

[0035] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures pointed out in the description, claims, and drawings. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a flowchart of an embodiment of the present invention.

[0038] Figure 2 This is a schematic diagram of each module in an embodiment of the present invention.

[0039] Figure 3 This is a schematic diagram of the timing processing of VADC sampling in an embodiment of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] In the field of new energy vehicles, resolvers are sensors used in the motor drive system to measure motor speed and position in real time. The accuracy of their signals is crucial for motor control and torque estimation. Besides the accuracy of the sensor itself, the decoding accuracy of the resolver is even more important. Traditional resolver decoding typically uses dedicated resolver decoding chips, which are generally expensive. Therefore, using the chip's own VADC port to acquire the resolver's Sin+, Sin-, Cos+, and Cos- signals, and then performing software decoding through signal processing, can effectively replace hardware decoding solutions.

[0042] Existing technologies primarily describe how, in functional safety development, a carrier signal is first generated using GTM, and then the feedback signal from the resolver is processed and verified using both DSADC and VADC sampling methods to achieve redundancy verification and ensure the reliability of resolver sampling. However, this method does not explain how the VADC method samples and processes the data to ensure the accuracy of signal processing, especially in terms of timing.

[0043] To this end, the present invention proposes a method and model for processing VADC sampling signals of a rotary transformer, including a method for processing VADC sampling signals of a rotary transformer and a model for processing VADC sampling signals of a rotary transformer.

[0044] This invention ensures the consistency of timing among the VADC sampling trigger time, the sampling interrupt task trigger execution, and the DMA transport redirection initial position by setting the sampling trigger time, thereby guaranteeing the accuracy of the calculated angle and speed signals and the accuracy of torque estimation.

[0045] Firstly, such as Figure 1 As shown, the present invention provides a method for processing VADC sampling signals of a rotary transformer, the method comprising:

[0046] Step S101: Input a sine wave signal as an excitation signal to the rotary transformer, and the rotary transformer outputs sine wave signals Sin+, Sin- and Cos+, Cos- with a phase difference of 90 degrees.

[0047] Step S102: The Sin+, Sin- and Cos+, Cos- signals output by the rotary transformer are acquired and aligned by the VADC acquisition task to obtain the alignment data.

[0048] Step S103: Differential processing aligns the data and then integrates to obtain the outer envelope data, and transmits the outer envelope data to the application layer for angle and rotation speed calculation.

[0049] In practice, the VADC port of the chip itself is used to acquire the Sin and Cos signals of the rotary transformer. Software processing of the signals for software decoding can effectively replace the hardware decoding scheme. Using software decoding to replace hardware decoding significantly reduces equipment costs.

[0050] By setting the VADC acquisition trigger time, the acquisition task trigger execution, and the DMA transport redirection initial position, the timing of these three elements is kept consistent, thereby ensuring the accuracy of the calculated angle and speed signals, and consequently, the accuracy of the torque estimation.

[0051] In this embodiment, the excitation signal of the rotary transformer is a fixed-frequency sine wave generated by the DSADC (DeltaSigma Analog-to-Digital Converter) of the AURIX chip.

[0052] In practice, the fixed frequency is 9.76kHz. This frequency affects the number of samples corresponding to a sine wave. If the frequency is too high, the number of samples will be too low, affecting the accuracy of the waveform. If the frequency is too low, the integral value of the outer envelope of the differential signals that make up Sin+, Sin- and Cos+, Cos- will be too low, affecting the accuracy of decoding at high speed. This frequency is a reasonable value that the chip has found to be feasible through practical experience.

[0053] The VADC, DMA, and GTMTOM mentioned in this invention are all based on the AURIX chip. The advantage of this chip is that it has a dedicated support module such as DSADC for resolver soft decoding, and it is the most commonly used chip in the field of motor control.

[0054] In this embodiment, VADC acquisition uses GTMTOM to set two periods: short-period sampling and long-period sampling.

[0055] In this embodiment, the short-cycle sampling acquired by the VADC is triggered by setting the timing through GTMTOM0-2, while TOM0-1 is used as an offset reference to adjust the short-cycle sampling time, and one data is acquired every short-cycle interval.

[0056] The long-cycle sampling acquired by the VADC is set through the GTMTOM2-13. The sampling interrupt is triggered once every long-cycle interval. The long-cycle interval is consistent with the length of one cycle of the excitation signal. The TOM2-12 is used as an offset reference to adjust the long-cycle sampling trigger time.

[0057] In practice, the short-cycle interval is 3.2us and the long-cycle interval is 102.4us. The short-cycle sampling of the VADC is triggered by setting the timing through GTMTOM0-2, while TOM0-1 serves as an offset reference to adjust the sampling time. One data point is collected every 3.2us, and a sine wave is collected at 32 points for a total period of 102.4us.

[0058] The long-cycle sampling acquired by the VADC is triggered by setting the resolver sampling interrupt to a timer of 102.4us using the TOM2-13, which is consistent with an excitation sine wave. The TOM2-12 can be used as an offset reference to adjust the interrupt trigger time.

[0059] The sampling period corresponds to the sampling frequency of 9.76kHz. 1000000 / (9.76*1000)=102.4us, so one sine cycle is 102.4us. A suitable VADC sampling frequency needs to be selected so that the number of points sampled in one cycle is even, which is convenient for the negative half-wave to be flipped for integration. Therefore, 32 points are selected, that is, VADC samples one data point every 3.2us.

[0060] In this embodiment, the Sin+, Sin- and Cos+, Cos- signals output by the rotary transformer are acquired by the VADC Sin / Cos acquisition module to obtain sampling data, and then the sampling data is transferred to the designated memory and stored in array form by the DMA transfer module.

[0061] The first sampling task of long-cycle sampling performs a DMA redirection, that is, the DMA transfer of this cycle starts recording from array 0. At the same time, the quadrant of the initial resolver position is determined according to the values ​​in the registers corresponding to the Sin+, Sin- and Cos+, Cos- signals acquired by the DSADC excitation retrieval module.

[0062] During the second long-cycle sampling task, the Sin+, Sin- and Cos+, Cos- signals transferred by DMA are read, and combined with the quadrant of the initial resolver position, the starting zero point of the sine waveform is found to be the i-th point, where i is a positive integer; the offset reference of the long-cycle sampling is set to i*3.2us so that the start of the long-cycle sampling task and the actual zero point of the sine signal can be aligned.

[0063] After setting the offset reference for long-period sampling, perform another DMA redirection at the start of the long-period sampling task so that the first value of the Sin+, Sin- and Cos+, Cos- signals transferred by DMA to the array can also be aligned with the zero starting point of the actual waveform.

[0064] The values ​​in the array are processed within a long period of sampling. The Sin+, Sin- and Cos+, Cos- signals are subtracted to obtain the difference results. Then, the last 16 values ​​of the array are positive to obtain the integral result as the outer envelope data. The outer envelope data is then transmitted to the application layer for angle and speed calculation.

[0065] In practice, the reference signal of GTMTOM and the DMA settings are used to calibrate and align the interrupt of VADC data processing with the actual waveform signal, ensuring the accuracy of the acquired data in terms of timing. This guarantees the accurate acquisition of sine and cosine signals in the resolver soft decoding technology, the accuracy of the angle and speed signals calculated from them, and the accuracy of torque estimation.

[0066] Secondly, the present invention provides a VADC sampling signal processing model for a rotary transformer, including an input unit and a processing unit;

[0067] The input unit is used to input a sinusoidal signal as an excitation signal to the rotary transformer. The rotary transformer outputs sinusoidal signals Sin+, Sin- and Cos+, Cos- signals with a 90-degree phase difference.

[0068] The processing unit is used to acquire and align the Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer through the VADC acquisition task to obtain aligned data. The aligned data is then differentially processed and integrated to obtain the outer envelope data. The outer envelope data is then transmitted to the application layer for angle and speed calculation.

[0069] In specific implementation, the VADC sampling signal processing model for a rotary transformer and the VADC sampling signal processing method for a rotary transformer are implemented one-to-one, and will not be described in detail here.

[0070] To enable those skilled in the art to better understand the present invention, the principles of the present invention are explained below in conjunction with the accompanying drawings:

[0071] This application proposes a VADC sampling motor resolver signal processing algorithm: the physical signals of Sin+, Sin- and Cos+, Cos- signals fed back by the resolver are acquired by the VADC module, converted into digital signals, and the results are transferred to a designated memory area via DMA. The relevant signals are processed by an interrupt task, integrated, and the corresponding angle and speed are calculated.

[0072] The principle is as follows: The AURIX chip's DSADC can emit a sine wave signal, which is processed by the circuit and then input into the rotary transformer. The rotary transformer feeds back sine wave signals Sin+, Sin- and Cos+, Cos- with a 90° phase difference. The Sin+, Sin- and Cos+, Cos- signals are acquired by the VADC and then triggered to be transferred to the designated memory by DMA. The acquisition task performs differential processing on the signals to obtain the Sin / Cos differential signal. The Sin / Cos differential signal is integrated to obtain the outer envelope, and the outer envelope data is transmitted to the application layer for processing to calculate the angle and rotation speed.

[0073] Each module, such as Figure 2 As shown, the DSADC excitation generation module outputs a 9.76kHz sine wave as an excitation signal to the rotary transformer via excitation + and excitation -. After receiving the excitation signal, the rotary transformer outputs Sin+, Sin- and Cos+, Cos- signals.

[0074] The VADCSin / Cos acquisition module acquires Sin+, Sin-, Cos+, and Cos- signals, and then obtains Sin result arrays and Cos result arrays according to the sampling interval. The sampling interval is set by the timing trigger via GMTOM0-2, while TOM0-1 serves as a reference to adjust the sampling time. One data point is acquired every 3.2µs, and a sine wave is acquired at 32 points for a total period of 102.4µs.

[0075] The DMA transfer module continuously transfers 32 data points each of the Sin+, Sin- and Cos+, Cos- signals acquired by the VADCSin / Cos acquisition module to the corresponding arrays of the Sin+, Sin- / Cos+, Cos- result storage units.

[0076] The resolver sampling interrupt is set to a 102.4us timer interrupt using GTMTOM2-13, which is consistent with an excitation sine wave. The interrupt trigger time can be adjusted using TOM2-12 as a reference.

[0077] The Sin+, Sin- and Cos+, Cos- signals output by the resolver are acquired by the DSADC excitation acquisition module. The acquisition results are stored in the Sin register SDCAP and the Cos register SDCAP. The initial position quadrant of the resolver is determined by the acquisition results, and the quadrant result is output.

[0078] Timing processing of VADC sampling is as follows: Figure 3 As shown, to ensure data alignment, a DMA redirection is performed during the first task of the 102.4us interrupt. This means that the DMA transfer in this cycle is recorded starting from array 0, and the quadrant of the current initial resolver position is determined based on the values ​​in the registers corresponding to the Sin+, Sin-, Cos+, and Cos- signals. In the next 102.4us interrupt, the Sin+, Sin-, Cos+, and Cos- signals transferred by the DMA are read, and the starting zero point of the sine waveform is found as the i-th point. The interrupt reference of 102.4us is set to i*3.2us so that the interrupt start and the actual zero point of the sine signal can be aligned. After setting the above values, another DMA redirection is performed at the start of the next 102.4us interrupt so that the first value of the DMA transfer of the Sin+, Sin-, Cos+, and Cos- signals to the array can also be aligned with the zero point of the actual waveform.

[0079] Within the 102.4us interrupt, the values ​​in the array are processed. The difference results are obtained by subtracting the Sin+, Sin- and Cos+, Cos- signals respectively. Then, the last 16 values ​​of the array are positive to obtain the integral result, which is used as the outer envelope data of the resolver soft decoder.

[0080] The data is passed to the application layer angle and speed calculation module for angle and speed calculation.

[0081] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for processing a resolver VADC sampling signal, characterized in that, The method includes: A sinusoidal signal is input to the rotary transformer as an excitation signal, and the rotary transformer outputs sinusoidal signals Sin+, Sin- and Cos+, Cos- with a 90-degree phase difference. The Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer are acquired and aligned by the VADC acquisition task to obtain aligned data. The aligned data is then differentially processed and integrated to obtain the outer envelope data. The outer envelope data is then transmitted to the application layer for angle and rotational speed calculation. VADC acquisition uses GTM TOM to set two periods: short-period sampling and long-period sampling. The short-cycle sampling acquired by VADC is triggered by setting the timing through GTM TOM0-2, while TOM0-1 is used as an offset reference to adjust the short-cycle sampling time, and one data is acquired every short-cycle interval. The long-cycle sampling acquired by VADC is set through GTM TOM 2-13. The sampling interrupt is triggered once every long cycle interval. The long cycle interval is consistent with the length of one cycle of the excitation signal. TOM 2-12 is used as an offset reference to adjust the long-cycle sampling trigger time. After aligning the Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer using the VADC acquisition task, the aligned data is differentially processed and then integrated to obtain the outer envelope data, specifically including: The Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer are acquired by the VADC Sin / Cos acquisition module to obtain sampled data. The sampled data is then transferred to the designated memory and stored in array form by the DMA transfer module. The first sampling task of long-cycle sampling performs a DMA redirection, that is, the DMA transfer of this cycle starts recording from array 0. At the same time, the quadrant of the initial resolver position is determined according to the values ​​in the registers corresponding to the Sin+, Sin- and Cos+, Cos- signals acquired by the DSADC excitation retrieval module. During the second long-cycle sampling task, the Sin+, Sin- and Cos+, Cos- signals transferred by DMA are read, and combined with the quadrant of the initial resolver position, the starting zero point of the resolver output sine wave is found to be the i-th point, where i is a positive integer; the offset reference of long-cycle sampling is set to i multiplied by the short-cycle interval, so that the start of the long-cycle sampling task is aligned with the zero point of the resolver output sine wave. After setting the offset reference for long-period sampling, perform another DMA redirection at the start of the long-period sampling task so that the first value of the Sin+, Sin- and Cos+, Cos- signals that the DMA moves to the array is also aligned with the zero starting point of the sine wave output by the rotary transformer. The values ​​in the array are processed within a long period of sampling. The Sin+, Sin- and Cos+, Cos- signals are subtracted respectively to obtain a difference result array. Then, the last 16 values ​​of the difference result array are positiveened to obtain the integral result as the outer envelope data.

2. The method for processing VADC sampling signals of a rotary transformer according to claim 1, characterized in that, The excitation signal is a sine wave of a fixed frequency generated by the DSADC of the AURIX chip.

3. A resolver VADC sampling signal processing model, characterized in that, include: Input unit and processing unit; The input unit is used to input a sinusoidal signal as an excitation signal to the rotary transformer. The rotary transformer outputs sinusoidal signals Sin+, Sin- and Cos+, Cos- signals with a 90-degree phase difference. The processing unit is used to acquire and align the Sin+, Sin- and Cos+, Cos- signals output by the rotary transformer through the VADC acquisition task to obtain aligned data, perform differential processing on the aligned data and then integrate it to obtain the outer envelope data, and transmit the outer envelope data to the application layer for angle and speed calculation processing. VADC acquisition uses GTM TOM to set two periods: short-period sampling and long-period sampling. The short-cycle sampling acquired by VADC is triggered by setting the timing through GTM TOM0-2, while TOM0-1 is used as an offset reference to adjust the short-cycle sampling time, and one data is acquired every short-cycle interval. The long-cycle sampling acquired by VADC is set through GTM TOM 2-13. The sampling interrupt is triggered once every long cycle interval. The long cycle interval is consistent with the length of one cycle of the excitation signal. TOM 2-12 is used as an offset reference to adjust the long-cycle sampling trigger time. The processing unit is specifically used for: The Sin+, Sin- and Cos+, Cos- signals output from the rotary transformer are acquired by the VADC Sin / Cos acquisition module to obtain sampled data. The sampled data is then transferred to the designated memory and stored in array form by the DMA transfer module. The first sampling task of long-cycle sampling performs a DMA redirection, that is, the DMA transfer of this cycle starts recording from array 0. At the same time, the quadrant of the initial resolver position is determined according to the values ​​in the registers corresponding to the Sin+, Sin- and Cos+, Cos- signals acquired by the DSADC excitation retrieval module. During the second long-cycle sampling task, the Sin+, Sin- and Cos+, Cos- signals transferred by DMA are read, and combined with the quadrant of the initial resolver position, the starting zero point of the resolver output sine wave is found to be the i-th point, where i is a positive integer; the offset reference of long-cycle sampling is set to i multiplied by the short-cycle interval, so that the start of the long-cycle sampling task is aligned with the zero point of the resolver output sine wave. After setting the offset reference for long-period sampling, perform another DMA redirection at the start of the long-period sampling task so that the first value of the Sin+, Sin- and Cos+, Cos- signals that the DMA moves to the array is also aligned with the zero starting point of the sine wave output by the rotary transformer. The values ​​in the array are processed within a long period of sampling. The Sin+, Sin- and Cos+, Cos- signals are subtracted respectively to obtain a difference result array. Then, the last 16 values ​​of the difference result array are positiveened to obtain the integral result as the outer envelope data.

4. The VADC sampling signal processing model for a rotary transformer according to claim 3, characterized in that, The excitation signal is a sine wave of a fixed frequency generated by the DSADC of the AURIX chip.

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