Method for preparing dual-gate device and dual-gate device

Abstract

The present invention provides a method for preparing a dual-gate device and a dual-gate device, the method comprising: preparing a bottom gate; preparing a bottom gate dielectric layer on the bottom gate; covering the bottom gate dielectric layer with a single layer or multiple layers of low-dimensional materials; preparing a top gate dielectric layer on the low-dimensional material; preparing a top gate on the top gate dielectric layer; covering the top gate dielectric layer, the top gate and the low-dimensional material with an electron beam negative photoresist and patterning and etching them; covering the substrate with an electron beam positive photoresist and patterning and etching them, exposing the low-dimensional material and forming an electrode mask at the same time; etching away the exposed low-dimensional material; coating the remaining part of the low-dimensional material covered by the electron beam negative photoresist to obtain an end contact electrode in contact with the two ends of the low-dimensional material, and preparing an end contact dual-gate device. The above scheme can reduce the size of the device, conduct in-depth research on the working mechanism of multi-layer low-dimensional materials in dual-gate devices, enhance the control of the gate over the conductive channel, and improve device performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a preparation method of a dual-gate device and a dual-gate device. Background Art

[0002] Current research results show that low-dimensional materials can realize medium and large-scale integrated circuits and a variety of devices, and can be integrated with silicon-based passive devices through simple processes, so they have great potential. With the continuous improvement of the performance requirements of integrated circuits, reducing device size has become a hot topic in the industry. There are two main ways to reduce device size without affecting device performance. One is to reduce the channel length, and the other is to reduce the contact size. Reducing the channel length will lead to the short channel effect, which will hinder the device from shutting down and increase power consumption.

[0003] In the prior art, there are two ways to contact the electrode and the low-dimensional material during the device preparation process, such as Figure 1 The edge contacts and Figure 2 The end contact shown. End contact has a wide range of uses in studying the working mechanism of multilayer low-dimensional material thin film devices and building small-sized devices. In 2015, Cao Q. et al. from the IBM TJ Watson Research Center in the United States prepared low-dimensional material end contact double-gate devices in batches for the first time to further reduce the size of double-gate devices in integrated circuits. The electrode and the low-dimensional material end contact were achieved through solid-state carbonization reaction at 850°C. The experimental temperature was too high, which was not friendly to the process and the electrode was easily deformed at high temperature. In 2017, Cao Q. et al., based on their work in 2015, used electrode catalysts to achieve the end contact between the electrode and the low-dimensional material at 650°C.

[0004] However, physical and chemical reactions carried out at high temperatures have stringent requirements on the preparation process, and due to the high temperature, material performance degradation and electrode deformation will occur, affecting the device contact performance.

[0005] Therefore, there are certain problems with the performance of the prepared field effect transistor. Summary of the invention

[0006] In view of this, an embodiment of the present invention provides a method for preparing a dual-gate device and a dual-gate device to achieve the purpose of improving device performance.

[0007] In order to achieve the above object, the present invention adopts the following scheme:

[0008] According to one aspect of an embodiment of the present invention, there is provided a method for preparing a dual-gate device, comprising:

[0009] preparing a bottom gate on a target substrate;

[0010] preparing a bottom gate dielectric layer on the bottom gate;

[0011] Covering the bottom gate dielectric layer with a low-dimensional material;

[0012] preparing a top gate dielectric layer on the low-dimensional material;

[0013] preparing a top gate on the top gate dielectric layer;

[0014] Covering the top gate dielectric layer disposed on the low-dimensional material and the top gate and the low-dimensional material with an electron beam negative resist;

[0015] Patterning and etching the electron beam negative resist to expose the low-dimensional material to be removed;

[0016] Covering the top gate dielectric layer covered with the electron beam negative resist, the top gate electrode and the low-dimensional material with an electron beam positive resist;

[0017] Patterning and etching the electron beam positive photoresist to form mask patterns of the source electrode and the drain electrode;

[0018] Etching away the exposed portion of the low-dimensional material using a set gas plasma;

[0019] Based on the mask patterns of the source electrode and the drain electrode, a coating method is set to coat the remaining low-dimensional material covered by the electron beam negative resist after etching away a part of the low-dimensional material, so as to obtain an end-contact source electrode and a drain electrode respectively contacting the two end sides of the remaining low-dimensional material, thereby forming an end-contact double-gate device;

[0020] Wherein, when the gas plasma is set to have an anisotropic etching method, the set coating method is an anisotropic or isotropic coating method.

[0021] In some embodiments, the electron beam negative resist is a HSQ negative resist.

[0022] In some embodiments, the predetermined gas plasma is argon plasma, and the predetermined coating method is electron beam evaporation.

[0023] In some embodiments, the set gas plasma is argon plasma, and the set coating method is magnetron sputtering.

[0024] In some embodiments, based on the mask patterns of the source electrode and the drain electrode, a coating method is set to coat the remaining low-dimensional material covered by the electron beam negative photoresist after etching away a portion of the low-dimensional material, so as to obtain an end-contact source electrode and a drain electrode respectively contacting the two end sides of the remaining low-dimensional material, including:

[0025] After etching away the exposed part of the low-dimensional material by using a set gas plasma, without exposing the remaining part of the low-dimensional material to the air, based on the mask patterns of the source electrode and the drain electrode, the remaining part of the low-dimensional material covered by the electron beam negative photoresist after etching away part of the low-dimensional material is coated by a set coating method to obtain an end-contact source electrode and a drain electrode that are respectively in contact with the two end sides of the remaining low-dimensional material.

[0026] In some embodiments, covering the bottom gate dielectric layer with a low-dimensional material includes:

[0027] The low-dimensional material is directly grown or transferred to the bottom gate dielectric layer.

[0028] In some embodiments, based on the mask patterns of the source electrode and the drain electrode, after etching away part of the low-dimensional material, the remaining low-dimensional material covered by the electron beam negative photoresist is plated by setting a coating method to obtain the end-contact source electrode and the drain electrode respectively contacting the two end sides of the remaining low-dimensional material, and further comprising:

[0029] The obtained end-contact source electrode and drain electrode respectively contacting the two end sides of the remaining low-dimensional material are immersed in a set organic solvent to strip off the electron beam positive resist and excess metal covering the low-dimensional material, thereby obtaining a dual-gate device.

[0030] In some embodiments, covering the bottom gate dielectric layer with a low-dimensional material includes:

[0031] The bottom gate dielectric layer is covered with a plurality of low-dimensional materials for multiple times to obtain a multi-layer low-dimensional material.

[0032] According to another aspect of an embodiment of the present invention, a dual-gate device is provided, which is prepared by using a method as described in any one of the above embodiments.

[0033] The preparation method and the dual-gate device of the embodiment of the present invention realize a dual-gate device with dual gate control and low-dimensional material end contact by using a processing technology that can be implemented at room temperature to prepare the dual-gate device with end contact, and can reduce the requirements for the preparation process, and can avoid the problems of material performance degradation and electrode deformation caused by excessive temperature. Furthermore, by covering the low-dimensional material multiple times, it is possible to realize that multiple layers of low-dimensional materials simultaneously form end-only contact with the electrode at room temperature, thereby improving the device performance, and facilitating the study of the influence of the number of low-dimensional material layers on the performance of the end-contact dual-gate device.

[0034] Additional advantages, purposes, and features of the present invention will be described in part in the following description, and will become apparent to those skilled in the art after studying the following, or may be learned from the practice of the present invention. The purposes and other advantages of the present invention may be achieved and obtained by the structures specifically pointed out in the written description, claims, and drawings.

[0035] Those skilled in the art will appreciate that the objectives and advantages that can be achieved with the present invention are not limited to the above specific description, and the above and other objectives that can be achieved by the present invention will be more clearly understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of this application, and do not constitute a limitation of the present invention. The components in the drawings are not drawn to scale, but are only for illustrating the principles of the present invention. In order to facilitate the illustration and description of some parts of the present invention, the corresponding parts in the drawings may be enlarged, that is, they may become larger relative to other components in the exemplary device actually manufactured according to the present invention. In the drawings:

[0037] Figure 1 Schematic diagram of the contact between one-dimensional material and electrode edge;

[0038] Figure 2 Schematic diagram of the contact between a one-dimensional material and an electrode end;

[0039] Figure 3 A schematic diagram of a process for preparing a dual-gate device according to an embodiment of the present invention;

[0040] Figure 4 It is a schematic diagram of electron beam negative photoresist coating low-dimensional materials in one embodiment of the present invention;

[0041] Figure 5 is a schematic cross-sectional view of an electron beam negative resist after electron beam exposure patterning and etching in one embodiment of the present invention;

[0042] Figure 6 is a schematic diagram of a process of etching a low-dimensional material in one embodiment of the present invention;

[0043] Figure 7 A schematic diagram of a cross-sectional structure of a low-dimensional material in contact with an electrode terminal according to an embodiment of the present invention;

[0044] Figure 8 It is a cross-sectional schematic diagram of argon etching of a low-dimensional material in one embodiment of the present invention;

[0045] Fig. 9 It is a schematic cross-sectional view of an electrode obtained by electron beam evaporation or magnetron sputtering after argon etching of a low-dimensional material in one embodiment of the present invention;

[0046] Fig.10 A schematic diagram of the structure of a dual-gate device according to an embodiment of the present invention;

[0047] Fig.11 A schematic diagram of a structure of a multi-layer low-dimensional material according to an embodiment of the present invention;

[0048] Fig.12 A schematic diagram of an etching process of a multi-layer low-dimensional material according to an embodiment of the present invention;

[0049] Fig.13 Schematic diagram of the cross section of a multi-layer low-dimensional material after etching according to an embodiment of the present invention. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.

[0051] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0052] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0053] Since the process of preparing end contacts by physical and chemical reactions at high temperatures has stringent requirements, and because the temperature is too high, it is easy to cause problems such as material performance degradation and electrode deformation, which in turn affects the performance of the device and leads to low yield. In addition, contact with the external environment will affect the contact performance of the device by affecting the dangling bonds at the open ends of the low-dimensional materials. Therefore, the existing end contact preparation process is not universal and cannot be used for mass production of equipment. Moreover, up to now, there is no process for achieving end contact between electrodes and low-dimensional materials at room temperature.

[0054] In order to solve the problems of material performance degradation and electrode deformation caused by excessively high temperature, an embodiment of the present invention provides a method for preparing a dual-gate device, so as to prepare an end-contact dual-gate device by performing micro-machining processes such as electron beam exposure, etching and coating at room temperature.

[0055] Figure 3 FIG. 1 is a schematic diagram of a process for preparing a dual-gate device according to an embodiment of the present invention. Figure 3As shown, the method for manufacturing a dual-gate device according to an embodiment of the present invention may include the following steps S110 to S190.

[0056] Step S110: preparing a bottom gate on a target substrate.

[0057] Step S120: preparing a bottom gate dielectric layer on the bottom gate.

[0058] Step S130: Covering the bottom gate dielectric layer with a low-dimensional material.

[0059] Step S140: preparing a top gate dielectric layer on the low-dimensional material.

[0060] Step S150: preparing a top gate on the top gate dielectric layer.

[0061] Step S160: Covering the top gate dielectric layer disposed on the low-dimensional material, the top gate electrode and the low-dimensional material with an electron beam negative resist.

[0062] Step S170: patterning and etching the electron beam negative resist to expose the low-dimensional material portion to be removed.

[0063] Step S180: Covering the top gate dielectric layer, the top gate electrode and the low-dimensional material covered with the electron beam negative resist with an electron beam positive resist.

[0064] Step S190: patterning and etching the electron beam positive photoresist to form mask patterns of the source electrode and the drain electrode;

[0065] Step S1100: using set gas plasma to etch away the exposed portion of the low-dimensional material.

[0066] Step S1110: Based on the mask patterns of the source electrode and the drain electrode, a coating method is set to coat the remaining low-dimensional material covered by the electron beam negative resist after etching away part of the low-dimensional material, so as to obtain an end-contact source electrode and a drain electrode respectively contacting the two end sides of the remaining low-dimensional material, thereby forming an end-contact double-gate device.

[0067] Wherein, when the gas plasma is set to an anisotropic (good directionality) etching method, the set coating method is an anisotropic or isotropic coating method.

[0068] In step S110, the process of preparing the bottom gate can be to cover the surface of the substrate with electron beam glue by using a coating machine, and then perform electron beam exposure, development, fixing and coating to generate the bottom gate. Among them, the target substrate can be a silicon substrate, a silicon carbide substrate or a sapphire substrate. In addition, in step S150, the top gate can be prepared using a specific implementation similar to step S110.

[0069] In step S120, the gate dielectric layer can be prepared by covering the bottom gate electrode with electron beam glue, patterning it by electron beam exposure, and completing the preparation of the gate dielectric layer by atomic layer deposition after development and fixing. In addition, in step S140, the top gate dielectric layer can be prepared using a specific implementation similar to step S120.

[0070] In step S130 , the low-dimensional material may be coated onto the substrate by direct growth or indirect transfer.

[0071] In step S160 and step S170, the low-dimensional material may be covered with an electron beam negative photoresist by using a photoresist machine, such as Figure 4 As shown. Electron beam negative photoresist can be used to protect low-dimensional materials. Among them, HSQ (hydrogen silsesquioxane) negative photoresist can be selected as electron beam negative photoresist. Or other electron beam negative photoresist can be selected. Electron beam negative photoresist can protect the low-dimensional material to be retained from plasma etching; at the same time, electron beam negative photoresist is insoluble in the set organic solvent, and will not affect the morphology of the negative photoresist during the subsequent micro-nano processing process, ensuring the realization of end contact.

[0072] Since electron beam negative photoresist HSQ has a higher resolution, the resolution is less than 10nm, and it has good line edge roughness and high etching resistance. In addition, compared with electron beam positive photoresist, electron beam negative photoresist can present a positive trapezoid after electron beam exposure, that is, the longest bottom side of the trapezoid contacts the low-dimensional material. Therefore, by choosing to use HSQ negative photoresist, better terminal contact can be achieved.

[0073] In steps S180 and S190, the electron beam positive photoresist can be covered on the substrate by using a photoresist spreader, and the patterned and etched electron beam positive photoresist is used as a mask for the source electrode and the drain electrode. Among them, the electron beam positive photoresist can be PMMA (polymethyl methacrylate) or other electron beam positive photoresists. After the electron beam positive photoresist is exposed to the electron beam, it is developed and fixed to expose the low-dimensional material to be etched, and the source electrode and the drain electrode are patterned and etched at the same time.

[0074] Through the above steps S160 to S190, the double-layer nested electron beam glue mask not only ensures the accuracy of etching and exposes the two ends of the low-dimensional material, but also enables the source electrode and the drain electrode to form end contacts with both sides of the low-dimensional material, forming an end contact structure.

[0075] Figure 5 FIG. 1 is a cross-sectional schematic diagram of an electron beam negative resist after electron beam exposure patterning and etching in one embodiment of the present invention. Figure 5As shown, in step S170, an electron beam negative resist having a certain shape can be obtained by using electron beam exposure, the electron beam negative resist in the exposure area is left, and the electron beam negative resist not in the exposure area is removed. Moreover, the electron beam negative resist is used as a mask for plasma etching, so that the low-dimensional material in the exposure area is still covered by the electron beam negative resist, while the low-dimensional material not in the exposure area is exposed.

[0076] In step S1100, the gas plasma is set to have anisotropy. Figure 6 As shown, the anisotropic representation is that the gas plasma is set to etch the low-dimensional material only along a fixed direction during the etching process. For example, the gas plasma can be an inert gas plasma such as argon.

[0077] Since anisotropic gas plasma etching is used, etching is only effective in a specific direction and ineffective in other directions. In this embodiment, the anisotropic etching method can only etch vertically, so only the low-dimensional material not protected by the electron beam negative photoresist is etched away, and the low-dimensional material protected by the electron beam negative photoresist is retained. Figure 7 FIG. 1 is a schematic diagram of the structure of the low-dimensional material and the electrode end contact according to an embodiment of the present invention. Figure 7 As shown in the figure, b represents electron beam negative glue, a represents low-dimensional material, and c represents the formed electrode. For example, by bombarding the exposed part of the low-dimensional material with a set gas plasma, the part of the low-dimensional material covered by the electron beam negative glue is retained, and the end faces of the two ends of the low-dimensional material are perpendicular to the substrate, so that the electrode is only in contact with the two end sides of the low-dimensional material.

[0078] For example, by bombarding the surface of the structure with argon gas, part of the low-dimensional material exposed in the structure can be knocked off, thereby completing the etching of part of the low-dimensional material.

[0079] In step S1110, the coating method may include electron beam evaporation coating method or magnetron sputtering coating method. For example, metal atoms may be coated on a target substrate with electron beam glue as a mask by using magnetron sputtering coating method, so that both ends of the low-dimensional material are respectively in end contact with the metal atoms, thereby obtaining an end-contact source electrode and a drain electrode.

[0080] Since anisotropic gas plasma etching is used to form a standard low-dimensional material end face, any coating method can be selected to achieve the situation where only the end is in contact.

[0081] Exemplarily, when the etching method used is argon plasma, the argon plasma vertically etches the low-dimensional material that is not protected by the electron beam negative photoresist along a direction perpendicular to the low-dimensional material, and the coating method can select the electron beam evaporation coating method to coat the cross-sections at both ends of the etched low-dimensional material to achieve end contact; or when the etching method used is argon plasma, the argon plasma vertically etches the low-dimensional material that is not protected by the electron beam negative photoresist along a direction perpendicular to the low-dimensional material, and coats the cross-sections at both ends of the low-dimensional material by magnetron sputtering coating.

[0082] In some embodiments, the predetermined gas plasma is argon plasma, and the predetermined coating method is electron beam evaporation.

[0083] Among them, since argon plasma is anisotropic, when using argon plasma to etch low-dimensional materials, an anisotropic or isotropic coating method can be used to coat both ends of the low-dimensional material. For example, the coating method can be an electron beam evaporation coating method or a magnetron sputtering coating method.

[0084] For example, the exposed part of the low-dimensional material is bombarded with argon plasma to etch the exposed part of the low-dimensional material, and then the metal atoms can be plated on the surface of the structure constructed by the two ends of the low-dimensional material and part of the electron beam negative photoresist by magnetron sputtering. Since argon is an inert gas, when the low-dimensional material is etched by argon plasma, anisotropic etching characteristics are exhibited, and the edges of the etched low-dimensional material are neat, and the low-dimensional material under the electron beam negative photoresist mask will not be etched away.

[0085] Figure 8 FIG. 1 is a schematic cross-sectional view of argon etching of a low-dimensional material in one embodiment of the present invention. Figure 8 As shown, the exposed part of the low-dimensional material b can also be etched by bombarding the exposed part of the low-dimensional material with argon plasma. Since argon has anisotropy, such as Figure 8 The arrow direction in the figure indicates the direction of argon plasma etching. Therefore, the edges of the etched low-dimensional material are regular, and the low-dimensional material under the electron beam negative photoresist mask will not be etched away. After that, metal atoms can be plated on the surfaces of the structures constructed by the two ends of the low-dimensional material and part of the electron beam negative photoresist by electron beam evaporation coating, such as Fig. 9 As shown. Alternatively, other coating methods can be used.

[0086] In some embodiments, the set gas plasma is argon plasma, and the set coating method is magnetron sputtering. The etching method used is an anisotropic argon plasma method, and the coating method also uses an anisotropic magnetron sputtering method.

[0087] In order to avoid the possibility that the external environment affects the contact performance by affecting the dangling bonds at the open ends of the low-dimensional material, the low-dimensional material can be directly coated without contact with air after etching.

[0088] In some embodiments, the above step S1110 may specifically include: after etching away the exposed part of the low-dimensional material by setting a gas plasma, without exposing the remaining part of the low-dimensional material to the air, based on the mask patterns of the source electrode and the drain electrode, coating the remaining part of the low-dimensional material covered by the electron beam negative photoresist after etching away part of the low-dimensional material by setting a coating method to obtain the end-contact source electrode and drain electrode respectively contacting the two end sides of the remaining part of the low-dimensional material. For example, the low-dimensional material can be coated by using a reverse sputtering etching process.

[0089] In this embodiment, by performing coating without exposing the end surface of the low-dimensional material to air, the influence of air on the open-loop dangling bonds of the side wall of the low-dimensional material can be reduced, thereby improving the end contact effect.

[0090] In some embodiments, after the exposed portion of the low-dimensional material is bombarded vertically in a first direction by argon plasma by adjusting the parameters of the coating equipment, metal atoms are plated on the remaining portion of the low-dimensional material covered by the electron beam negative resist after etching away part of the low-dimensional material by magnetron sputtering without exposing the remaining portion of the low-dimensional material to the air, to obtain an electrode in contact with the end of the low-dimensional material; wherein the first direction is the direction from the electron beam negative resist to the target substrate.

[0091] See also Fig. 9 As shown, by adjusting the parameters of the coating equipment, the exposed part of the low-dimensional material b is bombarded with argon plasma perpendicular to the electron beam negative photoresist a, and then the metal atoms are plated on the remaining part of the low-dimensional material covered by the electron beam negative photoresist after etching away part of the low-dimensional material by magnetron sputtering coating, so as to obtain an electrode in contact with the end of the low-dimensional material. Argon plasma etching and magnetron sputtering coating are carried out in sequence in one chamber, which ensures that the end contact is not affected by air.

[0092] In some embodiments, after the above-mentioned step S1110, the method for preparing a dual-gate device of an embodiment of the present invention may further include the step of immersing the obtained end-contact source electrode and drain electrode respectively contacting the two end side surfaces of the remaining portion of the low-dimensional material into a set organic solvent to strip off the electron beam positive resist and excess metal covering the low-dimensional material, thereby obtaining an end-contact dual-gate device.

[0093] The organic solvent may be an acetone solution or other organic solvents. Acetone is both fat-soluble and water-soluble, wherein the fat-soluble property can wash away impurities, and the water-soluble property can wash away water-soluble impurities. Moreover, the boiling point of acetone in organic solvents is relatively low, and it is easy to evaporate. Therefore, the acetone solution can be used to strip the electron beam positive photoresist and the metal atoms on the surface of the electron beam positive photoresist.

[0094] Specifically, after electron beam positive resist is applied to the gate dielectric layer, the gate, the low-dimensional material covered by electron beam negative resist, the electron beam negative resist, and the substrate, the PMMA covered on both ends of the part of the low-dimensional material to be removed is subjected to electron beam exposure. The sample after the set gas plasma etching can be immersed in an acetone solvent, the acetone dissolves the PMMA, and the metal film plated on the PMMA will be peeled off, and finally only the electrodes at both ends of the low-dimensional material are left, and an end-contact double-gate device is obtained.

[0095] For example, Fig.10 FIG. 1 is a schematic diagram of the structure of a dual-gate device with dual gate contacts according to an embodiment of the present invention. Fig.10 As shown, a local bottom gate electrode 3 is prepared on a target substrate 2; a bottom gate dielectric layer 4 is prepared on the bottom gate electrode 3; a low-dimensional material 5 is transferred onto the gate dielectric layer 4; a local top gate dielectric layer 6 is prepared on the low-dimensional material 5; a top gate electrode 7 is prepared on the local top gate dielectric layer 6; an electron beam negative resist 8 is applied to the surface of the sample, and after electron beam exposure, the low-dimensional material is etched to form a channel layer, and both ends of the etched low-dimensional material are coated to form a source electrode and a drain electrode 9 on both sides of the channel layer to form an end contact; and electrode materials other than the patterning are stripped off.

[0096] Furthermore, a plurality of low-dimensional materials may be arranged on a target substrate to construct a multi-layer low-dimensional material double-gate device.

[0097] In some embodiments, a plurality of low-dimensional materials are coated onto the bottom gate dielectric layer in multiple times.

[0098] Among them, multiple layers of low-dimensional materials can be formed by covering the low-dimensional material multiple times, and the number of layers of the low-dimensional material can be 3 layers, 4 layers or 5 layers, etc. The process of preparing the gate electrode can be to cover the substrate with electron beam glue, perform electron beam exposure on the electron beam glue, develop and fix the structure after electron beam exposure, and plate the structure after development and fixation with a metal film, and use a standard stripping process to remove the residual electron beam glue and metal to form a gate. The electron beam glue is covered on the substrate, patterned and etched by electron beam exposure, and the gate dielectric is grown by atomic deposition.

[0099] Fig.11 FIG. 1 is a schematic diagram of a structure of a multi-layer low-dimensional material according to an embodiment of the present invention. Fig.11As shown, in the case where the low-dimensional material is three-layered, that is, the low-dimensional material is transferred multiple times, the multiple layers of low-dimensional material can be etched by appropriately extending the etching time.

[0100] Fig.12 FIG. 1 is a schematic diagram of an etching process of a multilayer low-dimensional material according to an embodiment of the present invention. Fig.12 As shown, after constructing a multi-layer low-dimensional material structure by transferring low-dimensional materials multiple times, the structure is covered with electron beam negative photoresist, and the part of the low-dimensional material that needs to be removed is etched by gas plasma. Since there are many layers of low-dimensional materials, the multi-layer low-dimensional materials can be etched by appropriately extending the etching time to achieve the purpose of completely etching the low-dimensional materials, as shown in FIG. Fig.13 As shown. Further, by coating the etched structure, a terminal contact double-gate device of multi-layer low-dimensional materials is obtained. This method can increase the terminal contact area and thus improve the performance of the device.

[0101] According to another aspect of an embodiment of the present invention, there is provided a terminal contact dual-gate device, which is prepared by using the method described in any one of the above embodiments.

[0102] In summary, the preparation method and the dual-gate device of the embodiment of the present invention realize the dual-gate device with dual gate control and low-dimensional material end contact by using a processing technology that can be implemented at room temperature to prepare the dual-gate device with end contact, reduce the requirements for the preparation process, and avoid the problems of material performance degradation and electrode deformation caused by excessive temperature. Furthermore, by covering the low-dimensional material multiple times, it is possible to realize that multiple layers of low-dimensional materials simultaneously form end-only contact with the electrode at room temperature, thereby improving the device performance, and facilitating the study of the influence of the number of low-dimensional material layers on the performance of the end-contact dual-gate device.

[0103] In the present invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with or replace features of other embodiments.

[0104] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for preparing a dual-gate device, characterized in that: include: preparing a bottom gate on a target substrate; preparing a bottom gate dielectric layer on the bottom gate; Covering the bottom gate dielectric layer with a low-dimensional material; preparing a top gate dielectric layer on the low-dimensional material; preparing a top gate on the top gate dielectric layer; Covering the top gate dielectric layer disposed on the low-dimensional material and the top gate and the low-dimensional material with an electron beam negative resist; Patterning and etching the electron beam negative resist to expose the low-dimensional material to be removed; Covering the top gate dielectric layer covered with the electron beam negative resist, the top gate electrode and the low-dimensional material with an electron beam positive resist; Patterning and etching the electron beam positive photoresist to form mask patterns of the source electrode and the drain electrode; Etching away the exposed portion of the low-dimensional material using a set gas plasma; Based on the mask patterns of the source electrode and the drain electrode, a coating method is set to coat the remaining low-dimensional material covered by the electron beam negative resist after etching away a part of the low-dimensional material, so as to obtain an end-contact source electrode and a drain electrode respectively contacting the two end sides of the remaining low-dimensional material, thereby forming an end-contact double-gate device; Wherein, when the gas plasma is set to have an anisotropic etching method, the set coating method is an anisotropic or isotropic coating method.

2. The method for preparing a dual-gate device according to claim 1, characterized in that: The electron beam negative resist is HSQ negative resist.

3. The method for preparing a dual-gate device according to claim 1, characterized in that: The set gas plasma is argon plasma, and the set coating method is electron beam evaporation.

4. The method for preparing a dual-gate device according to claim 1, characterized in that: The set gas plasma is argon plasma, and the set coating method is magnetron sputtering.

5. The method for preparing a dual-gate device according to claim 1, characterized in that: Based on the mask patterns of the source electrode and the drain electrode, the remaining low-dimensional material covered by the electron beam negative photoresist after etching away part of the low-dimensional material is coated by setting a coating method to obtain an end-contact source electrode and a drain electrode respectively contacting the two end sides of the remaining low-dimensional material, including: After etching away the exposed part of the low-dimensional material by using a set gas plasma, without exposing the remaining part of the low-dimensional material to the air, based on the mask patterns of the source electrode and the drain electrode, the remaining part of the low-dimensional material covered by the electron beam negative photoresist after etching away part of the low-dimensional material is coated by a set coating method to obtain an end-contact source electrode and a drain electrode that are respectively in contact with the two end sides of the remaining low-dimensional material.

6. The method for preparing a dual-gate device according to claim 1, wherein: Covering the bottom gate dielectric layer with a low-dimensional material includes: The low-dimensional material is directly grown or transferred to the bottom gate dielectric layer.

7. The method for preparing a dual-gate device according to claim 1, characterized in that: After the mask patterns of the source electrode and the drain electrode are used to coat the remaining low-dimensional material covered by the electron beam negative resist after etching away a part of the low-dimensional material by setting a coating method to obtain the end-contact source electrode and the drain electrode respectively contacting the two end sides of the remaining low-dimensional material, the method further includes: The obtained end-contact source electrode and drain electrode respectively contacting the two end sides of the remaining low-dimensional material are immersed in a set organic solvent to strip off the electron beam positive resist and excess metal covering the low-dimensional material, thereby obtaining an end-contact double-gate device.

8. The method for preparing a dual-gate device according to claim 1, wherein: Covering the bottom gate dielectric layer with a low-dimensional material includes: The bottom gate dielectric layer is covered with a plurality of low-dimensional materials for multiple times to obtain a multi-layer low-dimensional material.

9. A dual-gate device, characterized in that: The method is prepared by the method according to any one of claims 1 to 8.

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