USB2.0 electrical compliance test device for USB slave devices

Abstract

A USB2.0 electrical consistency test device for a USB slave device realizes an automated test of the electrical consistency of a USB2.0 interface of a USB slave device through a switching connection of a first switching module and a second switching module. The test efficiency is high and a user does not need to be equipped with a special high-bandwidth signal source, thereby saving the user's test cost.

Description

Technical Field

[0001] The invention relates to the technical field of USB2.0 interface testing, and in particular to a USB2.0 electrical consistency testing device for a USB slave device. Background Art

[0002] As the transmission speed of USB2.0 interface increases, the signal integrity problem becomes more and more prominent for designers and developers. In addition, the serial transmission structure also poses greater challenges in terms of protocol layer and interoperability. USB-IF (USB Implementers Forum) is a non-profit organization dedicated to promoting and developing USB technology, and has formulated USB standards. At the same time, in order to ensure the interoperability of USB products, USB-IF defines a number of compatibility tests. It stipulates certification test plans at the electrical level, functional level, and interoperability level, and authorizes test laboratories to conduct certification tests. USB-related products can only use the USB logo after passing the test and obtaining the USB logo certification. This requires USB developers to conduct pre-tests that meet the requirements of the consistency specification during the laboratory R&D stage, discover and solve problems as early as possible, and thus speed up the mass production of products.

[0003] The USB Association released the latest version of the USB2.0 Electrical Compliance Test Specification in February 2019. The version number is V1.07, and the English document is "USB2.0 Electrical Compliance Test Specification, Version 1.07". In this document, the standards and specifications for the electrical compliance test of USB 2.0 signals are described. Any USB2.0 host (host interface), hub (hub), and slave device (Device) must comply with this electrical test specification before they can be put on the market.

[0004] In the V1.07 version of the USB2.0 Electrical Compliance Test Specification, the important test items for the USB2.0 interface supporting 480MBps high-speed mode include the following:

[0005] (1) Signal integrity test (EL2 to EL9);

[0006] (2) Receiver sensitivity test on the upstream interface of the Hub and Device (EL16 to EL18);

[0007] (3) Package parameter test (EL21~EL25, EL55);

[0008] (4) Timing test (EL27~EL35);

[0009] (5) Suspend and resume test (EL38~EL41);

[0010] (6) Hub high-speed repeater test (EL42~EL48).

[0011] (7) Signal integrity test of USB2.0 full-speed interface (12Mbps) and low-speed interface (1.5Mbps).

[0012] Among the above test items, some of the test items of the host interface, hub, and slave device overlap, and some test items are unique to a certain type of interface.

[0013] Therefore, it is necessary to develop a corresponding USB 2.0 electrical consistency test device to meet the USB 2.0 test specifications and test requirements. Summary of the invention

[0014] The main technical problem solved by the present invention is how to test the USB2.0 electrical consistency of a USB slave device.

[0015] According to a first aspect, an embodiment provides a USB2.0 electrical consistency test device for a USB slave device, comprising: a digital oscilloscope, a control module and a first switching module;

[0016] The digital oscilloscope is used to receive the test requirements input by the user and output corresponding test instructions according to the test requirements;

[0017] The control module is used to obtain the test instruction and output a corresponding control signal according to the test instruction;

[0018] The first switching module comprises a common end, a first end and a second end, wherein the common end is connected to the USB2.0 interface of the USB slave device, the first end is connected to the control module, and the second end is connected to the first test end; the first switching module is used to connect its common end to the first end when configuring the first test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module; the first switching module is also used to connect its common end to the second end in the first test mode, so that the USB2.0 interface of the USB slave device outputs a first test signal corresponding to the first test mode to the first test end;

[0019] The digital oscilloscope is also used to detect the test signal on the first test end, and perform electrical consistency analysis on the USB2.0 interface of the USB slave device according to the detected test signal on the first test end.

[0020] In one embodiment, the first switching module is further used to connect its common end with the first end when configuring the second test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module, and continue to connect its common end with the first end in the second test mode, so that the USB2.0 interface of the USB slave device outputs a second test signal corresponding to the second test mode to the second test end;

[0021] The second test end is used for receiving a second test signal output by the USB2.0 interface of the USB slave device in a second test mode;

[0022] The digital oscilloscope is also used to detect a test signal on the first test end or the second test end, and perform electrical consistency analysis on the USB2.0 interface of the USB slave device based on the detected test signal on the first test end or the second test end.

[0023] In one embodiment, it further includes:

[0024] A high-bandwidth signal source module, used for obtaining a control signal output by a control module in a high-bandwidth test signal mode, generating a test signal sequence based on the control signal, and amplifying or reducing the gain of the test signal sequence to obtain a high-bandwidth control signal;

[0025] The second switching module includes a common end, a first end and a second end, wherein the common end is connected to the first end of the first switching module, the first end is connected to the high-bandwidth signal source module, and the second end is connected to the control module; the second switching module is used to connect its common end with the first end in the high-bandwidth test signal mode, so that the high-bandwidth signal source module outputs a high-bandwidth control signal to the USB2.0 interface of the USB slave device; the second switching module is also used to connect its common end with the second end in the normal test signal mode, so that the control signal output by the control module is output to the USB2.0 interface of the USB slave device.

[0026] In one embodiment, the high-bandwidth signal source module includes:

[0027] A programmable logic controller, used for acquiring a control signal output by the control module in a high-bandwidth test signal mode, and generating a test signal sequence based on the control signal;

[0028] The control module is also used to output a gain multiple instruction in a high-bandwidth test signal mode;

[0029] The variable gain amplifier is used to obtain the gain multiple instruction, amplify or reduce the gain of the test signal sequence to the gain multiple corresponding to the gain multiple instruction, and obtain a high-bandwidth control signal.

[0030] In one embodiment, the control module includes a USB device port and a USB OTG port;

[0031] The USB device port is connected to the USB host port of the digital oscilloscope, and is used to receive the test instruction output by the digital oscilloscope;

[0032] The USB OTG port has a host mode and a slave mode, and the control module is used to configure the USB OTG port to the host mode or the slave mode according to the test instruction.

[0033] In one embodiment, further comprising: a USB Type-A connector receptacle;

[0034] The USB Type-A connector socket is connected between the common end of the first switching module and the USB slave device.

[0035] In one embodiment, the first switching module includes: a relay RL1;

[0036] The common end of the relay RL1 is connected to the USB Type-B connector socket, the first switching end of the relay RL1 is connected to the control module, and the second switching end of the relay RL1 is connected to the first test end.

[0037] In one embodiment, the second switching module includes: a relay RL2;

[0038] The common end of the relay RL2 is connected to the first end of the relay RL1 , the first switching end of the relay RL2 is connected to the high-bandwidth signal source module, and the second switching end of the relay RL2 is connected to the control module.

[0039] In one embodiment, it further includes: a connector J1;

[0040] The connector J1 is connected to the first test end.

[0041] According to the USB2.0 electrical consistency test device for a USB slave device in the above embodiment, the switching connection between the first switching module and the second switching module is used to realize the automated test of the electrical consistency of the USB2.0 interface of the USB slave device. The test efficiency is high and the user does not need to be equipped with a special high-bandwidth signal source, thereby saving the user's testing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 The present invention is a schematic structural diagram of a USB2.0 electrical consistency test apparatus for a USB slave device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] The present invention is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein similar elements in different embodiments adopt associated similar element numbers. In the following embodiments, many detailed descriptions are for making the present application better understood. However, those skilled in the art can easily recognize that some features can be omitted in different situations, or can be replaced by other elements, materials, methods. In some cases, some operations related to the present application are not shown or described in the specification, this is to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations according to the description in the specification and the general technical knowledge in the art.

[0044] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. At the same time, the steps or actions in the method description can also be interchanged or adjusted in a manner that is obvious to those skilled in the art. Therefore, the various sequences in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a required sequence, unless otherwise specified that a certain sequence must be followed.

[0045] The serial numbers of the components in this document, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings).

[0046] When conducting electrical conformance tests on USB2.0 interfaces, the interface being tested (Host, Device or Hub interface) needs to enter USB test mode. USB test mode is a special mode of the high-speed USB2.0 interface in high-speed mode (480Mbps) required by the USB protocol. In this mode, the USB does not work normally, but simply sends specific signals as an electrical signal test.

[0047] When the device under test is a USB slave device, the following method can be used to put the device under test into test mode.

[0048] (1) USB slave device enters test mode

[0049] You can run the USB High-speed Electrical TestTool application officially launched by USB-IF on the Windows platform to put the USB slave device into test mode. On the application interface, after selecting different test modes, the host connected to the device under test will send a feature request SetFeature(TEST_MODE) to the device under test to let the device under test enter the specified test mode. After receiving the command, the device under test will write the corresponding PTC bit field value to the USB device under test, so that the USB device under test enters the corresponding test mode.

[0050] Under the USB2.0 protocol standard, the PTC bit field value of the USB slave device is shown in Table 1. For example, when "TEST_PACKET" is selected, the PTC bit field of the slave device under test will be written with the corresponding value (4'b0100), so that the controller of the device under test enters the high-speed eye diagram mode, and the controller of the device under test sends a specific high-speed test packet (TEST_PACKET) to the USB bus, supporting tests such as eye diagram, rate, rise / fall time, and monotonicity.

[0051] Table 1 PTC bit field values

[0052]

[0053] USB protocol stacks that need to support test modes should implement SetPortFeature() to support high-speed signal testing.

[0054] At present, the consistency test of USB2.0 interface conducted on digital oscilloscopes is mainly focused on electrical consistency test. The digital oscilloscope manufacturers approved by USB-IF mainly include Keysight, Tektronix, Teledyne LeCroy, and Rohde & Schwarz. The USB2.0 electrical consistency test fixtures officially launched by these mainstream digital oscilloscope manufacturers and USB-IF have the following shortcomings in application:

[0055] 1. When conducting electrical consistency tests on USB2.0 interfaces, the USB2.0 electrical consistency test fixtures officially launched by USB-IF and mainstream oscilloscope manufacturers have low test efficiency and are inconvenient to use. In terms of human-computer interaction, after selecting a test item, you need to continuously click on the operation wizard prompts and operation buttons on the digital oscilloscope in real time, and frequently change the cable connection method, change the test point position, replace the single-ended probe or differential probe, and replace the test fixture components according to the test item requirements before you can test the corresponding test items. Therefore, in the current market, the USB2.0 electrical consistency test solutions officially recommended by USB-IF and launched by mainstream oscilloscope manufacturers have a low level of automated testing, requiring in-depth human involvement in the operation, which is not conducive to improving test efficiency.

[0056] 2. When the embedded host that sends the control command is a non-Windows system platform, the USB High-speed Electrical Test Tool application officially launched by USB-IF cannot be installed and used to issue control instructions to allow the tested USB slave device to enter the test mode. The user needs to define the software design to enter the test mode. The premise of this work is that the user is very familiar with the underlying protocol of USB2.0, which increases the difficulty of the test and requires a relatively high technical level of the tester.

[0057] 3. When testing the receiver sensitivity project (EL16-EL18) of the USB2.0 upstream interface, the user needs to be equipped with a high-bandwidth signal source to generate the corresponding test signal sequence before the receiver sensitivity test can be performed. Since the signal source that can generate signals that meet the USB2.0 protocol specifications is a high-bandwidth product, the price of this type of signal source is very expensive, which increases the user's testing cost and is not conducive to the user's testing of the receiver sensitivity project.

[0058] Based on the problems existing in the above-mentioned USB2.0 electrical consistency test fixture, in an embodiment of the present invention, an automated test of the electrical consistency of the USB2.0 interface of the USB slave device is implemented through the switching connection of the first switching module and the second switching module.

[0059] Please refer to Figure 1 , Figure 1 The present invention is a structural schematic diagram of a USB2.0 electrical consistency test device for a USB slave device according to an embodiment, which includes: a digital oscilloscope 101, a control module 102, a first switching module 103, a second switching module 104, a first test terminal 105, a second test terminal 106, a USB Type-A connector socket 107 and a high-bandwidth signal source module 108.

[0060] The digital oscilloscope 101 is used to receive the test requirements input by the user and output the corresponding test instructions according to the test requirements. The digital oscilloscope 101 sends the test instructions to the control module 102 through the USB host port.

[0061] The control module 102 is used to obtain the test instruction, and output the corresponding control signal according to the test instruction. In the present embodiment, the control module 102 can be any microcontroller, such as a single-chip microcomputer, etc. The control module 102 has a USB device port (USB Device Port), and the USB device port of the control module 102 is connected to the USB host port of the digital oscilloscope 101, and is used for the digital oscilloscope 101 to output the test instruction to the control module 102. The control module 102 generates a control signal based on the test instruction, and the control signal is a differential signal sequence. In addition, the control module 102 also has a USB OTG port, and the USB OTG port has two modes, a host mode and a slave mode. The control module 102 configures the USB OTG port to a host mode or a slave mode according to the test instruction output by the digital oscilloscope 101 received by it. Since the electrical consistency test device provided in the present embodiment is a test for the USB2.0 interface of the USB slave device, therefore, in the present embodiment, the control module 102 configures the USB OTG port to a host mode.

[0062] The first switching module 103 includes a common terminal COM1, a first terminal T11 and a second terminal T12, wherein the common terminal COM1 is connected to the USB2.0 interface of the USB slave device, the first terminal T11 is connected to the control module 102, and the second terminal T12 is connected to the first test terminal 105; the first switching module 103 is used to connect its common terminal COM1 with the first terminal T11 when configuring the first test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module; the first switching module 103 is also used to connect its common terminal COM1 with the second terminal T12 in the first test mode, so that the USB2.0 interface of the USB slave device outputs a first test signal corresponding to the first test mode to the first test terminal 105.

[0063] The first test terminal 105 is used to receive a first test signal output by a USB 2.0 interface of a USB slave device in a first test mode.

[0064] The digital oscilloscope 101 is further used to detect a first test signal on the first test terminal 105 , and perform electrical consistency analysis on the USB 2.0 interface of the USB slave device according to the detected first test signal on the first test terminal 105 .

[0065] In one embodiment, the USB2.0 electrical consistency testing device for the USB slave device provided in this embodiment also has a second test mode, specifically: the first switching module 103 is also used to connect its common terminal COM1 to the first terminal T11 when configuring the second test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module 102, and continues to connect its common terminal COM1 to the first terminal T11 in the second test mode, so that the USB2.0 interface of the USB slave device outputs a second test signal corresponding to the second test mode to the second test terminal 106.

[0066] The second test terminal 106 is used to receive a second test signal output by a USB 2.0 interface of the USB slave device in a second test mode.

[0067] The digital oscilloscope 101 is further used to detect a test signal on the second test terminal 106 , and perform electrical consistency analysis on the USB 2.0 interface of the USB slave device according to the detected test signal on the second test terminal 106 .

[0068] Some test items require high-bandwidth test signals for testing. Therefore, in this embodiment, a high-bandwidth signal source module 108 is used to generate a high-bandwidth control signal without requiring a separate signal source, thereby having a simple structure and low cost.

[0069] The high-bandwidth signal source module 108 is used to obtain the control signal output by the control module 102 in the high-bandwidth test signal mode, generate a test signal sequence based on the control signal, and amplify or reduce the gain of the test signal sequence to obtain a high-bandwidth control signal.

[0070] The second switching module 104 includes a common terminal COM2, a first terminal T21, and a second terminal T22, wherein the common terminal COM2 is connected to the first terminal T11 of the first switching module 103, the first terminal T21 of the second switching module 104 is connected to the high-bandwidth signal source module 108, and the second terminal T22 is connected to the control module 102; the second switching module 104 is used to connect its common terminal COM2 with the first terminal T21 in the high-bandwidth test signal mode, so that the high-bandwidth signal source module 108 outputs a high-bandwidth control signal to the USB2.0 interface of the USB slave device; the second switching module 104 is also used to connect its common terminal COM2 with the second terminal T22 in the normal test signal mode, so that the control signal output by the control module 102 is output to the USB2.0 interface of the USB slave device. The normal test signal mode includes: the first test mode and / or the second test mode.

[0071] In one embodiment, the high bandwidth signal source module 108 includes: a programmable logic controller (FPGA) 1081 and a variable gain amplifier (VGA) 1082 .

[0072] The programmable logic controller 1081 is used to obtain the control signal output by the control module 102 in the high-bandwidth test signal mode, and generate a test signal sequence based on the control signal;

[0073] The control module 102 is further configured to output a gain multiple instruction in the high-bandwidth test signal mode.

[0074] The variable gain amplifier 1082 is used to obtain a gain multiple instruction, and amplify or reduce the gain of the test signal sequence to a gain multiple corresponding to the gain multiple instruction, so as to obtain a high-bandwidth control signal.

[0075] In this embodiment, the first switching module 103 and the second switching module 104 are controlled by the control module 102 .

[0076] In one embodiment, the first switching module 103 may be a relay RL1 , and the second switching module 104 may be a relay RL2 .

[0077] In one embodiment, the electrical consistency test device for the USB2.0 interface provided in this embodiment also includes: a USB Type-A connector socket 107; the USB Type-A connector socket 107 is connected between the common terminal COM1 of the first switching module 103 and the USB slave device, and is used to connect the USB slave device to the electrical consistency test device.

[0078] In one embodiment, the digital oscilloscope 101 has multiple analog input channels. Since the test signal on the first test end 105 or the second test end 106 is a differential signal, two channels are required to obtain it. Two channels can be selected from these analog input channels to measure the test signal on the first test end 105 or the second test end 106. For example, the digital oscilloscope 101 has four analog input channels, CH1, CH2, CH3 and CH4. The CH1 and CH3 channels are connected to the first test end 105 through two coaxial cables of equal length, specifically connected to the first test end through a connector J1, and the CH2 and CH4 channels are connected to the second test end 106 through active single-ended probes respectively.

[0079] It should be noted that the first test mode and the second test mode involved in the embodiment of the present invention respectively correspond to one or more test items performed by the digital oscilloscope when the control signal source is the control module 102 and the test signals on the first test terminal 105 and the second test terminal 106 are obtained. For example, the first test mode may include some test modes in the signal integrity test items of the USB slave device, and the second test mode may include some test modes in the packet parameter test items of the USB slave device, the Chirp timing test items of the USB slave device, and the suspend / resume items of the USB slave device. In addition, the high-bandwidth signal mode in the embodiment of the present invention refers to the test mode corresponding to when the control signal source is the high-bandwidth signal source module 108.

[0080] The following is an explanation of the USB 2.0 electrical conformance test process of the USB slave device provided in this embodiment.

[0081] (1-1) The USB Host Port of the digital oscilloscope 101 is connected to the USB Device Port of the USB2.0 electrical compliance test fixture via a USB cable, and the USB Type-A connector socket 107 is connected to the USB2.0 interface of the slave device under test.

[0082] (1-2) The USB2.0 OTG interface on the control module 102 (MCU) is configured as the host mode. The control module in this embodiment can be implemented by the MCU, and the MCU can be any existing single-chip microcomputer with a USB interface.

[0083] (1-3) The CH1 and CH3 channels of the digital oscilloscope 101 are connected to the connector J1 (first test end 105) on the test fixture through two coaxial cables of equal length, and the CH2 and CH4 are connected to the second test end 106 on the test device through active single-ended probes.

[0084] (1-4) The test steps for the signal integrity test items (EL_2, EL_4, EL_5, EL_6, EL_7, EL_9) are as follows:

[0085] a) The digital oscilloscope 101 first sends a command to the control module 102 to control the common terminal COM1 of the relay RL1 to be connected to the first terminal T11, and the common terminal COM2 of the relay RL2 to be connected to the second terminal T22, so as to realize the connection between the USB2.0 OTG interface of the MCU and the USB slave device under test.

[0086] b) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (TEST_PACKET) through the USB2.0 OTG interface, configure the controller on the tested USB slave device to enter the TEST_PACKET test mode (the first test mode), and send a specific test signal sequence from the device to the USB bus to support signal integrity testing.

[0087] c) The digital oscilloscope 101 sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to its second terminal T12, so that the signal link from the tested USB slave device to the connector J1 is turned on, and the connector J1 is connected to the first test terminal 105 .

[0088] d) The digital oscilloscope 101 tests that the input signals of the CH1 and CH3 channels are the TEST_PACKET signal sequence sent by the USB slave device. The digital oscilloscope 101 subtracts the DP and DM signals in the TEST_PACKET signal sequence to obtain the differential signal of USB2.0 in high-speed mode. The digital oscilloscope 101 performs electrical consistency analysis on the differential signal and outputs analysis reports for test items EL_2, EL_4, EL_5, EL_6, and EL_7. Among them, the differential signal is composed of a single-ended signal DP signal and a DM signal. The DP signal is a positive polarity signal and the DM signal is a negative polarity signal. Each test point in the test device is a single-ended signal DP signal and DM signal for testing the USB2.0 interface.

[0089] e) The digital oscilloscope 101 sends a command to the MCU to control the common terminal COM1 of the relay RL1 to switch to the first terminal T11.

[0090] f) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (TEST_SE0_NAK) through the USB2.0 OTG interface, and configures the controller on the USB slave device to enter the TEST_SE0_NAK test mode (the first test mode). The controller of the USB slave device pulls down the DP signal and DM signal of the USB bus to support the TEST_SE0_NAK test. From the above d), it can be seen that the DP signal and the DM signal are both single-ended signals, the DP signal is a positive polarity signal, and the DM signal is a negative polarity signal. The DP signal and the DM signal form a differential signal.

[0091] g) The digital oscilloscope 101 sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to the second terminal T12 thereof.

[0092] h) The digital oscilloscope 101 tests the DP and DM signals input to the CH1 and CH3 channels. The digital oscilloscope 101 performs electrical consistency analysis on the DP and DM signals and outputs an analysis report for the test item EL9.

[0093] (1-5) Package parameter test items (EL_21, EL_22, EL_25) steps are:

[0094] a) The digital oscilloscope 101 first sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to the first terminal T11, and the common terminal COM2 of the relay RL2 to be connected to the second terminal T22, so as to realize the connection between the USB2.0 OTG interface of the MCU and the tested slave device.

[0095] b) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (SINGLE_STEP_SET_FEATURE) through the USB2.0 OTG interface, configures the controller on the tested USB slave device to enter the packet parameter test mode (the second test mode), and the tested USB slave device sends a specific test signal sequence to the USB bus.

[0096] c) The digital oscilloscope 101 measures the input signals of the CH2 and CH4 channels, and subtracts the DP and DM signals to obtain the differential signals in the high-speed mode of USB2.0. The oscilloscope performs electrical consistency analysis on the differential signals and outputs analysis reports for the test items EL21, EL22, and EL25.

[0097] (1-6) The test steps of Chirp timing (EL_28, EL_29, EL_31) are as follows:

[0098] a) The digital oscilloscope 101 first sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to the second terminal T12, and the common terminal COM2 of the relay RL2 to be connected to the second terminal T22, so as to disconnect the USB2.0 OTG interface of the MCU from the tested slave device.

[0099] b) The digital oscilloscope 101 sends a command to the MCU to control the connection between the common terminal COM1 contact of the relay RL1 and the first terminal T11, so as to realize the connection between the OTG interface of the MCU and the slave device to be tested. The MCU and the slave device perform handshake according to the USB protocol, i.e., enter the Chirp timing test mode (the second test mode).

[0100] c) The digital oscilloscope 101 measures the input signals of the CH2 and CH4 channels, performs electrical consistency analysis on the signals DP and DM, and outputs analysis reports for the Chirp timing test items EL_28, EL_29, and EL_31.

[0101] (1-7) The test steps for suspend / resume / reset (EL_27, EL_28, EL_38, EL_40) are:

[0102] a) The digital oscilloscope 101 first sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to the first terminal T11, and the common terminal COM2 of the relay RL2 to be connected to the second terminal T22, so as to realize the connection between the USB2.0 OTG interface of the MCU and the slave device under test.

[0103] b) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (SUSPEND) through the USB2.0 OTG interface to configure the controller on the tested USB slave device to enter the suspend mode (the second test mode).

[0104] c) The digital oscilloscope 101 measures the input signals of the CH2 and CH4 channels, performs electrical consistency analysis on the signals DP and DM, and outputs an analysis report of the suspended test item EL_38.

[0105] d) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send a command Set Feature (RESUME) through the USB2.0 OTG interface to configure the controller on the tested USB slave device to enter a recovery state.

[0106] e) The digital oscilloscope 101 measures the input signals of the C2 and C4 channels, performs electrical consistency analysis on the signals DP and DM, and outputs an analysis report of the recovery test item EL_40.

[0107] f) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send a command Set Feature (RESET) through the USB2.0 OTG interface to configure the controller on the tested USB slave device to enter a reset state.

[0108] g) The digital oscilloscope 101 measures the input signals of the CH2 and CH4 channels, performs electrical consistency analysis on the signals DP and DM, and outputs an analysis report of the recovery test item EL_27.

[0109] h) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (SUSPEND) and then Set Feature (RESET) through the USB2.0 OTG interface to configure the controller on the tested USB slave device to perform a reset operation from the suspend state.

[0110] i) The digital oscilloscope 101 measures the input signals of the C2 and C4 channels, performs electrical consistency analysis on the signals DP and DM, and outputs an analysis report for the test item EL_28 from suspend to reset.

[0111] (1-8) The test steps for the uplink interface receiver sensitivity test (EL_16, EL_17, EL_18) are as follows:

[0112] a) The digital oscilloscope 101 first sends a command to the MCU to control the common terminal COM1 of the relay RL1 to be connected to the first terminal T11, and the common terminal COM2 of the relay RL2 to be connected to the second terminal T22, so as to realize the connection between the USB2.0 OTG interface of the MCU and the USB slave device under test.

[0113] b) The digital oscilloscope 101 configures the USB2.0 OTG interface on the MCU, and allows the MCU to send the command Set Feature (TEST_SE0_NAK) through the USB2.0 OTG interface to configure the controller of the tested USB slave device to enter the TEST_SE0_NAK test (high-bandwidth test signal mode).

[0114] c) The digital oscilloscope 101 sends a command to the MCU to control the connection between the common terminal COM2 contact of the relay RL2 and the first terminal T21 contact.

[0115] d) MCU sends a command to FPGA, asking FPGA to generate a bit[44:1]=0'x0F_2AA7_22AA sequence to VGA at a rate of 480Mbps. This sequence simulates an IN token packet with a sync field length of 12 bits. At the same time, MCU uses the gain multiplier control signal to let VGA adjust the peak-to-peak value Vpp of the input signal sequence to a suitable output amplitude value, such as 800mVpp, to finally obtain a simulated USB2.0 differential signal, and output the simulated USB2.0 differential signal to the USB slave device.

[0116] e) The digital oscilloscope 101 measures the single-ended DP and DM signals of USB2.0 of the CH2 and CH4 channels, and subtracts DP from DM to obtain a high-speed differential signal. For each IN token packet, if the slave device to be tested feeds back a NAK packet signal, it is considered that the test item EL_18 has passed, otherwise the test has failed.

[0117] f) MCU sends a command to FPGA, asking FPGA to generate a bit[64:1]=0'x00F2_AA72_2AAA_AAAA sequence to VGA at a rate of 480Mbps. This sequence simulates a USB2.0 IN token packet with a sync field length of 32bit. At the same time, MCU controls the signal through the gain multiple to let VGA amplify the peak-to-peak value of the input signal sequence. The peak-to-peak value of the output sequence changes continuously, with a minimum value less than 100mVpp and a maximum value greater than 800mVpp.

[0118] g) When the peak-to-peak value Vpp of the sequence output by the VGA is less than 100mV, and the tested slave device does not return a NAK packet for each IN token packet, the EL_16 project test is considered to have passed, otherwise the test has failed.

[0119] h) If the peak-to-peak value of the VGA output sequence is greater than or equal to 150mVpp, and the tested slave device returns a NAK packet for each IN token packet, the EL_17 project test is considered to have passed, otherwise the test has failed.

[0120] Among the test items (1-4) to (1-8) above, users can also select some items to perform USB2.0 electrical consistency analysis according to their own test requirements.

[0121] The above specific examples are used to illustrate the present invention, which is only used to help understand the present invention and is not intended to limit the present invention. For those skilled in the art, according to the concept of the present invention, some simple deductions, modifications or substitutions can be made.

Claims

1. A USB2.0 electrical consistency test device for a USB slave device, characterized in that: include: A digital oscilloscope, a control module and a first switching module; The digital oscilloscope is used to receive the test requirements input by the user and output corresponding test instructions according to the test requirements; The control module is used to obtain the test instruction and output a corresponding control signal according to the test instruction; The first switching module comprises a common end, a first end and a second end, wherein the common end is connected to the USB2.0 interface of the USB slave device, the first end is connected to the control module, and the second end is connected to the first test end; the first switching module is used to connect its common end to the first end when configuring the first test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module; the first switching module is also used to connect its common end to the second end in the first test mode, so that the USB2.0 interface of the USB slave device outputs a first test signal corresponding to the first test mode to the first test end; The digital oscilloscope is also used to detect the test signal on the first test end, and perform electrical consistency analysis on the USB2.0 interface of the USB slave device according to the detected test signal on the first test end.

2. The USB2.0 electrical consistency test device according to claim 1, characterized in that: The first switching module is further used to connect its common end with the first end when configuring the second test mode, so that the USB2.0 interface of the USB slave device receives the control signal output by the control module, and continue to connect its common end with the first end in the second test mode, so that the USB2.0 interface of the USB slave device outputs a second test signal corresponding to the second test mode to the second test end; The second test end is used for receiving a second test signal output by the USB2.0 interface of the USB slave device in a second test mode; The digital oscilloscope is also used to detect a test signal on the first test end or the second test end, and perform electrical consistency analysis on the USB2.0 interface of the USB slave device based on the detected test signal on the first test end or the second test end.

3. The USB2.0 electrical consistency test device according to claim 1, characterized in that: Also includes: A high-bandwidth signal source module, used for obtaining a control signal output by a control module in a high-bandwidth test signal mode, generating a test signal sequence based on the control signal, and amplifying or reducing the gain of the test signal sequence to obtain a high-bandwidth control signal; The second switching module includes a common end, a first end and a second end, wherein the common end is connected to the first end of the first switching module, the first end is connected to the high-bandwidth signal source module, and the second end is connected to the control module; the second switching module is used to connect its common end with the first end in the high-bandwidth test signal mode, so that the high-bandwidth signal source module outputs a high-bandwidth control signal to the USB2.0 interface of the USB slave device; the second switching module is also used to connect its common end with the second end in the normal test signal mode, so that the control signal output by the control module is output to the USB2.0 interface of the USB slave device.

4. The USB2.0 electrical consistency test device according to claim 3, characterized in that: The high-bandwidth signal source module comprises: A programmable logic controller, configured to obtain a control signal output by the control module in a high-bandwidth test signal mode, and generate a test signal sequence based on the control signal; The control module is also used to output a gain multiple instruction in a high-bandwidth test signal mode; The variable gain amplifier is used to obtain the gain multiple instruction, amplify or reduce the gain of the test signal sequence to the gain multiple corresponding to the gain multiple instruction, and obtain a high-bandwidth control signal.

5. The USB2.0 electrical consistency test device according to claim 1, characterized in that: The control module includes a USB device port and a USB OTG port; The USB device port is connected to the USB host port of the digital oscilloscope, and is used to receive the test instruction output by the digital oscilloscope; The USB OTG port has a host mode and a slave mode, and the control module is used to configure the USB OTG port to the host mode or the slave mode according to the test instruction.

6. The USB2.0 electrical consistency test device according to claim 3, characterized in that: Also includes: USB Type-A connector receptacle; The USB Type-A connector socket is connected between the common end of the first switching module and the USB slave device.

7. The USB2.0 electrical consistency test device according to claim 6, characterized in that: The first switching module comprises: a relay (RL1); The common end of the relay (RL1) is connected to the USB Type-A connector socket, the first switching end of the relay (RL1) is connected to the control module, and the second switching end of the relay (RL1) is connected to the first test end.

8. The USB2.0 electrical consistency test device according to claim 7, characterized in that: The second switching module includes: a relay (RL2); The common end of the relay (RL2) is connected to the first end of the relay (RL1), the first switching end of the relay (RL2) is connected to the high-bandwidth signal source module, and the second switching end of the relay (RL2) is connected to the control module.

9. The USB2.0 electrical consistency test device according to claim 1, characterized in that: Also includes: Connector (J1); The connector (J1) is connected to the first test end.

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