A high conversion gain frequency quadrupler

Abstract

The application discloses a high-conversion-gain quadrupler, comprising an input matching module, a first-stage frequency doubling module, an inter-stage balun module, a second-stage frequency doubling module and an output matching module connected in sequence; the high-conversion-gain quadrupler provided by the application adopts two-stage push-push differential pair cascade, can well suppress the fundamental harmonic of the output end, such as the fundamental harmonic, the second harmonic and the like, maintains a high-performance working state, reduces power consumption compared with the first structure mentioned, and guarantees conversion gain; the high-conversion-gain quadrupler provided by the application adopts a passive transformer type balun, guarantees the balance of the differential signal, and reduces the amplitude imbalance and the phase imbalance of the output differential signal.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuits, and particularly relates to a four-frequency multiplier with high conversion gain. BACKGROUND

[0002] With the rapid development of network technology and communication technology, applications such as automatic driving and virtual reality (VR) are gradually emerging, which requires radar systems with high precision and high stability. Millimeter wave radar has the advantages of strong stability, high precision and resistance to bad weather, and therefore gradually attracts the attention of researchers. For high-performance radar, the generation of high-precision local oscillator signals is crucial. In order to achieve the generation of high-performance local oscillator signals, using a phase-locked loop system (PLL) doubler structure is a very practical method. For the implementation of 60-77GHz local oscillator signals, a 15-20GHz PLL source signal can be quadrupled to achieve it. Therefore, the performance of the frequency multiplier directly affects the accuracy of signal transmission and reception, so the frequency multiplier faces great demand and challenge. However, as the frequency multiplication times increase, the conversion gain of the frequency multiplier device decreases, resulting in a narrower output frequency bandwidth of the frequency multiplier, and the harmonic suppression level becomes worse.

[0003] The existing four-frequency multiplier is realized by a traditional two-stage cascaded frequency multiplier, and a circuit schematic diagram thereof is shown in Figure 1 The first stage structure is a single-tube frequency multiplier, and the second stage is a push-push structure frequency multiplier. The two stages are cascaded through an active balun structure and realize the function of converting a single-ended signal into a differential signal. The transistor M1 is the first-stage single-tube frequency multiplier. After generating a single-ended second harmonic signal, the signal is converted into a differential signal through an AB (active balun) and then input into the second-stage push-push frequency multiplier (composed of transistors M2 and M3), and then a four-harmonic signal is output through an L2 and C2 matching network. However, due to the poor balance of the active balun, the conversion gain of the second stage is reduced. When the M1 tube is in the on state, the on-off of the M2 tube is controlled to realize two current peaks in half a cycle, thereby realizing the effect of four times frequency multiplication in the whole cycle. The disadvantages of this structure are: when the frequency increases, the parasitic capacitance C S-GND between the source of the transistor M2 and the ground gradually increases, and when the M2 is off, the current is provided from the capacitor to the M1, so that the M1 cannot be completely turned off, affecting the conversion efficiency. SUMMARY

[0004] In view of the above problems in the prior art, the four-frequency multiplier with high conversion gain provided by the application solves the problem of low conversion gain of the existing four-frequency multiplier.

[0005] In order to achieve the above-mentioned purposes, the technical scheme adopted by the present application is as follows: a high conversion gain quadrupler, comprising an input matching module, a first double frequency module, an inter-stage balun module, a second double frequency module and an output matching module connected in sequence.

[0006] The input end of the input matching module serves as the input end of the high conversion gain quadrupler, the first output end of the input matching module is connected with the first input end of the first double frequency module, and the second output end of the input matching module is connected with the second input end of the first double frequency module.

[0007] The output end of the first double frequency module is connected with the input end of the inter-stage balun module, the first output end of the inter-stage balun module is connected with the first input end of the second double frequency module, the second output end of the inter-stage balun module is connected with the second input end of the second double frequency module, the output end of the second double frequency module is connected with the input end of the output matching module, and the output end of the output matching module serves as the output end of the high conversion gain quadrupler.

[0008] The input matching module is used for matching an input signal, the first double frequency module is used for generating a second harmonic signal according to the input signal, the inter-stage balun module is used for generating a differential second harmonic signal according to the second harmonic signal, the second double frequency module is used for generating a fourth harmonic signal according to the differential second harmonic signal, and the output matching module is used for generating an output signal according to the fourth harmonic signal.

[0009] Further, the input matching module comprises a transformer balun TF1, a capacitor Cp, an inductor Lp1 and an inductor Lp2.

[0010] One end of the primary side of the transformer balun TF1 serves as the input end of the input matching module, the other end of the primary side of the transformer balun TF1 is grounded, one end of the secondary side of the transformer balun is connected with one end of the inductor Lp1 and one end of the capacitor Cp respectively, the other end of the secondary side of the transformer balun is connected with the other end of the inductor Lp2 and the other end of the capacitor Cp respectively, the other end of the inductor Lp1 serves as the first output end of the input matching module, and the other end of the inductor Lp2 serves as the second output end of the input matching module.

[0011] The above-mentioned further scheme has the beneficial effects that the single-turn transformer balun is adopted, the loss of inter-stage conversion is reduced, the balance of the output differential signal is improved, the conversion gain is improved, the ability of harmonic suppression is enhanced, and the power consumption of the chip is reduced.

[0012] Further, the first double frequency module comprises a transistor M1n and a transistor M1p.

[0013] The gate of the transistor M1n is the first input end of the first-stage frequency doubling module, the source of the transistor M1n is connected with the source of the transistor M1p and grounded, the gate of the transistor M1p is the second input end of the first-stage frequency doubling module, and the drain of the transistor M1p is connected with the drain of the transistor M1n and serves as the output end of the first-stage frequency doubling module.

[0014] The above further scheme has the beneficial effect that the application provides a first-stage frequency doubling module and a second-stage frequency doubling module based on a push-push differential pair structure, and a four-stage frequency multiplier in cascade, which can well suppress odd harmonics and improve the suppression system of fundamental harmonics.

[0015] Further, the inter-stage balun module comprises a transformer balun TF2, an inductor Lp3 and an inductor Lp4.

[0016] One end of the primary side of the transformer balun TF2 serves as the input end of the inter-stage balun module, the other end of the primary side of the transformer balun TF2 is connected with a VCC power supply, one end of the secondary side of the transformer balun TF2 is connected with one end of the inductor Lp3, the other end of the inductor Lp3 serves as the first output end of the inter-stage balun module, the other end of the secondary side of the transformer balun TF2 is connected with one end of the inductor Lp4, and the other end of the inductor Lp4 serves as the second output end of the inter-stage balun module.

[0017] The above further scheme has the beneficial effect that the inter-stage balun module adopts the structure of a passive transformer balun, ensures a small phase error and amplitude error of the output differential signal, improves the overall conversion gain, reduces the overall power consumption and improves the working bandwidth.

[0018] Further, the second-stage frequency doubling module comprises a transistor M2n, a transistor M2p, an inductor L1 and a capacitor C1.

[0019] The gate of the transistor M2n serves as the first input end of the second-stage frequency doubling module, the source of the transistor M2n is connected with the source of the transistor M2p and grounded, the gate of the transistor M2p serves as the second input end of the second-stage frequency doubling module, and the drain of the transistor M2p is connected with the drain of the transistor M2n, one end of the inductor L1 and one end of the capacitor C1. The other end of the inductor L1 is connected with a VCC power supply, and the other end of the capacitor C1 serves as the output end of the second-stage frequency doubling module.

[0020] Further, the output matching module comprises a transistor M31, a transistor M32, a transistor M33, an inductor L2, an inductor L3, an inductor L4, an inductor L5, an inductor L6, an inductor L7, a capacitor C2, a capacitor C4 and a capacitor C5.

[0021] The gate of the transistor M31 is connected with one end of the inductor L2 and serves as an input end of the output matching module, and the other end of the inductor L2 is connected with a VB1 power supply; the source of the transistor M31 is grounded, the drain of the transistor M31 is connected with one end of the inductor L3 and one end of the capacitor C2 respectively, the other end of the inductor L3 is connected with a VCC power supply, the other end of the capacitor C2 is connected with one end of the inductor L4 and the gate of the transistor M32 respectively, the other end of the inductor L4 is connected with the VB1 power supply, the source of the transistor M32 is grounded, the drain of the transistor M32 is connected with one end of the inductor L5 and one end of the capacitor C4 respectively, the other end of the inductor L5 is connected with the VCC power supply, the other end of the capacitor C4 is connected with one end of the inductor L6 and the gate of the transistor M33 respectively, the other end of the inductor L6 is connected with the VB1 power supply, the source of the transistor M33 is grounded, the drain of the transistor M33 is connected with one end of the inductor L7 and one end of the capacitor C5 respectively, the other end of the inductor L7 is connected with the VCC power supply, and the other end of the capacitor C5 serves as an output end of the output matching module.

[0022] The present application has the following advantages:

[0023] (1) The high conversion gain quadrupler provided by the present application adopts two-stage push-push differential pair cascade, which can well suppress the fundamental harmonic of the output end, such as the fundamental harmonic, the second harmonic and the like. The high-performance working state is maintained, the power consumption is reduced compared with the first structure mentioned, and the conversion gain is ensured.

[0024] (2) The high conversion gain quadrupler provided by the present application adopts a passive transformer balun, which ensures the balance of the differential signal and reduces the amplitude imbalance and phase imbalance of the output differential signal. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 It is a schematic diagram of the quadrupler.

[0026] Figure 2 It is a schematic diagram of the quadrupler.

[0027] Figure 3 It is a structural schematic diagram of the transformer balun TF1 and the transformer balun TF2.

[0028] Figure 4The simulation results of transformer balun TF1 and transformer balun TF2 of the present invention are shown in the figure.

[0029] Figure 5 The diagram shows the overall post-simulation results of the conversion gain and harmonic suppression of this invention. Detailed Implementation

[0030] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0031] like Figure 2 As shown, in one embodiment of the present invention, a high conversion gain quadruple frequency multiplier includes an input matching module, a first-stage second frequency multiplier module, an inter-stage balun module, a second-stage second frequency multiplier module, and an output matching module connected in sequence.

[0032] Wherein, the input terminal of the input matching module serves as the input terminal of a high conversion gain quadruple frequency multiplier, the first output terminal of the input matching module is connected to the first input terminal of the first stage double frequency multiplier module, and the second output terminal of the input matching module is connected to the second input terminal of the first stage double frequency multiplier module;

[0033] The output terminal of the first-stage frequency doubler module is connected to the input terminal of the inter-stage balun module; the first output terminal of the inter-stage balun module is connected to the first input terminal of the second-stage frequency doubler module; the second output terminal of the inter-stage balun module is connected to the second input terminal of the second-stage frequency doubler module; the output terminal of the second-stage frequency doubler module is connected to the input terminal of the output matching module; and the output terminal of the output matching module serves as the output terminal of a high-conversion-gain quadrupler.

[0034] The input matching module is used to match the input signal, the first-stage second harmonic module is used to generate a second harmonic signal based on the input signal, the inter-stage balun module is used to generate a differential second harmonic signal based on the second harmonic signal, the second-stage second harmonic module is used to generate a fourth harmonic signal based on the differential second harmonic signal, and the output matching module is used to generate an output signal based on the fourth harmonic signal.

[0035] This application proposes a high-conversion-gain quadruple frequency multiplier, which achieves quadruple frequency multiplication using a two-stage cascaded frequency multiplier configuration. The inter-stage baluns all employ a passive transformer balun structure, ensuring minimal phase and amplitude errors in the output differential signal, thereby improving the overall conversion gain, reducing overall power consumption, and increasing the operating bandwidth.

[0036] The input matching module comprises a transformer balun TF1, a capacitor Cp, an inductor Lp1 and an inductor Lp2.

[0037] One end of the primary side of the transformer balun TF1 is used as the input end of the input matching module, the other end of the primary side of the transformer balun TF1 is grounded, one end of the secondary side of the transformer balun is connected with one end of the inductor Lp1 and one end of the capacitor Cp respectively, the other end of the secondary side of the transformer balun is connected with the other end of the inductor Lp2 and the other end of the capacitor Cp respectively, the other end of the inductor Lp1 is used as the first output end of the input matching module, and the other end of the inductor Lp2 is used as the second output end of the input matching module.

[0038] The first-stage frequency doubling module comprises a transistor M1n and a transistor M1p.

[0039] The gate of the transistor M1n is used as the first input end of the first-stage frequency doubling module, the source of the transistor M1n is connected with the source of the transistor M1p and grounded, the gate of the transistor M1p is used as the second input end of the first-stage frequency doubling module, and the drain of the transistor M1p is connected with the drain of the transistor M1n and used as the output end of the first-stage frequency doubling module.

[0040] In the embodiment, the first-stage frequency doubling module and the second-stage frequency doubling module adopt a Pus-Push frequency doubling structure, in which the transistors M1n, M1p, M2n and M2p work in a nonlinear region to generate a second harmonic wave, and due to the differential characteristics, the odd harmonics can be well suppressed, and the suppression system of the fundamental harmonic is improved.

[0041] The inter-stage balun module comprises a transformer balun TF2, an inductor Lp3 and an inductor Lp4.

[0042] One end of the primary side of the transformer balun TF2 is used as the input end of the inter-stage balun module, the other end of the primary side of the transformer balun TF2 is connected with a VCC power supply, one end of the secondary side of the transformer balun TF2 is connected with one end of the inductor Lp3, the other end of the inductor Lp3 is used as the first output end of the inter-stage balun module, the other end of the secondary side of the transformer balun TF2 is connected with one end of the inductor Lp4, and the other end of the inductor Lp4 is used as the second output end of the inter-stage balun module.

[0043] In the embodiment, the inter-stage balun module adopts the transformer balun TF2 of the passive balun, and compared with the active balun, the amplitude error and the phase error are smaller, and the conversion gain of the first-stage double-frequency module and the second-stage double-frequency module can be obviously improved. The transformer balun TF1 and the transformer balun TF2 of the high-conversion-gain frequency quadrupler of the application adopt the single-coil transformer structure, further reducing the amplitude error and the phase error of the high-conversion-gain frequency quadrupler, and also reducing the unbalanced parasitic capacitance in the transformer, improving the symmetry of the transformer balun. The structural schematic diagram of the transformer balun TF1 and the transformer balun TF2 is shown in Figure 3 The simulation results are shown in Figure 4 In the working bandwidth, the amplitude error is less than 0.7 dB, and the phase error is less than 2.2°.

[0044] The second-stage double-frequency module comprises a transistor M2n, a transistor M2p, an inductor L1 and a capacitor C1.

[0045] The gate of the transistor M2n is used as the first input end of the second-stage double-frequency module, the source of the transistor M2n is connected with the source of the transistor M2p and grounded, the gate of the transistor M2p is used as the second input end of the second-stage double-frequency module, the drain of the transistor M2p is connected with the drain of the transistor M2n, one end of the inductor L1 and one end of the capacitor C1 respectively, the other end of the inductor L1 is connected with the VCC power supply, and the other end of the capacitor C1 is used as the output end of the second-stage double-frequency module.

[0046] The output matching module comprises a transistor M31, a transistor M32, a transistor M33, an inductor L2, an inductor L3, an inductor L4, an inductor L5, an inductor L6, an inductor L7, a capacitor C2, a capacitor C4 and a capacitor C5.

[0047] The gate of the transistor M31 is connected with one end of the inductor L2, and serves as an input end of the output matching module, and the other end of the inductor L2 is connected with a VB1 power supply; the source of the transistor M31 is grounded, the drain of the transistor M31 is connected with one end of the inductor L3 and one end of the capacitor C2 respectively, the other end of the inductor L3 is connected with a VCC power supply, the other end of the capacitor C2 is connected with one end of the inductor L4 and the gate of the transistor M32 respectively, the other end of the inductor L4 is connected with the VB1 power supply, the source of the transistor M32 is grounded, the drain of the transistor M32 is connected with one end of the inductor L5 and one end of the capacitor C4 respectively, the other end of the inductor L5 is connected with the VCC power supply, the other end of the capacitor C4 is connected with one end of the inductor L6 and the gate of the transistor M33 respectively, the other end of the inductor L6 is connected with the VB1 power supply, the source of the transistor M33 is grounded, the drain of the transistor M33 is connected with one end of the inductor L7 and one end of the capacitor C5 respectively, the other end of the inductor L7 is connected with the VCC power supply, and the other end of the capacitor C5 serves as an output end of the output matching module.

[0048] The conversion gain and harmonic suppression degree of the overall post-simulation of the high-conversion-gain four-frequency multiplier are as shown in the figure, Figure 5 The conversion gain is greater than 3dB in the band, and the highest is 8dB, and the harmonic suppression degree is greater than 45dBc, the conversion gain is higher in the frequency band, and the harmonic suppression degree performance is also very excellent.

[0049] The high-conversion-gain four-frequency multiplier provided by the application adopts two-stage push-push differential pair cascade, can well suppress the fundamental harmonic of the output end, such as the fundamental harmonic, the second harmonic, etc., maintains a high-performance working state, reduces power consumption compared with the first structure mentioned, and ensures conversion gain.

[0050] The high-conversion-gain four-frequency multiplier provided by the application adopts a passive transformer type balun, ensures the balance of the differential signal, and reduces the amplitude imbalance and phase imbalance of the output differential signal.

[0051] In the description of the application, it needs to be understood that the terms "center", "thickness", "upper", "lower", "horizontal", "top", "bottom", "inner", "outer", "radial" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application. In addition, the terms "first", "second", "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implying the number of technical features indicated. Therefore, the features defined by "first", "second", "third" can explicitly or implicitly include one or more of the features.

Claims

1. A high conversion gain frequency quadrupler, characterized by, The input matching module, the first-stage double frequency module, the inter-stage balun module, the second-stage double frequency module and the output matching module are sequentially connected. The input end of the input matching module is an input end of the high conversion gain quadrupler, the first output end of the input matching module is connected with the first input end of the first-stage double frequency module, and the second output end of the input matching module is connected with the second input end of the first-stage double frequency module. The output end of the first-stage double frequency module is connected with the input end of the inter-stage balun module, the first output end of the inter-stage balun module is connected with the first input end of the second-stage double frequency module, the second output end of the inter-stage balun module is connected with the second input end of the second-stage double frequency module, the output end of the second-stage double frequency module is connected with the input end of the output matching module, and the output end of the output matching module is an output end of the high conversion gain quadrupler. The input matching module is used for matching an input signal, the first-stage double frequency module is used for generating a second harmonic signal according to the input signal, the inter-stage balun module is used for generating a differential second harmonic signal according to the second harmonic signal, the second-stage double frequency module is used for generating a fourth harmonic signal according to the differential second harmonic signal, and the output matching module is used for generating an output signal according to the fourth harmonic signal. The input matching module comprises a transformer balun TF1, a capacitor Cp, an inductor Lp1 and an inductor Lp2. The one end of the primary side of the transformer balun TF1 is an input end of the input matching module, the other end of the primary side of the transformer balun TF1 is grounded, the one end of the secondary side of the transformer balun is connected with the one end of the inductor Lp1 and the one end of the capacitor Cp respectively, the other end of the secondary side of the transformer balun is connected with the other end of the inductor Lp2 and the other end of the capacitor Cp respectively, the other end of the inductor Lp1 is a first output end of the input matching module, and the other end of the inductor Lp2 is a second output end of the input matching module. The inter-stage balun module comprises a transformer balun TF2, an inductor Lp3 and an inductor Lp4. The one end of the primary side of the transformer balun TF2 is an input end of the inter-stage balun module, the other end of the primary side of the transformer balun TF2 is connected with a VCC power supply, the one end of the secondary side of the transformer balun TF2 is connected with the one end of the inductor Lp3, the other end of the inductor Lp3 is a first output end of the inter-stage balun module, the other end of the secondary side of the transformer balun TF2 is connected with the one end of the inductor Lp4, and the other end of the inductor Lp4 is a second output end of the inter-stage balun module. The output matching module comprises a transistor M31, a transistor M32, a transistor M33, an inductor L2, an inductor L3, an inductor L4, an inductor L5, an inductor L6, an inductor L7, a capacitor C2, a capacitor C4 and a capacitor C5. The gate of the transistor M31 is connected with one end of the inductor L2, and serves as an input end of the output matching module, and the other end of the inductor L2 is connected with a VB1 power supply; the source of the transistor M31 is grounded, the drain of the transistor M31 is connected with one end of the inductor L3 and one end of the capacitor C2 respectively, the other end of the inductor L3 is connected with a VCC power supply, the other end of the capacitor C2 is connected with one end of the inductor L4 and the gate of the transistor M32 respectively, the other end of the inductor L4 is connected with the VB1 power supply, the source of the transistor M32 is grounded, the drain of the transistor M32 is connected with one end of the inductor L5 and one end of the capacitor C4 respectively, the other end of the inductor L5 is connected with the VCC power supply, the other end of the capacitor C4 is connected with one end of the inductor L6 and the gate of the transistor M33 respectively, the other end of the inductor L6 is connected with the VB1 power supply, the source of the transistor M33 is grounded, the drain of the transistor M33 is connected with one end of the inductor L7 and one end of the capacitor C5 respectively, the other end of the inductor L7 is connected with the VCC power supply, and the other end of the capacitor C5 serves as an output end of the output matching module.

2. The high conversion gain frequency quadrupler of claim 1, wherein, The first-stage double-frequency module comprises a transistor M1n and a transistor M1p. The gate of the transistor M1n serves as a first input end of the first-stage double-frequency module, the source of the transistor M1n is connected with the source of the transistor M1p and grounded, the gate of the transistor M1p serves as a second input end of the first-stage double-frequency module, and the drain of the transistor M1p is connected with the drain of the transistor M1n and serves as an output end of the first-stage double-frequency module.

3. The high conversion gain frequency quadrupler of claim 2, wherein, The second-stage double-frequency module comprises a transistor M2n, a transistor M2p, an inductor L1 and a capacitor C1. The gate of the transistor M2n serves as a first input end of the second-stage double-frequency module, the source of the transistor M2n is connected with the source of the transistor M2p and grounded, the gate of the transistor M2p serves as a second input end of the second-stage double-frequency module, the drain of the transistor M2p is connected with the drain of the transistor M2n, one end of the inductor L1 and one end of the capacitor C1 respectively, the other end of the inductor L1 is connected with a VCC power supply, and the other end of the capacitor C1 serves as an output end of the second-stage double-frequency module.

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