A method for monitoring the reliability quality of HDI blind vias

By designing matrix blind hole chains on the HDI board and using HCT high current tester for online resistance change rate detection, the problem of difficulty in achieving 100% effective detection and interception in HDI blind hole quality detection is solved, and the effect of reducing quality risks and improving quality yield is achieved.

CN115494372BActive Publication Date: 2025-04-29YIXING SILICON VALLEY ELECTRONICS TECH
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Patent Information

Application Number
CN202211045187.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-30
Publication Date
2025-04-29
Estimated Expiration
2042-08-30

AI Technical Summary

Technical Problem

The prior art is difficult to achieve 100% effective detection and interception in HDI blind hole quality detection, resulting in potential quality risks and quality problems.

Method used

The matrix blind hole chain on the HDI board is designed, and the online resistance value change rate is detected using the HCT high current tester. The product reliability is judged by analyzing the resistance value change rate and intercepting poor products.

Benefits of technology

It realizes timely intercepting the quality problems of HDI blind holes during the process, reduces potential quality risks, and improves the quality yield and reliability of HDI blind holes.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a HDI blind hole reliability quality detection and monitoring method, which is specifically as follows: S1: Matrix blind holes are arranged on the TOP layer and the BOT layer of the HDI board in a matrix arrangement manner, and the matrix blind holes on the TOP layer and the BOT layer are respectively wired to form a TOP layer blind hole chain and a BOT layer blind hole chain; the TOP layer and the BOT layer of the HDI board are respectively provided with a test pin point, a test fixing hole and a through hole; S2: After the PCB circuit board is produced and the outer layer circuit is etched, an HCT high current tester is used for detection, and after an abnormality is detected, the real cause of the defect is analyzed to promote quality improvement; the monitoring method can perform online testing of the resistance change rate to judge the reliability of the product, thereby discovering the quality problem of the HDI blind hole in the process and intercepting it, thereby reducing the potential quality risk, promoting the improvement of process abnormality, and improving the quality yield and the reliability of the HDI blind hole quality.
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Description

Technical Field

[0001] The invention relates to a monitoring method, in particular to a HDI blind hole reliability quality detection monitoring method. Background Art

[0002] With the development of the electronic industry towards "light, thin, short, small" and multifunctionality, especially the high integration of semiconductor chips and the rapid increase in the number of I / O (input / output), a new type of PCB product - HDI - has been developed with high density, high precision, high reliability and low cost requirements, which is suitable for high-density interconnection structure.

[0003] In the process of manufacturing HDI products, when the hole wall quality of HDI blind hole electroplating is abnormal, such as: blind hole fold plating, residual glue at the bottom of the hole, and micro-cracks at the bottom of the blind hole, the quality monitoring currently mainly relies on micro-slicing, reflow soldering, electrical testing and four-wire flying probe low-resistance testing. Among them: slicing and IR are destructive experiments. After the above tests, the board can only be scrapped. For the four-wire low-resistance test, the blind hole is less affected at room temperature due to low resistance, but it will be inaccurate when tested at high temperature, resulting in the inability to effectively detect and intercept 100% of the quality defects of HDI blind holes. The above-mentioned HDI blind hole quality problems involve the expansion of the material of the PCB board during use, resulting in the resistance value not jumping and poor electrical performance contact of the PCB board. Summary of the invention

[0004] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a HDI blind hole reliability quality detection and monitoring method, which can perform online testing of its resistance change rate to judge the reliability of the product, thereby discovering HDI blind hole quality problems in the process and intercepting them, thereby reducing potential quality risks, promoting process abnormality improvements, and improving quality yield and HDI blind hole quality reliability.

[0005] In order to solve the above technical problems, the present invention provides a HDI blind hole reliability quality detection and monitoring method, which specifically includes the following steps:

[0006] S1: Matrix blind holes are arranged on the TOP layer and BOT layer of the HDI board in a matrix arrangement. The matrix blind holes on the TOP layer and the BOT layer are designed for wiring respectively. A TOP layer blind hole chain is formed between each blind hole on the TOP layer through wiring design, and a BOT layer blind hole chain is formed between each blind hole on the BOT layer through wiring design.

[0007] The TOP layer and BOT layer of the HDI board are respectively provided with a test pin point, a test fixing hole and a via hole. The via holes on the TOP layer and the BOT layer of the HDI board are respectively arranged on one side of the corresponding matrix blind hole and connected to the matrix blind hole. The via hole connects the TOP layer blind hole chain with the BOT layer blind hole chain. The corresponding via holes on the TOP layer and the BOT layer are respectively provided with a test pin point on the side away from the matrix blind hole. The test pin point on the TOP layer is two square PADs, one is the positive electrode and the other is the negative electrode. The positive square PAD is connected to the corresponding matrix blind hole. The test pin point on the BOT layer is the BOT layer square PAD. The BOT layer square PAD corresponds to the position of the negative square PAD on the TOP layer. The BOT layer square PAD is connected to the matrix blind hole corresponding to the BOT layer. A penetrating via hole is also provided in the negative square PAD on the TOP layer and in the square PAD of the BOT layer for realizing the detection of the BOT layer on the TOP layer. The test fixing holes of the TOP layer and the BOT layer are respectively arranged on both sides of the corresponding matrix blind hole.

[0008] S2: After the PCB circuit board is produced and the outer layer is etched, the HCT high current tester is used for detection. After the abnormality is detected, the real cause of the defect is analyzed to promote quality improvement. The HCT high current tester consists of an electrically connected voltage and current tester, a temperature tester, a micro resistance tester and a timer. The specific detection steps are as follows:

[0009] . Place the positive and negative probes of the high current tester on the two test pin points on the blind hole chain of the TOP layer respectively;

[0010] . Start the high current tester, use the voltage regulation mode, and input current for detection, where:

[0011] The voltage is controlled at 0-3V, and the input current is controlled at 0-30A;

[0012] During the power-on test, the temperature of the blind hole HCT Coupon increases. When the temperature reaches 200°C, the timer is started and the test continues for 60 seconds.

[0013] After starting the test program, the test system of the HCT high current tester will record the initial test resistance value and the maximum resistance value during the test, and automatically calculate the resistance change rate, and output the test curve based on the data taken every 5 seconds, in order to monitor the resistance change during the entire test process online;

[0014] . According to the results of the HCT test of resistance change rate, products with resistance change rate > 10% are intercepted as defective products, and the intercepted products are sliced ​​and sampled to analyze the blind hole quality.

[0015] The technical solution further defined in the present invention is:

[0016] Furthermore, in the aforementioned HDI blind hole reliability quality detection and monitoring method, the matrix blind holes respectively arranged on the TOP layer and the BOT layer of the HDI board in step S1 are composed of 10 rows of blind holes arranged in parallel with each other, and each row has 16 blind holes.

[0017] In the aforementioned HDI blind hole reliability quality inspection and monitoring method, the aperture of each blind hole in the matrix blind hole is consistent with the original blind hole aperture in the HDI board.

[0018] Technical effect: the blind hole diameter is consistent with the blind hole diameter in the PNL board. That is to say, the size of the blind hole in the board is the same as the size of the blind hole in the board. The purpose of keeping consistent is to monitor the quality of the blind holes in the PNL board.

[0019] In the aforementioned HDI blind hole reliability quality inspection and monitoring method, the blind hole ring in the matrix blind hole is 6 mil and the line width is 7 mil.

[0020] In the aforementioned HDI blind hole reliability quality inspection and monitoring method, there are three test fixing holes in S1, which are evenly distributed in the middle triangle of the HDI board, and the diameter of the test fixing holes is 1.55 mm.

[0021] In the aforementioned HDI blind hole reliability quality inspection and monitoring method, the diameter of the two vias is 0.35 mm.

[0022] The testing principle of the HCT high current tester in the present invention is that the materials constituting the printed circuit board have the characteristics of thermal expansion and contraction, and different materials have different expansion coefficients. If the PCB is heated within a certain range of conditions, tension in different directions will be generated, such as Figure 1 As shown, Figure 1 F is the tension of the PCB substrate, and F1 is the tension of copper. Based on this characteristic, the HCT test system uses the combined force of tension to test the bonding force at the bottom of the blind hole.

[0023] HCT high current test, in the printed circuit board, by setting up the HCT hole chain test module for the blind, buried and through holes in the HDI circuit board, a DC voltage and current stabilized power supply + micro-ohm tester + surface thermometer is used for comprehensive testing. When the current / voltage passes through the HCT test coupon, the current / voltage increases, and the electrical energy flowing through the module is converted into thermal energy, so that the CTE of the material repeatedly shrinks and expands, and its resistance is measured online, and the resistance change rate before and after is calculated to determine the reliability of the HDI blind hole quality.

[0024] The beneficial effects of the present invention are:

[0025] The HID board of the present invention is provided with two through holes in order to connect the blind hole chains on the front and back sides through the 0.35 holes, so as to facilitate testing, reduce labor intensity and improve efficiency. Otherwise, the front side needs to be tested once and the back side needs to be tested once, which wastes time.

[0026] The HCT high current tester of the present invention is used for detection. The working principle of each structure of the tester is as follows: the three modules of the voltage and current tester, the temperature tester, and the micro-resistance tester are synchronously tested and monitored. After the HCT test is started, the current and voltage are input, and the electrical energy is converted into thermal energy. The temperature of the HCT Coupon will continue to rise during the test, and the micro-resistance data of the HCT Coupon network will be recorded online at intervals of 5 seconds. When the temperature rises to 200°C, the timer will be started, and it will last for more than 200°C for more than 60 seconds. At the end of the test, the maximum resistance value in the entire test process and the initial resistance value of the equipment are taken to calculate the change rate of the resistance value, and the resistance change rate is controlled to be less than 10%, which is convenient for quality detection.

[0027] The existing HDI board blind hole signal tolerance quality inspection mainly relies on micro-slicing, reflow soldering, electrical testing and four-wire flying probe low-resistance testing for quality monitoring, including:

[0028] Slicing and IR are both destructive tests. After the above tests, the board can only be scrapped;

[0029] In the four-wire low-resistance test, the above-mentioned HDI blind hole quality defects cannot be 100% intercepted.

[0030] The present invention designs an HDI blind hole chain and adopts the HCT current withstand test to conduct online testing of the resistance change rate and judge the reliability of the product, thereby discovering the quality problems of HDI blind holes in the process and intercepting them, thereby reducing potential quality risks, promoting process abnormality improvement, and improving quality yield and HDI blind hole quality reliability.

[0031] The purpose of the present invention is to intercept the quality risk of HDI blind holes through detection. After detecting the abnormality through HCT, the real cause of the defect is analyzed to promote quality improvement. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 Schematic diagram of the principle of HCT current withstand test in an embodiment of the present invention;

[0033] Figure 2 A curve chart of the output current test result drawn by the HCT high current tester in an embodiment of the present invention;

[0034] Figure 3A cross-sectional view of an HDI board in an embodiment of the present invention;

[0035] Figure 4 A top view of the TOP layer of the HDI board in an embodiment of the present invention;

[0036] Figure 5 A top view of the BOT layer of the HDI board in an embodiment of the present invention;

[0037] In the figure: 1-matrix blind hole, 21-positive square PAD, 22-negative square PAD, 23-BOT layer square PAD, 3-test fixing hole, 4-conducting hole, 5-TOP layer, 6-BOT layer. DETAILED DESCRIPTION

[0038] Example 1

[0039] This embodiment provides a HDI blind hole reliability quality detection and monitoring method, which specifically includes the following steps:

[0040] S1: Matrix blind holes 1 are arranged on the TOP layer 5 and the BOT layer 6 of the HDI board in a matrix arrangement. The matrix blind holes 1 on the TOP layer 5 and the BOT layer 6 are respectively designed for wiring according to the prior art. A TOP layer blind hole chain is formed between each blind hole on the TOP layer 5 through wiring design. Figure 3 As shown, each blind hole on the BOT layer 6 is connected to each other through wiring design to form a BOT layer blind hole chain;

[0041] like Figure 4-5 As shown, the TOP layer 5 and the BOT layer 6 of the HDI board are respectively provided with a test pin point, a test fixing hole 3 and a via 4. The via 4 on the TOP layer 5 and the BOT layer 6 of the HDI board is respectively arranged on one side of the corresponding matrix blind hole 1 and connected to the matrix blind hole 1. The via 4 connects the TOP layer blind hole chain with the BOT layer blind hole chain. The corresponding via 4 on the TOP layer 5 and the BOT layer 6 is respectively provided with a test pin point on the side away from the matrix blind hole 1. The test pin points on the TOP layer 5 are two square PADs, one is the positive square PAD21, and the other is the negative square PAD2 2. The positive electrode square PAD21 is connected to the corresponding matrix blind hole 1. The test pin point on the BOT layer 6 is the BOT layer square PAD23. The BOT layer square PAD23 corresponds to the position of the negative electrode square PAD22 on the TOP layer 5. The BOT layer square PAD23 is connected to the matrix blind hole 1 corresponding to the BOT layer 6. A through-hole 4 is also provided in the negative electrode square PAD22 on the TOP layer 5 and in the BOT layer square PAD23 for realizing the detection of the BOT layer 6 on the TOP layer 5. The test fixing holes 3 of the TOP layer 5 and the BOT6 layer are respectively provided on both sides of the corresponding matrix blind hole 1;

[0042] S2: After the PCB circuit board is produced and the outer layer is etched, the HCT high current tester is used for detection. After the abnormality is detected, the real cause of the defect is analyzed to promote quality improvement. The HCT high current tester consists of an electrically connected voltage and current tester, a temperature tester, a micro resistance tester and a timer. The specific detection steps are as follows:

[0043] . Place the positive and negative probes of the high current tester on the two test pin points on the blind hole chain of the TOP layer respectively;

[0044] . Start the high current tester, use the voltage regulation mode, and input current for detection, where:

[0045] The voltage is controlled at 0-3V, and the input current is controlled at 0-30A;

[0046] During the power-on test, the temperature of the blind hole HCT Coupon increases. When the temperature reaches 200°C, the timer is started and the test continues for 60 seconds.

[0047] After starting the test program, the test system of the HCT high current tester will record the initial test resistance value and the maximum resistance value during the test, and automatically calculate the rate of change of its resistance value, and output the test curve based on the data taken every 5 seconds. Figure 2 As shown;

[0048] Figure 2 The display of the medium current is the sampling measurement of the output current by the device in the measuring instrument. When the sampling frequency is less than the frequency of current change, the unstable current jump is manifested. The sampling point is the displayed value of the current.

[0049] . According to the results of the HCT test of resistance change rate, products with resistance change rate > 10% are intercepted as defective products, and the intercepted products are sliced ​​and sampled to analyze the blind hole quality.

[0050] In this embodiment, the matrix blind holes respectively arranged on the TOP layer and the BOT layer of the HDI board in step S1 are composed of 10 rows of blind holes arranged in parallel with each other, each row is composed of 16 blind holes, and the HCT test coupon is composed of 16 blind holes / row * 10 rows = 160 blind holes * 2 sides, with a total of 320 blind holes.

[0051] In this embodiment, the aperture of each blind hole in the matrix blind hole is consistent with the aperture of the original blind hole in the HDI board.

[0052] In this embodiment, the blind hole ring in the matrix blind hole is 6 mil and the line width is 7 mil;

[0053] A matrix blind hole chain refers to blind holes (blind holes: consisting of aperture + hole ring) designed in a vertical and horizontal arrangement, and then the blind holes are connected with wires to form a complete blind hole chain.

[0054] In this embodiment, there are three test fixing holes in S1, which are evenly distributed at the triangle of the HDI board, and the diameter of the test fixing holes is 1.55 mm.

[0055] In this embodiment, the diameter of the two via holes is 0.35 mm.

[0056] The present invention designs an HDI blind hole chain, adopts the HCT current resistance test method, conducts online testing of the resistance change rate, and judges the reliability of the product, thereby discovering HDI blind hole quality problems in the process and intercepting them, thereby reducing potential quality risks. At the same time, it promotes process abnormality improvement, improves quality yield and HDI blind hole quality reliability.

[0057] In addition to the above embodiments, the present invention may also have other implementation modes. Any technical solution formed by equivalent replacement or equivalent transformation falls within the protection scope required by the present invention.

Claims

1. A HDI blind hole reliability quality detection and monitoring method, characterized in that: The specific steps include: S1: Matrix blind holes are arranged on the TOP layer and the BOT layer of the HDI board in a matrix arrangement, and the matrix blind holes on the TOP layer and the BOT layer are respectively designed for wiring. A TOP layer blind hole chain is formed between each blind hole on the TOP layer through the wiring design, and a BOT layer blind hole chain is formed between each blind hole on the BOT layer through the wiring design; The TOP layer and BOT layer of the HDI board are respectively provided with a test pin point, a test fixing hole and a via hole. The via holes on the TOP layer and the BOT layer of the HDI board are respectively arranged on one side of the corresponding matrix blind hole and connected to the matrix blind hole. The via hole connects the TOP layer blind hole chain with the BOT layer blind hole chain. The corresponding via holes on the TOP layer and the BOT layer are respectively provided with the test pin point on one side away from the matrix blind hole. The test pin point on the TOP layer is two square PADs, one for positive pole and the other for negative pole. The positive electrode square PAD is connected to the corresponding matrix blind hole, the test pin point on the BOT layer is the BOT layer square PAD, the BOT layer square PAD corresponds to the position of the negative electrode square PAD on the TOP layer, the BOT layer square PAD is connected to the matrix blind hole corresponding to the BOT layer, and a through-conducting hole is also provided in the negative electrode square PAD on the TOP layer and in the BOT layer square PAD for realizing the detection of the BOT layer on the TOP layer, and the test fixing holes of the TOP layer and the BOT layer are respectively arranged on both sides of the corresponding matrix blind hole; S2: After the PCB circuit board is produced and the outer layer is etched, the HCT high current tester is used for detection. After the abnormality is detected, the real cause of the defect is analyzed to promote quality improvement. The HCT high current tester consists of an electrically connected voltage and current tester, a temperature tester, a micro resistance tester and a timer. The specific detection steps are as follows: a. Place the positive and negative probes of the HCT high current tester on the two test pin points on the blind hole chain of the TOP layer respectively; b. Start the HCT high current tester, use the voltage stabilization mode, and input current for detection, where: The voltage regulation is controlled at 0-3V, and the input current is controlled at 0-30A; c. During the power-on test, the temperature of the blind hole HCT Coupon increases. When the temperature reaches 200°C, the timer is started and the test continues for 60 seconds. d. After starting the test program, the test system of the HCT high current tester will record the initial test resistance value and the maximum resistance value during the test, and automatically calculate the rate of change of its resistance value, and output the test curve based on the data taken every 5 seconds; e. According to the test results of resistance change rate, products with resistance change rate > 10% are intercepted as defective products, and the intercepted products are sliced ​​and sampled to analyze the blind hole quality to promote quality improvement.

2. The HDI blind hole reliability quality detection and monitoring method according to claim 1, characterized in that: The matrix blind holes respectively arranged on the TOP layer and the BOT layer of the HDI board in the step S1 are composed of 10 rows of blind holes arranged in parallel with each other, and each row has 16 blind holes.

3. The HDI blind hole reliability quality detection and monitoring method according to claim 1, characterized in that: The aperture of each blind hole in the matrix blind hole is consistent with the aperture of the original blind hole in the HDI board.

4. The HDI blind hole reliability quality detection and monitoring method according to claim 1, characterized in that: The blind hole ring in the matrix blind hole is 6 mil and the line width is 7 mil.

5. The HDI blind hole reliability quality detection and monitoring method according to claim 1, characterized in that: There are three test fixing holes in S1, which are evenly distributed at three corners of the HDI board, and the diameter of the test fixing holes is 1.55 mm.

6. The HDI blind hole reliability quality detection and monitoring method according to claim 1, characterized in that: The diameters of the two vias are both 0.35 mm.

Citation Information

Patent Citations

  • Method for detecting reliability of electrical interconnection of buried holes of high density interconnector (HDI) board

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