Method for manufacturing a three-dimensional electrode

Abstract

The application relates to the technical field of semiconductors, and provides a preparation method of a three-dimensional electrode, which comprises the following steps: manufacturing a wafer mask plate, wherein the wafer mask plate is provided with a plurality of first hollow patterns, the shape of each first hollow pattern is matched with the cross-sectional shape of the electrode, and the position of each first hollow pattern is the same as the target position of the electrode on a film-to-be-coated wafer; temporarily bonding the wafer mask plate with the surface of the film-to-be-coated wafer; and evaporating the electrode at the position opposite to the first hollow pattern on the film-to-be-coated wafer. The preparation method of the three-dimensional electrode provided by the application realizes the submicron-level accurate layout of the electrode on the film-to-be-coated wafer by manufacturing the wafer mask plate and temporarily bonding the wafer mask plate with the surface of the film-to-be-coated wafer, so that there is no gap between the wafer mask plate and the film-to-be-coated wafer and the wafer mask plate cannot move relative to the film-to-be-coated wafer, the gap between the evaporated electrode position and the target position is reduced, and the accuracy of preparing the three-dimensional electrode on the film-to-be-coated wafer is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for fabricating a three-dimensional electrode. Background Technology

[0002] The manufacturing of Microelectromechanical Systems (MEMS) differs from that of integrated circuits. In addition to wafer surface processing, it involves more bulk processing. A significant portion of MEMS often requires etching the wafer itself to form non-planar special structures. In some cases, it is even necessary to perform through etching to form a hollow structure. Subsequent microelectronic processing and metal electrode fabrication need to be carried out on the surface and sides of such hollow wafers. At this time, ordinary photolithography methods cannot be used on such hollow wafers, and it is impossible to use photolithography combined with etching to fabricate metal electrodes, especially when electrodes also need to be placed on the sides of the hollow areas.

[0003] In such cases, fabricating three-dimensional electrodes for microelectromechanical systems (MEMS) using a metal hard mask and electron beam evaporation is a commonly used method. This method differs from photolithography, which uses a mask, photoresist, exposure, development, and etching to create patterns. Instead, it directly uses a patterned, hollowed-out metal sheet, fixed to the wafer to be coated, allowing thin film deposition in the hollowed-out areas, achieving patterning upon deposition. The advantage of this method lies in the superior linearity of electron beam evaporation compared to magnetron sputtering. By adjusting the angle between the metal hard mask and the wafer, not only can patterned deposition occur on the surface of the wafer, but electrodes can also be deposited on its sides, thus creating surface and side electrodes and forming electrical interconnects.

[0004] However, this method often lacks high alignment accuracy. It typically employs a combination of optical and mechanical alignment to align the metal hard mask with the wafer to be coated. Furthermore, it is limited by the fixation issues between the metal hard mask and the wafer, making slippage easy. Additionally, tiny gaps often exist between the metal hard mask and the wafer, making it difficult to achieve micron-level precise electrode placement on the wafer. This can also lead to deviations between the deposited electrode positions and the target positions. Significant electrode misalignment can often result in short circuits or open circuits. Summary of the Invention

[0005] This invention provides a method for preparing a three-dimensional electrode to solve the defect of large positional deviation of the electrode during evaporation on the wafer to be coated in the prior art.

[0006] This invention provides a method for fabricating a three-dimensional electrode, comprising: fabricating a wafer mask, wherein the wafer mask has a plurality of first hollow patterns, the shape of each first hollow pattern matching the cross-sectional shape of the electrode, and the position of each first hollow pattern being the same as the target position of the electrode on the wafer to be coated; temporarily bonding the wafer mask to the surface of the wafer to be coated; and depositing the electrode at the position of the wafer to be coated opposite to the first hollow patterns.

[0007] According to a method for fabricating a three-dimensional electrode provided by the present invention, the step of fabricating a wafer mask includes: cleaning the wafer, coating the wafer with photoresist, and fabricating a plurality of second hollow patterns on the photoresist using a photolithography method, wherein the plurality of second hollow patterns are located at the same position as the plurality of first hollow patterns, and the shape of the second hollow patterns is the same as the shape of the first hollow patterns.

[0008] According to a method for fabricating a three-dimensional electrode provided by the present invention, the step of fabricating a wafer mask further includes: etching the first hollow pattern at a position opposite to the second hollow pattern on the wafer to obtain the wafer mask.

[0009] According to a method for fabricating a three-dimensional electrode provided by the present invention, after the step of cleaning the wafer and before the step of coating the photoresist on the wafer, the step of fabricating a wafer mask further includes: fabricating a metal resist layer on the wafer; and coating the photoresist on the metal resist layer.

[0010] According to a method for fabricating a three-dimensional electrode provided by the present invention, the step of fabricating a wafer mask further includes: etching a plurality of third hollow patterns at positions opposite to the second hollow pattern on the metal resist layer, wherein the shape of the third hollow pattern is the same as the shape of the second hollow pattern.

[0011] According to a method for fabricating a three-dimensional electrode provided by the present invention, the step of fabricating a wafer mask further includes: etching the first hollow pattern at a position opposite to the third hollow pattern on the wafer to obtain the wafer mask.

[0012] According to a method for fabricating a three-dimensional electrode provided by the present invention, the step of temporarily bonding the wafer mask to the surface of the wafer to be coated includes: aligning and bonding the wafer mask to the wafer to be coated using a temporary bonding adhesive.

[0013] According to a method for fabricating a three-dimensional electrode provided by the present invention, the wafer is a silicon wafer or a quartz glass wafer, and the thickness of the wafer is 100 micrometers to 300 micrometers.

[0014] According to a method for preparing a three-dimensional electrode provided by the present invention, the thickness of the metal resist layer is 100 nanometers to 300 nanometers.

[0015] According to a method for fabricating a three-dimensional electrode provided by the present invention, the method further includes: unbonding the wafer mask from the wafer to be coated.

[0016] The method for fabricating three-dimensional electrodes provided by this invention involves creating a wafer mask and temporarily bonding the wafer mask to the surface of the wafer to be coated, so that there are no gaps between the wafer mask and the wafer to be coated and there is no relative movement. This achieves a sub-micron level precise layout of the electrodes on the wafer to be coated, thereby reducing the gap between the electrode position and the target position and improving the accuracy of fabricating three-dimensional electrodes on the wafer to be coated. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a flowchart of the method for preparing a three-dimensional electrode provided by the present invention;

[0019] Figure 2 This is a schematic diagram of the structure of the wafer mask provided by the present invention;

[0020] Figure 3 This is a top view of the assembly of the wafer to be coated, the wafer mask, and the electrode provided by the present invention;

[0021] Figure 4 This is a front view of the vapor-deposited surface electrode of the assembly of the wafer to be coated, the wafer mask, and the electrode provided by the present invention;

[0022] Figure 5 This is a front view of the assembly of the wafer to be coated, the wafer mask, and the electrode provided by the present invention, which is used for vapor deposition of the side electrode.

[0023] Figure label:

[0024] 10: Wafer mask; 11: First cutout pattern; 20: Electrode; 30: Wafer to be coated. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0026] The terms "first" and "second" in the specification and claims of this invention may explicitly or implicitly include one or more of those features. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0027] The following is combined Figures 1-5 The method for preparing the three-dimensional electrode of the present invention is described.

[0028] like Figure 1 As shown, in one embodiment of the present invention, the method for preparing a three-dimensional electrode specifically includes the following steps:

[0029] Step 101: Fabricate a wafer mask 10, wherein the wafer mask 10 has a plurality of first cutout patterns 11, the shape of each first cutout pattern 11 matches the cross-sectional shape of the electrode 20, and the position of each first cutout pattern 11 is the same as the target position of the electrode 20 on the wafer 30 to be coated.

[0030] Specifically, such as Figure 2 As shown, in this embodiment, the wafer mask 10 differs from existing optical masks. The wafer mask 10 uses a silicon wafer or quartz glass wafer as a substrate and employs photolithography to perform pattern transfer, giving the wafer a specific first cutout pattern 11. The shape of this first cutout pattern 11 matches the cross-sectional shape of the electrode, and the position of the first cutout pattern 11 on the wafer is the same as the target position of the electrode 20 on the wafer 30 to be coated. Further, in this embodiment of the invention, the wafer thickness is 100-300 micrometers.

[0031] Step 102: Temporarily bond the wafer mask 10 to the surface of the wafer 30 to be coated.

[0032] Specifically, temporary bonding adhesive is applied to the surface of the wafer 30 to be coated. Then, the bonding alignment module in the lithography machine module is used to align and clamp the wafer mask 10 with the surface of the wafer 30 to be coated. Then, the wafer mask 10 and the wafer 30 to be coated are bonded together in the bonding machine by temporary bonding.

[0033] Step 103: Deposit electrode 20 at the position opposite to the first cutout pattern 11 on the wafer 30 to be coated.

[0034] Specifically, the wafer 30 to be coated and the wafer mask 10, which are bonded together, are placed in the chamber of the vapor deposition equipment, and the side electrodes and surface electrodes are prepared by adjusting the orientation and angle of the assembly.

[0035] The method for fabricating three-dimensional electrodes provided in this invention involves creating a wafer mask and temporarily bonding the wafer mask to the surface of the wafer to be coated. This ensures that there are no gaps between the wafer mask and the wafer and that they do not move relative to each other. This achieves a sub-micron level of precise electrode placement on the wafer to be coated, thereby reducing the gap between the electrode position and the target position and improving the accuracy of fabricating three-dimensional electrodes on the wafer to be coated.

[0036] Furthermore, in one embodiment of the present invention, the step of fabricating the wafer mask 10 includes: cleaning the wafer, coating the wafer with photoresist, and preparing a plurality of second cutout patterns on the photoresist using a photolithography method, wherein the shape of the second cutout patterns is the same as the shape of the first cutout pattern 11.

[0037] Specifically, when preparing the wafer mask 10, the wafer is first cleaned, and then a layer of photoresist is coated on the wafer surface. Multiple second hollow patterns are prepared on the photoresist using photolithography. The position and size of each second hollow pattern are the same as the position and size of the first hollow pattern 11.

[0038] Optionally, the step of fabricating the wafer mask 10 further includes: preparing a first cutout pattern 11 at a position opposite to the second cutout pattern on the wafer to obtain the wafer mask 10.

[0039] Specifically, such as Figure 3 As shown, a dry etching method is used to perform through etching at the position opposite to the second hollow pattern on the wafer, hollowing out the desired pattern area on the wafer to prepare the first hollow pattern 11. The position of the first hollow pattern 11 is the same as the target position of the electrode 20 to be deposited, and the shape of the first hollow pattern 11 is also the same as the cross-sectional shape of the electrode 20, so as to accurately deposit the electrode 20 on the wafer 30 to be coated.

[0040] The method for fabricating a three-dimensional electrode provided in this invention involves coating a wafer with photoresist, fabricating a second hollow pattern on the photoresist using photolithography, and then using the photoresist as a mask to fabricate a first hollow pattern on the wafer, thereby obtaining a wafer mask. During the fabrication process, the photoresist adheres to the wafer, ensuring there are no gaps between them and preventing relative misalignment. This guarantees the accuracy of the position and shape of the first hollow pattern and improves the precision of the wafer mask fabrication.

[0041] Optionally, the wafer mask 10 can also be prepared using a wet etching method. Specifically, when preparing the wafer mask 10 using a wet etching method, after wafer cleaning, a metal resist layer is first prepared on the wafer, and then photoresist is coated on the metal resist layer. Optionally, the metal resist layer can be a Ti / Au thin film layer or a Cr / Au thin film layer. The thickness of the metal resist layer can be between 100 and 300 nanometers.

[0042] Furthermore, the step of preparing the wafer mask 10 using the wet etching method also includes: preparing a plurality of third hollow patterns at positions opposite to the metal resist layer and the second hollow pattern, wherein the shape of the third hollow pattern is the same as the shape of the second hollow pattern.

[0043] Specifically, in this embodiment, multiple second hollow patterns are first prepared on the photoresist using photolithography. Then, using the photoresist as a mask, a third hollow pattern is prepared on the metal resist layer. Since the photoresist is bonded to the metal resist layer, there are no gaps between the photoresist and the metal resist layer, and there is no misalignment between the photoresist and the metal resist layer. Using the photoresist as a mask to prepare the third hollow pattern on the metal resist layer can ensure that the positional deviation between the third hollow pattern and the second hollow pattern is extremely small, thereby ensuring the accuracy of preparing the first hollow pattern 11 on the wafer.

[0044] Furthermore, the step of preparing the wafer mask 10 by wet etching also includes: etching the first cutout pattern 11 at the position opposite to the third cutout pattern on the wafer to obtain the wafer mask 10.

[0045] Specifically, after the third cutout pattern is fabricated on the metal resist layer, the metal resist layer can be used as a mask to fabricate the first cutout pattern 11 on the wafer. Since the metal resist layer is attached to the wafer and there is no relative offset between the metal resist layer and the wafer, using the metal resist layer as a mask to fabricate the first cutout pattern 11 on the wafer can also ensure that the positional deviation between the first cutout pattern and the third cutout pattern is minimal, thereby ensuring the accuracy of the position and shape of the first cutout pattern 11.

[0046] The method for fabricating a three-dimensional electrode provided in this invention involves fabricating a metal resist layer on a wafer, coating the metal resist layer with photoresist, firstly fabricating a second cutout pattern on the photoresist using photolithography, then using the photoresist as a mask to fabricate a third cutout pattern on the metal resist layer, and finally using the metal resist layer as a mask to fabricate a first cutout pattern on the wafer, thereby obtaining a wafer mask. During the fabrication process, since there are no gaps between the wafer, the metal resist layer, and the photoresist, and no positional shift occurs between them, the accuracy of the position and shape of the first cutout pattern on the wafer is ensured, thereby improving the precision of the wafer mask fabrication and reducing the difference between the actual position and the target position of the vapor-deposited electrode.

[0047] In an embodiment of the present invention, the step of temporarily bonding the wafer mask 10 to the wafer 30 to be coated specifically includes: aligning and bonding the wafer mask 10 and the wafer 30 to be coated using temporary bonding adhesive.

[0048] Specifically, a temporary bonding adhesive is applied to the surface of the wafer 30 to be coated. Then, the bonding alignment module in the lithography machine module is used to align and clamp the wafer mask 10 with the surface of the wafer 30 to be coated. Then, the wafer mask 10 is placed in the bonding machine and the wafer 30 to be coated is bonded together by a temporary bonding method.

[0049] The method for fabricating three-dimensional electrodes provided in this invention achieves submicron-level alignment accuracy by temporarily bonding a wafer mask to the wafer to be coated, ensuring the precise submicron-level layout of the electrodes on the surface and sides of the wafer to be coated. Simultaneously, because the wafer mask and the wafer to be coated are more closely bonded, the actual position of the deposited electrode is within the submicron level of the target position. Compared to conventional methods of fabricating three-dimensional electrodes using metal hard masks, this significantly improves the accuracy and yield of the electrode layout.

[0050] In an embodiment of the present invention, the method for preparing a three-dimensional electrode further includes: unbonding the wafer mask 10 to the wafer 30 to be coated.

[0051] Specifically, such as Figure 4 and Figure 5 As shown, the wafer 30 to be coated and the wafer mask 10, which are bonded together, are placed in the chamber of the vapor deposition equipment. By adjusting the orientation and angle of the assembly, the side electrodes and surface electrodes are prepared. Finally, by debonding, the wafer mask 10 is separated from the wafer 30 to be coated, completing the preparation of the three-dimensional electrodes of the wafer 30 to be coated.

[0052] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for fabricating a three-dimensional electrode, characterized in that, include: Fabricating a wafer mask, wherein the wafer mask has a plurality of first cutout patterns, the shape of each first cutout pattern matches the cross-sectional shape of the electrode, and the position of each first cutout pattern is the same as the target position of the electrode on the wafer to be coated. The steps for fabricating the wafer photomask include: Cleaning the wafer; A metal resist layer is prepared on the wafer; Photoresist is coated onto the metal resist layer; Multiple second hollow patterns are prepared on the photoresist using photolithography. The multiple second hollow patterns are in the same position as the multiple first hollow patterns, and the shape of the second hollow patterns is the same as the shape of the first hollow patterns. Using the photoresist as a mask, a plurality of third hollow patterns are etched at positions opposite to the second hollow pattern on the metal resist layer, wherein the shape of the third hollow pattern is the same as the shape of the second hollow pattern; Using the metal resist layer as a mask, the first cutout pattern is etched at the position opposite to the third cutout pattern on the wafer to obtain the wafer mask. Temporarily bond the wafer mask to the surface of the wafer to be coated; Electrodes are deposited at positions on the wafer to be coated that are opposite to the first cutout pattern.

2. The method for preparing a three-dimensional electrode according to claim 1, characterized in that, The step of temporarily bonding the wafer mask to the surface of the wafer to be coated includes: The wafer mask is aligned and bonded to the wafer to be coated using temporary bonding adhesive.

3. The method for preparing a three-dimensional electrode according to claim 1, characterized in that, The wafer is a silicon wafer or a quartz glass wafer, and the thickness of the wafer is 100 micrometers to 300 micrometers.

4. The method for preparing a three-dimensional electrode according to claim 1, characterized in that, The thickness of the metal anti-corrosion layer is 100 nanometers to 300 nanometers.

5. The method for preparing a three-dimensional electrode according to claim 1, characterized in that, The preparation method further includes: The wafer mask is unbonded to the wafer to be coated.

Images