Supercapacitor detection device and method, medium and computer equipment

Abstract

The present disclosure provides a supercapacitor detection device and method, a medium and a computer device. The supercapacitor detection device includes: a processing circuit, which is electrically connected to the detection point of a supercapacitor module including multiple capacitor modules connected in series through multiple lines, and outputs multiple detection voltage values ​​after amplifying and filtering the voltage detected at each detection point; a sampling circuit, which samples the multiple detection voltage values ​​and outputs multiple sampled voltage values; a processor, which receives the multiple sampled voltage values ​​and determines whether the voltage of the supercapacitor module is balanced based on the multiple sampled voltage values.

Description

Technical Field

[0001] The present disclosure relates to the field of supercapacitors, and in particular, to a supercapacitor detection device and method, a medium and a computer device. Background Art

[0002] As the total installed capacity of wind turbines continues to rise, the industry's requirements for the performance and operational reliability of wind turbines are also gradually increasing.

[0003] The variable pitch system is one of the core subsystems of the control system of a wind turbine. It has two main functions: first, when the wind turbine is operating normally, the pitch angle is adjusted according to the change of wind speed to achieve power regulation and control; second, when a wind turbine fails, the propellers are quickly retracted to the shutdown position to achieve pneumatic braking and ensure the safety of the wind turbine.

[0004] For the variable pitch system, when the grid voltage is normal, the power to drive the variable pitch motor to retract the propellers is provided by grid rectification; when the grid voltage drops or the power is cut off, a backup power supply is required to provide DC voltage to the variable pitch drive to achieve safe blade alignment and achieve safe operation.

[0005] As the use time of the supercapacitor used as the backup power supply of the pitch drive increases, the internal resistance of the supercapacitor will increase and the capacitance will decay, which will cause severe heating of the supercapacitor cells and cell overvoltage. In extreme cases, there may be risks of explosion and fire.

[0006] Once there is a problem with the supercapacitor, the wind turbine will not be able to retract its blades normally in the event of a power outage or other faults, and there is a risk of runaway.

[0007] At present, most high-voltage pitch systems do not monitor the voltage of supercapacitors, which greatly reduces the safety and reliability of wind turbine operation. Some pitch systems detect the temperature and voltage of supercapacitors, but there are at least one of the following problems: a small number of acceptable input channels, low operating reliability, and a high false alarm rate, which is far from meeting the high reliability requirements of the wind power industry. Summary of the invention

[0008] One of the purposes of the present disclosure is to provide a supercapacitor detection device capable of determining whether a supercapacitor module is balanced.

[0009] One of the purposes of the present disclosure is to provide a supercapacitor detection device capable of reducing the false alarm rate.

[0010] According to one aspect of the present disclosure, a supercapacitor detection device is provided, which includes: a processing circuit, which is electrically connected to a detection point of a supercapacitor module including a plurality of capacitor modules connected in series with each other through a plurality of lines, and outputs a plurality of detection voltage values ​​accordingly after amplifying and filtering the voltage detected at each detection point; a sampling circuit, which samples the plurality of detection voltage values ​​and outputs the plurality of sampled voltage values; and a processor, which receives the plurality of sampled voltage values ​​and determines whether the voltage of the supercapacitor module is balanced based on the plurality of sampled voltage values.

[0011] According to another aspect of the present disclosure, a supercapacitor detection method is provided, which includes: amplifying and filtering the voltage of a detection point of a supercapacitor module including a plurality of capacitor modules connected in series to obtain a plurality of detection voltage values; sampling the plurality of detection voltage values ​​and obtaining a plurality of sampled voltage values; and determining whether the voltage of the supercapacitor module is balanced based on the plurality of sampled voltage values.

[0012] According to another aspect of the present disclosure, a computer-readable storage medium is provided, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the above-mentioned supercapacitor detection method is implemented.

[0013] According to another aspect of the present disclosure, a computer device is provided, which includes a processor and a memory, wherein a program or instruction is stored in the memory, and the program or instruction implements the above-mentioned supercapacitor detection method when executed by the processor.

[0014] The supercapacitor detection device according to the embodiment of the present disclosure can determine whether the supercapacitor module is balanced.

[0015] The supercapacitor detection device according to the embodiment of the present disclosure can reduce the false alarm rate.

[0016] The supercapacitor detection device according to the embodiment of the present disclosure is highly customizable and can adapt to different voltage and energy requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects and features of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure in conjunction with the accompanying drawings, in which:

[0018] Figure 1 is a block diagram showing a supercapacitor detection device according to an embodiment of the present disclosure;

[0019] Figure 2 is a schematic diagram showing a connection method between a supercapacitor detection device and a supercapacitor module according to an embodiment of the present disclosure;

[0020] Figure 3 is a schematic diagram showing a sampling process of an embodiment of the present disclosure; and

[0021] Figures 4 to 7 Detailed description is a flow chart showing a supercapacitor detection method according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] The preferred embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings, with the same reference numerals referring to the same components throughout. The terms used in the present disclosure are explained below.

[0023] Supercapacitor: also known as electrochemical capacitor, double-layer capacitor, golden capacitor, farad capacitor, is an electrochemical component developed in the 1970s and 1980s that stores energy through polarized electrolytes. It is different from traditional chemical power sources. It is a power source between traditional capacitors and batteries with special properties. It mainly relies on double-layer and redox pseudocapacitive charges to store electrical energy. However, no chemical reaction occurs during the energy storage process. This energy storage process is reversible, and it is precisely because of this that supercapacitors can be charged and discharged repeatedly for hundreds of thousands of times.

[0024] Supercapacitor module: A combination of multiple supercapacitor cells connected in series and / or in parallel, with a voltage balancing and detection system, and assembled in a shell.

[0025] Pitch control system: a device for adjusting the angle of the blades, mainly including pitch controller, pitch motor, pitch servo drive, backup power supply and other components.

[0026] Backup power supply: In the field of wind power, it is a power supply used to provide energy support for the pitch control system when the power grid loses power.

[0027] The supercapacitor detection device and supercapacitor detection method according to the embodiments of the present disclosure are not limited to the wind power field, but can also be used for voltage balance detection of supercapacitors in other fields.

[0028] The supercapacitor module, which is mainly formed by multiple supercapacitor cells connected in series, can be used as a backup power supply. Due to the series relationship, any problem with any supercapacitor cell will cause the entire backup power supply to fail or malfunction. To this end, every N (N can be a positive integer, for example, N can be 30, 60, etc.) supercapacitor cells can be used as a minimum detection unit, and a detection circuit can be arranged to perform voltage detection on the entire power supply system.

[0029] Figure 1 is a block diagram showing a supercapacitor detection device according to an embodiment of the present disclosure, Figure 2 is a schematic diagram showing a connection method between a supercapacitor detection device and a supercapacitor module according to an embodiment of the present disclosure, Figure 3 is a schematic diagram showing a sampling process according to an embodiment of the present disclosure.

[0030] like Figure 1As shown, the supercapacitor detection device according to an embodiment of the present disclosure may include a processing circuit 200 , a sampling circuit 300 , and a processor 400 .

[0031] The processing circuit 200 can be used to amplify and filter the voltage detected at each detection point of the super capacitor module 100 and output a corresponding detection voltage value.

[0032] The processing circuit 200 may include an amplifier and a filter. The amplifier may be implemented by an operational amplifier. The filter may be a 2-pole, low-pass Butterworth filter. The filter may be arranged after the amplifier.

[0033] The amplifier can be a differential amplifier, and its typical characteristics can accept high common-mode voltage (range: ±600V). Specifically, the amplifier can have a very high input common-mode voltage range and can accurately measure differential signals under high common-mode voltage conditions of up to ±600V. The amplifier can replace expensive isolation amplifiers and can provide common-mode or differential transient voltage protection of up to ±600V for the input.

[0034] The positive input and negative input of the differential amplifier can be electrically connected to the two ends of the minimum detection unit (for example, a capacitor module), respectively, the output of the differential amplifier can be electrically connected to the input of the filter, and the output of the filter can be electrically connected to the sampling circuit 300.

[0035] The configuration of the processing circuit 200 described above is merely an example, and the processing circuit 200 is not limited to a specific type of amplifier and filter.

[0036] The supercapacitor module 100 may include multiple capacitor modules connected in series. The processing circuit 200 may be electrically connected to the detection point of the supercapacitor module through multiple lines, and output multiple detection voltage values ​​after amplifying and filtering the voltage detected at the detection point.

[0037] like Figure 1 and Figure 2 As shown, the detection voltage value can be obtained by detecting the voltage (differential mode voltage) across the unit capacitors including the same number of supercapacitor cells, and the detection method is not specifically limited.

[0038] The supercapacitor module may include multiple supercapacitor cells connected in various ways.

[0039] The super capacitor module may include multiple capacitor modules, the multiple capacitor modules may include a first capacitor unit and a second capacitor unit connected in parallel, each of the first capacitor unit and the second capacitor unit may include multiple capacitors connected in series. The voltage across each of the first capacitor unit and the second capacitor unit may be 450V, which may be determined according to the number of super capacitor cells included in each capacitor module.

[0040] like Figure 1 As shown, the first capacitor unit may include a first capacitor module C1, a second capacitor module C2 and a third capacitor module C3 connected in series, the second capacitor unit may include a fourth capacitor module C4, a fifth capacitor module C5 and a sixth capacitor module C6 connected in series, and the capacitor modules C1~C6 include the same number of capacitor monomers (super capacitor monomers).

[0041] Taking the first capacitor unit as an example, each capacitor module may include two capacitor units, and each capacitor unit may include multiple capacitor monomers. In other words, each capacitor module may be divided into multiple unit capacitors, and each unit capacitor may include multiple super capacitor monomers.

[0042] like Figure 2 As shown, the first capacitor module C1 may include a first unit capacitor C11 and a second unit capacitor C12, the second capacitor module C2 may include a third unit capacitor C21 and a fourth unit capacitor C22, the third capacitor module C3 may include a fifth unit capacitor C31 and a sixth unit capacitor C32, and each unit capacitor may include multiple super capacitor cells, for example, 30 super capacitor cells.

[0043] Detection points can be set for unit capacitors, and the number of supercapacitor monomers detected by all detection points is the same. A detection point can be set between adjacent capacitor modules, or a detection point can be set between two adjacent unit capacitors, as long as the number of supercapacitor monomers detected by each detection point is the same.

[0044] like Figure 2 As shown, the voltage of the unit capacitor detected at each detection point can be divided by a voltage divider circuit. That is, each capacitor module can be connected in parallel with a voltage divider circuit, and each voltage divider circuit can be divided by a first voltage divider resistor R1 and a second voltage divider resistor R2 connected in series.

[0045] The positive input terminal and the negative input terminal of the differential amplifier may be electrically connected to two ends of the second voltage-dividing resistor R2 , respectively.

[0046] The resistance value of the first voltage-dividing resistor R1 may be 10 times the resistance value of the second voltage-dividing resistor R2. For example, the first voltage-dividing resistor R1 may be 47 kΩ, and the second voltage-dividing resistor R2 may be 4.7 kΩ. The resistance values ​​of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 and the resistance ratio of the two voltage-dividing resistors disclosed in the embodiment of the present invention are only examples. When implemented specifically, they may be determined according to specific application scenarios. For example, the resistance values ​​and resistance ratio of the two voltage-dividing resistors may be determined according to the parameters of the amplifying filter.

[0047] The first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 are used to divide the differential voltage of the unit capacitor to reduce the voltage as the input of the processing circuit 200. At this time, the differential voltage of 0-75V is reduced to 0-2.419V.

[0048] The voltage division design of the differential mode voltage of the unit capacitor can be exactly the same. Each detection point can be connected to a third resistor R3, the resistance of the third resistor R3 can be the same as the resistance of the first voltage dividing resistor R1, and the path of the fifth unit capacitor C31 can be additionally connected in series with a resistor R14, whose resistance can be 47kΩ±1%, so that the detection circuit remains balanced.

[0049] The sampling circuit 300 may include an analog-to-digital converter. The sampling circuit 300 may sample the multiple detection voltage values ​​output by the processing circuit 200 and output multiple sampled voltage values.

[0050] The sampling rate of the sampling circuit 300 may be predetermined. For example, the sampling circuit 300 may perform a predetermined number of first samplings on a plurality of detection voltage values ​​at a first predetermined time interval to obtain a set of sampled voltage values ​​for each detection point.

[0051] For example, the sampling circuit 300 may sample the plurality of detection voltage values ​​five times at a time interval of 1 ms to obtain a set of sampled voltage values ​​for each detection point.

[0052] The processor 400 may receive a plurality of sampled voltage values ​​and determine whether the voltages of the super capacitor module are balanced based on the plurality of sampled voltage values.

[0053] For example, when at least one of the plurality of sampled voltage values ​​is not within a predetermined range, it is determined that the voltage of the super capacitor module is unbalanced.

[0054] When multiple groups of sampled voltage values ​​are obtained for multiple detection points, the processor 400 may determine whether the voltage of the super capacitor module is balanced based on the middle value of each group of sampled voltage values.

[0055] For example, when the middle value in each group of sampled voltage values ​​is not within a predetermined range, it is determined that the voltage of the supercapacitor module is unbalanced.

[0056] The predetermined range here may be [rated voltage-10% rated voltage, rated voltage+10% rated voltage], and the rated voltage may be predetermined based on the rated voltage and quantity of the supercapacitor cells.

[0057] Generally, the reference standard may be variable and may be determined based on the middle value of each group of sampled voltage values ​​detected in real time. Specifically, the reference standard may be the average value of the middle value of each group of sampled voltage values ​​detected in real time.

[0058] The processor 400 can determine whether the voltage of the supercapacitor module is balanced based on the difference between the median value of each group of sampled voltage values ​​and the average value determined based on all the median values. In addition, the processor 400 can also determine whether there is an overvoltage problem at each detection point of the supercapacitor module. As an example, when the difference between the average values ​​exceeds a predetermined threshold, it can be determined that the voltage of the supercapacitor module is unbalanced.

[0059] In one embodiment, the processor 400 can sort each group of sampled voltage values ​​and obtain intermediate values ​​respectively; calculate the average value of all intermediate values; calculate the difference between each intermediate value and the average value; obtain a flag bit based on each difference; sequentially store multiple flag bits corresponding to multiple groups of sampled voltage values ​​to obtain a first group of detection data; determine whether the voltage of the supercapacitor module is balanced based on the first group of detection data, wherein the number of bits of the flag bit corresponds to the number of detection points and the number of groups of sampled voltage values, respectively.

[0060] like Figure 3 As shown, the sampling circuit 300 can sample the detection voltage five times at intervals of 1 ms. For example, the sampling voltage values ​​A0, A1, A2, A3 and A4 can be obtained for the first detection point, the sampling voltage values ​​B0, B1, B2, B3 and B4 can be obtained for the second detection point, the sampling voltage values ​​C0, C1, C2, C3 and C4 can be obtained for the third detection point, and so on..., the sampling voltage values ​​K0, K1, K2, K3 and K4 can be obtained for the eleventh detection point, and the sampling voltage values ​​L0, L1, L2, L3 and L4 can be obtained for the twelfth detection point.

[0061] The processor 400 can sort each group of sampled voltage values ​​and obtain the intermediate values ​​respectively, that is, 12 intermediate values ​​can be obtained. The processor 400 can calculate the average value of all the intermediate values, and then calculate the difference between each intermediate value and the average value. The processor 400 can obtain a flag bit based on each difference. If the difference exceeds a predetermined threshold (for example, the absolute value of the difference is greater than 10% of the average value), a flag bit 1 can be obtained. If the difference does not exceed the predetermined threshold, a flag bit 0 can be obtained.

[0062] The processor 400 may sequentially store a plurality of flag bits corresponding to a plurality of groups of sampled voltage values ​​to obtain a first group of detection data. For example, the following detection data Flag1 may be obtained.

[0063] 0 1 0 0 1 0 0 1 0 0 0 0

[0064] That is, the processor 400 may set the corresponding flag to 0 in response to the difference being within the predetermined range, and set the corresponding flag to 1 in response to the difference not being within the predetermined range and determine the position of the detection point where the imbalance exists.

[0065] The processor 400 may determine the location of the detection point where the voltage imbalance exists. That is, the processor 400 may determine the voltage imbalance of the super capacitor module in response to the first set of detection data including the binary number 1.

[0066] For example, if the fifth, eighth, and eleventh flag bits are 1, it can be determined that there is an imbalance in the voltages at the fifth, eighth, and eleventh detection points, and the unit capacitors or capacitor modules at the corresponding positions can be replaced (multiple supercapacitor cells can be replaced at the same time).

[0067] The processor 400 can output the analog quantity state through the I / O port, and each LED light corresponds to the state of an analog quantity. The LED uses red. When the voltage at the detection point is normal, the I / O port can output a corresponding drive signal to make the LED not light up. When the voltage at the detection point is abnormal (voltage imbalance), the I / O port can output a corresponding drive signal to make the LED light up to indicate the specific fault point (i.e., the location of the unit capacitor or capacitor module with voltage imbalance).

[0068] The presentation method of the fault point is not limited to LED display, and other methods such as digital tubes, LCD screens, and LED coding may be used.

[0069] The sampling circuit 300 may perform a first sampling at a second predetermined time interval, and may perform such sampling N times (N is a natural number greater than or equal to 2), so as to obtain N groups of detection data, and the processor 400 may determine whether the voltage of the supercapacitor module is balanced based on the N groups of detection data. The second predetermined time interval here may be greater than the first predetermined time interval.

[0070] like Figure 3 As shown, three first samplings may be performed to obtain three sets of detection data Flag1, Flag2, and Flag3. The three sets of detection data may be as follows:

[0071]

[0072] When each of the three sets of detection data includes a binary number 1 and each set of detection data is exactly the same, it can be determined that the voltage of the supercapacitor module is unbalanced. In other words, if the voltage imbalance of the supercapacitor module is detected three times in succession within about 3 minutes, and the positions of the detection points of the voltage imbalance are the same, it can be determined that the supercapacitor module has a voltage imbalance problem, and then the supercapacitor monomer, unit or module at the corresponding position can be replaced.

[0073] That is, the processor 400 can determine that the voltage of the supercapacitor module is unbalanced in response to each of the N groups of detection data including the binary number 1 and each group of detection data is exactly the same, thereby greatly reducing the possibility of missed alarms and false alarms.

[0074] As an example, the flag bits may be stored in a first-in-first-out manner, and an alarm is outputted only when the flag bits of each of the three consecutive detection data are 1 and correspond to each other.

[0075] In addition, when the module is abnormal or fails, it will generally cause voltage fluctuations. An alarm output can be issued when the voltage fluctuation value reaches 2%.

[0076] Figures 4 to 7 Detailed description is a flow chart showing a supercapacitor detection method according to an embodiment of the present disclosure.

[0077] The supercapacitor detection method according to an embodiment of the present disclosure may include steps S410 to S430.

[0078] like Figure 4 As shown, in step S410, the voltage at the detection point of the super capacitor module including multiple capacitor modules connected in series can be amplified and filtered to obtain multiple detection voltage values ​​accordingly.

[0079] As described above, the supercapacitor module may include multiple capacitor modules, each capacitor module may include multiple unit capacitors, each unit capacitor may include multiple supercapacitor monomers, for example, the supercapacitor module may include 6 capacitor modules, each capacitor module may include two unit capacitors, each unit capacitor may include 30 supercapacitor monomers. The module or unit division method of the supercapacitor module is not specifically limited.

[0080] When a capacitor module is used as the minimum detection unit, the detection point may be located between two adjacent capacitor modules; when a unit capacitor is used as the minimum detection unit, the detection point may be located between two adjacent unit capacitors.

[0081] That is to say, detection points can be set for unit capacitors, and the number of supercapacitor monomers detected by each detection point is the same. A detection point can be set between adjacent capacitor modules, or a detection point can be set between two adjacent unit capacitors, as long as the number of supercapacitor monomers detected by each detection point is the same.

[0082] In step S420, a plurality of detection voltage values ​​are sampled to obtain a plurality of sampled voltage values.

[0083] The sampling method is not specifically limited. Sampling can be performed once for the detection voltage value of each detection point, thereby obtaining multiple sampled voltage values. The sampling method can also be as described above. Sampling can be completed once every 1 ms and completed 5 times in succession. This sampling method can be named the first sampling. The first sampling can be completed once every 1 min, and the first sampling can be completed multiple times (for example, 3, 5 or 8 times, etc.) in succession.

[0084] like Figure 5 As shown, step S420 of obtaining multiple sampled voltages may include the step of performing the first sampling multiple times. For example, step S420 of obtaining multiple sampled voltages may include step S4201: performing the first sampling of multiple detection voltage values ​​a predetermined number of times at a first predetermined time interval to obtain a set of sampled voltage values ​​for each detection point.

[0085] In step S430 , it may be determined whether the voltage of the super capacitor module is balanced based on the plurality of sampled voltage values.

[0086] For example, when at least one of the plurality of sampled voltage values ​​is not within a predetermined range, it is determined that the voltage of the super capacitor module is unbalanced.

[0087] When multiple groups of sampled voltage values ​​are obtained for multiple detection points, it can be determined whether the voltage of the supercapacitor module is balanced based on the middle value of each group of sampled voltage values.

[0088] The step S430 of determining whether the voltage of the super capacitor module is balanced may include: step S4301, determining whether the voltage of the super capacitor module is balanced based on the middle value of each group of sampled voltage values.

[0089] For example, when the middle value in each group of sampled voltage values ​​is not within a predetermined range, it is determined that the voltage of the supercapacitor module is unbalanced.

[0090] The predetermined range here may be as described above, and the rated voltage may be predetermined based on the rated voltage and quantity of the supercapacitor cells.

[0091] Generally, the reference standard may be variable and may be determined based on the middle value of each group of sampled voltage values ​​detected in real time. Specifically, the reference standard may be the average value of the middle value of each group of sampled voltage values ​​detected in real time.

[0092] Whether the voltage of the super capacitor module is balanced may be further determined based on a middle value of each group of sampled voltage values ​​and a difference between average values ​​determined based on all middle values.

[0093] like Figure 6 As shown, step S4301 of determining whether the voltage of the supercapacitor module is balanced based on the middle value of each group of sampled voltage values ​​may include step S4302: determining whether the voltage of the supercapacitor module is balanced based on the middle value of each group of sampled voltage values ​​and the difference between the average values ​​determined based on all the middle values.

[0094] As an example, when the difference between the intermediate value and the average value determined based on all the intermediate values ​​exceeds a predetermined threshold (eg, the absolute value of the difference is greater than 10% of the rated voltage), it may be determined that the voltage of the supercapacitor module is unbalanced.

[0095] As an example, the specific step of determining whether the voltage of the super capacitor module is balanced based on the middle value of each group of sampled voltage values ​​and the difference between the average values ​​determined based on all the middle values ​​may include steps S710 to S750.

[0096] like Figure 7 As shown, in step S710, each group of sampled voltage values ​​is sorted and intermediate values ​​are obtained respectively.

[0097] When sampling 12 ADCs, 12 groups of sampled voltage values ​​can be obtained, and the middle value of each group of sampled voltage values ​​can be obtained, that is, 12 middle values ​​can be obtained.

[0098] In step S720, the average of all intermediate values ​​is calculated.

[0099] In step S730, the difference between each intermediate value and the average value is calculated.

[0100] In step S740, a flag bit is obtained based on each difference value.

[0101] For example, if the difference exceeds a predetermined threshold (for example, the absolute value of the difference is greater than 10% of the average value), a flag bit 1 may be obtained; if the difference does not exceed the predetermined threshold, a flag bit 0 may be obtained.

[0102] A plurality of flag bits corresponding to a plurality of groups of sampled voltage values ​​may be sequentially stored to obtain a first group of detection data. For example, the following detection data Flag1 may be obtained.

[0103] 0 1 0 0 1 0 0 1 0 0 0 0

[0104] That is, in response to the difference being within the predetermined range, the corresponding flag bit can be set to 0, and in response to the difference not being within the predetermined range, the corresponding flag bit can be set to 1.

[0105] In step S750, it is determined whether the voltage of the supercapacitor module is balanced based on the first set of detection data, wherein the number of bits of the flag bit corresponds to the number of detection points and the number of groups of sampled voltages respectively.

[0106] As described above, for example, if the fifth, eighth, and eleventh flag bits are 1, it can be determined that there is an imbalance in the voltages at the fifth, eighth, and eleventh detection points, and the unit capacitors at the corresponding positions can be replaced (multiple supercapacitor cells can be replaced at the same time).

[0107] According to an embodiment of the present disclosure, N first samplings may be performed at a second predetermined time interval to obtain N groups of detection data, and whether the voltage of the supercapacitor module is balanced is determined based on the N groups of detection data, wherein N is a natural number greater than or equal to 2, and the second predetermined time is greater than the first predetermined time. For example, the sampling circuit 300 may detect the voltage state of the supercapacitor module once every 1 minute, and each large sampling includes 5 small samplings, and the small sampling interval is 1 ms.

[0108] Specifically, the first sampling may be performed once at intervals of 1 minute, and may be performed N times (N is a natural number greater than or equal to 2) to obtain N groups of detection data, and whether the voltage of the supercapacitor module is balanced may be determined based on the N groups of detection data.

[0109] Although the first sampling may be performed three times as described above, thereby obtaining three groups of detection data Flag1, Flag2 and Flag3, the number of groups of detection data may be set as required. For example, five groups of detection data may be obtained, including a first group of detection data Flag1, a second group of detection data Flag2, a third group of detection data Flag3, a fourth group of detection data Flag4, and a fifth group of detection data Flag5. The five groups of detection data may be as follows:

[0110]

[0111] In response to each set of detection data in the N sets of detection data including a binary number 1 and each set of detection data being completely identical, it may be determined that the voltage of the supercapacitor module is unbalanced.

[0112] As described above, each set of detection data can be stored in a first-in-first-out manner. When five sets of detection data detected continuously include identification bit 1 at the same position and each set of detection data is exactly the same, the voltage imbalance of the supercapacitor module is determined, and the position of the detection point of the voltage imbalance can be determined.

[0113] Each operation of the above steps can be written as a software program or instruction. Therefore, the supercapacitor detection method according to the exemplary embodiment of the present disclosure can be implemented via software. The computer-readable storage medium of the exemplary embodiment of the present disclosure can store a computer program. When the computer program is executed by a processor, the supercapacitor detection method of the exemplary embodiment described above is implemented.

[0114] The supercapacitor detection device according to the embodiment of the present disclosure can adapt to different voltage and energy requirements, which can save maintenance personnel a lot of work and improve efficiency.

[0115] The supercapacitor detection device according to the embodiment of the present disclosure has strong compatibility and can test the voltage of any supercapacitor.

[0116] The supercapacitor detection device according to the embodiment of the present disclosure can effectively solve the problems of high common-mode voltage and high differential-mode voltage of the supercapacitor.

[0117] The supercapacitor detection device and supercapacitor detection method according to the embodiments of the present disclosure can reduce the possibility of missed alarms and false alarms.

[0118] Although some exemplary embodiments of the present disclosure have been shown and described, it should be understood by those skilled in the art that, without departing from the principles and spirit of the present disclosure, which are defined by the claims and their equivalents, these embodiments may be modified and improved, for example, the technical features of different embodiments may be combined. These modifications and improvements are all within the scope of the present disclosure.

Claims

1. A supercapacitor detection device, characterized in that: include: A processing circuit is electrically connected to the detection points of the supercapacitor module including multiple capacitor modules connected in series through multiple lines, and outputs multiple detection voltage values ​​after amplifying and filtering the voltage detected at each detection point; A sampling circuit samples the multiple detection voltage values ​​and outputs multiple sampled voltage values; a processor, receiving the plurality of sampled voltage values, and determining whether the voltage of the supercapacitor module is balanced based on the plurality of sampled voltage values, The sampling circuit performs a first sampling of the plurality of detection voltage values ​​for a predetermined number of times at a first predetermined time interval to obtain a set of sampled voltage values ​​for each detection point. The processor determines whether the voltage of the super capacitor module is balanced based on the difference between the middle value of each group of sampled voltage values ​​and the average value determined based on all the middle values, The processor is configured to: Sort each group of sampled voltage values ​​and obtain the intermediate values ​​respectively; Calculate the average of all the middle values; calculating the difference between each intermediate value and the mean value; Obtain a flag bit based on each difference value; sequentially storing a plurality of flag bits corresponding to a plurality of groups of sampled voltage values ​​to obtain a first group of detection data; Based on the first group of detection data, it is determined whether the voltage of the supercapacitor module is balanced, wherein the number of bits of the flag bit corresponds to the number of detection points and the number of groups of sampled voltage values ​​respectively.

2. The supercapacitor detection device according to claim 1, characterized in that: In response to the difference being within a predetermined range, the processor sets a corresponding flag to 0; in response to the difference not being within the predetermined range, the processor sets a corresponding flag to 1 and determines the position of a detection point where an imbalance exists.

3. The supercapacitor detection device according to claim 2, characterized in that: The processor determines that the voltage of the super capacitor module is unbalanced in response to the first set of detection data including a binary number 1.

4. The supercapacitor detection device according to claim 2, characterized in that: The sampling circuit performs the first sampling N times at a second predetermined time interval, and the processor correspondingly obtains N groups of detection data, and determines whether the voltage of the supercapacitor module is balanced based on the N groups of detection data, wherein N is a natural number greater than or equal to 2, and the second predetermined time is greater than the first predetermined time.

5. The supercapacitor detection device according to claim 4, characterized in that: The processor determines that the voltage of the supercapacitor module is unbalanced in response to each set of detection data in the N sets of detection data including a binary number 1 and each set of detection data is exactly the same.

6. The supercapacitor detection device according to any one of claims 1 to 5, characterized in that: The multiple capacitor modules include a first capacitor unit and a second capacitor unit connected in parallel, the first capacitor unit includes a first capacitor module, a second capacitor module and a third capacitor module connected in series, the second capacitor unit includes a fourth capacitor module, a fifth capacitor module and a sixth capacitor module connected in series, and each capacitor module includes the same number of multiple capacitor cells.

7. The supercapacitor detection device according to claim 1, characterized in that: The processing circuit includes a differential amplifier and a filter, the positive input terminal and the negative input terminal of the differential amplifier are electrically connected to the two ends of the capacitor module respectively, the output terminal of the differential amplifier is electrically connected to the input terminal of the filter, and the output terminal of the filter is electrically connected to the sampling circuit.

8. The supercapacitor detection device according to claim 7, characterized in that: The capacitor module is connected in parallel with a voltage-dividing circuit, which includes a first voltage-dividing resistor and a second voltage-dividing resistor connected in series with each other, and the positive input terminal and the negative input terminal are electrically connected to two ends of the second voltage-dividing resistor, respectively.

9. A supercapacitor detection method, characterized in that: Amplifying and filtering the voltage of a detection point of a supercapacitor module including a plurality of capacitor modules connected in series to obtain a plurality of detection voltage values ​​accordingly; Sampling the multiple detection voltage values ​​and obtaining multiple sampled voltage values; Determine whether the voltage of the supercapacitor module is balanced based on the multiple sampled voltage values, The step of obtaining a plurality of sampled voltages comprises: performing a first sampling of the plurality of detection voltage values ​​for a predetermined number of times at a first predetermined time interval to obtain a set of sampled voltage values ​​for each detection point, The step of determining whether the voltage of the supercapacitor module is balanced comprises: determining whether the voltage of the supercapacitor module is balanced based on the difference between the middle value of each group of sampled voltage values ​​and the average value determined based on all the middle values, The step of determining whether the voltage of the supercapacitor module is balanced based on the middle value of each group of sampled voltage values ​​and the average value determined based on the plurality of middle values ​​comprises: Sort each group of sampled voltage values ​​and obtain the intermediate values ​​respectively; Calculate the average of all the middle values; calculating the difference between each intermediate value and the mean value; Obtain a flag bit based on each difference value; sequentially storing a plurality of flag bits corresponding to a plurality of groups of sampled voltage values ​​to obtain a first group of detection data; Based on the first group of detection data, it is determined whether the voltage of the supercapacitor module is balanced, wherein the number of bits of the flag bit corresponds to the number of detection points and the number of groups of sampled voltages respectively.

10. The supercapacitor detection method according to claim 9, characterized in that: In response to the difference being within a predetermined range, setting the corresponding flag bit to 0; In response to the difference not being within the predetermined range, the corresponding flag is set to 1 and the location of the detection point where the voltage imbalance exists is determined.

11. The supercapacitor detection method according to claim 10, characterized in that: The first sampling is performed N times at a second predetermined time interval to obtain N groups of detection data, and whether the voltage of the supercapacitor module is balanced is determined based on the N groups of detection data, wherein N is a natural number greater than or equal to 2, and the second predetermined time is greater than the first predetermined time.

12. The supercapacitor detection method according to claim 11, characterized in that: In response to each set of detection data in the N sets of detection data including a binary number 1 and each set of detection data is exactly the same, it is determined that the voltage of the supercapacitor module is unbalanced.

13. A computer-readable storage medium having a program or instruction stored thereon, characterized in that: When the program or instruction is executed by a processor, the supercapacitor detection method according to any one of claims 9 to 12 is implemented.

14. A computer device comprising a processor and a memory, wherein a program or an instruction is stored in the memory, wherein: When the program or instruction is executed by a processor, the supercapacitor detection method according to any one of claims 9 to 12 is implemented.

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