Method for processing upper dielectric layer of lower electrode and manufacturing process of lower electrode

Abstract

The application discloses a processing method of an upper dielectric layer of a lower electrode and a manufacturing process of the lower electrode. The processing method of the upper dielectric layer comprises the following steps: performing plasma spraying on a surface of an electrode layer to form the upper dielectric layer, wherein the spraying route of the plasma spraying is N scanning paths in S shape, and the starting points of the N scanning paths are staggered by a distance d in the same direction; sealing holes; grinding; and sand blasting, wherein the sand blasting route is the same as the spraying route. In the spraying and sand blasting processes of the upper dielectric layer, a plurality of offset paths are adopted, the uniformity of the superposition area is increased, the wave shape formed on the surface of the upper dielectric layer is reduced, and the uniformity of the surface of the upper dielectric layer is improved. Therefore, the non-uniform cooling of a glass substrate caused by the difference in the dry etching process is reduced, and the generation of mura in the dry etching process is reduced.

Description

Technical Field

[0001] This invention relates to the field of display screen processing technology, and in particular to a processing method for the upper dielectric layer of the lower electrode and a manufacturing process for the lower electrode. Background Technology

[0002] The lower electrode is a core component used in dry etching equipment for manufacturing LCD and AMOLED panels. Its main functions include: generating electrostatic adsorption force to fix the glass substrate by applying a DC voltage to the electrode layer; dissipating the heat generated during the dry etching process by cooling gas and coolant; and controlling the energy of the plasma by applying radio frequency voltage.

[0003] See appendix Figure 1 The diagram shows the structure of the lower electrode, including a metal substrate 1, a coating, and auxiliary structures (such as helium gas holes, lift-pin holes, and power connectors). The coating comprises a lower dielectric layer 2, an electrode layer 3, and an upper dielectric layer 4, formed sequentially from the metal substrate 1 to the farthest point from it. The electrode layer 3 is made of a conductive material. In use, a glass substrate 4 is placed on the surface of the processed lower electrode, i.e., the surface of the upper dielectric layer. A DC voltage of 0.5-5kV is applied to the electrode layer, thus generating static electricity of opposite polarity between the electrode layer and the glass substrate to attract the glass substrate.

[0004] The existing manufacturing process for the lower motor includes the following steps: substrate machining → lower dielectric layer spraying → electrode layer spraying → upper dielectric layer spraying → sealing → upper dielectric layer finishing → sandblasting → roughening layer spraying. However, when using the existing process, especially in the upper dielectric layer spraying step, when using plasma spraying to fabricate the dielectric layer, it is usually done according to... Figure 2 The above-ground dielectric layer spraying path is repeated 20-30 times on the electrode layer surface until the required thickness of the upper dielectric layer is achieved. The upper dielectric layer spraying path is serpentine, thus forming several parallel long lines on the surface of the dielectric layer, with a spacing of 5-20 mm between the lines. Because the ceramic powder exiting the spray gun during plasma spraying is dispersed, the width of the coating formed along each long line is greater than the interval between the lines; that is, there is overlap between adjacent lines. After multiple repetitions of the same path, the final coating surface has a wavy shape. (See attached diagram.) Figure 3As shown, during long-line spraying, an overlapping area is formed between two adjacent long lines. Although this wavy coating surface can be smoothed during the finishing step of the upper dielectric layer, the adhesion of the overlapping area is relatively poor. Therefore, during the sandblasting step, the film removal speed of the overlapping area is fast, and a wavy shape still appears on the surface of the upper dielectric layer. Simultaneously, because the sandblasting path is exactly the same as the upper dielectric layer spraying path, it is repeated along a single sandblasting path. Since the sand particles exiting the sandblasting gun are dispersed, the film removal efficiency is high in the area directly in front of the sandblasting gun, but lower around the perimeter. Therefore, the sandblasting process itself easily forms a wavy shape on the surface of the upper dielectric layer.

[0005] The surface of the upper dielectric layer processed using existing techniques inevitably exhibits localized discontinuities. During dry etching, these discontinuities lead to variations in the contact between the glass substrate and the electrode surface, resulting in uneven heat dissipation. In areas of poor heat dissipation, muras form. Muras generated during dry etching are currently one of the major problems plaguing the entire OLED panel industry, severely impacting OLED panel yield. Therefore, it is necessary to improve the manufacturing process of the upper dielectric layer to reduce discontinuities and thus reduce mura formation. Summary of the Invention

[0006] To overcome the above-mentioned shortcomings, the present invention aims to provide a method for processing the upper dielectric layer of the lower electrode, which produces an upper dielectric layer with high uniformity and fewer step differences, thereby reducing the possibility of mura formation during dry etching.

[0007] To achieve the above objectives, the technical solution adopted by this invention is: a method for processing the upper dielectric layer of the lower electrode, comprising the following steps: upper dielectric layer spraying, forming an upper dielectric layer by plasma spraying on the surface of the electrode layer, wherein the plasma spraying path is N S-shaped scanning paths, and the starting points of the N scanning paths are staggered by a distance d in the same direction; sealing, performing a sealing process on the upper dielectric layer formed by plasma spraying; grinding, grinding the upper dielectric layer after sealing until the flatness of its surface meets the preset requirements, and forming protrusions around the upper dielectric layer; sandblasting, masking the periphery of the ground upper dielectric layer, and sandblasting the unmasked area, wherein the sandblasting path is the same as the spraying path.

[0008] The beneficial effects of this invention are as follows: The molten metal spraying path employs N staggered S-shaped scanning paths, and the overlapping areas between the long molten metal rays of each scanning path are also staggered, making the entire surface of the upper dielectric layer more uniform and homogenizing the overlapping areas. This reduces the differences in adhesion between different areas of the upper dielectric layer, thereby reducing the discontinuity caused by poor adhesion in the overlapping areas during subsequent sandblasting processes. Similarly, during sandblasting, the same sandblasting path as the molten metal spraying path is used, which also includes N staggered S-shaped sandblasting paths. The offset between two adjacent sandblasting paths can homogenize the differences in surface morphology caused by the different etching rates at the center and edges of the sandblasting path.

[0009] During the melting and sandblasting processes of the upper dielectric layer, multiple offset paths are used, increasing the uniformity of the superimposed area, reducing the waviness formed on the surface of the upper dielectric layer, and improving the uniformity of the coating. This effectively reduces various discontinuities generated during the fabrication of the lower electrode, thereby reducing uneven cooling of the glass substrate caused by discontinuities during dry etching, and thus reducing the generation of mura during dry etching.

[0010] Furthermore, the starting point of the initial scan path is at a distance D from the product edge. When D ≥ number of melt sprays × d, melt spraying continues along the path until the dielectric layer thickness reaches the preset requirement. In this case, the starting point S of the first scan path must be at a relatively large distance D from the product edge, eliminating the need for repetition.

[0011] When D < number of spraying cycles × d, the spraying path is considered as one cycle, and the spraying path is repeated until the thickness of the upper dielectric layer reaches the preset requirement. That is, if the distance D from the starting point S of the first scanning path to the edge of the product is small, the thickness of the upper dielectric layer will not reach the preset requirement after N interlaced S-shaped scanning paths are sprayed. Therefore, N interlaced S-shaped scanning paths are repeated until the thickness of the upper dielectric layer meets the standard. However, in order to meet the uniformity of spraying, N cannot be less than 5.

[0012] Furthermore, the offset distance d is 1±0.5mm, and the step size of each scanning path is 5-10mm.

[0013] Furthermore, the grinding is performed on a grinding machine, with a grinding depth of 2μm per pass. The grinding tool used is a resin-embedded diamond particle tool, and the flatness of the upper dielectric layer after grinding is within 50μm. The resin provides a certain buffer for the tool, thus reducing the generation of tool marks. The roughness of the upper dielectric layer after grinding is about 1μm.

[0014] In further detail, during sandblasting, the width of the shielding is the width of the protrusion formed around the upper dielectric layer during grinding. The sandblasting material is No. 40-100 white corundum, the sandblasting pressure is 0.4-1MPa, and the roughness of the upper dielectric layer after sandblasting is Ra3-10μm.

[0015] Furthermore, during the upper dielectric layer deposition process, the deposition material used is either alumina or yttrium oxide, and the gas used to form the plasma is either argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The thickness of the upper dielectric layer formed by deposition is 400-700 μm.

[0016] The present invention also discloses a manufacturing process for a lower electrode, comprising the following steps: metal substrate processing; lower dielectric layer spraying, wherein a lower dielectric layer is formed on the surface of the metal substrate by plasma spraying; electrode layer spraying, wherein an electrode layer is formed on the surface of the lower dielectric layer by plasma spraying; and upper dielectric layer processing, wherein the above-described processing method for the upper dielectric layer of the lower electrode is adopted.

[0017] The lower electrode formed using this process has fewer surface breaks, reducing the possibility of mura formation during dry etching.

[0018] Furthermore, in the lower dielectric layer sputtering, the plasma sputtering path is an S-shaped sputtering path, and the sputtering path is repeated until the thickness of the upper dielectric layer reaches the preset requirement. The step size of the sputtering path is 5-10mm.

[0019] Furthermore, during the lower dielectric layer sputtering, the sputtering material used is either alumina or yttrium oxide, and the gas used to form the plasma is argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The thickness of the lower dielectric layer formed by sputtering is 200-500 μm.

[0020] Furthermore, during electrode layer sputtering, the sputtering material used is either molybdenum or tungsten, and the thickness of the electrode layer formed by sputtering is 20-70 μm. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the lower electrode structure in an embodiment of the present invention;

[0022] Figure 2 This describes the existing methods for dielectric layer melting and sandblasting.

[0023] Figure 3 This is a cross-sectional view of the upper dielectric layer formed after the upper dielectric layer is sprayed in the prior art.

[0024] Figure 4 This is the spraying path for the upper dielectric layer in one embodiment of the present invention;

[0025] Figure 5 This is the spraying path for the upper dielectric layer in another embodiment of the present invention.

[0026] In the picture:

[0027] 1. Metal substrate; 2. Lower dielectric layer; 3. Electrode layer; 4. Upper dielectric layer; 4. Protrusion; 5. Glass substrate. Detailed Implementation

[0028] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby providing a clearer and more explicit definition of the scope of protection of the present invention.

[0029] A manufacturing process for a lower electrode according to the present invention includes the following steps:

[0030] S1. Metal substrate processing: The metal substrate 1 is fabricated through machining and welding. The substrate material can be aluminum alloy, titanium alloy, or stainless steel. The welding method is vacuum welding.

[0031] S2, Lower dielectric layer spraying: The lower dielectric layer 2 is fabricated on the surface of the metal substrate using plasma spraying.

[0032] The spraying material used is ceramic materials such as alumina and yttrium oxide. The gas used to form the plasma is argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The thickness of the lower dielectric layer formed by spraying is 200-500 μm. The spraying power is 40-80 kW.

[0033] In the lower dielectric layer deposition process, the plasma deposition path is an S-shaped path, as shown in the appendix. Figure 2 As shown, the specific direction of the sputtering path is: long-line sputtering—short-line sputtering—reverse long-line sputtering—short-line sputtering—long-line sputtering—short-line sputtering, repeating this pattern. When a sputtering path is completed, this sputtering path is repeated until the thickness of the upper dielectric layer reaches the preset requirement. That is, after one sputtering along the sputtering path, the previous sputtering path is repeated again until the thickness of the lower dielectric layer reaches 200-500μm. The step size of the sputtering path is 5-10mm, that is, the distance between two adjacent long sputtering lines in the sputtering path is 5-10mm.

[0034] S3, Electrode layer spraying: Electrode layer 3 is fabricated on the surface of the lower dielectric layer using plasma spraying.

[0035] During electrode layer deposition, the deposition material used is molybdenum, tungsten, or other materials with chemically stable properties at high temperatures. The gas used to form the plasma is argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The deposition power is 50-90 kW. The thickness of the electrode layer formed by deposition is 20-70 μm.

[0036] S4. Processing of the upper dielectric layer: Forming the upper dielectric layer 4 on the electrode layer, specifically including:

[0037] S41, upper dielectric layer spraying: plasma spraying is performed on the surface of the electrode layer to form the upper dielectric layer 4.

[0038] During the top dielectric layer deposition process, the thickness of the formed top dielectric layer is 400-700 μm, and the deposition material is ceramics such as alumina and yttrium oxide. The gas used to form the plasma is argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The deposition power is 40-80 kW.

[0039] The plasma spraying process consists of N S-shaped scanning paths, with the starting points of these paths staggered by a distance *d* in the same direction. Each scanning path has a step size of 5-10 mm, and the stagger distance *d* is 1 ± 0.5 mm. The use of these staggered N S-shaped scanning paths ensures that the overlapping areas of the long melt rays within each path are also staggered, resulting in a more uniform surface for the entire dielectric layer. This homogenization of the overlapping areas reduces differences in adhesion between different regions within the dielectric layer, minimizing discontinuities in subsequent sandblasting processes caused by poor adhesion in the overlapping areas.

[0040] In one embodiment, the starting point of the initial scan path is at a distance D from the product edge. When D ≥ the number of plasma sprays × d, plasma spraying continues along the path until the thickness of the upper dielectric layer reaches the preset requirement. That is, each scan path is staggered by 1 mm until the thickness of the upper dielectric layer formed by plasma spraying meets the requirement, wherein the number of plasma sprays is determined by the thickness of the upper dielectric layer and the thickness of a single plasma spray. This situation requires that the starting point S of the initial scan path be at a relatively large distance D from the product edge.

[0041] See appendix Figure 4 As shown, the distance D from the starting point S of the first scanning path to the edge of the product is ≥20mm. A scanning path with a step size of 5mm is used. The first melting is completed along the first scanning path starting from the starting point S. The starting position of the second melting is moved 1mm to the right from the starting point S. The starting position of the third melting is moved 2mm to the right from the starting point S, and so on, until the thickness of the upper dielectric layer reaches 400-700μm. At this time, N is greater than or equal to 20.

[0042] In another embodiment, when the distance D from the starting point of the scanning path to the edge of the product is small, D < number of sprays × d, meaning that the thickness of the upper dielectric layer cannot reach the required level in one spray path. N S-shaped scanning paths can be treated as a loop, repeating the spray path until the upper dielectric layer thickness reaches the preset requirement. The larger N is, the smaller the overlap area between the long spray lines of each scanning path, resulting in a more uniform surface of the upper dielectric layer. To ensure that the scanning path in one loop covers the part of one scanning path, N in one loop cannot be less than the step size of the scanning path divided by the offset distance d; in this embodiment, N is not less than 5.

[0043] See appendix Figure 5 As shown, the distance from the starting point S of the first scanning path to the edge of the product is 20mm > D ≥ 5mm. A scanning path with a step size of 5mm is used. Starting from the starting point S, the first melting process is completed along the first scanning path. The starting position of the second melting process is moved 1mm to the right from the starting point S; the starting position of the third melting process is moved 2mm to the right; the starting position of the fourth melting process is moved 3mm to the right; and the starting position of the fifth melting process is moved 5mm to the right. After completing 5 melting processes, the starting position of the scanning path returns to the starting point S, and the above melting path is repeated, i.e., 5 melting processes constitute one cycle, until the thickness of the upper dielectric layer reaches 400-600 micrometers.

[0044] S42. Sealing: The dielectric layer formed by plasma spraying is sealed to increase the density of the sprayed layer. The sealing material is an epoxy resin or silicone-based polymer material.

[0045] S43. Grinding: Grind the upper dielectric layer after sealing until the flatness of its surface meets the preset requirements, and reduce the thickness of the upper dielectric layer to approach the finished product requirements. During grinding, protrusions 41 are formed around the upper dielectric layer.

[0046] The grinding process is performed on a grinding machine, with a grinding depth of 2 μm per pass. The grinding tool used is a resin-embedded diamond particle tool, and the flatness of the upper dielectric layer after grinding is within 50 μm. A grinding machine is used here instead of a machining center. The resin provides a certain buffer to the tool, thus reducing tool marks. The roughness of the upper dielectric layer after grinding is approximately 1 μm.

[0047] S44. Sandblasting: The periphery of the upper dielectric layer after grinding is masked, and the unmasked area is sandblasted. The sandblasting route is the same as the melting route.

[0048] The perimeter of the upper dielectric layer is masked with tape, the width of which is equal to the width of the raised area 41 around the upper dielectric layer. The unmasked areas are then sandblasted. The sandblasting material is 40-100 grade white corundum, the sandblasting pressure is 0.4-1MPa, and the roughness of the upper dielectric layer after sandblasting is Ra3-10μm.

[0049] The sandblasting path is the same as the blasting path, when the blasting path uses an additional... Figure 4 When blasting, the sandblasting path also adopts an attached method. Figure 4 The route in the middle, when the sandblasting route adopts an attached Figure 5 When blasting, the sandblasting path also adopts an attached method. Figure 5 The route in the middle.

[0050] This results in N S-shaped blasting paths, with the starting points of these paths offset by a distance d in the same direction. The offset between adjacent blasting paths helps to homogenize the surface morphology differences caused by varying etching rates at the center and edges of the blasting paths.

[0051] This invention employs multiple offset paths during the melting and sandblasting processes of the upper dielectric layer, increasing the uniformity of the superimposed area, reducing the waviness formed on the surface of the upper dielectric layer, and improving the uniform coating of the upper dielectric layer surface. This effectively reduces various discontinuities generated during the fabrication of the lower electrode, thereby reducing uneven cooling of the glass substrate caused by discontinuities during dry etching, and thus reducing the generation of mura during dry etching.

[0052] The above embodiments are only for illustrating the technical concept and features of the present invention. Their purpose is to enable those skilled in the art to understand the content of the present invention and implement it. They should not be used to limit the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A method for processing the upper dielectric layer of the lower electrode, characterized in that: Includes the following steps The upper dielectric layer is formed by plasma spraying on the surface of the electrode layer. The plasma spraying path is N S-shaped scanning paths, and the starting points of the N scanning paths are staggered by a distance d in the same direction. The staggered distance d is 1±0.5 mm, and the step size of each scanning path is 5-10 mm. Sealing: Sealing the dielectric layer formed by plasma spraying; Grinding involves grinding the upper dielectric layer after sealing until the flatness of its surface meets the preset requirements, and forming protrusions around the upper dielectric layer. Sandblasting involves masking the periphery of the ground dielectric layer and sandblasting the unmasked areas, with the sandblasting path being the same as the blasting path.

2. The method for processing the upper dielectric layer of the lower electrode according to claim 1, characterized in that: The starting point of the initial scanning path is D from the edge of the product. When D ≥ number of melting shots × d, melting is performed along the melting path until the thickness of the upper dielectric layer reaches the preset requirement. When D < number of spraying times × d, the spraying path is used as a cycle, and the spraying path is repeated until the thickness of the upper dielectric layer reaches the preset requirement.

3. The method for processing the upper dielectric layer of the lower electrode according to claim 1, characterized in that: The grinding is performed on a grinding machine, with a grinding depth of 2μm per pass. The grinding tool used is a tool with diamond particles embedded in the resin. The flatness of the upper dielectric layer after grinding is within 50μm.

4. The method for processing the upper dielectric layer of the lower electrode according to claim 1, characterized in that: In the sandblasting, the width of the shielding is the width of the protrusion formed around the upper dielectric layer by the grinding, the sandblasting material is No. 40-100 white corundum, the sandblasting pressure is 0.4-1MPa, and the roughness of the upper dielectric layer after sandblasting is Ra3-5μm.

5. The method for processing the upper dielectric layer of the lower electrode according to claim 1, characterized in that: When the upper dielectric layer is sprayed, the spraying material is either alumina or yttrium oxide, and the gas used to form the plasma is argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The thickness of the upper dielectric layer formed by the spraying is 400-700 μm.

6. A manufacturing process for a lower electrode, characterized in that: Includes the following steps: Metal substrate processing; Underlying dielectric layer spraying: A lower dielectric layer is fabricated on the surface of a metal substrate using plasma spraying. Electrode layer spraying: The electrode layer is fabricated on the surface of the underlying dielectric layer using plasma spraying. The upper dielectric layer is fabricated using the fabrication method for the upper dielectric layer of the lower electrode as described in any one of claims 1-5.

7. The manufacturing process of the lower electrode according to claim 6, characterized in that: In the lower dielectric layer sputtering process, the plasma sputtering path is an S-shaped sputtering path, and the sputtering path is repeated until the thickness of the upper dielectric layer reaches the preset requirement. The step size of the sputtering path is 5-10 mm.

8. The manufacturing process of the lower electrode according to claim 7, characterized in that: During the lower dielectric layer deposition process, the deposition material used is either alumina or yttrium oxide, and the gas used to form the plasma is either argon, a mixture of argon and hydrogen, or a mixture of argon and helium. The thickness of the lower dielectric layer formed by deposition is 200-500 μm.

9. The manufacturing process of the lower electrode according to claim 7, characterized in that: When the electrode layer is sputtered, the sputtering material used is either molybdenum or tungsten, and the thickness of the electrode layer formed by sputtering is 20-70 μm.

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