A semiconductor structure and a method for forming the same

By using a bonding structure including the first metal layer and the second metal layer in a three-dimensional integrated circuit, the problem of copper-copper bonding in the prior art is solved, and efficient and reliable bonding is achieved at lower temperatures Join.

CN115565984BActive Publication Date: 2025-02-25CHANGXIN MEMORY TECH INC
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Patent Information

Application Number
CN202110746139.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-07-01
Publication Date
2025-02-25
Estimated Expiration
2041-07-01

AI Technical Summary

Technical Problem

In existing three-dimensional integrated circuits, copper-copper bonding between wafers is prone to failure, and bonding performance needs to be improved.

Method used

The bonding structure is adopted that includes a first metal layer and a second metal layer with a melting point smaller than the first metal layer. The first metal layer and the second metal layer form a bonding surface together, and the second metal layer melts and softens at a lower temperature. The first metal layer is heat-expanded to push the second metal layer into bonding.

Benefits of technology

Bonding connections at lower temperatures are achieved, reducing the flatness requirements for bonding surfaces, and improving the reliability and strength of bonding.

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Abstract

An embodiment of the present invention provides a semiconductor structure, including: a first substrate, a surface of the first substrate having a first opening; a first bonding structure, located in the first opening; the first bonding structure includes a first metal layer and a second metal layer having a melting point lower than that of the first metal layer, the first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface has a first groove, the area of ​​the first opening not occupied by the first metal layer and the first groove constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and the surface of the second metal layer exposed from the second groove constitutes a bonding surface of the first bonding structure.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] Three-dimensional integrated circuits can improve packaging density, circuit operating speed, and realize new multifunctional devices and circuit systems. Currently, all semiconductor manufacturers are committed to the research of three-dimensional integrated circuits.

[0003] In a three-dimensional integrated circuit, bonding between wafers is involved. In the prior art, bonding between wafers is mainly achieved through copper-copper bonding.

[0004] However, the copper-copper bonding in the prior art is prone to failure, and the bonding performance needs to be improved. Summary of the invention

[0005] In view of this, an embodiment of the present invention provides a semiconductor structure and a method for forming the same in order to solve at least one problem existing in the background technology.

[0006] To achieve the above object, the technical solution of the present invention is achieved as follows:

[0007] An embodiment of the present invention provides a semiconductor structure, comprising: a first substrate, a surface of the first substrate having a first opening;

[0008] A first bonding structure is located in the first opening; the first bonding structure includes a first metal layer and a second metal layer with a melting point lower than that of the first metal layer, the first metal layer includes a first surface in contact with the bottom surface of the first opening and a second surface opposite to the first surface, the second surface has a first groove, the area of ​​the first opening not occupied by the first metal layer and the first groove constitutes the second groove, the second metal layer is formed in the first groove and the second groove, and the surface of the second metal layer exposed from the second groove constitutes the bonding surface of the first bonding structure.

[0009] In the above solution, the first metal layer further includes a third groove located below the first groove, the projection of the first groove on the first surface falls within the projection of the third groove on the first surface, and the second metal layer is formed in the third groove.

[0010] In the above solution, the semiconductor structure further includes: a first conductive via located in the first substrate, the first conductive via being connected to the first bonding structure, and the projections of the first conductive via and the first groove in a direction perpendicular to the first surface overlap.

[0011] In the above solution, the first groove penetrates the first metal layer, and the second metal layer located in the first groove is directly connected to the first conductive through hole.

[0012] In the above solution, the first metal layer includes at least one material selected from copper or tungsten, and the second metal layer includes at least one material selected from bismuth, cadmium, tin, lead, dysprosium, and indium.

[0013] In the above solution, the shape of the bonding surface of the first bonding structure includes circular, elliptical, or rectangular.

[0014] In the above solution, the opening shape of the first groove includes a circle or a rectangle; the outer contour shape of the second surface of the first metal layer includes a circle or a rectangle.

[0015] In the above solution, the semiconductor structure further includes: a second substrate, a surface of the second substrate having a second opening;

[0016] The second bonding structure is located in the second opening and is used for bonding to the first bonding structure.

[0017] In the above solution, the second bonding structure includes a third metal layer made of the same material as the first metal layer, and the third metal layer includes a first surface in contact with the bottom surface of the second opening and a second surface opposite to the first surface.

[0018] In the above solution, the second surface of the third metal layer constitutes the bonding surface of the second bonding structure, and the second surface of the third metal layer is concave and bonded to the bonding surface of the first bonding structure.

[0019] In the above solution, the second bonding structure further includes a fourth metal layer made of the same material as the second metal layer;

[0020] The second surface of the third metal layer has a fourth groove, the area of ​​the second opening not occupied by the third metal layer and the fourth groove constitutes a fifth groove, the fourth metal layer is located in the fourth groove and the fifth groove, and the surface of the fourth metal layer exposed from the fifth groove constitutes the bonding surface of the second bonding structure.

[0021] In the above solution, the bonding surface of the first bonding structure and the bonding surface of the second bonding structure have the same shape and area.

[0022] In the above solution, the fourth metal layer does not completely fill the fifth groove, and the distance between the surface of the fourth metal layer exposed from the fifth groove and the surface of the second substrate is between 1-5 nm.

[0023] An embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a first substrate, wherein a first opening is formed on a surface of the first substrate;

[0024] A first bonding structure is formed in the first opening, the first bonding structure including a first metal layer and a second metal layer having a melting point lower than that of the first metal layer; forming the first bonding structure includes: forming a first metal layer in the first opening, the first metal layer including a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface; forming a first groove on the second surface, the area of ​​the first opening not occupied by the first metal layer and the first groove constituting a second groove; forming a second metal layer in the first groove and the second groove, the surface of the second metal layer exposed from the second groove constituting a bonding surface of the first bonding structure.

[0025] In the above scheme, forming the first bonding structure also includes: forming a third groove below the first groove of the first metal layer, the projection of the first groove on the first surface falls within the projection of the third groove on the first surface, and the second metal layer is formed in the third groove.

[0026] In the above solution, the method further includes: forming a first conductive through hole in the first substrate, wherein the projections of the first conductive through hole and the first groove in a direction perpendicular to the first surface overlap.

[0027] In the above solution, the method further includes: providing a second substrate, a second opening being formed on a surface of the second substrate; forming a second bonding structure in the second opening; and bonding the second bonding structure to the first bonding structure.

[0028] In the above scheme, forming the second bonding structure includes: forming a third metal layer, the material of the third metal layer is the same as the material of the first metal layer, and the third metal layer includes a first surface in contact with the bottom surface of the second opening and a second surface arranged opposite to the first surface.

[0029] In the above scheme, forming the second bonding structure also includes: forming a fourth groove on the second surface of the third metal layer, and the area of ​​the second opening not occupied by the third metal layer and the fourth groove constitutes a fifth groove; forming a fourth metal layer in the fourth groove and the fifth groove, the material of the fourth metal layer is the same as the material of the second metal layer, and the surface of the fourth metal layer exposed from the fifth groove constitutes the bonding surface of the second bonding structure.

[0030] The semiconductor structure and the method for forming the same provided by the embodiment of the present invention, wherein the semiconductor structure comprises: a first substrate, the surface of the first substrate has a first opening; a first bonding structure, located in the first opening; the first bonding structure comprises a first metal layer and a second metal layer having a melting point lower than that of the first metal layer, the first metal layer comprises a first surface in contact with the bottom surface of the first opening and a second surface opposite to the first surface, the second surface has a first groove, the part of the first opening not filled by the first metal layer constitutes the second groove, the second metal layer is formed in the first groove and the second groove, and the surface of the second metal layer exposed from the second groove constitutes the bonding surface of the first bonding structure. When the first bonding structure is bonded to other bonding structures, the second metal layer melts and softens at a relatively low temperature, and the first metal layer expands due to heat to push the second metal layer toward the other bonding structures, so that bonding connection at a relatively low temperature can be achieved. In addition, the second metal layer in a molten state can better fill the gap between the first bonding structure and the other bonding structures, reducing the flatness requirements for the bonding surface during bonding.

[0031] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of a semiconductor structure provided in the related art;

[0033] Figure 2 A schematic diagram of a semiconductor structure provided by an embodiment of the present invention;

[0034] Figure 3a-3d for Figure 2 A cross-sectional view along the dotted line AA';

[0035] Figure 4 A schematic diagram of a first groove penetrating a first metal layer provided by an embodiment of the present invention;

[0036] Figure 5 A schematic diagram of a first metal layer having a third groove provided in an embodiment of the present invention;

[0037] Figure 6 A schematic diagram of a semiconductor structure with a second substrate provided by an embodiment of the present invention;

[0038] Figure 7 A schematic diagram of a third metal layer provided in an embodiment of the present invention having a concave second surface;

[0039] Figure 8A flowchart of a method for forming a semiconductor structure provided by an embodiment of the present invention;

[0040] Figures 9a-9j A process flow chart of a method for forming a semiconductor structure provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The exemplary embodiments disclosed in the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the specific embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0042] In the following description, a large number of specific details are given to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0043] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0044] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present invention necessarily has the first element, component, region, layer or part.

[0045] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0046] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0047] Figure 1 A schematic diagram of a semiconductor structure provided for related art, as shown in the figure, the semiconductor structure includes a first substrate 11, a first bonding structure 12 formed in the first substrate 11, a first conductive via 13 formed in the first substrate 11 and connected to the first bonding structure 12, a second substrate 21, a second bonding structure 22 formed in the second substrate 21, and a second conductive via 23 formed in the second substrate 21 and connected to the second bonding structure 22. The material of the first bonding structure 12 is copper, the material of the second bonding structure 22 is also copper, and the first bonding structure 12 and the second bonding structure 22 form a copper-copper bond.

[0048] However, copper-copper bonding requires mutual bonding at a high temperature of 400°C. The high bonding temperature limits the selection of many material processes and may cause component characteristic deviations. In addition, copper-copper bonding has high requirements for surface flatness, which increases the difficulty of process manufacturing.

[0049] Based on this, the following technical solutions of the embodiments of the present invention are proposed.

[0050] An embodiment of the present invention provides a semiconductor structure, including: a first substrate, a surface of the first substrate having a first opening; a first bonding structure, located in the first opening; the first bonding structure includes a first metal layer and a second metal layer having a melting point lower than that of the first metal layer, the first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface has a first groove, the area of ​​the first opening not occupied by the first metal layer and the first groove constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and the surface of the second metal layer exposed from the second groove constitutes a bonding surface of the first bonding structure.

[0051] The first bonding structure provided by the embodiment of the present invention includes a second metal layer with a lower melting point. Compared with other bonding structures including only the first metal layer, the first bonding structure provided by the embodiment of the present invention can be bonded at a lower temperature. At the same time, when the first bonding structure is bonded, the second metal layer in a molten state can better fill the gap between the first bonding structure and the other bonding structure, thereby reducing the flatness requirement for the bonding surface during bonding.

[0052] In order to make the above-mentioned purposes, features and advantages of the present invention more clearly understood, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings. When describing the embodiments of the present invention in detail, for the convenience of explanation, the schematic diagrams will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention.

[0053] Figure 2 A schematic diagram of a semiconductor structure provided for an embodiment of the present invention, as shown in the figure, the semiconductor structure includes a first substrate 11, the surface of the first substrate 11 has a first opening 11c; a first bonding structure 12, formed in the first opening 11c; the first bonding structure 12 includes a first metal layer 121 and a second metal layer 122, the melting point of the second metal layer 122 is lower than that of the first metal layer 121, the first metal layer 121 includes a first surface 121a in contact with the bottom surface of the first opening 11c and a second surface 121b opposite to the first surface 121a, the second surface 121b has a first groove 121c, the area of ​​the first opening 11c not occupied by the first metal layer 121 and the first groove 121c constitutes a second groove 11d, the second metal layer 122 is formed in the first groove 121c and the second groove 11d, and the surface of the second metal layer 122 exposed from the second groove 11d constitutes the bonding surface of the first bonding structure 12.

[0054] It should be noted that the bonding surface of the first bonding structure 12 refers to the surface of the first bonding structure 12 that is bonded to other bonding structures during bonding. In one embodiment, the shape of the bonding surface of the first bonding structure 12 includes but is not limited to circular, elliptical, or rectangular.

[0055] The material of the first substrate 11 may be silicon, germanium, gallium nitride, gallium arsenide, indium phosphide (InP), silicon on insulator (SOI), germanium on insulator (GeOI), etc., but is not limited thereto, and may also be other materials that can be used as a substrate.

[0056] In one embodiment, the first metal layer 121 includes but is not limited to at least one of copper and tungsten.

[0057] In one embodiment, the second metal layer 122 includes but is not limited to at least one of bismuth, cadmium, tin, lead, dysprosium, and indium.

[0058] In one embodiment, the semiconductor structure further includes: a first conductive via 13, located in the first substrate 11, the first conductive via 13 is connected to the first bonding structure 12, and the projections of the first conductive via 13 and the first groove 121c in a direction perpendicular to the first surface 121a coincide with each other. In other words, the cross section of the first conductive via 13 parallel to the first surface 121a and the cross section of the first groove 121c parallel to the first surface 121a have the same shape and size. In this way, the thermal expansion thrust of the first conductive via 13 on the molten second metal layer 122 during bonding can be increased, thereby improving bonding reliability.

[0059] In a specific embodiment, the first conductive through hole 13 and the first groove 121 c are cylindrical, and the diameter of the first groove 121 c is the same as the diameter of the first conductive through hole 13 .

[0060] The first conductive via 13 includes but is not limited to a through silicon via (TSV), and the first conductive via 13 is used to transmit an electrical signal.

[0061] In a specific embodiment, the material of the first conductive via 13 is the same as that of the first metal layer 121 .

[0062] In a specific embodiment, the material of the first conductive via 13 includes but is not limited to copper.

[0063] Figure 3a-3d yes Figure 2 As shown in the cross-sectional view along the dotted line AA′, the opening shape of the first groove 121 c includes a circle or a rectangle; the outer contour shape of the second surface 121 b of the first metal layer 121 includes a circle or a rectangle.

[0064] In a specific embodiment, the opening shape of the first groove 121c is rectangular, and the outer contour shape of the second surface 121b of the first metal layer 121 is rectangular. Figure 3a shown.

[0065] In a specific embodiment, the opening shape of the first groove 121c is circular, and the outer contour shape of the second surface 121b of the first metal layer 121 is rectangular. Figure 3b shown.

[0066] In a specific embodiment, the opening shape of the first groove 121c is rectangular, and the outer contour shape of the second surface 121b of the first metal layer 121 is circular. Figure 3c shown.

[0067] In a specific embodiment, the opening shape of the first groove 121c is circular, and the outer contour shape of the second surface 121b of the first metal layer 121 is circular. Figure 3d shown.

[0068] In one embodiment, the first groove 121c penetrates the first metal layer 121, and the second metal layer 122 located in the first groove 121c is directly connected to the first conductive via 13. Figure 4 shown.

[0069] In one embodiment, the first metal layer 121 further includes a third groove 121d located below the first groove 121c, the projection of the first groove 121c on the first surface 121a falls within the projection of the third groove on the first surface, and the second metal layer 122 is formed in the third groove 121d. Figure 5 When the first bonding structure 12 is bonded to other bonding structures, the presence of the third groove 121d can increase the flow rate of the second metal layer 122 in a molten state toward the other bonding structures, ensuring that the second metal layer 122 is in full contact with the other bonding structures, thereby improving the bonding success rate and reducing the flatness requirements of the bonding surface during bonding.

[0070] See also Figure 6 In one embodiment, the semiconductor structure further includes a second substrate 21 , a surface of the second substrate 21 having a second opening 21 c ; a second bonding structure 22 , located in the second opening 21 c , for bonding to the first bonding structure 12 .

[0071] The second bonding structure 22 includes a third metal layer 221 whose material is the same as that of the first metal layer 121; the third metal layer 221 includes a first surface 221a in contact with the bottom surface of the second opening 21c and a second surface 221b opposite to the first surface 221a.

[0072] In one embodiment, the second bonding structure 22 further includes a fourth metal layer 222 made of the same material as the second metal layer 122;

[0073] The second surface 221b of the third metal layer 221 has a fourth groove 221c, the area of ​​the second opening 21c not occupied by the third metal layer 221 and the fourth groove 221c constitutes a fifth groove 21d, the fourth metal layer 222 is located in the fourth groove 221c and the fifth groove 21d, and the surface of the fourth metal layer 222 exposed from the fifth groove 21d constitutes the bonding surface of the second bonding structure 22.

[0074] It should be clear that the bonding surface of the second bonding structure 22 refers to the surface of the second bonding structure 22 that is bonded to other bonding structures during bonding. In one embodiment, the bonding surface of the first bonding structure 12 and the bonding surface of the second bonding structure 22 have the same shape and area. However, it is not limited to this. In other embodiments, the shape and size of the bonding surface of the second bonding structure 22 may be different from the shape and size of the bonding surface of the first bonding structure 12.

[0075] In one embodiment, the fourth metal layer 222 does not completely fill the fifth groove 21d, and the distance between the surface of the fourth metal layer 222 exposed from the fifth groove 21d and the surface of the second substrate 21 is between 1-5 nm. The existence of the distance can allow the volume expansion of the third metal layer 221 during bonding, thereby improving the reliability of bonding.

[0076] In one embodiment, the second metal layer 122 does not completely fill the second groove 11d, and the distance between the surface of the second metal layer 122 exposed from the second groove 11d and the surface of the first substrate 11 is between 1-5 nm. The existence of the distance can allow the volume expansion of the first metal layer 121 during bonding, thereby improving the reliability of bonding.

[0077] In one embodiment, the semiconductor structure further includes: a second conductive via 23 formed in the second substrate 21 , and the second conductive via 23 is connected to the second bonding structure 22 .

[0078] In a specific embodiment, the projections of the second conductive via 23 and the fourth groove 221c in a direction perpendicular to the first surface 221a of the third metal layer 221 overlap. In this way, the thermal expansion thrust of the second conductive via 23 on the molten fourth metal layer 222 during bonding can be increased, thereby improving bonding reliability.

[0079] See also Figure 7 In one embodiment, the second surface 221b of the third metal layer 221 is concave. In a specific embodiment, the concave shape includes but is not limited to a spherical concave shape.

[0080] When the third metal layer 221 is bonded to the first bonding structure 12, the first metal layer 121 and / or the first conductive via 13 expand due to heat, pushing the molten second metal layer 122 to fuse with the second surface 221b of the third metal layer 221 to form an intermetallic compound, thereby increasing the bonding strength. At the same time, since the second metal layer 122 in a molten state has fluidity, it will fill the space formed by the concave shape, and the bonding reliability will not be affected by the concave shape of the bonding surface.

[0081] In order to ensure the reliability of bonding, the depth of the recess should not be too large; in some embodiments, the maximum depth of the recess is between 1-5 nm.

[0082] The present invention also provides a method for forming a semiconductor structure. Figure 8 As shown, the method comprises the following steps:

[0083] Step 801, providing a first substrate, wherein a first opening is formed on a surface of the first substrate;

[0084] Step 802, forming a first bonding structure in the first opening, the first bonding structure including a first metal layer and a second metal layer having a melting point lower than that of the first metal layer; forming the first bonding structure including: forming a first metal layer in the first opening, the first metal layer including a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface; forming a first groove on the second surface, the area of ​​the first opening not occupied by the first metal layer and the first groove constituting a second groove; forming a second metal layer in the first groove and the second groove, the surface of the second metal layer exposed from the second groove constituting a bonding surface of the first bonding structure.

[0085] Next, combine Figures 9a-9j The method for forming the semiconductor structure according to the embodiment of the present invention is further described in detail.

[0086] First, step 801 is performed to provide a first substrate 11, wherein a first opening 11c is formed on a surface of the first substrate 11. Figure 9a shown.

[0087] The material of the first substrate 11 may be silicon, germanium, gallium nitride, gallium arsenide, indium phosphide (InP), silicon on insulator (SOI), germanium on insulator (GeOI), etc., but is not limited thereto, and may also be other materials that can be used as a substrate.

[0088] Next, step 802 is performed to form a first bonding structure 12 in the first opening 11c. The first bonding structure 12 includes a first metal layer 121 and a second metal layer 122 having a melting point lower than that of the first metal layer 121. Figure 9b-9d shown.

[0089] See also Figure 9b A first metal layer 121 is formed in the first opening 11c, and the first metal layer 121 includes a first surface 121a in contact with a bottom surface of the first opening 11c and a second surface 121b opposite to the first surface 121a.

[0090] See also Fig.9c A first groove 121c is formed on the second surface 121b of the first metal layer 121, and an area of ​​the first opening 11c not occupied by the first metal layer 121 and the first groove 121c constitutes a second groove 11d.

[0091] See also Figure 9d A second metal layer 122 is formed in the first groove 121 c and the second groove 11 d , and a surface of the second metal layer 122 exposed from the second groove 11 d constitutes a bonding surface of the first bonding structure 12 .

[0092] In one embodiment, forming the first bonding structure 12 further includes: forming a third groove 121d below the first groove 121c of the first metal layer 121, wherein the projection of the first groove 121c on the first surface 121a falls within the projection of the third groove 121d on the first surface 121a, and the second metal layer 122 is formed in the third groove 121d, such as Fig.9e shown.

[0093] In one embodiment, the method for forming the semiconductor structure further includes: forming a first conductive via 13 in the first substrate 11, wherein the projection of the first conductive via 13 and the first groove 121c in a direction perpendicular to the first surface 121a coincides, such as Figure 9f shown.

[0094] like Figure 9g-9j As shown, in one embodiment, the method for forming the semiconductor structure further includes: providing a second substrate 21, a second opening 21c is formed on the surface of the second substrate 21; forming a second bonding structure 22 in the second opening 21c; and bonding the second bonding structure 22 to the first bonding structure 12.

[0095] See also Figure 9g , providing a second substrate 21, on the surface of which a second opening 21c is formed.

[0096] The material of the second substrate 21 may be silicon, germanium, gallium nitride, gallium arsenide, indium phosphide (InP), silicon on insulator (SOI), germanium on insulator (GeOI), etc., but is not limited thereto, and may also be other materials that can be used as a substrate.

[0097] In one embodiment, the second substrate 21 is made of the same material as the first substrate 11. However, the present invention is not limited thereto, and the second substrate 21 and the first substrate 11 may also be made of different materials.

[0098] In one embodiment, forming the second bonding structure 22 includes: forming a third metal layer 221, the material of the third metal layer 221 is the same as the material of the first metal layer 121, the third metal layer 221 includes a first surface 221a in contact with the bottom surface of the second opening 21c and a second surface 221b arranged opposite to the first surface 221a. In a specific embodiment, the third metal layer 221 substantially fills the second opening 21c, and the second surface 221b constitutes a bonding surface of the second bonding structure 22. In a more specific embodiment, the second surface 221b is concave, such as Figure 9h shown.

[0099] In one embodiment, the second bonding structure 22 further includes a fourth metal layer 222 formed on the third metal layer 221. Figure 9i .

[0100] In this embodiment, forming the second bonding structure 22 includes: forming a fourth groove 221c on the second surface 221b of the third metal layer 221, and the area of ​​the second opening 21c not occupied by the third metal layer 221 and the fourth groove 221c constitutes a fifth groove 21d; forming a fourth metal layer 222 in the fourth groove 221c and the fifth groove 21d, the material of the fourth metal layer 222 is the same as the material of the second metal layer 122, and the surface of the fourth metal layer 222 exposed from the fifth groove 21d constitutes the bonding surface of the second bonding structure 22.

[0101] In one embodiment, the method for forming the semiconductor structure further includes: forming a second conductive via 23 in the second substrate 21 , wherein the second conductive via 23 is connected to the second bonding structure 22 .

[0102] After the second bonding structure 22 is completed, the second bonding structure 22 is bonded to the first bonding structure 12 .

[0103] In one embodiment, bonding the second bonding structure 22 to the first bonding structure 12 comprises: bonding the surface of the fourth metal layer 222 exposed from the fifth groove 21d to the surface of the second metal layer 122 exposed from the second groove 11d, wherein the bonding Figure 9j .

[0104] In one embodiment, bonding the second bonding structure 22 to the first bonding structure 12 includes: bonding the second surface 221 b of the third metal layer 221 to the surface of the second metal layer 122 exposed from the second groove 11 d .

[0105] The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A semiconductor structure, characterized in that: include: A first substrate, wherein a surface of the first substrate has a first opening; a first bonding structure, located in the first opening; The first bonding structure includes a first metal layer and a second metal layer having a melting point lower than that of the first metal layer, the first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface has a first groove, a region of the first opening not occupied by the first metal layer and the first groove constitutes the second groove, the second metal layer is formed in the first groove and the second groove, and a surface of the second metal layer exposed from the second groove constitutes a bonding surface of the first bonding structure; A first conductive via is located in the first substrate, the first conductive via is connected to the first bonding structure, and projections of the first conductive via and the first groove in a direction perpendicular to the first surface overlap.

2. The semiconductor structure according to claim 1, characterized in that: The first metal layer further includes a third groove located below the first groove, a projection of the first groove on the first surface falls within a projection of the third groove on the first surface, and the second metal layer is formed in the third groove.

3. The semiconductor structure according to claim 1, characterized in that: The first groove penetrates the first metal layer, and the second metal layer located in the first groove is directly connected to the first conductive through hole.

4. The semiconductor structure according to claim 1, characterized in that The first metal layer includes at least one material selected from copper and tungsten, and the second metal layer includes at least one material selected from bismuth, cadmium, tin, lead, dysprosium, and indium.

5. The semiconductor structure according to claim 1, characterized in that: The bonding surface of the first bonding structure may have a circular shape, an elliptical shape, or a rectangular shape.

6. The semiconductor structure according to claim 1, characterized in that The opening shape of the first groove includes a circle or a rectangle; the outer contour shape of the second surface of the first metal layer includes a circle or a rectangle.

7. The semiconductor structure according to claim 1, characterized in that: The semiconductor structure further includes: a second substrate, a surface of the second substrate having a second opening; The second bonding structure is located in the second opening and is used for bonding to the first bonding structure.

8. The semiconductor structure according to claim 7, characterized in that: The second bonding structure includes a third metal layer made of the same material as the first metal layer, and the third metal layer includes a first surface contacting a bottom surface of the second opening and a second surface opposite to the first surface.

9. The semiconductor structure according to claim 8, characterized in that: The second surface of the third metal layer constitutes a bonding surface of the second bonding structure. The second surface of the third metal layer is concave and is bonded to the bonding surface of the first bonding structure.

10. The semiconductor structure according to claim 8, characterized in that The second bonding structure further includes a fourth metal layer made of the same material as the second metal layer; The second surface of the third metal layer has a fourth groove, the area of ​​the second opening not occupied by the third metal layer and the fourth groove constitutes a fifth groove, the fourth metal layer is located in the fourth groove and the fifth groove, and the surface of the fourth metal layer exposed from the fifth groove constitutes the bonding surface of the second bonding structure.

11. The semiconductor structure according to claim 10, characterized in that: The bonding surface of the first bonding structure and the bonding surface of the second bonding structure have the same shape and area.

12. The semiconductor structure according to claim 10, characterized in that: The fourth metal layer does not completely fill the fifth groove, and a distance between a surface of the fourth metal layer exposed from the fifth groove and the surface of the second substrate is between 1-5 nm.

13. A method for forming a semiconductor structure, characterized in that: include: Providing a first substrate, wherein a first opening is formed on a surface of the first substrate; forming a first bonding structure in the first opening, the first bonding structure comprising a first metal layer and a second metal layer having a melting point lower than that of the first metal layer; Forming the first bonding structure includes: forming a first metal layer in the first opening, the first metal layer including a first surface in contact with the bottom surface of the first opening and a second surface opposite to the first surface; forming a first groove on the second surface, the area of ​​the first opening not occupied by the first metal layer and the first groove constituting a second groove; forming a second metal layer in the first groove and the second groove, the surface of the second metal layer exposed from the second groove constituting a bonding surface of the first bonding structure; The forming method further includes: forming a first conductive via in the first substrate, wherein projections of the first conductive via and the first groove in a direction perpendicular to the first surface overlap.

14. The method for forming a semiconductor structure according to claim 13, wherein: Forming the first bonding structure also includes: forming a third groove below the first groove of the first metal layer, the projection of the first groove on the first surface falls within the projection of the third groove on the first surface, and the second metal layer is formed in the third groove.

15. The method for forming a semiconductor structure according to claim 13, wherein: The method further includes: providing a second substrate, a second opening being formed on a surface of the second substrate; forming a second bonding structure in the second opening; and bonding the second bonding structure to the first bonding structure.

16. The method for forming a semiconductor structure according to claim 15, characterized in that: Forming the second bonding structure includes: forming a third metal layer, the material of the third metal layer is the same as that of the first metal layer, the third metal layer includes a first surface contacting the bottom surface of the second opening and a second surface arranged opposite to the first surface.

17. The method for forming a semiconductor structure according to claim 16, wherein: Forming the second bonding structure also includes: forming a fourth groove on the second surface of the third metal layer, and the area of ​​the second opening not occupied by the third metal layer and the fourth groove constitutes a fifth groove; forming a fourth metal layer in the fourth groove and the fifth groove, the material of the fourth metal layer is the same as the material of the second metal layer, and the surface of the fourth metal layer exposed from the fifth groove constitutes the bonding surface of the second bonding structure.

Citation Information

Patent Citations

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